xref: /netbsd-src/sys/dev/usb/ohci.c (revision 267197ec1eebfcb9810ea27a89625b6ddf68e3e7)
1 /*	$NetBSD: ohci.c,v 1.186 2008/02/03 10:57:12 drochner Exp $	*/
2 /*	$FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $	*/
3 
4 /*
5  * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by Lennart Augustsson (lennart@augustsson.net) at
10  * Carlstedt Research & Technology.
11  * This code is derived from software contributed to The NetBSD Foundation
12  * by Charles M. Hannum.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions
16  * are met:
17  * 1. Redistributions of source code must retain the above copyright
18  *    notice, this list of conditions and the following disclaimer.
19  * 2. Redistributions in binary form must reproduce the above copyright
20  *    notice, this list of conditions and the following disclaimer in the
21  *    documentation and/or other materials provided with the distribution.
22  * 3. All advertising materials mentioning features or use of this software
23  *    must display the following acknowledgement:
24  *        This product includes software developed by the NetBSD
25  *        Foundation, Inc. and its contributors.
26  * 4. Neither the name of The NetBSD Foundation nor the names of its
27  *    contributors may be used to endorse or promote products derived
28  *    from this software without specific prior written permission.
29  *
30  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
31  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
32  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
33  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
34  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
35  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
36  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
37  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
38  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
39  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40  * POSSIBILITY OF SUCH DAMAGE.
41  */
42 
43 /*
44  * USB Open Host Controller driver.
45  *
46  * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
47  * USB spec: http://www.usb.org/developers/docs/usbspec.zip
48  */
49 
50 #include <sys/cdefs.h>
51 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.186 2008/02/03 10:57:12 drochner Exp $");
52 
53 #include <sys/param.h>
54 #include <sys/systm.h>
55 #include <sys/malloc.h>
56 #if defined(__NetBSD__) || defined(__OpenBSD__)
57 #include <sys/kernel.h>
58 #include <sys/device.h>
59 #include <sys/select.h>
60 #include <uvm/uvm_extern.h>
61 #elif defined(__FreeBSD__)
62 #include <sys/module.h>
63 #include <sys/bus.h>
64 #include <machine/bus_pio.h>
65 #include <machine/bus_memio.h>
66 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
67 #include <sys/cpu.h>
68 #endif
69 #endif
70 #include <sys/proc.h>
71 #include <sys/queue.h>
72 
73 #include <sys/bus.h>
74 #include <machine/endian.h>
75 
76 #include <dev/usb/usb.h>
77 #include <dev/usb/usbdi.h>
78 #include <dev/usb/usbdivar.h>
79 #include <dev/usb/usb_mem.h>
80 #include <dev/usb/usb_quirks.h>
81 
82 #include <dev/usb/ohcireg.h>
83 #include <dev/usb/ohcivar.h>
84 #include <dev/usb/usbroothub_subr.h>
85 
86 #if defined(__FreeBSD__)
87 #include <machine/clock.h>
88 
89 #define delay(d)                DELAY(d)
90 #endif
91 
92 #if defined(__OpenBSD__)
93 struct cfdriver ohci_cd = {
94 	NULL, "ohci", DV_DULL
95 };
96 #endif
97 
98 #ifdef OHCI_DEBUG
99 #define DPRINTF(x)	if (ohcidebug) logprintf x
100 #define DPRINTFN(n,x)	if (ohcidebug>(n)) logprintf x
101 int ohcidebug = 0;
102 #ifndef __NetBSD__
103 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
104 #endif
105 #else
106 #define DPRINTF(x)
107 #define DPRINTFN(n,x)
108 #endif
109 
110 #if BYTE_ORDER == BIG_ENDIAN
111 #define	SWAP_ENDIAN	OHCI_LITTLE_ENDIAN
112 #else
113 #define	SWAP_ENDIAN	OHCI_BIG_ENDIAN
114 #endif
115 
116 #define	O16TOH(val)	(sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
117 #define	O32TOH(val)	(sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
118 #define	HTOO16(val)	O16TOH(val)
119 #define	HTOO32(val)	O32TOH(val)
120 
121 struct ohci_pipe;
122 
123 Static ohci_soft_ed_t  *ohci_alloc_sed(ohci_softc_t *);
124 Static void		ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
125 
126 Static ohci_soft_td_t  *ohci_alloc_std(ohci_softc_t *);
127 Static void		ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
128 
129 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
130 Static void		ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
131 
132 #if 0
133 Static void		ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
134 					    ohci_soft_td_t *);
135 #endif
136 Static usbd_status	ohci_alloc_std_chain(struct ohci_pipe *,
137 			    ohci_softc_t *, int, int, usbd_xfer_handle,
138 			    ohci_soft_td_t *, ohci_soft_td_t **);
139 
140 Static void		ohci_shutdown(void *v);
141 Static usbd_status	ohci_open(usbd_pipe_handle);
142 Static void		ohci_poll(struct usbd_bus *);
143 Static void		ohci_softintr(void *);
144 Static void		ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
145 Static void		ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
146 
147 Static usbd_status	ohci_device_request(usbd_xfer_handle xfer);
148 Static void		ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
149 			    ohci_soft_ed_t *);
150 
151 Static void		ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
152 Static void		ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
153 Static void		ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
154 Static ohci_soft_td_t  *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
155 Static void		ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
156 Static void		ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
157 Static ohci_soft_itd_t  *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
158 
159 Static usbd_status	ohci_setup_isoc(usbd_pipe_handle pipe);
160 Static void		ohci_device_isoc_enter(usbd_xfer_handle);
161 
162 Static usbd_status	ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
163 Static void		ohci_freem(struct usbd_bus *, usb_dma_t *);
164 
165 Static usbd_xfer_handle	ohci_allocx(struct usbd_bus *);
166 Static void		ohci_freex(struct usbd_bus *, usbd_xfer_handle);
167 
168 Static usbd_status	ohci_root_ctrl_transfer(usbd_xfer_handle);
169 Static usbd_status	ohci_root_ctrl_start(usbd_xfer_handle);
170 Static void		ohci_root_ctrl_abort(usbd_xfer_handle);
171 Static void		ohci_root_ctrl_close(usbd_pipe_handle);
172 Static void		ohci_root_ctrl_done(usbd_xfer_handle);
173 
174 Static usbd_status	ohci_root_intr_transfer(usbd_xfer_handle);
175 Static usbd_status	ohci_root_intr_start(usbd_xfer_handle);
176 Static void		ohci_root_intr_abort(usbd_xfer_handle);
177 Static void		ohci_root_intr_close(usbd_pipe_handle);
178 Static void		ohci_root_intr_done(usbd_xfer_handle);
179 
180 Static usbd_status	ohci_device_ctrl_transfer(usbd_xfer_handle);
181 Static usbd_status	ohci_device_ctrl_start(usbd_xfer_handle);
182 Static void		ohci_device_ctrl_abort(usbd_xfer_handle);
183 Static void		ohci_device_ctrl_close(usbd_pipe_handle);
184 Static void		ohci_device_ctrl_done(usbd_xfer_handle);
185 
186 Static usbd_status	ohci_device_bulk_transfer(usbd_xfer_handle);
187 Static usbd_status	ohci_device_bulk_start(usbd_xfer_handle);
188 Static void		ohci_device_bulk_abort(usbd_xfer_handle);
189 Static void		ohci_device_bulk_close(usbd_pipe_handle);
190 Static void		ohci_device_bulk_done(usbd_xfer_handle);
191 
192 Static usbd_status	ohci_device_intr_transfer(usbd_xfer_handle);
193 Static usbd_status	ohci_device_intr_start(usbd_xfer_handle);
194 Static void		ohci_device_intr_abort(usbd_xfer_handle);
195 Static void		ohci_device_intr_close(usbd_pipe_handle);
196 Static void		ohci_device_intr_done(usbd_xfer_handle);
197 
198 Static usbd_status	ohci_device_isoc_transfer(usbd_xfer_handle);
199 Static usbd_status	ohci_device_isoc_start(usbd_xfer_handle);
200 Static void		ohci_device_isoc_abort(usbd_xfer_handle);
201 Static void		ohci_device_isoc_close(usbd_pipe_handle);
202 Static void		ohci_device_isoc_done(usbd_xfer_handle);
203 
204 Static usbd_status	ohci_device_setintr(ohci_softc_t *sc,
205 			    struct ohci_pipe *pipe, int ival);
206 
207 Static void		ohci_timeout(void *);
208 Static void		ohci_timeout_task(void *);
209 Static void		ohci_rhsc_enable(void *);
210 
211 Static void		ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
212 Static void		ohci_abort_xfer(usbd_xfer_handle, usbd_status);
213 
214 Static void		ohci_device_clear_toggle(usbd_pipe_handle pipe);
215 Static void		ohci_noop(usbd_pipe_handle pipe);
216 
217 #ifdef OHCI_DEBUG
218 Static void		ohci_dumpregs(ohci_softc_t *);
219 Static void		ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
220 Static void		ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
221 Static void		ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
222 Static void		ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
223 Static void		ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
224 #endif
225 
226 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
227 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
228 #define OWRITE1(sc, r, x) \
229  do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
230 #define OWRITE2(sc, r, x) \
231  do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
232 #define OWRITE4(sc, r, x) \
233  do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
234 static __inline uint8_t
235 OREAD1(ohci_softc_t *sc, bus_size_t r)
236 {
237 
238 	OBARR(sc);
239 	return bus_space_read_1(sc->iot, sc->ioh, r);
240 }
241 
242 static __inline uint16_t
243 OREAD2(ohci_softc_t *sc, bus_size_t r)
244 {
245 
246 	OBARR(sc);
247 	return bus_space_read_2(sc->iot, sc->ioh, r);
248 }
249 
250 static __inline uint32_t
251 OREAD4(ohci_softc_t *sc, bus_size_t r)
252 {
253 
254 	OBARR(sc);
255 	return bus_space_read_4(sc->iot, sc->ioh, r);
256 }
257 
258 /* Reverse the bits in a value 0 .. 31 */
259 Static u_int8_t revbits[OHCI_NO_INTRS] =
260   { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
261     0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
262     0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
263     0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
264 
265 struct ohci_pipe {
266 	struct usbd_pipe pipe;
267 	ohci_soft_ed_t *sed;
268 	union {
269 		ohci_soft_td_t *td;
270 		ohci_soft_itd_t *itd;
271 	} tail;
272 	/* Info needed for different pipe kinds. */
273 	union {
274 		/* Control pipe */
275 		struct {
276 			usb_dma_t reqdma;
277 			u_int length;
278 			ohci_soft_td_t *setup, *data, *stat;
279 		} ctl;
280 		/* Interrupt pipe */
281 		struct {
282 			int nslots;
283 			int pos;
284 		} intr;
285 		/* Bulk pipe */
286 		struct {
287 			u_int length;
288 			int isread;
289 		} bulk;
290 		/* Iso pipe */
291 		struct iso {
292 			int next, inuse;
293 		} iso;
294 	} u;
295 };
296 
297 #define OHCI_INTR_ENDPT 1
298 
299 Static const struct usbd_bus_methods ohci_bus_methods = {
300 	ohci_open,
301 	ohci_softintr,
302 	ohci_poll,
303 	ohci_allocm,
304 	ohci_freem,
305 	ohci_allocx,
306 	ohci_freex,
307 };
308 
309 Static const struct usbd_pipe_methods ohci_root_ctrl_methods = {
310 	ohci_root_ctrl_transfer,
311 	ohci_root_ctrl_start,
312 	ohci_root_ctrl_abort,
313 	ohci_root_ctrl_close,
314 	ohci_noop,
315 	ohci_root_ctrl_done,
316 };
317 
318 Static const struct usbd_pipe_methods ohci_root_intr_methods = {
319 	ohci_root_intr_transfer,
320 	ohci_root_intr_start,
321 	ohci_root_intr_abort,
322 	ohci_root_intr_close,
323 	ohci_noop,
324 	ohci_root_intr_done,
325 };
326 
327 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = {
328 	ohci_device_ctrl_transfer,
329 	ohci_device_ctrl_start,
330 	ohci_device_ctrl_abort,
331 	ohci_device_ctrl_close,
332 	ohci_noop,
333 	ohci_device_ctrl_done,
334 };
335 
336 Static const struct usbd_pipe_methods ohci_device_intr_methods = {
337 	ohci_device_intr_transfer,
338 	ohci_device_intr_start,
339 	ohci_device_intr_abort,
340 	ohci_device_intr_close,
341 	ohci_device_clear_toggle,
342 	ohci_device_intr_done,
343 };
344 
345 Static const struct usbd_pipe_methods ohci_device_bulk_methods = {
346 	ohci_device_bulk_transfer,
347 	ohci_device_bulk_start,
348 	ohci_device_bulk_abort,
349 	ohci_device_bulk_close,
350 	ohci_device_clear_toggle,
351 	ohci_device_bulk_done,
352 };
353 
354 Static const struct usbd_pipe_methods ohci_device_isoc_methods = {
355 	ohci_device_isoc_transfer,
356 	ohci_device_isoc_start,
357 	ohci_device_isoc_abort,
358 	ohci_device_isoc_close,
359 	ohci_noop,
360 	ohci_device_isoc_done,
361 };
362 
363 #if defined(__NetBSD__) || defined(__OpenBSD__)
364 int
365 ohci_activate(device_ptr_t self, enum devact act)
366 {
367 	struct ohci_softc *sc = (struct ohci_softc *)self;
368 	int rv = 0;
369 
370 	switch (act) {
371 	case DVACT_ACTIVATE:
372 		return (EOPNOTSUPP);
373 
374 	case DVACT_DEACTIVATE:
375 		sc->sc_dying = 1;
376 		if (sc->sc_child != NULL)
377 			rv = config_deactivate(sc->sc_child);
378 		break;
379 	}
380 	return (rv);
381 }
382 
383 int
384 ohci_detach(struct ohci_softc *sc, int flags)
385 {
386 	int rv = 0;
387 
388 	if (sc->sc_child != NULL)
389 		rv = config_detach(sc->sc_child, flags);
390 
391 	if (rv != 0)
392 		return (rv);
393 
394 	usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
395 
396 #if defined(__NetBSD__) || defined(__OpenBSD__)
397 	shutdownhook_disestablish(sc->sc_shutdownhook);
398 #endif
399 
400 	usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
401 
402 	/* free data structures XXX */
403 
404 	return (rv);
405 }
406 #endif
407 
408 ohci_soft_ed_t *
409 ohci_alloc_sed(ohci_softc_t *sc)
410 {
411 	ohci_soft_ed_t *sed;
412 	usbd_status err;
413 	int i, offs;
414 	usb_dma_t dma;
415 
416 	if (sc->sc_freeeds == NULL) {
417 		DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
418 		err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
419 			  OHCI_ED_ALIGN, &dma);
420 		if (err)
421 			return (0);
422 		for(i = 0; i < OHCI_SED_CHUNK; i++) {
423 			offs = i * OHCI_SED_SIZE;
424 			sed = KERNADDR(&dma, offs);
425 			sed->physaddr = DMAADDR(&dma, offs);
426 			sed->next = sc->sc_freeeds;
427 			sc->sc_freeeds = sed;
428 		}
429 	}
430 	sed = sc->sc_freeeds;
431 	sc->sc_freeeds = sed->next;
432 	memset(&sed->ed, 0, sizeof(ohci_ed_t));
433 	sed->next = 0;
434 	return (sed);
435 }
436 
437 void
438 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
439 {
440 	sed->next = sc->sc_freeeds;
441 	sc->sc_freeeds = sed;
442 }
443 
444 ohci_soft_td_t *
445 ohci_alloc_std(ohci_softc_t *sc)
446 {
447 	ohci_soft_td_t *std;
448 	usbd_status err;
449 	int i, offs;
450 	usb_dma_t dma;
451 	int s;
452 
453 	if (sc->sc_freetds == NULL) {
454 		DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
455 		err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
456 			  OHCI_TD_ALIGN, &dma);
457 		if (err)
458 			return (NULL);
459 		s = splusb();
460 		for(i = 0; i < OHCI_STD_CHUNK; i++) {
461 			offs = i * OHCI_STD_SIZE;
462 			std = KERNADDR(&dma, offs);
463 			std->physaddr = DMAADDR(&dma, offs);
464 			std->nexttd = sc->sc_freetds;
465 			sc->sc_freetds = std;
466 		}
467 		splx(s);
468 	}
469 
470 	s = splusb();
471 	std = sc->sc_freetds;
472 	sc->sc_freetds = std->nexttd;
473 	memset(&std->td, 0, sizeof(ohci_td_t));
474 	std->nexttd = NULL;
475 	std->xfer = NULL;
476 	ohci_hash_add_td(sc, std);
477 	splx(s);
478 
479 	return (std);
480 }
481 
482 void
483 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
484 {
485 	int s;
486 
487 	s = splusb();
488 	ohci_hash_rem_td(sc, std);
489 	std->nexttd = sc->sc_freetds;
490 	sc->sc_freetds = std;
491 	splx(s);
492 }
493 
494 usbd_status
495 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
496 		     int alen, int rd, usbd_xfer_handle xfer,
497 		     ohci_soft_td_t *sp, ohci_soft_td_t **ep)
498 {
499 	ohci_soft_td_t *next, *cur;
500 	ohci_physaddr_t dataphys, dataphysend;
501 	u_int32_t tdflags;
502 	int len, curlen;
503 	usb_dma_t *dma = &xfer->dmabuf;
504 	u_int16_t flags = xfer->flags;
505 
506 	DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
507 
508 	len = alen;
509 	cur = sp;
510 	dataphys = DMAADDR(dma, 0);
511 	dataphysend = OHCI_PAGE(dataphys + len - 1);
512 	tdflags = HTOO32(
513 	    (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
514 	    (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
515 	    OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
516 
517 	for (;;) {
518 		next = ohci_alloc_std(sc);
519 		if (next == NULL)
520 			goto nomem;
521 
522 		/* The OHCI hardware can handle at most one page crossing. */
523 		if (OHCI_PAGE(dataphys) == dataphysend ||
524 		    OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
525 			/* we can handle it in this TD */
526 			curlen = len;
527 		} else {
528 			/* must use multiple TDs, fill as much as possible. */
529 			curlen = 2 * OHCI_PAGE_SIZE -
530 				 (dataphys & (OHCI_PAGE_SIZE-1));
531 			/* the length must be a multiple of the max size */
532 			curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
533 #ifdef DIAGNOSTIC
534 			if (curlen == 0)
535 				panic("ohci_alloc_std: curlen == 0");
536 #endif
537 		}
538 		DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
539 			    "dataphysend=0x%08x len=%d curlen=%d\n",
540 			    dataphys, dataphysend,
541 			    len, curlen));
542 		len -= curlen;
543 
544 		cur->td.td_flags = tdflags;
545 		cur->td.td_cbp = HTOO32(dataphys);
546 		cur->nexttd = next;
547 		cur->td.td_nexttd = HTOO32(next->physaddr);
548 		cur->td.td_be = HTOO32(dataphys + curlen - 1);
549 		cur->len = curlen;
550 		cur->flags = OHCI_ADD_LEN;
551 		cur->xfer = xfer;
552 		DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
553 			    dataphys, dataphys + curlen - 1));
554 		if (len == 0)
555 			break;
556 		DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
557 		dataphys += curlen;
558 		cur = next;
559 	}
560 	if (!rd && (flags & USBD_FORCE_SHORT_XFER) &&
561 	    alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
562 		/* Force a 0 length transfer at the end. */
563 
564 		cur = next;
565 		next = ohci_alloc_std(sc);
566 		if (next == NULL)
567 			goto nomem;
568 
569 		cur->td.td_flags = tdflags;
570 		cur->td.td_cbp = 0; /* indicate 0 length packet */
571 		cur->nexttd = next;
572 		cur->td.td_nexttd = HTOO32(next->physaddr);
573 		cur->td.td_be = ~0;
574 		cur->len = 0;
575 		cur->flags = 0;
576 		cur->xfer = xfer;
577 		DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
578 	}
579 	*ep = cur;
580 
581 	return (USBD_NORMAL_COMPLETION);
582 
583  nomem:
584 	/* XXX free chain */
585 	return (USBD_NOMEM);
586 }
587 
588 #if 0
589 Static void
590 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
591 		    ohci_soft_td_t *stdend)
592 {
593 	ohci_soft_td_t *p;
594 
595 	for (; std != stdend; std = p) {
596 		p = std->nexttd;
597 		ohci_free_std(sc, std);
598 	}
599 }
600 #endif
601 
602 ohci_soft_itd_t *
603 ohci_alloc_sitd(ohci_softc_t *sc)
604 {
605 	ohci_soft_itd_t *sitd;
606 	usbd_status err;
607 	int i, s, offs;
608 	usb_dma_t dma;
609 
610 	if (sc->sc_freeitds == NULL) {
611 		DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
612 		err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
613 			  OHCI_ITD_ALIGN, &dma);
614 		if (err)
615 			return (NULL);
616 		s = splusb();
617 		for(i = 0; i < OHCI_SITD_CHUNK; i++) {
618 			offs = i * OHCI_SITD_SIZE;
619 			sitd = KERNADDR(&dma, offs);
620 			sitd->physaddr = DMAADDR(&dma, offs);
621 			sitd->nextitd = sc->sc_freeitds;
622 			sc->sc_freeitds = sitd;
623 		}
624 		splx(s);
625 	}
626 
627 	s = splusb();
628 	sitd = sc->sc_freeitds;
629 	sc->sc_freeitds = sitd->nextitd;
630 	memset(&sitd->itd, 0, sizeof(ohci_itd_t));
631 	sitd->nextitd = NULL;
632 	sitd->xfer = NULL;
633 	ohci_hash_add_itd(sc, sitd);
634 	splx(s);
635 
636 #ifdef DIAGNOSTIC
637 	sitd->isdone = 0;
638 #endif
639 
640 	return (sitd);
641 }
642 
643 void
644 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
645 {
646 	int s;
647 
648 	DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
649 
650 #ifdef DIAGNOSTIC
651 	if (!sitd->isdone) {
652 		panic("ohci_free_sitd: sitd=%p not done", sitd);
653 		return;
654 	}
655 	/* Warn double free */
656 	sitd->isdone = 0;
657 #endif
658 
659 	s = splusb();
660 	ohci_hash_rem_itd(sc, sitd);
661 	sitd->nextitd = sc->sc_freeitds;
662 	sc->sc_freeitds = sitd;
663 	splx(s);
664 }
665 
666 usbd_status
667 ohci_init(ohci_softc_t *sc)
668 {
669 	ohci_soft_ed_t *sed, *psed;
670 	usbd_status err;
671 	int i;
672 	u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb;
673 
674 	DPRINTF(("ohci_init: start\n"));
675 #if defined(__OpenBSD__)
676 	printf(",");
677 #else
678 	printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
679 #endif
680 	rev = OREAD4(sc, OHCI_REVISION);
681 	printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
682 	       OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
683 
684 	if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
685 		printf("%s: unsupported OHCI revision\n",
686 		       USBDEVNAME(sc->sc_bus.bdev));
687 		sc->sc_bus.usbrev = USBREV_UNKNOWN;
688 		return (USBD_INVAL);
689 	}
690 	sc->sc_bus.usbrev = USBREV_1_0;
691 
692 	for (i = 0; i < OHCI_HASH_SIZE; i++)
693 		LIST_INIT(&sc->sc_hash_tds[i]);
694 	for (i = 0; i < OHCI_HASH_SIZE; i++)
695 		LIST_INIT(&sc->sc_hash_itds[i]);
696 
697 	SIMPLEQ_INIT(&sc->sc_free_xfers);
698 
699 #ifdef __NetBSD__
700 	usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
701 	    USB_MEM_RESERVE);
702 #endif
703 
704 	/* XXX determine alignment by R/W */
705 	/* Allocate the HCCA area. */
706 	err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
707 			 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
708 	if (err)
709 		return (err);
710 	sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
711 	memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
712 
713 	sc->sc_eintrs = OHCI_NORMAL_INTRS;
714 
715 	/* Allocate dummy ED that starts the control list. */
716 	sc->sc_ctrl_head = ohci_alloc_sed(sc);
717 	if (sc->sc_ctrl_head == NULL) {
718 		err = USBD_NOMEM;
719 		goto bad1;
720 	}
721 	sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
722 
723 	/* Allocate dummy ED that starts the bulk list. */
724 	sc->sc_bulk_head = ohci_alloc_sed(sc);
725 	if (sc->sc_bulk_head == NULL) {
726 		err = USBD_NOMEM;
727 		goto bad2;
728 	}
729 	sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
730 
731 	/* Allocate dummy ED that starts the isochronous list. */
732 	sc->sc_isoc_head = ohci_alloc_sed(sc);
733 	if (sc->sc_isoc_head == NULL) {
734 		err = USBD_NOMEM;
735 		goto bad3;
736 	}
737 	sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
738 
739 	/* Allocate all the dummy EDs that make up the interrupt tree. */
740 	for (i = 0; i < OHCI_NO_EDS; i++) {
741 		sed = ohci_alloc_sed(sc);
742 		if (sed == NULL) {
743 			while (--i >= 0)
744 				ohci_free_sed(sc, sc->sc_eds[i]);
745 			err = USBD_NOMEM;
746 			goto bad4;
747 		}
748 		/* All ED fields are set to 0. */
749 		sc->sc_eds[i] = sed;
750 		sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
751 		if (i != 0)
752 			psed = sc->sc_eds[(i-1) / 2];
753 		else
754 			psed= sc->sc_isoc_head;
755 		sed->next = psed;
756 		sed->ed.ed_nexted = HTOO32(psed->physaddr);
757 	}
758 	/*
759 	 * Fill HCCA interrupt table.  The bit reversal is to get
760 	 * the tree set up properly to spread the interrupts.
761 	 */
762 	for (i = 0; i < OHCI_NO_INTRS; i++)
763 		sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
764 		    HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
765 
766 #ifdef OHCI_DEBUG
767 	if (ohcidebug > 15) {
768 		for (i = 0; i < OHCI_NO_EDS; i++) {
769 			printf("ed#%d ", i);
770 			ohci_dump_ed(sc, sc->sc_eds[i]);
771 		}
772 		printf("iso ");
773 		ohci_dump_ed(sc, sc->sc_isoc_head);
774 	}
775 #endif
776 
777 	/* Preserve values programmed by SMM/BIOS but lost over reset. */
778 	ctl = OREAD4(sc, OHCI_CONTROL);
779 	rwc = ctl & OHCI_RWC;
780 	fm = OREAD4(sc, OHCI_FM_INTERVAL);
781 	desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
782 	descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
783 
784 	/* Determine in what context we are running. */
785 	if (ctl & OHCI_IR) {
786 		/* SMM active, request change */
787 		DPRINTF(("ohci_init: SMM active, request owner change\n"));
788 		if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
789 		    (OHCI_OC | OHCI_MIE))
790 			OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
791 		s = OREAD4(sc, OHCI_COMMAND_STATUS);
792 		OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
793 		for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
794 			usb_delay_ms(&sc->sc_bus, 1);
795 			ctl = OREAD4(sc, OHCI_CONTROL);
796 		}
797 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
798 		if ((ctl & OHCI_IR) == 0) {
799 			printf("%s: SMM does not respond, resetting\n",
800 			       USBDEVNAME(sc->sc_bus.bdev));
801 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
802 			goto reset;
803 		}
804 #if 0
805 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
806 	} else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
807 		/* BIOS started controller. */
808 		DPRINTF(("ohci_init: BIOS active\n"));
809 		if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
810 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
811 			usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
812 		}
813 #endif
814 	} else {
815 		DPRINTF(("ohci_init: cold started\n"));
816 	reset:
817 		/* Controller was cold started. */
818 		usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
819 	}
820 
821 	/*
822 	 * This reset should not be necessary according to the OHCI spec, but
823 	 * without it some controllers do not start.
824 	 */
825 	DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
826 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
827 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
828 
829 	/* We now own the host controller and the bus has been reset. */
830 
831 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
832 	/* Nominal time for a reset is 10 us. */
833 	for (i = 0; i < 10; i++) {
834 		delay(10);
835 		hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
836 		if (!hcr)
837 			break;
838 	}
839 	if (hcr) {
840 		printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
841 		err = USBD_IOERROR;
842 		goto bad5;
843 	}
844 #ifdef OHCI_DEBUG
845 	if (ohcidebug > 15)
846 		ohci_dumpregs(sc);
847 #endif
848 
849 	/* The controller is now in SUSPEND state, we have 2ms to finish. */
850 
851 	/* Set up HC registers. */
852 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
853 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
854 	OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
855 	/* disable all interrupts and then switch on all desired interrupts */
856 	OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
857 	/* switch on desired functional features */
858 	ctl = OREAD4(sc, OHCI_CONTROL);
859 	ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
860 	ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
861 		OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
862 	/* And finally start it! */
863 	OWRITE4(sc, OHCI_CONTROL, ctl);
864 
865 	/*
866 	 * The controller is now OPERATIONAL.  Set a some final
867 	 * registers that should be set earlier, but that the
868 	 * controller ignores when in the SUSPEND state.
869 	 */
870 	ival = OHCI_GET_IVAL(fm);
871 	fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
872 	fm |= OHCI_FSMPS(ival) | ival;
873 	OWRITE4(sc, OHCI_FM_INTERVAL, fm);
874 	per = OHCI_PERIODIC(ival); /* 90% periodic */
875 	OWRITE4(sc, OHCI_PERIODIC_START, per);
876 
877 	/* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
878 	OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
879 	OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
880 	usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
881 	OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
882 
883 	/*
884 	 * The AMD756 requires a delay before re-reading the register,
885 	 * otherwise it will occasionally report 0 ports.
886 	 */
887 	sc->sc_noport = 0;
888 	for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
889 		usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
890 		sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
891 	}
892 
893 #ifdef OHCI_DEBUG
894 	if (ohcidebug > 5)
895 		ohci_dumpregs(sc);
896 #endif
897 
898 	/* Set up the bus struct. */
899 	sc->sc_bus.methods = &ohci_bus_methods;
900 	sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
901 
902 #if defined(__NetBSD__) || defined(__OpenBSD__)
903 	sc->sc_control = sc->sc_intre = 0;
904 	sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
905 #endif
906 
907 	usb_callout_init(sc->sc_tmo_rhsc);
908 
909 	/* Finally, turn on interrupts. */
910 	DPRINTFN(1,("ohci_init: enabling\n"));
911 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
912 
913 	return (USBD_NORMAL_COMPLETION);
914 
915  bad5:
916 	for (i = 0; i < OHCI_NO_EDS; i++)
917 		ohci_free_sed(sc, sc->sc_eds[i]);
918  bad4:
919 	ohci_free_sed(sc, sc->sc_isoc_head);
920  bad3:
921 	ohci_free_sed(sc, sc->sc_bulk_head);
922  bad2:
923 	ohci_free_sed(sc, sc->sc_ctrl_head);
924  bad1:
925 	usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
926 	return (err);
927 }
928 
929 usbd_status
930 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
931 {
932 #if defined(__NetBSD__) || defined(__OpenBSD__)
933 	struct ohci_softc *sc = (struct ohci_softc *)bus;
934 #endif
935 	usbd_status status;
936 
937 	status = usb_allocmem(&sc->sc_bus, size, 0, dma);
938 #ifdef __NetBSD__
939 	if (status == USBD_NOMEM)
940 		status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
941 #endif
942 	return status;
943 }
944 
945 void
946 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
947 {
948 #if defined(__NetBSD__) || defined(__OpenBSD__)
949 	struct ohci_softc *sc = (struct ohci_softc *)bus;
950 #endif
951 #ifdef __NetBSD__
952 	if (dma->block->flags & USB_DMA_RESERVE) {
953 		usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve,
954 		    dma);
955 		return;
956 	}
957 #endif
958 	usb_freemem(&sc->sc_bus, dma);
959 }
960 
961 usbd_xfer_handle
962 ohci_allocx(struct usbd_bus *bus)
963 {
964 	struct ohci_softc *sc = (struct ohci_softc *)bus;
965 	usbd_xfer_handle xfer;
966 
967 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
968 	if (xfer != NULL) {
969 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
970 #ifdef DIAGNOSTIC
971 		if (xfer->busy_free != XFER_FREE) {
972 			printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
973 			       xfer->busy_free);
974 		}
975 #endif
976 	} else {
977 		xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT);
978 	}
979 	if (xfer != NULL) {
980 		memset(xfer, 0, sizeof (struct ohci_xfer));
981 #ifdef DIAGNOSTIC
982 		xfer->busy_free = XFER_BUSY;
983 #endif
984 	}
985 	return (xfer);
986 }
987 
988 void
989 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
990 {
991 	struct ohci_softc *sc = (struct ohci_softc *)bus;
992 
993 #ifdef DIAGNOSTIC
994 	if (xfer->busy_free != XFER_BUSY) {
995 		printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
996 		       xfer->busy_free);
997 	}
998 	xfer->busy_free = XFER_FREE;
999 #endif
1000 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1001 }
1002 
1003 /*
1004  * Shut down the controller when the system is going down.
1005  */
1006 void
1007 ohci_shutdown(void *v)
1008 {
1009 	ohci_softc_t *sc = v;
1010 
1011 	DPRINTF(("ohci_shutdown: stopping the HC\n"));
1012 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1013 }
1014 
1015 bool
1016 ohci_resume(device_t dv)
1017 {
1018 	ohci_softc_t *sc = device_private(dv);
1019 	uint32_t ctl;
1020 	int s;
1021 
1022 	s = splhardusb();
1023 	sc->sc_bus.use_polling++;
1024 	/* Some broken BIOSes do not recover these values */
1025 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
1026 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED,
1027 	    sc->sc_ctrl_head->physaddr);
1028 	OWRITE4(sc, OHCI_BULK_HEAD_ED,
1029 	    sc->sc_bulk_head->physaddr);
1030 	if (sc->sc_intre)
1031 		OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre &
1032 		    (OHCI_ALL_INTRS | OHCI_MIE));
1033 	if (sc->sc_control)
1034 		ctl = sc->sc_control;
1035 	else
1036 		ctl = OREAD4(sc, OHCI_CONTROL);
1037 	ctl |= OHCI_HCFS_RESUME;
1038 	OWRITE4(sc, OHCI_CONTROL, ctl);
1039 	usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1040 	ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1041 	OWRITE4(sc, OHCI_CONTROL, ctl);
1042 	usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1043 	sc->sc_control = sc->sc_intre = 0;
1044 	sc->sc_bus.use_polling--;
1045 
1046 	return true;
1047 }
1048 
1049 bool
1050 ohci_suspend(device_t dv)
1051 {
1052 	ohci_softc_t *sc = device_private(dv);
1053 	uint32_t ctl;
1054 	int s;
1055 
1056 	s = splhardusb();
1057 	sc->sc_bus.use_polling++;
1058 	ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1059 	if (sc->sc_control == 0) {
1060 		/*
1061 		 * Preserve register values, in case that BIOS
1062 		 * does not recover them.
1063 		 */
1064 		sc->sc_control = ctl;
1065 		sc->sc_intre = OREAD4(sc,
1066 		    OHCI_INTERRUPT_ENABLE);
1067 	}
1068 	ctl |= OHCI_HCFS_SUSPEND;
1069 	OWRITE4(sc, OHCI_CONTROL, ctl);
1070 	usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1071 	sc->sc_bus.use_polling--;
1072 	splx(s);
1073 
1074 	return true;
1075 }
1076 
1077 #ifdef OHCI_DEBUG
1078 void
1079 ohci_dumpregs(ohci_softc_t *sc)
1080 {
1081 	DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1082 		 OREAD4(sc, OHCI_REVISION),
1083 		 OREAD4(sc, OHCI_CONTROL),
1084 		 OREAD4(sc, OHCI_COMMAND_STATUS)));
1085 	DPRINTF(("               intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1086 		 OREAD4(sc, OHCI_INTERRUPT_STATUS),
1087 		 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1088 		 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1089 	DPRINTF(("               hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1090 		 OREAD4(sc, OHCI_HCCA),
1091 		 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1092 		 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1093 	DPRINTF(("               ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1094 		 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1095 		 OREAD4(sc, OHCI_BULK_HEAD_ED),
1096 		 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1097 	DPRINTF(("               done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1098 		 OREAD4(sc, OHCI_DONE_HEAD),
1099 		 OREAD4(sc, OHCI_FM_INTERVAL),
1100 		 OREAD4(sc, OHCI_FM_REMAINING)));
1101 	DPRINTF(("               fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1102 		 OREAD4(sc, OHCI_FM_NUMBER),
1103 		 OREAD4(sc, OHCI_PERIODIC_START),
1104 		 OREAD4(sc, OHCI_LS_THRESHOLD)));
1105 	DPRINTF(("               desca=0x%08x descb=0x%08x stat=0x%08x\n",
1106 		 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1107 		 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1108 		 OREAD4(sc, OHCI_RH_STATUS)));
1109 	DPRINTF(("               port1=0x%08x port2=0x%08x\n",
1110 		 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1111 		 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1112 	DPRINTF(("         HCCA: frame_number=0x%04x done_head=0x%08x\n",
1113 		 O32TOH(sc->sc_hcca->hcca_frame_number),
1114 		 O32TOH(sc->sc_hcca->hcca_done_head)));
1115 }
1116 #endif
1117 
1118 Static int ohci_intr1(ohci_softc_t *);
1119 
1120 int
1121 ohci_intr(void *p)
1122 {
1123 	ohci_softc_t *sc = p;
1124 
1125 	if (sc == NULL || sc->sc_dying || !device_has_power(&sc->sc_bus.bdev))
1126 		return (0);
1127 
1128 	/* If we get an interrupt while polling, then just ignore it. */
1129 	if (sc->sc_bus.use_polling) {
1130 #ifdef DIAGNOSTIC
1131 		DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
1132 #endif
1133 		/* for level triggered intrs, should do something to ack */
1134 		OWRITE4(sc, OHCI_INTERRUPT_STATUS,
1135 			OREAD4(sc, OHCI_INTERRUPT_STATUS));
1136 
1137 		return (0);
1138 	}
1139 
1140 	return (ohci_intr1(sc));
1141 }
1142 
1143 Static int
1144 ohci_intr1(ohci_softc_t *sc)
1145 {
1146 	u_int32_t intrs, eintrs;
1147 
1148 	DPRINTFN(14,("ohci_intr1: enter\n"));
1149 
1150 	/* In case the interrupt occurs before initialization has completed. */
1151 	if (sc == NULL || sc->sc_hcca == NULL) {
1152 #ifdef DIAGNOSTIC
1153 		printf("ohci_intr: sc->sc_hcca == NULL\n");
1154 #endif
1155 		return (0);
1156 	}
1157 
1158 	intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1159 	if (!intrs)
1160 		return (0);
1161 
1162 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */
1163 	eintrs = intrs & sc->sc_eintrs;
1164 	if (!eintrs)
1165 		return (0);
1166 
1167 	sc->sc_bus.intr_context++;
1168 	sc->sc_bus.no_intrs++;
1169 	DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1170 		     sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1171 		     (u_int)eintrs));
1172 
1173 	if (eintrs & OHCI_SO) {
1174 		sc->sc_overrun_cnt++;
1175 		if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1176 			printf("%s: %u scheduling overruns\n",
1177 			    USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt);
1178 			sc->sc_overrun_cnt = 0;
1179 		}
1180 		/* XXX do what */
1181 		eintrs &= ~OHCI_SO;
1182 	}
1183 	if (eintrs & OHCI_WDH) {
1184 		/*
1185 		 * We block the interrupt below, and reenable it later from
1186 		 * ohci_softintr().
1187 		 */
1188 		usb_schedsoftintr(&sc->sc_bus);
1189 	}
1190 	if (eintrs & OHCI_RD) {
1191 		printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1192 		/* XXX process resume detect */
1193 	}
1194 	if (eintrs & OHCI_UE) {
1195 		printf("%s: unrecoverable error, controller halted\n",
1196 		       USBDEVNAME(sc->sc_bus.bdev));
1197 		OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1198 		/* XXX what else */
1199 	}
1200 	if (eintrs & OHCI_RHSC) {
1201 		/*
1202 		 * We block the interrupt below, and reenable it later from
1203 		 * a timeout.
1204 		 */
1205 		ohci_rhsc(sc, sc->sc_intrxfer);
1206 		/* Do not allow RHSC interrupts > 1 per second */
1207                 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1208 	}
1209 
1210 	sc->sc_bus.intr_context--;
1211 
1212 	if (eintrs != 0) {
1213 		/* Block unprocessed interrupts. */
1214 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1215 		sc->sc_eintrs &= ~eintrs;
1216 		DPRINTFN(1, ("%s: blocking intrs 0x%x\n",
1217 		    USBDEVNAME(sc->sc_bus.bdev), eintrs));
1218 	}
1219 
1220 	return (1);
1221 }
1222 
1223 void
1224 ohci_rhsc_enable(void *v_sc)
1225 {
1226 	ohci_softc_t *sc = v_sc;
1227 	int s;
1228 
1229 	s = splhardusb();
1230 	sc->sc_eintrs |= OHCI_RHSC;
1231 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1232 	splx(s);
1233 }
1234 
1235 #ifdef OHCI_DEBUG
1236 const char *ohci_cc_strs[] = {
1237 	"NO_ERROR",
1238 	"CRC",
1239 	"BIT_STUFFING",
1240 	"DATA_TOGGLE_MISMATCH",
1241 	"STALL",
1242 	"DEVICE_NOT_RESPONDING",
1243 	"PID_CHECK_FAILURE",
1244 	"UNEXPECTED_PID",
1245 	"DATA_OVERRUN",
1246 	"DATA_UNDERRUN",
1247 	"BUFFER_OVERRUN",
1248 	"BUFFER_UNDERRUN",
1249 	"reserved",
1250 	"reserved",
1251 	"NOT_ACCESSED",
1252 	"NOT_ACCESSED",
1253 };
1254 #endif
1255 
1256 void
1257 ohci_softintr(void *v)
1258 {
1259 	ohci_softc_t *sc = v;
1260 	ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1261 	ohci_soft_td_t  *std,  *sdone,  *stdnext;
1262 	usbd_xfer_handle xfer;
1263 	struct ohci_pipe *opipe;
1264 	int len, cc, s;
1265 	int i, j, actlen, iframes, uedir;
1266 	ohci_physaddr_t done;
1267 
1268 	DPRINTFN(10,("ohci_softintr: enter\n"));
1269 
1270 	sc->sc_bus.intr_context++;
1271 
1272 	s = splhardusb();
1273 	done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
1274 	sc->sc_hcca->hcca_done_head = 0;
1275 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
1276 	sc->sc_eintrs |= OHCI_WDH;
1277 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
1278 	splx(s);
1279 
1280 	/* Reverse the done list. */
1281 	for (sdone = NULL, sidone = NULL; done != 0; ) {
1282 		std = ohci_hash_find_td(sc, done);
1283 		if (std != NULL) {
1284 			std->dnext = sdone;
1285 			done = O32TOH(std->td.td_nexttd);
1286 			sdone = std;
1287 			DPRINTFN(10,("add TD %p\n", std));
1288 			continue;
1289 		}
1290 		sitd = ohci_hash_find_itd(sc, done);
1291 		if (sitd != NULL) {
1292 			sitd->dnext = sidone;
1293 			done = O32TOH(sitd->itd.itd_nextitd);
1294 			sidone = sitd;
1295 			DPRINTFN(5,("add ITD %p\n", sitd));
1296 			continue;
1297 		}
1298 		panic("ohci_softintr: addr 0x%08lx not found", (u_long)done);
1299 	}
1300 
1301 	DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1302 
1303 #ifdef OHCI_DEBUG
1304 	if (ohcidebug > 10) {
1305 		DPRINTF(("ohci_process_done: TD done:\n"));
1306 		ohci_dump_tds(sc, sdone);
1307 	}
1308 #endif
1309 
1310 	for (std = sdone; std; std = stdnext) {
1311 		xfer = std->xfer;
1312 		stdnext = std->dnext;
1313 		DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1314 				std, xfer, xfer ? xfer->hcpriv : 0));
1315 		if (xfer == NULL) {
1316 			/*
1317 			 * xfer == NULL: There seems to be no xfer associated
1318 			 * with this TD. It is tailp that happened to end up on
1319 			 * the done queue.
1320 			 * Shouldn't happen, but some chips are broken(?).
1321 			 */
1322 			continue;
1323 		}
1324 		if (xfer->status == USBD_CANCELLED ||
1325 		    xfer->status == USBD_TIMEOUT) {
1326 			DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1327 				 xfer));
1328 			/* Handled by abort routine. */
1329 			continue;
1330 		}
1331 		usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1332 
1333 		len = std->len;
1334 		if (std->td.td_cbp != 0)
1335 			len -= O32TOH(std->td.td_be) -
1336 			       O32TOH(std->td.td_cbp) + 1;
1337 		DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1338 		    std->flags));
1339 		if (std->flags & OHCI_ADD_LEN)
1340 			xfer->actlen += len;
1341 
1342 		cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
1343 		if (cc == OHCI_CC_NO_ERROR) {
1344 			if (std->flags & OHCI_CALL_DONE) {
1345 				xfer->status = USBD_NORMAL_COMPLETION;
1346 				s = splusb();
1347 				usb_transfer_complete(xfer);
1348 				splx(s);
1349 			}
1350 			ohci_free_std(sc, std);
1351 		} else {
1352 			/*
1353 			 * Endpoint is halted.  First unlink all the TDs
1354 			 * belonging to the failed transfer, and then restart
1355 			 * the endpoint.
1356 			 */
1357 			ohci_soft_td_t *p, *n;
1358 			opipe = (struct ohci_pipe *)xfer->pipe;
1359 
1360 			DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1361 			  OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
1362 			  ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))]));
1363 
1364 			/* remove TDs */
1365 			for (p = std; p->xfer == xfer; p = n) {
1366 				n = p->nexttd;
1367 				ohci_free_std(sc, p);
1368 			}
1369 
1370 			/* clear halt */
1371 			opipe->sed->ed.ed_headp = HTOO32(p->physaddr);
1372 			OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1373 
1374 			if (cc == OHCI_CC_STALL)
1375 				xfer->status = USBD_STALLED;
1376 			else
1377 				xfer->status = USBD_IOERROR;
1378 			s = splusb();
1379 			usb_transfer_complete(xfer);
1380 			splx(s);
1381 		}
1382 	}
1383 
1384 #ifdef OHCI_DEBUG
1385 	if (ohcidebug > 10) {
1386 		DPRINTF(("ohci_softintr: ITD done:\n"));
1387 		ohci_dump_itds(sc, sidone);
1388 	}
1389 #endif
1390 
1391 	for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1392 		xfer = sitd->xfer;
1393 		sitdnext = sitd->dnext;
1394 		DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1395 			     sitd, xfer, xfer ? xfer->hcpriv : 0));
1396 		if (xfer == NULL)
1397 			continue;
1398 		if (xfer->status == USBD_CANCELLED ||
1399 		    xfer->status == USBD_TIMEOUT) {
1400 			DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1401 				 xfer));
1402 			/* Handled by abort routine. */
1403 			continue;
1404 		}
1405 #ifdef DIAGNOSTIC
1406 		if (sitd->isdone)
1407 			printf("ohci_softintr: sitd=%p is done\n", sitd);
1408 		sitd->isdone = 1;
1409 #endif
1410 		if (sitd->flags & OHCI_CALL_DONE) {
1411 			ohci_soft_itd_t *next;
1412 
1413 			opipe = (struct ohci_pipe *)xfer->pipe;
1414 			opipe->u.iso.inuse -= xfer->nframes;
1415 			uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc->
1416 			    bEndpointAddress);
1417 			xfer->status = USBD_NORMAL_COMPLETION;
1418 			actlen = 0;
1419 			for (i = 0, sitd = xfer->hcpriv;;
1420 			    sitd = next) {
1421 				next = sitd->nextitd;
1422 				if (OHCI_ITD_GET_CC(O32TOH(sitd->
1423 				    itd.itd_flags)) != OHCI_CC_NO_ERROR)
1424 					xfer->status = USBD_IOERROR;
1425 				/* For input, update frlengths with actual */
1426 				/* XXX anything necessary for output? */
1427 				if (uedir == UE_DIR_IN &&
1428 				    xfer->status == USBD_NORMAL_COMPLETION) {
1429 					iframes = OHCI_ITD_GET_FC(O32TOH(
1430 					    sitd->itd.itd_flags));
1431 					for (j = 0; j < iframes; i++, j++) {
1432 						len = O16TOH(sitd->
1433 						    itd.itd_offset[j]);
1434 						if ((OHCI_ITD_PSW_GET_CC(len) &
1435 						    OHCI_CC_NOT_ACCESSED_MASK)
1436 						    == OHCI_CC_NOT_ACCESSED)
1437 							len = 0;
1438 						else
1439 							len = OHCI_ITD_PSW_LENGTH(len);
1440 						xfer->frlengths[i] = len;
1441 						actlen += len;
1442 					}
1443 				}
1444 				if (sitd->flags & OHCI_CALL_DONE)
1445 					break;
1446 				ohci_free_sitd(sc, sitd);
1447 			}
1448 			ohci_free_sitd(sc, sitd);
1449 			if (uedir == UE_DIR_IN &&
1450 			    xfer->status == USBD_NORMAL_COMPLETION)
1451 				xfer->actlen = actlen;
1452 			xfer->hcpriv = NULL;
1453 
1454 			s = splusb();
1455 			usb_transfer_complete(xfer);
1456 			splx(s);
1457 		}
1458 	}
1459 
1460 #ifdef USB_USE_SOFTINTR
1461 	if (sc->sc_softwake) {
1462 		sc->sc_softwake = 0;
1463 		wakeup(&sc->sc_softwake);
1464 	}
1465 #endif /* USB_USE_SOFTINTR */
1466 
1467 	sc->sc_bus.intr_context--;
1468 	DPRINTFN(10,("ohci_softintr: done:\n"));
1469 }
1470 
1471 void
1472 ohci_device_ctrl_done(usbd_xfer_handle xfer)
1473 {
1474 	DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1475 
1476 #ifdef DIAGNOSTIC
1477 	if (!(xfer->rqflags & URQ_REQUEST)) {
1478 		panic("ohci_device_ctrl_done: not a request");
1479 	}
1480 #endif
1481 }
1482 
1483 void
1484 ohci_device_intr_done(usbd_xfer_handle xfer)
1485 {
1486 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1487 	ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1488 	ohci_soft_ed_t *sed = opipe->sed;
1489 	ohci_soft_td_t *data, *tail;
1490 
1491 
1492 	DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1493 		     xfer, xfer->actlen));
1494 
1495 	if (xfer->pipe->repeat) {
1496 		data = opipe->tail.td;
1497 		tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1498 		if (tail == NULL) {
1499 			xfer->status = USBD_NOMEM;
1500 			return;
1501 		}
1502 		tail->xfer = NULL;
1503 
1504 		data->td.td_flags = HTOO32(
1505 			OHCI_TD_IN | OHCI_TD_NOCC |
1506 			OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1507 		if (xfer->flags & USBD_SHORT_XFER_OK)
1508 			data->td.td_flags |= HTOO32(OHCI_TD_R);
1509 		data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
1510 		data->nexttd = tail;
1511 		data->td.td_nexttd = HTOO32(tail->physaddr);
1512 		data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) +
1513 			xfer->length - 1);
1514 		data->len = xfer->length;
1515 		data->xfer = xfer;
1516 		data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1517 		xfer->hcpriv = data;
1518 		xfer->actlen = 0;
1519 
1520 		sed->ed.ed_tailp = HTOO32(tail->physaddr);
1521 		opipe->tail.td = tail;
1522 	}
1523 }
1524 
1525 void
1526 ohci_device_bulk_done(usbd_xfer_handle xfer)
1527 {
1528 	DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1529 		     xfer, xfer->actlen));
1530 }
1531 
1532 void
1533 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1534 {
1535 	usbd_pipe_handle pipe;
1536 	u_char *p;
1537 	int i, m;
1538 	int hstatus;
1539 
1540 	hstatus = OREAD4(sc, OHCI_RH_STATUS);
1541 	DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1542 		 sc, xfer, hstatus));
1543 
1544 	if (xfer == NULL) {
1545 		/* Just ignore the change. */
1546 		return;
1547 	}
1548 
1549 	pipe = xfer->pipe;
1550 
1551 	p = KERNADDR(&xfer->dmabuf, 0);
1552 	m = min(sc->sc_noport, xfer->length * 8 - 1);
1553 	memset(p, 0, xfer->length);
1554 	for (i = 1; i <= m; i++) {
1555 		/* Pick out CHANGE bits from the status reg. */
1556 		if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1557 			p[i/8] |= 1 << (i%8);
1558 	}
1559 	DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1560 	xfer->actlen = xfer->length;
1561 	xfer->status = USBD_NORMAL_COMPLETION;
1562 
1563 	usb_transfer_complete(xfer);
1564 }
1565 
1566 void
1567 ohci_root_intr_done(usbd_xfer_handle xfer)
1568 {
1569 }
1570 
1571 void
1572 ohci_root_ctrl_done(usbd_xfer_handle xfer)
1573 {
1574 }
1575 
1576 /*
1577  * Wait here until controller claims to have an interrupt.
1578  * Then call ohci_intr and return.  Use timeout to avoid waiting
1579  * too long.
1580  */
1581 void
1582 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1583 {
1584 	int timo;
1585 	u_int32_t intrs;
1586 
1587 	xfer->status = USBD_IN_PROGRESS;
1588 	for (timo = xfer->timeout; timo >= 0; timo--) {
1589 		usb_delay_ms(&sc->sc_bus, 1);
1590 		if (sc->sc_dying)
1591 			break;
1592 		intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1593 		DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1594 #ifdef OHCI_DEBUG
1595 		if (ohcidebug > 15)
1596 			ohci_dumpregs(sc);
1597 #endif
1598 		if (intrs) {
1599 			ohci_intr1(sc);
1600 			if (xfer->status != USBD_IN_PROGRESS)
1601 				return;
1602 		}
1603 	}
1604 
1605 	/* Timeout */
1606 	DPRINTF(("ohci_waitintr: timeout\n"));
1607 	xfer->status = USBD_TIMEOUT;
1608 	usb_transfer_complete(xfer);
1609 	/* XXX should free TD */
1610 }
1611 
1612 void
1613 ohci_poll(struct usbd_bus *bus)
1614 {
1615 	ohci_softc_t *sc = (ohci_softc_t *)bus;
1616 #ifdef OHCI_DEBUG
1617 	static int last;
1618 	int new;
1619 	new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1620 	if (new != last) {
1621 		DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1622 		last = new;
1623 	}
1624 #endif
1625 
1626 	if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1627 		ohci_intr1(sc);
1628 }
1629 
1630 usbd_status
1631 ohci_device_request(usbd_xfer_handle xfer)
1632 {
1633 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1634 	usb_device_request_t *req = &xfer->request;
1635 	usbd_device_handle dev = opipe->pipe.device;
1636 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1637 	int addr = dev->address;
1638 	ohci_soft_td_t *setup, *stat, *next, *tail;
1639 	ohci_soft_ed_t *sed;
1640 	int isread;
1641 	int len;
1642 	usbd_status err;
1643 	int s;
1644 
1645 	isread = req->bmRequestType & UT_READ;
1646 	len = UGETW(req->wLength);
1647 
1648 	DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1649 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1650 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
1651 		    UGETW(req->wIndex), len, addr,
1652 		    opipe->pipe.endpoint->edesc->bEndpointAddress));
1653 
1654 	setup = opipe->tail.td;
1655 	stat = ohci_alloc_std(sc);
1656 	if (stat == NULL) {
1657 		err = USBD_NOMEM;
1658 		goto bad1;
1659 	}
1660 	tail = ohci_alloc_std(sc);
1661 	if (tail == NULL) {
1662 		err = USBD_NOMEM;
1663 		goto bad2;
1664 	}
1665 	tail->xfer = NULL;
1666 
1667 	sed = opipe->sed;
1668 	opipe->u.ctl.length = len;
1669 
1670 	/* Update device address and length since they may have changed
1671 	   during the setup of the control pipe in usbd_new_device(). */
1672 	/* XXX This only needs to be done once, but it's too early in open. */
1673 	/* XXXX Should not touch ED here! */
1674 	sed->ed.ed_flags = HTOO32(
1675 	 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1676 	 OHCI_ED_SET_FA(addr) |
1677 	 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1678 
1679 	next = stat;
1680 
1681 	/* Set up data transaction */
1682 	if (len != 0) {
1683 		ohci_soft_td_t *std = stat;
1684 
1685 		err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1686 			  std, &stat);
1687 		stat = stat->nexttd; /* point at free TD */
1688 		if (err)
1689 			goto bad3;
1690 		/* Start toggle at 1 and then use the carried toggle. */
1691 		std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
1692 		std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
1693 	}
1694 
1695 	memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1696 
1697 	setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1698 				     OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1699 	setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1700 	setup->nexttd = next;
1701 	setup->td.td_nexttd = HTOO32(next->physaddr);
1702 	setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1);
1703 	setup->len = 0;
1704 	setup->xfer = xfer;
1705 	setup->flags = 0;
1706 	xfer->hcpriv = setup;
1707 
1708 	stat->td.td_flags = HTOO32(
1709 		(isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1710 		OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1711 	stat->td.td_cbp = 0;
1712 	stat->nexttd = tail;
1713 	stat->td.td_nexttd = HTOO32(tail->physaddr);
1714 	stat->td.td_be = 0;
1715 	stat->flags = OHCI_CALL_DONE;
1716 	stat->len = 0;
1717 	stat->xfer = xfer;
1718 
1719 #ifdef OHCI_DEBUG
1720 	if (ohcidebug > 5) {
1721 		DPRINTF(("ohci_device_request:\n"));
1722 		ohci_dump_ed(sc, sed);
1723 		ohci_dump_tds(sc, setup);
1724 	}
1725 #endif
1726 
1727 	/* Insert ED in schedule */
1728 	s = splusb();
1729 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
1730 	opipe->tail.td = tail;
1731 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1732 	if (xfer->timeout && !sc->sc_bus.use_polling) {
1733                 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
1734 			    ohci_timeout, xfer);
1735 	}
1736 	splx(s);
1737 
1738 #ifdef OHCI_DEBUG
1739 	if (ohcidebug > 20) {
1740 		delay(10000);
1741 		DPRINTF(("ohci_device_request: status=%x\n",
1742 			 OREAD4(sc, OHCI_COMMAND_STATUS)));
1743 		ohci_dumpregs(sc);
1744 		printf("ctrl head:\n");
1745 		ohci_dump_ed(sc, sc->sc_ctrl_head);
1746 		printf("sed:\n");
1747 		ohci_dump_ed(sc, sed);
1748 		ohci_dump_tds(sc, setup);
1749 	}
1750 #endif
1751 
1752 	return (USBD_NORMAL_COMPLETION);
1753 
1754  bad3:
1755 	ohci_free_std(sc, tail);
1756  bad2:
1757 	ohci_free_std(sc, stat);
1758  bad1:
1759 	return (err);
1760 }
1761 
1762 /*
1763  * Add an ED to the schedule.  Called at splusb().
1764  */
1765 void
1766 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1767 {
1768 	DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1769 
1770 	SPLUSBCHECK;
1771 	sed->next = head->next;
1772 	sed->ed.ed_nexted = head->ed.ed_nexted;
1773 	head->next = sed;
1774 	head->ed.ed_nexted = HTOO32(sed->physaddr);
1775 }
1776 
1777 /*
1778  * Remove an ED from the schedule.  Called at splusb().
1779  */
1780 void
1781 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1782 {
1783 	ohci_soft_ed_t *p;
1784 
1785 	SPLUSBCHECK;
1786 
1787 	/* XXX */
1788 	for (p = head; p != NULL && p->next != sed; p = p->next)
1789 		;
1790 	if (p == NULL)
1791 		panic("ohci_rem_ed: ED not found");
1792 	p->next = sed->next;
1793 	p->ed.ed_nexted = sed->ed.ed_nexted;
1794 }
1795 
1796 /*
1797  * When a transfer is completed the TD is added to the done queue by
1798  * the host controller.  This queue is the processed by software.
1799  * Unfortunately the queue contains the physical address of the TD
1800  * and we have no simple way to translate this back to a kernel address.
1801  * To make the translation possible (and fast) we use a hash table of
1802  * TDs currently in the schedule.  The physical address is used as the
1803  * hash value.
1804  */
1805 
1806 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1807 /* Called at splusb() */
1808 void
1809 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1810 {
1811 	int h = HASH(std->physaddr);
1812 
1813 	SPLUSBCHECK;
1814 
1815 	LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1816 }
1817 
1818 /* Called at splusb() */
1819 void
1820 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1821 {
1822 	SPLUSBCHECK;
1823 
1824 	LIST_REMOVE(std, hnext);
1825 }
1826 
1827 ohci_soft_td_t *
1828 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1829 {
1830 	int h = HASH(a);
1831 	ohci_soft_td_t *std;
1832 
1833 	for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1834 	     std != NULL;
1835 	     std = LIST_NEXT(std, hnext))
1836 		if (std->physaddr == a)
1837 			return (std);
1838 	return (NULL);
1839 }
1840 
1841 /* Called at splusb() */
1842 void
1843 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1844 {
1845 	int h = HASH(sitd->physaddr);
1846 
1847 	SPLUSBCHECK;
1848 
1849 	DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1850 		    sitd, (u_long)sitd->physaddr));
1851 
1852 	LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1853 }
1854 
1855 /* Called at splusb() */
1856 void
1857 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1858 {
1859 	SPLUSBCHECK;
1860 
1861 	DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1862 		    sitd, (u_long)sitd->physaddr));
1863 
1864 	LIST_REMOVE(sitd, hnext);
1865 }
1866 
1867 ohci_soft_itd_t *
1868 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1869 {
1870 	int h = HASH(a);
1871 	ohci_soft_itd_t *sitd;
1872 
1873 	for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1874 	     sitd != NULL;
1875 	     sitd = LIST_NEXT(sitd, hnext))
1876 		if (sitd->physaddr == a)
1877 			return (sitd);
1878 	return (NULL);
1879 }
1880 
1881 void
1882 ohci_timeout(void *addr)
1883 {
1884 	struct ohci_xfer *oxfer = addr;
1885 	struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1886 	ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1887 
1888 	DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1889 
1890 	if (sc->sc_dying) {
1891 		ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1892 		return;
1893 	}
1894 
1895 	/* Execute the abort in a process context. */
1896 	usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr);
1897 	usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task,
1898 	    USB_TASKQ_HC);
1899 }
1900 
1901 void
1902 ohci_timeout_task(void *addr)
1903 {
1904 	usbd_xfer_handle xfer = addr;
1905 	int s;
1906 
1907 	DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
1908 
1909 	s = splusb();
1910 	ohci_abort_xfer(xfer, USBD_TIMEOUT);
1911 	splx(s);
1912 }
1913 
1914 #ifdef OHCI_DEBUG
1915 void
1916 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
1917 {
1918 	for (; std; std = std->nexttd)
1919 		ohci_dump_td(sc, std);
1920 }
1921 
1922 void
1923 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1924 {
1925 	char sbuf[128];
1926 
1927 	bitmask_snprintf((u_int32_t)O32TOH(std->td.td_flags),
1928 			 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1929 			 sbuf, sizeof(sbuf));
1930 
1931 	printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1932 	       "nexttd=0x%08lx be=0x%08lx\n",
1933 	       std, (u_long)std->physaddr, sbuf,
1934 	       OHCI_TD_GET_DI(O32TOH(std->td.td_flags)),
1935 	       OHCI_TD_GET_EC(O32TOH(std->td.td_flags)),
1936 	       OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
1937 	       (u_long)O32TOH(std->td.td_cbp),
1938 	       (u_long)O32TOH(std->td.td_nexttd),
1939 	       (u_long)O32TOH(std->td.td_be));
1940 }
1941 
1942 void
1943 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1944 {
1945 	int i;
1946 
1947 	printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
1948 	       "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
1949 	       sitd, (u_long)sitd->physaddr,
1950 	       OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)),
1951 	       OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)),
1952 	       OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)),
1953 	       OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)),
1954 	       (u_long)O32TOH(sitd->itd.itd_bp0),
1955 	       (u_long)O32TOH(sitd->itd.itd_nextitd),
1956 	       (u_long)O32TOH(sitd->itd.itd_be));
1957 	for (i = 0; i < OHCI_ITD_NOFFSET; i++)
1958 		printf("offs[%d]=0x%04x ", i,
1959 		       (u_int)O16TOH(sitd->itd.itd_offset[i]));
1960 	printf("\n");
1961 }
1962 
1963 void
1964 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1965 {
1966 	for (; sitd; sitd = sitd->nextitd)
1967 		ohci_dump_itd(sc, sitd);
1968 }
1969 
1970 void
1971 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
1972 {
1973 	char sbuf[128], sbuf2[128];
1974 
1975 	bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_flags),
1976 			 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1977 			 sbuf, sizeof(sbuf));
1978 	bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_headp),
1979 			 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
1980 
1981 	printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
1982 		 "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
1983 		 sed, (u_long)sed->physaddr,
1984 		 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)),
1985 		 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)),
1986 		 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf,
1987 		 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2,
1988 		 (u_long)O32TOH(sed->ed.ed_headp),
1989 		 (u_long)O32TOH(sed->ed.ed_nexted));
1990 }
1991 #endif
1992 
1993 usbd_status
1994 ohci_open(usbd_pipe_handle pipe)
1995 {
1996 	usbd_device_handle dev = pipe->device;
1997 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1998 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1999 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2000 	u_int8_t addr = dev->address;
2001 	u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2002 	ohci_soft_ed_t *sed;
2003 	ohci_soft_td_t *std;
2004 	ohci_soft_itd_t *sitd;
2005 	ohci_physaddr_t tdphys;
2006 	u_int32_t fmt;
2007 	usbd_status err;
2008 	int s;
2009 	int ival;
2010 
2011 	DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2012 		     pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2013 
2014 	if (sc->sc_dying)
2015 		return (USBD_IOERROR);
2016 
2017 	std = NULL;
2018 	sed = NULL;
2019 
2020 	if (addr == sc->sc_addr) {
2021 		switch (ed->bEndpointAddress) {
2022 		case USB_CONTROL_ENDPOINT:
2023 			pipe->methods = &ohci_root_ctrl_methods;
2024 			break;
2025 		case UE_DIR_IN | OHCI_INTR_ENDPT:
2026 			pipe->methods = &ohci_root_intr_methods;
2027 			break;
2028 		default:
2029 			return (USBD_INVAL);
2030 		}
2031 	} else {
2032 		sed = ohci_alloc_sed(sc);
2033 		if (sed == NULL)
2034 			goto bad0;
2035 		opipe->sed = sed;
2036 		if (xfertype == UE_ISOCHRONOUS) {
2037 			sitd = ohci_alloc_sitd(sc);
2038 			if (sitd == NULL)
2039 				goto bad1;
2040 			opipe->tail.itd = sitd;
2041 			tdphys = sitd->physaddr;
2042 			fmt = OHCI_ED_FORMAT_ISO;
2043 			if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2044 				fmt |= OHCI_ED_DIR_IN;
2045 			else
2046 				fmt |= OHCI_ED_DIR_OUT;
2047 		} else {
2048 			std = ohci_alloc_std(sc);
2049 			if (std == NULL)
2050 				goto bad1;
2051 			opipe->tail.td = std;
2052 			tdphys = std->physaddr;
2053 			fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2054 		}
2055 		sed->ed.ed_flags = HTOO32(
2056 			OHCI_ED_SET_FA(addr) |
2057 			OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2058 			(dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2059 			fmt |
2060 			OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2061 		sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys);
2062 
2063 		switch (xfertype) {
2064 		case UE_CONTROL:
2065 			pipe->methods = &ohci_device_ctrl_methods;
2066 			err = usb_allocmem(&sc->sc_bus,
2067 				  sizeof(usb_device_request_t),
2068 				  0, &opipe->u.ctl.reqdma);
2069 			if (err)
2070 				goto bad;
2071 			s = splusb();
2072 			ohci_add_ed(sc, sed, sc->sc_ctrl_head);
2073 			splx(s);
2074 			break;
2075 		case UE_INTERRUPT:
2076 			pipe->methods = &ohci_device_intr_methods;
2077 			ival = pipe->interval;
2078 			if (ival == USBD_DEFAULT_INTERVAL)
2079 				ival = ed->bInterval;
2080 			return (ohci_device_setintr(sc, opipe, ival));
2081 		case UE_ISOCHRONOUS:
2082 			pipe->methods = &ohci_device_isoc_methods;
2083 			return (ohci_setup_isoc(pipe));
2084 		case UE_BULK:
2085 			pipe->methods = &ohci_device_bulk_methods;
2086 			s = splusb();
2087 			ohci_add_ed(sc, sed, sc->sc_bulk_head);
2088 			splx(s);
2089 			break;
2090 		}
2091 	}
2092 	return (USBD_NORMAL_COMPLETION);
2093 
2094  bad:
2095 	if (std != NULL)
2096 		ohci_free_std(sc, std);
2097  bad1:
2098 	if (sed != NULL)
2099 		ohci_free_sed(sc, sed);
2100  bad0:
2101 	return (USBD_NOMEM);
2102 
2103 }
2104 
2105 /*
2106  * Close a reqular pipe.
2107  * Assumes that there are no pending transactions.
2108  */
2109 void
2110 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2111 {
2112 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2113 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2114 	ohci_soft_ed_t *sed = opipe->sed;
2115 	int s;
2116 
2117 	s = splusb();
2118 #ifdef DIAGNOSTIC
2119 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
2120 	if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2121 	    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2122 		ohci_soft_td_t *std;
2123 		std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
2124 		printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2125 		       "tl=0x%x pipe=%p, std=%p\n", sed,
2126 		       (int)O32TOH(sed->ed.ed_headp),
2127 		       (int)O32TOH(sed->ed.ed_tailp),
2128 		       pipe, std);
2129 #ifdef USB_DEBUG
2130 		usbd_dump_pipe(&opipe->pipe);
2131 #endif
2132 #ifdef OHCI_DEBUG
2133 		ohci_dump_ed(sc, sed);
2134 		if (std)
2135 			ohci_dump_td(sc, std);
2136 #endif
2137 		usb_delay_ms(&sc->sc_bus, 2);
2138 		if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2139 		    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
2140 			printf("ohci_close_pipe: pipe still not empty\n");
2141 	}
2142 #endif
2143 	ohci_rem_ed(sed, head);
2144 	/* Make sure the host controller is not touching this ED */
2145 	usb_delay_ms(&sc->sc_bus, 1);
2146 	splx(s);
2147 	ohci_free_sed(sc, opipe->sed);
2148 }
2149 
2150 /*
2151  * Abort a device request.
2152  * If this routine is called at splusb() it guarantees that the request
2153  * will be removed from the hardware scheduling and that the callback
2154  * for it will be called with USBD_CANCELLED status.
2155  * It's impossible to guarantee that the requested transfer will not
2156  * have happened since the hardware runs concurrently.
2157  * If the transaction has already happened we rely on the ordinary
2158  * interrupt processing to process it.
2159  */
2160 void
2161 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2162 {
2163 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2164 	ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2165 	ohci_soft_ed_t *sed = opipe->sed;
2166 	ohci_soft_td_t *p, *n;
2167 	ohci_physaddr_t headp;
2168 	int s, hit;
2169 	int wake;
2170 
2171 	DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2172 
2173 	if (sc->sc_dying) {
2174 		/* If we're dying, just do the software part. */
2175 		s = splusb();
2176 		xfer->status = status;	/* make software ignore it */
2177 		usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2178 		usb_transfer_complete(xfer);
2179 		splx(s);
2180 		return;
2181 	}
2182 
2183 	if (xfer->device->bus->intr_context || !curproc)
2184 		panic("ohci_abort_xfer: not in process context");
2185 
2186 	/*
2187 	 * If an abort is already in progress then just wait for it to
2188 	 * complete and return.
2189 	 */
2190 	if (xfer->hcflags & UXFER_ABORTING) {
2191 		DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
2192 #ifdef DIAGNOSTIC
2193 		if (status == USBD_TIMEOUT)
2194 			printf("0hci_abort_xfer: TIMEOUT while aborting\n");
2195 #endif
2196 		/* Override the status which might be USBD_TIMEOUT. */
2197 		xfer->status = status;
2198 		DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
2199 		xfer->hcflags |= UXFER_ABORTWAIT;
2200 		while (xfer->hcflags & UXFER_ABORTING)
2201 			tsleep(&xfer->hcflags, PZERO, "ohciaw", 0);
2202 		return;
2203 	}
2204 	xfer->hcflags |= UXFER_ABORTING;
2205 
2206 	/*
2207 	 * Step 1: Make interrupt routine and hardware ignore xfer.
2208 	 */
2209 	s = splusb();
2210 	xfer->status = status;	/* make software ignore it */
2211 	usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2212 	splx(s);
2213 	DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2214 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
2215 
2216 	/*
2217 	 * Step 2: Wait until we know hardware has finished any possible
2218 	 * use of the xfer.  Also make sure the soft interrupt routine
2219 	 * has run.
2220 	 */
2221 	usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2222 	s = splusb();
2223 #ifdef USB_USE_SOFTINTR
2224 	sc->sc_softwake = 1;
2225 #endif /* USB_USE_SOFTINTR */
2226 	usb_schedsoftintr(&sc->sc_bus);
2227 #ifdef USB_USE_SOFTINTR
2228 	tsleep(&sc->sc_softwake, PZERO, "ohciab", 0);
2229 #endif /* USB_USE_SOFTINTR */
2230 	splx(s);
2231 
2232 	/*
2233 	 * Step 3: Remove any vestiges of the xfer from the hardware.
2234 	 * The complication here is that the hardware may have executed
2235 	 * beyond the xfer we're trying to abort.  So as we're scanning
2236 	 * the TDs of this xfer we check if the hardware points to
2237 	 * any of them.
2238 	 */
2239 	s = splusb();		/* XXX why? */
2240 	p = xfer->hcpriv;
2241 #ifdef DIAGNOSTIC
2242 	if (p == NULL) {
2243 		xfer->hcflags &= ~UXFER_ABORTING; /* XXX */
2244 		splx(s);
2245 		printf("ohci_abort_xfer: hcpriv is NULL\n");
2246 		return;
2247 	}
2248 #endif
2249 #ifdef OHCI_DEBUG
2250 	if (ohcidebug > 1) {
2251 		DPRINTF(("ohci_abort_xfer: sed=\n"));
2252 		ohci_dump_ed(sc, sed);
2253 		ohci_dump_tds(sc, p);
2254 	}
2255 #endif
2256 	headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
2257 	hit = 0;
2258 	for (; p->xfer == xfer; p = n) {
2259 		hit |= headp == p->physaddr;
2260 		n = p->nexttd;
2261 		ohci_free_std(sc, p);
2262 	}
2263 	/* Zap headp register if hardware pointed inside the xfer. */
2264 	if (hit) {
2265 		DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
2266 			    (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp)));
2267 		sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */
2268 	} else {
2269 		DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2270 	}
2271 
2272 	/*
2273 	 * Step 4: Turn on hardware again.
2274 	 */
2275 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
2276 
2277 	/*
2278 	 * Step 5: Execute callback.
2279 	 */
2280 	wake = xfer->hcflags & UXFER_ABORTWAIT;
2281 	xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
2282 	usb_transfer_complete(xfer);
2283 	if (wake)
2284 		wakeup(&xfer->hcflags);
2285 
2286 	splx(s);
2287 }
2288 
2289 /*
2290  * Data structures and routines to emulate the root hub.
2291  */
2292 Static usb_device_descriptor_t ohci_devd = {
2293 	USB_DEVICE_DESCRIPTOR_SIZE,
2294 	UDESC_DEVICE,		/* type */
2295 	{0x00, 0x01},		/* USB version */
2296 	UDCLASS_HUB,		/* class */
2297 	UDSUBCLASS_HUB,		/* subclass */
2298 	UDPROTO_FSHUB,
2299 	64,			/* max packet */
2300 	{0},{0},{0x00,0x01},	/* device id */
2301 	1,2,0,			/* string indicies */
2302 	1			/* # of configurations */
2303 };
2304 
2305 Static const usb_config_descriptor_t ohci_confd = {
2306 	USB_CONFIG_DESCRIPTOR_SIZE,
2307 	UDESC_CONFIG,
2308 	{USB_CONFIG_DESCRIPTOR_SIZE +
2309 	 USB_INTERFACE_DESCRIPTOR_SIZE +
2310 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
2311 	1,
2312 	1,
2313 	0,
2314 	UC_ATTR_MBO | UC_SELF_POWERED,
2315 	0			/* max power */
2316 };
2317 
2318 Static const usb_interface_descriptor_t ohci_ifcd = {
2319 	USB_INTERFACE_DESCRIPTOR_SIZE,
2320 	UDESC_INTERFACE,
2321 	0,
2322 	0,
2323 	1,
2324 	UICLASS_HUB,
2325 	UISUBCLASS_HUB,
2326 	UIPROTO_FSHUB,
2327 	0
2328 };
2329 
2330 Static const usb_endpoint_descriptor_t ohci_endpd = {
2331 	.bLength = USB_ENDPOINT_DESCRIPTOR_SIZE,
2332 	.bDescriptorType = UDESC_ENDPOINT,
2333 	.bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2334 	.bmAttributes = UE_INTERRUPT,
2335 	.wMaxPacketSize = {8, 0},			/* max packet */
2336 	.bInterval = 255,
2337 };
2338 
2339 Static const usb_hub_descriptor_t ohci_hubd = {
2340 	.bDescLength = USB_HUB_DESCRIPTOR_SIZE,
2341 	.bDescriptorType = UDESC_HUB,
2342 };
2343 
2344 /*
2345  * Simulate a hardware hub by handling all the necessary requests.
2346  */
2347 Static usbd_status
2348 ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2349 {
2350 	usbd_status err;
2351 
2352 	/* Insert last in queue. */
2353 	err = usb_insert_transfer(xfer);
2354 	if (err)
2355 		return (err);
2356 
2357 	/* Pipe isn't running, start first */
2358 	return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2359 }
2360 
2361 Static usbd_status
2362 ohci_root_ctrl_start(usbd_xfer_handle xfer)
2363 {
2364 	ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2365 	usb_device_request_t *req;
2366 	void *buf = NULL;
2367 	int port, i;
2368 	int s, len, value, index, l, totlen = 0;
2369 	usb_port_status_t ps;
2370 	usb_hub_descriptor_t hubd;
2371 	usbd_status err;
2372 	u_int32_t v;
2373 
2374 	if (sc->sc_dying)
2375 		return (USBD_IOERROR);
2376 
2377 #ifdef DIAGNOSTIC
2378 	if (!(xfer->rqflags & URQ_REQUEST))
2379 		/* XXX panic */
2380 		return (USBD_INVAL);
2381 #endif
2382 	req = &xfer->request;
2383 
2384 	DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2385 		    req->bmRequestType, req->bRequest));
2386 
2387 	len = UGETW(req->wLength);
2388 	value = UGETW(req->wValue);
2389 	index = UGETW(req->wIndex);
2390 
2391 	if (len != 0)
2392 		buf = KERNADDR(&xfer->dmabuf, 0);
2393 
2394 #define C(x,y) ((x) | ((y) << 8))
2395 	switch(C(req->bRequest, req->bmRequestType)) {
2396 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2397 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2398 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2399 		/*
2400 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2401 		 * for the integrated root hub.
2402 		 */
2403 		break;
2404 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
2405 		if (len > 0) {
2406 			*(u_int8_t *)buf = sc->sc_conf;
2407 			totlen = 1;
2408 		}
2409 		break;
2410 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2411 		DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2412 		if (len == 0)
2413 			break;
2414 		switch(value >> 8) {
2415 		case UDESC_DEVICE:
2416 			if ((value & 0xff) != 0) {
2417 				err = USBD_IOERROR;
2418 				goto ret;
2419 			}
2420 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2421 			USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2422 			memcpy(buf, &ohci_devd, l);
2423 			break;
2424 		case UDESC_CONFIG:
2425 			if ((value & 0xff) != 0) {
2426 				err = USBD_IOERROR;
2427 				goto ret;
2428 			}
2429 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2430 			memcpy(buf, &ohci_confd, l);
2431 			buf = (char *)buf + l;
2432 			len -= l;
2433 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2434 			totlen += l;
2435 			memcpy(buf, &ohci_ifcd, l);
2436 			buf = (char *)buf + l;
2437 			len -= l;
2438 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2439 			totlen += l;
2440 			memcpy(buf, &ohci_endpd, l);
2441 			break;
2442 		case UDESC_STRING:
2443 #define sd ((usb_string_descriptor_t *)buf)
2444 			switch (value & 0xff) {
2445 			case 0: /* Language table */
2446 				totlen = usb_makelangtbl(sd, len);
2447 				break;
2448 			case 1: /* Vendor */
2449 				totlen = usb_makestrdesc(sd, len,
2450 							 sc->sc_vendor);
2451 				break;
2452 			case 2: /* Product */
2453 				totlen = usb_makestrdesc(sd, len,
2454 							 "OHCI root hub");
2455 				break;
2456 			}
2457 #undef sd
2458 			break;
2459 		default:
2460 			err = USBD_IOERROR;
2461 			goto ret;
2462 		}
2463 		break;
2464 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2465 		if (len > 0) {
2466 			*(u_int8_t *)buf = 0;
2467 			totlen = 1;
2468 		}
2469 		break;
2470 	case C(UR_GET_STATUS, UT_READ_DEVICE):
2471 		if (len > 1) {
2472 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2473 			totlen = 2;
2474 		}
2475 		break;
2476 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
2477 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2478 		if (len > 1) {
2479 			USETW(((usb_status_t *)buf)->wStatus, 0);
2480 			totlen = 2;
2481 		}
2482 		break;
2483 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2484 		if (value >= USB_MAX_DEVICES) {
2485 			err = USBD_IOERROR;
2486 			goto ret;
2487 		}
2488 		sc->sc_addr = value;
2489 		break;
2490 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2491 		if (value != 0 && value != 1) {
2492 			err = USBD_IOERROR;
2493 			goto ret;
2494 		}
2495 		sc->sc_conf = value;
2496 		break;
2497 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2498 		break;
2499 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2500 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2501 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2502 		err = USBD_IOERROR;
2503 		goto ret;
2504 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2505 		break;
2506 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2507 		break;
2508 	/* Hub requests */
2509 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2510 		break;
2511 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2512 		DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2513 			     "port=%d feature=%d\n",
2514 			     index, value));
2515 		if (index < 1 || index > sc->sc_noport) {
2516 			err = USBD_IOERROR;
2517 			goto ret;
2518 		}
2519 		port = OHCI_RH_PORT_STATUS(index);
2520 		switch(value) {
2521 		case UHF_PORT_ENABLE:
2522 			OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2523 			break;
2524 		case UHF_PORT_SUSPEND:
2525 			OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2526 			break;
2527 		case UHF_PORT_POWER:
2528 			/* Yes, writing to the LOW_SPEED bit clears power. */
2529 			OWRITE4(sc, port, UPS_LOW_SPEED);
2530 			break;
2531 		case UHF_C_PORT_CONNECTION:
2532 			OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2533 			break;
2534 		case UHF_C_PORT_ENABLE:
2535 			OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2536 			break;
2537 		case UHF_C_PORT_SUSPEND:
2538 			OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2539 			break;
2540 		case UHF_C_PORT_OVER_CURRENT:
2541 			OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2542 			break;
2543 		case UHF_C_PORT_RESET:
2544 			OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2545 			break;
2546 		default:
2547 			err = USBD_IOERROR;
2548 			goto ret;
2549 		}
2550 		switch(value) {
2551 		case UHF_C_PORT_CONNECTION:
2552 		case UHF_C_PORT_ENABLE:
2553 		case UHF_C_PORT_SUSPEND:
2554 		case UHF_C_PORT_OVER_CURRENT:
2555 		case UHF_C_PORT_RESET:
2556 			/* Enable RHSC interrupt if condition is cleared. */
2557 			if ((OREAD4(sc, port) >> 16) == 0)
2558 				ohci_rhsc_enable(sc);
2559 			break;
2560 		default:
2561 			break;
2562 		}
2563 		break;
2564 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2565 		if (len == 0)
2566 			break;
2567 		if ((value & 0xff) != 0) {
2568 			err = USBD_IOERROR;
2569 			goto ret;
2570 		}
2571 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2572 		hubd = ohci_hubd;
2573 		hubd.bNbrPorts = sc->sc_noport;
2574 		USETW(hubd.wHubCharacteristics,
2575 		      (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2576 		       v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2577 		      /* XXX overcurrent */
2578 		      );
2579 		hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2580 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2581 		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2582 			hubd.DeviceRemovable[i++] = (u_int8_t)v;
2583 		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2584 		l = min(len, hubd.bDescLength);
2585 		totlen = l;
2586 		memcpy(buf, &hubd, l);
2587 		break;
2588 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2589 		if (len != 4) {
2590 			err = USBD_IOERROR;
2591 			goto ret;
2592 		}
2593 		memset(buf, 0, len); /* ? XXX */
2594 		totlen = len;
2595 		break;
2596 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2597 		DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2598 			    index));
2599 		if (index < 1 || index > sc->sc_noport) {
2600 			err = USBD_IOERROR;
2601 			goto ret;
2602 		}
2603 		if (len != 4) {
2604 			err = USBD_IOERROR;
2605 			goto ret;
2606 		}
2607 		v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2608 		DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2609 			    v));
2610 		USETW(ps.wPortStatus, v);
2611 		USETW(ps.wPortChange, v >> 16);
2612 		l = min(len, sizeof ps);
2613 		memcpy(buf, &ps, l);
2614 		totlen = l;
2615 		break;
2616 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2617 		err = USBD_IOERROR;
2618 		goto ret;
2619 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2620 		break;
2621 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2622 		if (index < 1 || index > sc->sc_noport) {
2623 			err = USBD_IOERROR;
2624 			goto ret;
2625 		}
2626 		port = OHCI_RH_PORT_STATUS(index);
2627 		switch(value) {
2628 		case UHF_PORT_ENABLE:
2629 			OWRITE4(sc, port, UPS_PORT_ENABLED);
2630 			break;
2631 		case UHF_PORT_SUSPEND:
2632 			OWRITE4(sc, port, UPS_SUSPEND);
2633 			break;
2634 		case UHF_PORT_RESET:
2635 			DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2636 				    index));
2637 			OWRITE4(sc, port, UPS_RESET);
2638 			for (i = 0; i < 5; i++) {
2639 				usb_delay_ms(&sc->sc_bus,
2640 					     USB_PORT_ROOT_RESET_DELAY);
2641 				if (sc->sc_dying) {
2642 					err = USBD_IOERROR;
2643 					goto ret;
2644 				}
2645 				if ((OREAD4(sc, port) & UPS_RESET) == 0)
2646 					break;
2647 			}
2648 			DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2649 				    index, OREAD4(sc, port)));
2650 			break;
2651 		case UHF_PORT_POWER:
2652 			DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2653 				    "%d\n", index));
2654 			OWRITE4(sc, port, UPS_PORT_POWER);
2655 			break;
2656 		default:
2657 			err = USBD_IOERROR;
2658 			goto ret;
2659 		}
2660 		break;
2661 	default:
2662 		err = USBD_IOERROR;
2663 		goto ret;
2664 	}
2665 	xfer->actlen = totlen;
2666 	err = USBD_NORMAL_COMPLETION;
2667  ret:
2668 	xfer->status = err;
2669 	s = splusb();
2670 	usb_transfer_complete(xfer);
2671 	splx(s);
2672 	return (USBD_IN_PROGRESS);
2673 }
2674 
2675 /* Abort a root control request. */
2676 Static void
2677 ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2678 {
2679 	/* Nothing to do, all transfers are synchronous. */
2680 }
2681 
2682 /* Close the root pipe. */
2683 Static void
2684 ohci_root_ctrl_close(usbd_pipe_handle pipe)
2685 {
2686 	DPRINTF(("ohci_root_ctrl_close\n"));
2687 	/* Nothing to do. */
2688 }
2689 
2690 Static usbd_status
2691 ohci_root_intr_transfer(usbd_xfer_handle xfer)
2692 {
2693 	usbd_status err;
2694 
2695 	/* Insert last in queue. */
2696 	err = usb_insert_transfer(xfer);
2697 	if (err)
2698 		return (err);
2699 
2700 	/* Pipe isn't running, start first */
2701 	return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2702 }
2703 
2704 Static usbd_status
2705 ohci_root_intr_start(usbd_xfer_handle xfer)
2706 {
2707 	usbd_pipe_handle pipe = xfer->pipe;
2708 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2709 
2710 	if (sc->sc_dying)
2711 		return (USBD_IOERROR);
2712 
2713 	sc->sc_intrxfer = xfer;
2714 
2715 	return (USBD_IN_PROGRESS);
2716 }
2717 
2718 /* Abort a root interrupt request. */
2719 Static void
2720 ohci_root_intr_abort(usbd_xfer_handle xfer)
2721 {
2722 	int s;
2723 
2724 	if (xfer->pipe->intrxfer == xfer) {
2725 		DPRINTF(("ohci_root_intr_abort: remove\n"));
2726 		xfer->pipe->intrxfer = NULL;
2727 	}
2728 	xfer->status = USBD_CANCELLED;
2729 	s = splusb();
2730 	usb_transfer_complete(xfer);
2731 	splx(s);
2732 }
2733 
2734 /* Close the root pipe. */
2735 Static void
2736 ohci_root_intr_close(usbd_pipe_handle pipe)
2737 {
2738 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2739 
2740 	DPRINTF(("ohci_root_intr_close\n"));
2741 
2742 	sc->sc_intrxfer = NULL;
2743 }
2744 
2745 /************************/
2746 
2747 Static usbd_status
2748 ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2749 {
2750 	usbd_status err;
2751 
2752 	/* Insert last in queue. */
2753 	err = usb_insert_transfer(xfer);
2754 	if (err)
2755 		return (err);
2756 
2757 	/* Pipe isn't running, start first */
2758 	return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2759 }
2760 
2761 Static usbd_status
2762 ohci_device_ctrl_start(usbd_xfer_handle xfer)
2763 {
2764 	ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2765 	usbd_status err;
2766 
2767 	if (sc->sc_dying)
2768 		return (USBD_IOERROR);
2769 
2770 #ifdef DIAGNOSTIC
2771 	if (!(xfer->rqflags & URQ_REQUEST)) {
2772 		/* XXX panic */
2773 		printf("ohci_device_ctrl_transfer: not a request\n");
2774 		return (USBD_INVAL);
2775 	}
2776 #endif
2777 
2778 	err = ohci_device_request(xfer);
2779 	if (err)
2780 		return (err);
2781 
2782 	if (sc->sc_bus.use_polling)
2783 		ohci_waitintr(sc, xfer);
2784 	return (USBD_IN_PROGRESS);
2785 }
2786 
2787 /* Abort a device control request. */
2788 Static void
2789 ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2790 {
2791 	DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2792 	ohci_abort_xfer(xfer, USBD_CANCELLED);
2793 }
2794 
2795 /* Close a device control pipe. */
2796 Static void
2797 ohci_device_ctrl_close(usbd_pipe_handle pipe)
2798 {
2799 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2800 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2801 
2802 	DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2803 	ohci_close_pipe(pipe, sc->sc_ctrl_head);
2804 	ohci_free_std(sc, opipe->tail.td);
2805 }
2806 
2807 /************************/
2808 
2809 Static void
2810 ohci_device_clear_toggle(usbd_pipe_handle pipe)
2811 {
2812 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2813 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2814 
2815 	opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
2816 }
2817 
2818 Static void
2819 ohci_noop(usbd_pipe_handle pipe)
2820 {
2821 }
2822 
2823 Static usbd_status
2824 ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2825 {
2826 	usbd_status err;
2827 
2828 	/* Insert last in queue. */
2829 	err = usb_insert_transfer(xfer);
2830 	if (err)
2831 		return (err);
2832 
2833 	/* Pipe isn't running, start first */
2834 	return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2835 }
2836 
2837 Static usbd_status
2838 ohci_device_bulk_start(usbd_xfer_handle xfer)
2839 {
2840 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2841 	usbd_device_handle dev = opipe->pipe.device;
2842 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2843 	int addr = dev->address;
2844 	ohci_soft_td_t *data, *tail, *tdp;
2845 	ohci_soft_ed_t *sed;
2846 	int s, len, isread, endpt;
2847 	usbd_status err;
2848 
2849 	if (sc->sc_dying)
2850 		return (USBD_IOERROR);
2851 
2852 #ifdef DIAGNOSTIC
2853 	if (xfer->rqflags & URQ_REQUEST) {
2854 		/* XXX panic */
2855 		printf("ohci_device_bulk_start: a request\n");
2856 		return (USBD_INVAL);
2857 	}
2858 #endif
2859 
2860 	len = xfer->length;
2861 	endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2862 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2863 	sed = opipe->sed;
2864 
2865 	DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2866 		    "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2867 		    endpt));
2868 
2869 	opipe->u.bulk.isread = isread;
2870 	opipe->u.bulk.length = len;
2871 
2872 	/* Update device address */
2873 	sed->ed.ed_flags = HTOO32(
2874 		(O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2875 		OHCI_ED_SET_FA(addr));
2876 
2877 	/* Allocate a chain of new TDs (including a new tail). */
2878 	data = opipe->tail.td;
2879 	err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2880 		  data, &tail);
2881 	/* We want interrupt at the end of the transfer. */
2882 	tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
2883 	tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
2884 	tail->flags |= OHCI_CALL_DONE;
2885 	tail = tail->nexttd;	/* point at sentinel */
2886 	if (err)
2887 		return (err);
2888 
2889 	tail->xfer = NULL;
2890 	xfer->hcpriv = data;
2891 
2892 	DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2893 		    "td_cbp=0x%08x td_be=0x%08x\n",
2894 		    (int)O32TOH(sed->ed.ed_flags),
2895 		    (int)O32TOH(data->td.td_flags),
2896 		    (int)O32TOH(data->td.td_cbp),
2897 		    (int)O32TOH(data->td.td_be)));
2898 
2899 #ifdef OHCI_DEBUG
2900 	if (ohcidebug > 5) {
2901 		ohci_dump_ed(sc, sed);
2902 		ohci_dump_tds(sc, data);
2903 	}
2904 #endif
2905 
2906 	/* Insert ED in schedule */
2907 	s = splusb();
2908 	for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2909 		tdp->xfer = xfer;
2910 	}
2911 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
2912 	opipe->tail.td = tail;
2913 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
2914 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2915 	if (xfer->timeout && !sc->sc_bus.use_polling) {
2916                 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
2917 			    ohci_timeout, xfer);
2918 	}
2919 
2920 #if 0
2921 /* This goes wrong if we are too slow. */
2922 	if (ohcidebug > 10) {
2923 		delay(10000);
2924 		DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2925 			 OREAD4(sc, OHCI_COMMAND_STATUS)));
2926 		ohci_dump_ed(sc, sed);
2927 		ohci_dump_tds(sc, data);
2928 	}
2929 #endif
2930 
2931 	splx(s);
2932 
2933 	return (USBD_IN_PROGRESS);
2934 }
2935 
2936 Static void
2937 ohci_device_bulk_abort(usbd_xfer_handle xfer)
2938 {
2939 	DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2940 	ohci_abort_xfer(xfer, USBD_CANCELLED);
2941 }
2942 
2943 /*
2944  * Close a device bulk pipe.
2945  */
2946 Static void
2947 ohci_device_bulk_close(usbd_pipe_handle pipe)
2948 {
2949 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2950 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2951 
2952 	DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2953 	ohci_close_pipe(pipe, sc->sc_bulk_head);
2954 	ohci_free_std(sc, opipe->tail.td);
2955 }
2956 
2957 /************************/
2958 
2959 Static usbd_status
2960 ohci_device_intr_transfer(usbd_xfer_handle xfer)
2961 {
2962 	usbd_status err;
2963 
2964 	/* Insert last in queue. */
2965 	err = usb_insert_transfer(xfer);
2966 	if (err)
2967 		return (err);
2968 
2969 	/* Pipe isn't running, start first */
2970 	return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2971 }
2972 
2973 Static usbd_status
2974 ohci_device_intr_start(usbd_xfer_handle xfer)
2975 {
2976 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2977 	usbd_device_handle dev = opipe->pipe.device;
2978 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2979 	ohci_soft_ed_t *sed = opipe->sed;
2980 	ohci_soft_td_t *data, *tail;
2981 	int s, len, isread, endpt;
2982 
2983 	if (sc->sc_dying)
2984 		return (USBD_IOERROR);
2985 
2986 	DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
2987 		     "flags=%d priv=%p\n",
2988 		     xfer, xfer->length, xfer->flags, xfer->priv));
2989 
2990 #ifdef DIAGNOSTIC
2991 	if (xfer->rqflags & URQ_REQUEST)
2992 		panic("ohci_device_intr_transfer: a request");
2993 #endif
2994 
2995 	len = xfer->length;
2996 	endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2997 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2998 
2999 	data = opipe->tail.td;
3000 	tail = ohci_alloc_std(sc);
3001 	if (tail == NULL)
3002 		return (USBD_NOMEM);
3003 	tail->xfer = NULL;
3004 
3005 	data->td.td_flags = HTOO32(
3006 		isread ? OHCI_TD_IN : OHCI_TD_OUT |
3007 		OHCI_TD_NOCC |
3008 		OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3009 	if (xfer->flags & USBD_SHORT_XFER_OK)
3010 		data->td.td_flags |= HTOO32(OHCI_TD_R);
3011 	data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
3012 	data->nexttd = tail;
3013 	data->td.td_nexttd = HTOO32(tail->physaddr);
3014 	data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1);
3015 	data->len = len;
3016 	data->xfer = xfer;
3017 	data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3018 	xfer->hcpriv = data;
3019 
3020 #ifdef OHCI_DEBUG
3021 	if (ohcidebug > 5) {
3022 		DPRINTF(("ohci_device_intr_transfer:\n"));
3023 		ohci_dump_ed(sc, sed);
3024 		ohci_dump_tds(sc, data);
3025 	}
3026 #endif
3027 
3028 	/* Insert ED in schedule */
3029 	s = splusb();
3030 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
3031 	opipe->tail.td = tail;
3032 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3033 
3034 #if 0
3035 /*
3036  * This goes horribly wrong, printing thousands of descriptors,
3037  * because false references are followed due to the fact that the
3038  * TD is gone.
3039  */
3040 	if (ohcidebug > 5) {
3041 		usb_delay_ms(&sc->sc_bus, 5);
3042 		DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3043 			 OREAD4(sc, OHCI_COMMAND_STATUS)));
3044 		ohci_dump_ed(sc, sed);
3045 		ohci_dump_tds(sc, data);
3046 	}
3047 #endif
3048 	splx(s);
3049 
3050 	return (USBD_IN_PROGRESS);
3051 }
3052 
3053 /* Abort a device control request. */
3054 Static void
3055 ohci_device_intr_abort(usbd_xfer_handle xfer)
3056 {
3057 	if (xfer->pipe->intrxfer == xfer) {
3058 		DPRINTF(("ohci_device_intr_abort: remove\n"));
3059 		xfer->pipe->intrxfer = NULL;
3060 	}
3061 	ohci_abort_xfer(xfer, USBD_CANCELLED);
3062 }
3063 
3064 /* Close a device interrupt pipe. */
3065 Static void
3066 ohci_device_intr_close(usbd_pipe_handle pipe)
3067 {
3068 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3069 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3070 	int nslots = opipe->u.intr.nslots;
3071 	int pos = opipe->u.intr.pos;
3072 	int j;
3073 	ohci_soft_ed_t *p, *sed = opipe->sed;
3074 	int s;
3075 
3076 	DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3077 		    pipe, nslots, pos));
3078 	s = splusb();
3079 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
3080 	if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3081 	    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
3082 		usb_delay_ms(&sc->sc_bus, 2);
3083 
3084 	for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3085 		continue;
3086 #ifdef DIAGNOSTIC
3087 	if (p == NULL)
3088 		panic("ohci_device_intr_close: ED not found");
3089 #endif
3090 	p->next = sed->next;
3091 	p->ed.ed_nexted = sed->ed.ed_nexted;
3092 	splx(s);
3093 
3094 	for (j = 0; j < nslots; j++)
3095 		--sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3096 
3097 	ohci_free_std(sc, opipe->tail.td);
3098 	ohci_free_sed(sc, opipe->sed);
3099 }
3100 
3101 Static usbd_status
3102 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3103 {
3104 	int i, j, s, best;
3105 	u_int npoll, slow, shigh, nslots;
3106 	u_int bestbw, bw;
3107 	ohci_soft_ed_t *hsed, *sed = opipe->sed;
3108 
3109 	DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3110 	if (ival == 0) {
3111 		printf("ohci_setintr: 0 interval\n");
3112 		return (USBD_INVAL);
3113 	}
3114 
3115 	npoll = OHCI_NO_INTRS;
3116 	while (npoll > ival)
3117 		npoll /= 2;
3118 	DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3119 
3120 	/*
3121 	 * We now know which level in the tree the ED must go into.
3122 	 * Figure out which slot has most bandwidth left over.
3123 	 * Slots to examine:
3124 	 * npoll
3125 	 * 1	0
3126 	 * 2	1 2
3127 	 * 4	3 4 5 6
3128 	 * 8	7 8 9 10 11 12 13 14
3129 	 * N    (N-1) .. (N-1+N-1)
3130 	 */
3131 	slow = npoll-1;
3132 	shigh = slow + npoll;
3133 	nslots = OHCI_NO_INTRS / npoll;
3134 	for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3135 		bw = 0;
3136 		for (j = 0; j < nslots; j++)
3137 			bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3138 		if (bw < bestbw) {
3139 			best = i;
3140 			bestbw = bw;
3141 		}
3142 	}
3143 	DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3144 		     best, slow, shigh, bestbw));
3145 
3146 	s = splusb();
3147 	hsed = sc->sc_eds[best];
3148 	sed->next = hsed->next;
3149 	sed->ed.ed_nexted = hsed->ed.ed_nexted;
3150 	hsed->next = sed;
3151 	hsed->ed.ed_nexted = HTOO32(sed->physaddr);
3152 	splx(s);
3153 
3154 	for (j = 0; j < nslots; j++)
3155 		++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3156 	opipe->u.intr.nslots = nslots;
3157 	opipe->u.intr.pos = best;
3158 
3159 	DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3160 	return (USBD_NORMAL_COMPLETION);
3161 }
3162 
3163 /***********************/
3164 
3165 usbd_status
3166 ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3167 {
3168 	usbd_status err;
3169 
3170 	DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3171 
3172 	/* Put it on our queue, */
3173 	err = usb_insert_transfer(xfer);
3174 
3175 	/* bail out on error, */
3176 	if (err && err != USBD_IN_PROGRESS)
3177 		return (err);
3178 
3179 	/* XXX should check inuse here */
3180 
3181 	/* insert into schedule, */
3182 	ohci_device_isoc_enter(xfer);
3183 
3184 	/* and start if the pipe wasn't running */
3185 	if (!err)
3186 		ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3187 
3188 	return (err);
3189 }
3190 
3191 void
3192 ohci_device_isoc_enter(usbd_xfer_handle xfer)
3193 {
3194 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3195 	usbd_device_handle dev = opipe->pipe.device;
3196 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3197 	ohci_soft_ed_t *sed = opipe->sed;
3198 	struct iso *iso = &opipe->u.iso;
3199 	ohci_soft_itd_t *sitd, *nsitd;
3200 	ohci_physaddr_t buf, offs, noffs, bp0;
3201 	int i, ncur, nframes;
3202 	int s;
3203 
3204 	DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3205 		    "nframes=%d\n",
3206 		    iso->inuse, iso->next, xfer, xfer->nframes));
3207 
3208 	if (sc->sc_dying)
3209 		return;
3210 
3211 	if (iso->next == -1) {
3212 		/* Not in use yet, schedule it a few frames ahead. */
3213 		iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
3214 		DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3215 			    iso->next));
3216 	}
3217 
3218 	sitd = opipe->tail.itd;
3219 	buf = DMAADDR(&xfer->dmabuf, 0);
3220 	bp0 = OHCI_PAGE(buf);
3221 	offs = OHCI_PAGE_OFFSET(buf);
3222 	nframes = xfer->nframes;
3223 	xfer->hcpriv = sitd;
3224 	for (i = ncur = 0; i < nframes; i++, ncur++) {
3225 		noffs = offs + xfer->frlengths[i];
3226 		if (ncur == OHCI_ITD_NOFFSET ||	/* all offsets used */
3227 		    OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3228 
3229 			/* Allocate next ITD */
3230 			nsitd = ohci_alloc_sitd(sc);
3231 			if (nsitd == NULL) {
3232 				/* XXX what now? */
3233 				printf("%s: isoc TD alloc failed\n",
3234 				       USBDEVNAME(sc->sc_bus.bdev));
3235 				return;
3236 			}
3237 
3238 			/* Fill current ITD */
3239 			sitd->itd.itd_flags = HTOO32(
3240 				OHCI_ITD_NOCC |
3241 				OHCI_ITD_SET_SF(iso->next) |
3242 				OHCI_ITD_SET_DI(6) | /* delay intr a little */
3243 				OHCI_ITD_SET_FC(ncur));
3244 			sitd->itd.itd_bp0 = HTOO32(bp0);
3245 			sitd->nextitd = nsitd;
3246 			sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3247 			sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3248 			sitd->xfer = xfer;
3249 			sitd->flags = 0;
3250 
3251 			sitd = nsitd;
3252 			iso->next = iso->next + ncur;
3253 			bp0 = OHCI_PAGE(buf + offs);
3254 			ncur = 0;
3255 		}
3256 		sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
3257 		offs = noffs;
3258 	}
3259 	nsitd = ohci_alloc_sitd(sc);
3260 	if (nsitd == NULL) {
3261 		/* XXX what now? */
3262 		printf("%s: isoc TD alloc failed\n",
3263 		       USBDEVNAME(sc->sc_bus.bdev));
3264 		return;
3265 	}
3266 	/* Fixup last used ITD */
3267 	sitd->itd.itd_flags = HTOO32(
3268 		OHCI_ITD_NOCC |
3269 		OHCI_ITD_SET_SF(iso->next) |
3270 		OHCI_ITD_SET_DI(0) |
3271 		OHCI_ITD_SET_FC(ncur));
3272 	sitd->itd.itd_bp0 = HTOO32(bp0);
3273 	sitd->nextitd = nsitd;
3274 	sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3275 	sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3276 	sitd->xfer = xfer;
3277 	sitd->flags = OHCI_CALL_DONE;
3278 
3279 	iso->next = iso->next + ncur;
3280 	iso->inuse += nframes;
3281 
3282 	xfer->actlen = offs;	/* XXX pretend we did it all */
3283 
3284 	xfer->status = USBD_IN_PROGRESS;
3285 
3286 #ifdef OHCI_DEBUG
3287 	if (ohcidebug > 5) {
3288 		DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3289 			 O32TOH(sc->sc_hcca->hcca_frame_number)));
3290 		ohci_dump_itds(sc, xfer->hcpriv);
3291 		ohci_dump_ed(sc, sed);
3292 	}
3293 #endif
3294 
3295 	s = splusb();
3296 	sed->ed.ed_tailp = HTOO32(nsitd->physaddr);
3297 	opipe->tail.itd = nsitd;
3298 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3299 	splx(s);
3300 
3301 #ifdef OHCI_DEBUG
3302 	if (ohcidebug > 5) {
3303 		delay(150000);
3304 		DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3305 			 O32TOH(sc->sc_hcca->hcca_frame_number)));
3306 		ohci_dump_itds(sc, xfer->hcpriv);
3307 		ohci_dump_ed(sc, sed);
3308 	}
3309 #endif
3310 }
3311 
3312 usbd_status
3313 ohci_device_isoc_start(usbd_xfer_handle xfer)
3314 {
3315 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3316 	ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3317 
3318 	DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3319 
3320 	if (sc->sc_dying)
3321 		return (USBD_IOERROR);
3322 
3323 #ifdef DIAGNOSTIC
3324 	if (xfer->status != USBD_IN_PROGRESS)
3325 		printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3326 #endif
3327 
3328 	/* XXX anything to do? */
3329 
3330 	return (USBD_IN_PROGRESS);
3331 }
3332 
3333 void
3334 ohci_device_isoc_abort(usbd_xfer_handle xfer)
3335 {
3336 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3337 	ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3338 	ohci_soft_ed_t *sed;
3339 	ohci_soft_itd_t *sitd;
3340 	int s;
3341 
3342 	s = splusb();
3343 
3344 	DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3345 
3346 	/* Transfer is already done. */
3347 	if (xfer->status != USBD_NOT_STARTED &&
3348 	    xfer->status != USBD_IN_PROGRESS) {
3349 		splx(s);
3350 		printf("ohci_device_isoc_abort: early return\n");
3351 		return;
3352 	}
3353 
3354 	/* Give xfer the requested abort code. */
3355 	xfer->status = USBD_CANCELLED;
3356 
3357 	sed = opipe->sed;
3358 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
3359 
3360 	sitd = xfer->hcpriv;
3361 #ifdef DIAGNOSTIC
3362 	if (sitd == NULL) {
3363 		splx(s);
3364 		printf("ohci_device_isoc_abort: hcpriv==0\n");
3365 		return;
3366 	}
3367 #endif
3368 	for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3369 #ifdef DIAGNOSTIC
3370 		DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3371 		sitd->isdone = 1;
3372 #endif
3373 	}
3374 
3375 	splx(s);
3376 
3377 	usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET);
3378 
3379 	s = splusb();
3380 
3381 	/* Run callback. */
3382 	usb_transfer_complete(xfer);
3383 
3384 	sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
3385 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
3386 
3387 	splx(s);
3388 }
3389 
3390 void
3391 ohci_device_isoc_done(usbd_xfer_handle xfer)
3392 {
3393 	DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
3394 }
3395 
3396 usbd_status
3397 ohci_setup_isoc(usbd_pipe_handle pipe)
3398 {
3399 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3400 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3401 	struct iso *iso = &opipe->u.iso;
3402 	int s;
3403 
3404 	iso->next = -1;
3405 	iso->inuse = 0;
3406 
3407 	s = splusb();
3408 	ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
3409 	splx(s);
3410 
3411 	return (USBD_NORMAL_COMPLETION);
3412 }
3413 
3414 void
3415 ohci_device_isoc_close(usbd_pipe_handle pipe)
3416 {
3417 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3418 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3419 
3420 	DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3421 	ohci_close_pipe(pipe, sc->sc_isoc_head);
3422 #ifdef DIAGNOSTIC
3423 	opipe->tail.itd->isdone = 1;
3424 #endif
3425 	ohci_free_sitd(sc, opipe->tail.itd);
3426 }
3427