1 /* $NetBSD: ohci.c,v 1.157 2005/03/11 19:25:22 mycroft Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart@augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the NetBSD 25 * Foundation, Inc. and its contributors. 26 * 4. Neither the name of The NetBSD Foundation nor the names of its 27 * contributors may be used to endorse or promote products derived 28 * from this software without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 * POSSIBILITY OF SUCH DAMAGE. 41 */ 42 43 /* 44 * USB Open Host Controller driver. 45 * 46 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 47 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.157 2005/03/11 19:25:22 mycroft Exp $"); 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/malloc.h> 56 #if defined(__NetBSD__) || defined(__OpenBSD__) 57 #include <sys/kernel.h> 58 #include <sys/device.h> 59 #include <sys/select.h> 60 #include <uvm/uvm_extern.h> 61 #elif defined(__FreeBSD__) 62 #include <sys/module.h> 63 #include <sys/bus.h> 64 #include <machine/bus_pio.h> 65 #include <machine/bus_memio.h> 66 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 67 #include <machine/cpu.h> 68 #endif 69 #endif 70 #include <sys/proc.h> 71 #include <sys/queue.h> 72 73 #include <machine/bus.h> 74 #include <machine/endian.h> 75 76 #include <dev/usb/usb.h> 77 #include <dev/usb/usbdi.h> 78 #include <dev/usb/usbdivar.h> 79 #include <dev/usb/usb_mem.h> 80 #include <dev/usb/usb_quirks.h> 81 82 #include <dev/usb/ohcireg.h> 83 #include <dev/usb/ohcivar.h> 84 85 #if defined(__FreeBSD__) 86 #include <machine/clock.h> 87 88 #define delay(d) DELAY(d) 89 #endif 90 91 #if defined(__OpenBSD__) 92 struct cfdriver ohci_cd = { 93 NULL, "ohci", DV_DULL 94 }; 95 #endif 96 97 #ifdef OHCI_DEBUG 98 #define DPRINTF(x) if (ohcidebug) logprintf x 99 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 100 int ohcidebug = 0; 101 #ifndef __NetBSD__ 102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 /* 110 * The OHCI controller is little endian, so on big endian machines 111 * the data strored in memory needs to be swapped. 112 */ 113 #if defined(__FreeBSD__) || defined(__OpenBSD__) 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define htole32(x) (bswap32(x)) 116 #define le32toh(x) (bswap32(x)) 117 #else 118 #define htole32(x) (x) 119 #define le32toh(x) (x) 120 #endif 121 #endif 122 123 struct ohci_pipe; 124 125 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 126 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 127 128 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 129 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 130 131 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 132 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 133 134 #if 0 135 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 136 ohci_soft_td_t *); 137 #endif 138 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 139 ohci_softc_t *, int, int, usbd_xfer_handle, 140 ohci_soft_td_t *, ohci_soft_td_t **); 141 142 Static void ohci_shutdown(void *v); 143 Static void ohci_power(int, void *); 144 Static usbd_status ohci_open(usbd_pipe_handle); 145 Static void ohci_poll(struct usbd_bus *); 146 Static void ohci_softintr(void *); 147 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 148 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 149 150 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 151 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 152 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 153 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 154 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 155 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 156 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 157 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 158 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 159 160 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 161 Static void ohci_device_isoc_enter(usbd_xfer_handle); 162 163 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 164 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 165 166 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 167 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 168 169 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 170 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 171 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 172 Static void ohci_root_ctrl_close(usbd_pipe_handle); 173 Static void ohci_root_ctrl_done(usbd_xfer_handle); 174 175 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 176 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 177 Static void ohci_root_intr_abort(usbd_xfer_handle); 178 Static void ohci_root_intr_close(usbd_pipe_handle); 179 Static void ohci_root_intr_done(usbd_xfer_handle); 180 181 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 182 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 183 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 184 Static void ohci_device_ctrl_close(usbd_pipe_handle); 185 Static void ohci_device_ctrl_done(usbd_xfer_handle); 186 187 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 188 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 189 Static void ohci_device_bulk_abort(usbd_xfer_handle); 190 Static void ohci_device_bulk_close(usbd_pipe_handle); 191 Static void ohci_device_bulk_done(usbd_xfer_handle); 192 193 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 194 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 195 Static void ohci_device_intr_abort(usbd_xfer_handle); 196 Static void ohci_device_intr_close(usbd_pipe_handle); 197 Static void ohci_device_intr_done(usbd_xfer_handle); 198 199 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 200 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 201 Static void ohci_device_isoc_abort(usbd_xfer_handle); 202 Static void ohci_device_isoc_close(usbd_pipe_handle); 203 Static void ohci_device_isoc_done(usbd_xfer_handle); 204 205 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 206 struct ohci_pipe *pipe, int ival); 207 208 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 209 210 Static void ohci_timeout(void *); 211 Static void ohci_timeout_task(void *); 212 Static void ohci_rhsc_enable(void *); 213 214 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 215 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 216 217 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 218 Static void ohci_noop(usbd_pipe_handle pipe); 219 220 #ifdef OHCI_DEBUG 221 Static void ohci_dumpregs(ohci_softc_t *); 222 Static void ohci_dump_tds(ohci_soft_td_t *); 223 Static void ohci_dump_td(ohci_soft_td_t *); 224 Static void ohci_dump_ed(ohci_soft_ed_t *); 225 Static void ohci_dump_itd(ohci_soft_itd_t *); 226 Static void ohci_dump_itds(ohci_soft_itd_t *); 227 #endif 228 229 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 230 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 231 #define OWRITE1(sc, r, x) \ 232 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 233 #define OWRITE2(sc, r, x) \ 234 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 235 #define OWRITE4(sc, r, x) \ 236 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 237 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 239 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 240 241 /* Reverse the bits in a value 0 .. 31 */ 242 Static u_int8_t revbits[OHCI_NO_INTRS] = 243 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 244 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 245 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 246 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 247 248 struct ohci_pipe { 249 struct usbd_pipe pipe; 250 ohci_soft_ed_t *sed; 251 union { 252 ohci_soft_td_t *td; 253 ohci_soft_itd_t *itd; 254 } tail; 255 /* Info needed for different pipe kinds. */ 256 union { 257 /* Control pipe */ 258 struct { 259 usb_dma_t reqdma; 260 u_int length; 261 ohci_soft_td_t *setup, *data, *stat; 262 } ctl; 263 /* Interrupt pipe */ 264 struct { 265 int nslots; 266 int pos; 267 } intr; 268 /* Bulk pipe */ 269 struct { 270 u_int length; 271 int isread; 272 } bulk; 273 /* Iso pipe */ 274 struct iso { 275 int next, inuse; 276 } iso; 277 } u; 278 }; 279 280 #define OHCI_INTR_ENDPT 1 281 282 Static struct usbd_bus_methods ohci_bus_methods = { 283 ohci_open, 284 ohci_softintr, 285 ohci_poll, 286 ohci_allocm, 287 ohci_freem, 288 ohci_allocx, 289 ohci_freex, 290 }; 291 292 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 293 ohci_root_ctrl_transfer, 294 ohci_root_ctrl_start, 295 ohci_root_ctrl_abort, 296 ohci_root_ctrl_close, 297 ohci_noop, 298 ohci_root_ctrl_done, 299 }; 300 301 Static struct usbd_pipe_methods ohci_root_intr_methods = { 302 ohci_root_intr_transfer, 303 ohci_root_intr_start, 304 ohci_root_intr_abort, 305 ohci_root_intr_close, 306 ohci_noop, 307 ohci_root_intr_done, 308 }; 309 310 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 311 ohci_device_ctrl_transfer, 312 ohci_device_ctrl_start, 313 ohci_device_ctrl_abort, 314 ohci_device_ctrl_close, 315 ohci_noop, 316 ohci_device_ctrl_done, 317 }; 318 319 Static struct usbd_pipe_methods ohci_device_intr_methods = { 320 ohci_device_intr_transfer, 321 ohci_device_intr_start, 322 ohci_device_intr_abort, 323 ohci_device_intr_close, 324 ohci_device_clear_toggle, 325 ohci_device_intr_done, 326 }; 327 328 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 329 ohci_device_bulk_transfer, 330 ohci_device_bulk_start, 331 ohci_device_bulk_abort, 332 ohci_device_bulk_close, 333 ohci_device_clear_toggle, 334 ohci_device_bulk_done, 335 }; 336 337 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 338 ohci_device_isoc_transfer, 339 ohci_device_isoc_start, 340 ohci_device_isoc_abort, 341 ohci_device_isoc_close, 342 ohci_noop, 343 ohci_device_isoc_done, 344 }; 345 346 #if defined(__NetBSD__) || defined(__OpenBSD__) 347 int 348 ohci_activate(device_ptr_t self, enum devact act) 349 { 350 struct ohci_softc *sc = (struct ohci_softc *)self; 351 int rv = 0; 352 353 switch (act) { 354 case DVACT_ACTIVATE: 355 return (EOPNOTSUPP); 356 357 case DVACT_DEACTIVATE: 358 if (sc->sc_child != NULL) 359 rv = config_deactivate(sc->sc_child); 360 sc->sc_dying = 1; 361 break; 362 } 363 return (rv); 364 } 365 366 int 367 ohci_detach(struct ohci_softc *sc, int flags) 368 { 369 int rv = 0; 370 371 if (sc->sc_child != NULL) 372 rv = config_detach(sc->sc_child, flags); 373 374 if (rv != 0) 375 return (rv); 376 377 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 378 379 #if defined(__NetBSD__) || defined(__OpenBSD__) 380 powerhook_disestablish(sc->sc_powerhook); 381 shutdownhook_disestablish(sc->sc_shutdownhook); 382 #endif 383 384 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 385 386 /* free data structures XXX */ 387 388 return (rv); 389 } 390 #endif 391 392 ohci_soft_ed_t * 393 ohci_alloc_sed(ohci_softc_t *sc) 394 { 395 ohci_soft_ed_t *sed; 396 usbd_status err; 397 int i, offs; 398 usb_dma_t dma; 399 400 if (sc->sc_freeeds == NULL) { 401 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 402 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 403 OHCI_ED_ALIGN, &dma); 404 if (err) 405 return (0); 406 for(i = 0; i < OHCI_SED_CHUNK; i++) { 407 offs = i * OHCI_SED_SIZE; 408 sed = KERNADDR(&dma, offs); 409 sed->physaddr = DMAADDR(&dma, offs); 410 sed->next = sc->sc_freeeds; 411 sc->sc_freeeds = sed; 412 } 413 } 414 sed = sc->sc_freeeds; 415 sc->sc_freeeds = sed->next; 416 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 417 sed->next = 0; 418 return (sed); 419 } 420 421 void 422 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 423 { 424 sed->next = sc->sc_freeeds; 425 sc->sc_freeeds = sed; 426 } 427 428 ohci_soft_td_t * 429 ohci_alloc_std(ohci_softc_t *sc) 430 { 431 ohci_soft_td_t *std; 432 usbd_status err; 433 int i, offs; 434 usb_dma_t dma; 435 int s; 436 437 if (sc->sc_freetds == NULL) { 438 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 439 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 440 OHCI_TD_ALIGN, &dma); 441 if (err) 442 return (NULL); 443 s = splusb(); 444 for(i = 0; i < OHCI_STD_CHUNK; i++) { 445 offs = i * OHCI_STD_SIZE; 446 std = KERNADDR(&dma, offs); 447 std->physaddr = DMAADDR(&dma, offs); 448 std->nexttd = sc->sc_freetds; 449 sc->sc_freetds = std; 450 } 451 splx(s); 452 } 453 454 s = splusb(); 455 std = sc->sc_freetds; 456 sc->sc_freetds = std->nexttd; 457 memset(&std->td, 0, sizeof(ohci_td_t)); 458 std->nexttd = NULL; 459 std->xfer = NULL; 460 ohci_hash_add_td(sc, std); 461 splx(s); 462 463 return (std); 464 } 465 466 void 467 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 468 { 469 int s; 470 471 s = splusb(); 472 ohci_hash_rem_td(sc, std); 473 std->nexttd = sc->sc_freetds; 474 sc->sc_freetds = std; 475 splx(s); 476 } 477 478 usbd_status 479 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 480 int alen, int rd, usbd_xfer_handle xfer, 481 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 482 { 483 ohci_soft_td_t *next, *cur; 484 ohci_physaddr_t dataphys, dataphysend; 485 u_int32_t tdflags; 486 int len, curlen; 487 usb_dma_t *dma = &xfer->dmabuf; 488 u_int16_t flags = xfer->flags; 489 490 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 491 492 len = alen; 493 cur = sp; 494 dataphys = DMAADDR(dma, 0); 495 dataphysend = OHCI_PAGE(dataphys + len - 1); 496 tdflags = htole32( 497 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 498 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 499 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 500 501 for (;;) { 502 next = ohci_alloc_std(sc); 503 if (next == NULL) 504 goto nomem; 505 506 /* The OHCI hardware can handle at most one page crossing. */ 507 if (OHCI_PAGE(dataphys) == dataphysend || 508 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 509 /* we can handle it in this TD */ 510 curlen = len; 511 } else { 512 /* must use multiple TDs, fill as much as possible. */ 513 curlen = 2 * OHCI_PAGE_SIZE - 514 (dataphys & (OHCI_PAGE_SIZE-1)); 515 /* the length must be a multiple of the max size */ 516 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 517 #ifdef DIAGNOSTIC 518 if (curlen == 0) 519 panic("ohci_alloc_std: curlen == 0"); 520 #endif 521 } 522 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 523 "dataphysend=0x%08x len=%d curlen=%d\n", 524 dataphys, dataphysend, 525 len, curlen)); 526 len -= curlen; 527 528 cur->td.td_flags = tdflags; 529 cur->td.td_cbp = htole32(dataphys); 530 cur->nexttd = next; 531 cur->td.td_nexttd = htole32(next->physaddr); 532 cur->td.td_be = htole32(dataphys + curlen - 1); 533 cur->len = curlen; 534 cur->flags = OHCI_ADD_LEN; 535 cur->xfer = xfer; 536 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 537 dataphys, dataphys + curlen - 1)); 538 if (len == 0) 539 break; 540 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 541 dataphys += curlen; 542 cur = next; 543 } 544 if ((flags & USBD_FORCE_SHORT_XFER) && 545 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 546 /* Force a 0 length transfer at the end. */ 547 548 cur = next; 549 next = ohci_alloc_std(sc); 550 if (next == NULL) 551 goto nomem; 552 553 cur->td.td_flags = tdflags; 554 cur->td.td_cbp = 0; /* indicate 0 length packet */ 555 cur->nexttd = next; 556 cur->td.td_nexttd = htole32(next->physaddr); 557 cur->td.td_be = ~0; 558 cur->len = 0; 559 cur->flags = 0; 560 cur->xfer = xfer; 561 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 562 } 563 *ep = cur; 564 565 return (USBD_NORMAL_COMPLETION); 566 567 nomem: 568 /* XXX free chain */ 569 return (USBD_NOMEM); 570 } 571 572 #if 0 573 Static void 574 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 575 ohci_soft_td_t *stdend) 576 { 577 ohci_soft_td_t *p; 578 579 for (; std != stdend; std = p) { 580 p = std->nexttd; 581 ohci_free_std(sc, std); 582 } 583 } 584 #endif 585 586 ohci_soft_itd_t * 587 ohci_alloc_sitd(ohci_softc_t *sc) 588 { 589 ohci_soft_itd_t *sitd; 590 usbd_status err; 591 int i, s, offs; 592 usb_dma_t dma; 593 594 if (sc->sc_freeitds == NULL) { 595 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 596 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 597 OHCI_ITD_ALIGN, &dma); 598 if (err) 599 return (NULL); 600 s = splusb(); 601 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 602 offs = i * OHCI_SITD_SIZE; 603 sitd = KERNADDR(&dma, offs); 604 sitd->physaddr = DMAADDR(&dma, offs); 605 sitd->nextitd = sc->sc_freeitds; 606 sc->sc_freeitds = sitd; 607 } 608 splx(s); 609 } 610 611 s = splusb(); 612 sitd = sc->sc_freeitds; 613 sc->sc_freeitds = sitd->nextitd; 614 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 615 sitd->nextitd = NULL; 616 sitd->xfer = NULL; 617 ohci_hash_add_itd(sc, sitd); 618 splx(s); 619 620 #ifdef DIAGNOSTIC 621 sitd->isdone = 0; 622 #endif 623 624 return (sitd); 625 } 626 627 void 628 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 629 { 630 int s; 631 632 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 633 634 #ifdef DIAGNOSTIC 635 if (!sitd->isdone) { 636 panic("ohci_free_sitd: sitd=%p not done", sitd); 637 return; 638 } 639 /* Warn double free */ 640 sitd->isdone = 0; 641 #endif 642 643 s = splusb(); 644 ohci_hash_rem_itd(sc, sitd); 645 sitd->nextitd = sc->sc_freeitds; 646 sc->sc_freeitds = sitd; 647 splx(s); 648 } 649 650 usbd_status 651 ohci_init(ohci_softc_t *sc) 652 { 653 ohci_soft_ed_t *sed, *psed; 654 usbd_status err; 655 int i; 656 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 657 658 DPRINTF(("ohci_init: start\n")); 659 #if defined(__OpenBSD__) 660 printf(","); 661 #else 662 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 663 #endif 664 rev = OREAD4(sc, OHCI_REVISION); 665 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 666 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 667 668 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 669 printf("%s: unsupported OHCI revision\n", 670 USBDEVNAME(sc->sc_bus.bdev)); 671 sc->sc_bus.usbrev = USBREV_UNKNOWN; 672 return (USBD_INVAL); 673 } 674 sc->sc_bus.usbrev = USBREV_1_0; 675 676 for (i = 0; i < OHCI_HASH_SIZE; i++) 677 LIST_INIT(&sc->sc_hash_tds[i]); 678 for (i = 0; i < OHCI_HASH_SIZE; i++) 679 LIST_INIT(&sc->sc_hash_itds[i]); 680 681 SIMPLEQ_INIT(&sc->sc_free_xfers); 682 683 #ifdef __NetBSD__ 684 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 685 USB_MEM_RESERVE); 686 #endif 687 688 /* XXX determine alignment by R/W */ 689 /* Allocate the HCCA area. */ 690 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 691 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 692 if (err) 693 return (err); 694 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 695 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 696 697 sc->sc_eintrs = OHCI_NORMAL_INTRS; 698 699 /* Allocate dummy ED that starts the control list. */ 700 sc->sc_ctrl_head = ohci_alloc_sed(sc); 701 if (sc->sc_ctrl_head == NULL) { 702 err = USBD_NOMEM; 703 goto bad1; 704 } 705 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 706 707 /* Allocate dummy ED that starts the bulk list. */ 708 sc->sc_bulk_head = ohci_alloc_sed(sc); 709 if (sc->sc_bulk_head == NULL) { 710 err = USBD_NOMEM; 711 goto bad2; 712 } 713 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 714 715 /* Allocate dummy ED that starts the isochronous list. */ 716 sc->sc_isoc_head = ohci_alloc_sed(sc); 717 if (sc->sc_isoc_head == NULL) { 718 err = USBD_NOMEM; 719 goto bad3; 720 } 721 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 722 723 /* Allocate all the dummy EDs that make up the interrupt tree. */ 724 for (i = 0; i < OHCI_NO_EDS; i++) { 725 sed = ohci_alloc_sed(sc); 726 if (sed == NULL) { 727 while (--i >= 0) 728 ohci_free_sed(sc, sc->sc_eds[i]); 729 err = USBD_NOMEM; 730 goto bad4; 731 } 732 /* All ED fields are set to 0. */ 733 sc->sc_eds[i] = sed; 734 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 735 if (i != 0) 736 psed = sc->sc_eds[(i-1) / 2]; 737 else 738 psed= sc->sc_isoc_head; 739 sed->next = psed; 740 sed->ed.ed_nexted = htole32(psed->physaddr); 741 } 742 /* 743 * Fill HCCA interrupt table. The bit reversal is to get 744 * the tree set up properly to spread the interrupts. 745 */ 746 for (i = 0; i < OHCI_NO_INTRS; i++) 747 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 748 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 749 750 #ifdef OHCI_DEBUG 751 if (ohcidebug > 15) { 752 for (i = 0; i < OHCI_NO_EDS; i++) { 753 printf("ed#%d ", i); 754 ohci_dump_ed(sc->sc_eds[i]); 755 } 756 printf("iso "); 757 ohci_dump_ed(sc->sc_isoc_head); 758 } 759 #endif 760 761 /* Determine in what context we are running. */ 762 ctl = OREAD4(sc, OHCI_CONTROL); 763 if (ctl & OHCI_IR) { 764 /* SMM active, request change */ 765 DPRINTF(("ohci_init: SMM active, request owner change\n")); 766 s = OREAD4(sc, OHCI_COMMAND_STATUS); 767 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 768 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 769 usb_delay_ms(&sc->sc_bus, 1); 770 ctl = OREAD4(sc, OHCI_CONTROL); 771 } 772 if ((ctl & OHCI_IR) == 0) { 773 printf("%s: SMM does not respond, resetting\n", 774 USBDEVNAME(sc->sc_bus.bdev)); 775 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 776 goto reset; 777 } 778 #if 0 779 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 780 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 781 /* BIOS started controller. */ 782 DPRINTF(("ohci_init: BIOS active\n")); 783 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 784 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 785 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 786 } 787 #endif 788 } else { 789 DPRINTF(("ohci_init: cold started\n")); 790 reset: 791 /* Controller was cold started. */ 792 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 793 } 794 795 /* 796 * This reset should not be necessary according to the OHCI spec, but 797 * without it some controllers do not start. 798 */ 799 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 800 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 801 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 802 803 /* We now own the host controller and the bus has been reset. */ 804 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 805 806 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 807 /* Nominal time for a reset is 10 us. */ 808 for (i = 0; i < 10; i++) { 809 delay(10); 810 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 811 if (!hcr) 812 break; 813 } 814 if (hcr) { 815 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 816 err = USBD_IOERROR; 817 goto bad5; 818 } 819 #ifdef OHCI_DEBUG 820 if (ohcidebug > 15) 821 ohci_dumpregs(sc); 822 #endif 823 824 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 825 826 /* Set up HC registers. */ 827 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 828 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 829 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 830 /* disable all interrupts and then switch on all desired interrupts */ 831 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 832 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 833 /* switch on desired functional features */ 834 ctl = OREAD4(sc, OHCI_CONTROL); 835 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 836 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 837 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 838 /* And finally start it! */ 839 OWRITE4(sc, OHCI_CONTROL, ctl); 840 841 /* 842 * The controller is now OPERATIONAL. Set a some final 843 * registers that should be set earlier, but that the 844 * controller ignores when in the SUSPEND state. 845 */ 846 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 847 fm |= OHCI_FSMPS(ival) | ival; 848 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 849 per = OHCI_PERIODIC(ival); /* 90% periodic */ 850 OWRITE4(sc, OHCI_PERIODIC_START, per); 851 852 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 853 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 854 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 855 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 856 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 857 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 858 859 /* 860 * The AMD756 requires a delay before re-reading the register, 861 * otherwise it will occasionally report 0 ports. 862 */ 863 sc->sc_noport = 0; 864 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 865 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 866 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 867 } 868 869 #ifdef OHCI_DEBUG 870 if (ohcidebug > 5) 871 ohci_dumpregs(sc); 872 #endif 873 874 /* Set up the bus struct. */ 875 sc->sc_bus.methods = &ohci_bus_methods; 876 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 877 878 #if defined(__NetBSD__) || defined(__OpenBSD__) 879 sc->sc_control = sc->sc_intre = 0; 880 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 881 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 882 #endif 883 884 usb_callout_init(sc->sc_tmo_rhsc); 885 886 return (USBD_NORMAL_COMPLETION); 887 888 bad5: 889 for (i = 0; i < OHCI_NO_EDS; i++) 890 ohci_free_sed(sc, sc->sc_eds[i]); 891 bad4: 892 ohci_free_sed(sc, sc->sc_isoc_head); 893 bad3: 894 ohci_free_sed(sc, sc->sc_bulk_head); 895 bad2: 896 ohci_free_sed(sc, sc->sc_ctrl_head); 897 bad1: 898 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 899 return (err); 900 } 901 902 usbd_status 903 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 904 { 905 #if defined(__NetBSD__) || defined(__OpenBSD__) 906 struct ohci_softc *sc = (struct ohci_softc *)bus; 907 #endif 908 usbd_status status; 909 910 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 911 #ifdef __NetBSD__ 912 if (status == USBD_NOMEM) 913 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 914 #endif 915 return status; 916 } 917 918 void 919 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 920 { 921 #if defined(__NetBSD__) || defined(__OpenBSD__) 922 struct ohci_softc *sc = (struct ohci_softc *)bus; 923 #endif 924 #ifdef __NetBSD__ 925 if (dma->block->flags & USB_DMA_RESERVE) { 926 usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve, 927 dma); 928 return; 929 } 930 #endif 931 usb_freemem(&sc->sc_bus, dma); 932 } 933 934 usbd_xfer_handle 935 ohci_allocx(struct usbd_bus *bus) 936 { 937 struct ohci_softc *sc = (struct ohci_softc *)bus; 938 usbd_xfer_handle xfer; 939 940 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 941 if (xfer != NULL) { 942 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 943 #ifdef DIAGNOSTIC 944 if (xfer->busy_free != XFER_FREE) { 945 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 946 xfer->busy_free); 947 } 948 #endif 949 } else { 950 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 951 } 952 if (xfer != NULL) { 953 memset(xfer, 0, sizeof (struct ohci_xfer)); 954 #ifdef DIAGNOSTIC 955 xfer->busy_free = XFER_BUSY; 956 #endif 957 } 958 return (xfer); 959 } 960 961 void 962 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 963 { 964 struct ohci_softc *sc = (struct ohci_softc *)bus; 965 966 #ifdef DIAGNOSTIC 967 if (xfer->busy_free != XFER_BUSY) { 968 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 969 xfer->busy_free); 970 return; 971 } 972 xfer->busy_free = XFER_FREE; 973 #endif 974 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 975 } 976 977 /* 978 * Shut down the controller when the system is going down. 979 */ 980 void 981 ohci_shutdown(void *v) 982 { 983 ohci_softc_t *sc = v; 984 985 DPRINTF(("ohci_shutdown: stopping the HC\n")); 986 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 987 } 988 989 /* 990 * Handle suspend/resume. 991 * 992 * We need to switch to polling mode here, because this routine is 993 * called from an intterupt context. This is all right since we 994 * are almost suspended anyway. 995 */ 996 void 997 ohci_power(int why, void *v) 998 { 999 ohci_softc_t *sc = v; 1000 u_int32_t ctl; 1001 int s; 1002 1003 #ifdef OHCI_DEBUG 1004 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 1005 ohci_dumpregs(sc); 1006 #endif 1007 1008 s = splhardusb(); 1009 switch (why) { 1010 case PWR_SUSPEND: 1011 case PWR_STANDBY: 1012 sc->sc_bus.use_polling++; 1013 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1014 if (sc->sc_control == 0) { 1015 /* 1016 * Preserve register values, in case that APM BIOS 1017 * does not recover them. 1018 */ 1019 sc->sc_control = ctl; 1020 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1021 } 1022 ctl |= OHCI_HCFS_SUSPEND; 1023 OWRITE4(sc, OHCI_CONTROL, ctl); 1024 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1025 sc->sc_bus.use_polling--; 1026 break; 1027 case PWR_RESUME: 1028 sc->sc_bus.use_polling++; 1029 /* Some broken BIOSes do not recover these values */ 1030 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1031 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1032 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1033 if (sc->sc_intre) 1034 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1035 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1036 if (sc->sc_control) 1037 ctl = sc->sc_control; 1038 else 1039 ctl = OREAD4(sc, OHCI_CONTROL); 1040 ctl |= OHCI_HCFS_RESUME; 1041 OWRITE4(sc, OHCI_CONTROL, ctl); 1042 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1043 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1044 OWRITE4(sc, OHCI_CONTROL, ctl); 1045 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1046 sc->sc_control = sc->sc_intre = 0; 1047 sc->sc_bus.use_polling--; 1048 break; 1049 case PWR_SOFTSUSPEND: 1050 case PWR_SOFTSTANDBY: 1051 case PWR_SOFTRESUME: 1052 break; 1053 } 1054 splx(s); 1055 } 1056 1057 #ifdef OHCI_DEBUG 1058 void 1059 ohci_dumpregs(ohci_softc_t *sc) 1060 { 1061 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1062 OREAD4(sc, OHCI_REVISION), 1063 OREAD4(sc, OHCI_CONTROL), 1064 OREAD4(sc, OHCI_COMMAND_STATUS))); 1065 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1066 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1067 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1068 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1069 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1070 OREAD4(sc, OHCI_HCCA), 1071 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1072 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1073 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1074 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1075 OREAD4(sc, OHCI_BULK_HEAD_ED), 1076 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1077 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1078 OREAD4(sc, OHCI_DONE_HEAD), 1079 OREAD4(sc, OHCI_FM_INTERVAL), 1080 OREAD4(sc, OHCI_FM_REMAINING))); 1081 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1082 OREAD4(sc, OHCI_FM_NUMBER), 1083 OREAD4(sc, OHCI_PERIODIC_START), 1084 OREAD4(sc, OHCI_LS_THRESHOLD))); 1085 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1086 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1087 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1088 OREAD4(sc, OHCI_RH_STATUS))); 1089 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1090 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1091 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1092 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1093 le32toh(sc->sc_hcca->hcca_frame_number), 1094 le32toh(sc->sc_hcca->hcca_done_head))); 1095 } 1096 #endif 1097 1098 Static int ohci_intr1(ohci_softc_t *); 1099 1100 int 1101 ohci_intr(void *p) 1102 { 1103 ohci_softc_t *sc = p; 1104 1105 if (sc == NULL || sc->sc_dying) 1106 return (0); 1107 1108 /* If we get an interrupt while polling, then just ignore it. */ 1109 if (sc->sc_bus.use_polling) { 1110 #ifdef DIAGNOSTIC 1111 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1112 #endif 1113 /* for level triggered intrs, should do something to ack */ 1114 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1115 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1116 1117 return (0); 1118 } 1119 1120 return (ohci_intr1(sc)); 1121 } 1122 1123 Static int 1124 ohci_intr1(ohci_softc_t *sc) 1125 { 1126 u_int32_t intrs, eintrs; 1127 1128 DPRINTFN(14,("ohci_intr1: enter\n")); 1129 1130 /* In case the interrupt occurs before initialization has completed. */ 1131 if (sc == NULL || sc->sc_hcca == NULL) { 1132 #ifdef DIAGNOSTIC 1133 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1134 #endif 1135 return (0); 1136 } 1137 1138 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1139 if (!intrs) 1140 return (0); 1141 1142 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1143 eintrs = intrs & sc->sc_eintrs; 1144 if (!eintrs) 1145 return (0); 1146 1147 sc->sc_bus.intr_context++; 1148 sc->sc_bus.no_intrs++; 1149 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1150 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1151 (u_int)eintrs)); 1152 1153 if (eintrs & OHCI_SO) { 1154 sc->sc_overrun_cnt++; 1155 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1156 printf("%s: %u scheduling overruns\n", 1157 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1158 sc->sc_overrun_cnt = 0; 1159 } 1160 /* XXX do what */ 1161 eintrs &= ~OHCI_SO; 1162 } 1163 if (eintrs & OHCI_WDH) { 1164 /* 1165 * We block the interrupt below, and reenable it later from 1166 * ohci_softintr(). 1167 */ 1168 usb_schedsoftintr(&sc->sc_bus); 1169 } 1170 if (eintrs & OHCI_RD) { 1171 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1172 /* XXX process resume detect */ 1173 } 1174 if (eintrs & OHCI_UE) { 1175 printf("%s: unrecoverable error, controller halted\n", 1176 USBDEVNAME(sc->sc_bus.bdev)); 1177 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1178 /* XXX what else */ 1179 } 1180 if (eintrs & OHCI_RHSC) { 1181 /* 1182 * We block the interrupt below, and reenable it later from 1183 * a timeout. 1184 */ 1185 ohci_rhsc(sc, sc->sc_intrxfer); 1186 /* Do not allow RHSC interrupts > 1 per second */ 1187 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1188 } 1189 1190 sc->sc_bus.intr_context--; 1191 1192 if (eintrs != 0) { 1193 /* Block unprocessed interrupts. */ 1194 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1195 sc->sc_eintrs &= ~eintrs; 1196 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1197 USBDEVNAME(sc->sc_bus.bdev), eintrs)); 1198 } 1199 1200 return (1); 1201 } 1202 1203 void 1204 ohci_rhsc_enable(void *v_sc) 1205 { 1206 ohci_softc_t *sc = v_sc; 1207 int s; 1208 1209 s = splhardusb(); 1210 sc->sc_eintrs |= OHCI_RHSC; 1211 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1212 splx(s); 1213 } 1214 1215 #ifdef OHCI_DEBUG 1216 char *ohci_cc_strs[] = { 1217 "NO_ERROR", 1218 "CRC", 1219 "BIT_STUFFING", 1220 "DATA_TOGGLE_MISMATCH", 1221 "STALL", 1222 "DEVICE_NOT_RESPONDING", 1223 "PID_CHECK_FAILURE", 1224 "UNEXPECTED_PID", 1225 "DATA_OVERRUN", 1226 "DATA_UNDERRUN", 1227 "BUFFER_OVERRUN", 1228 "BUFFER_UNDERRUN", 1229 "reserved", 1230 "reserved", 1231 "NOT_ACCESSED", 1232 "NOT_ACCESSED", 1233 }; 1234 #endif 1235 1236 void 1237 ohci_softintr(void *v) 1238 { 1239 ohci_softc_t *sc = v; 1240 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1241 ohci_soft_td_t *std, *sdone, *stdnext; 1242 usbd_xfer_handle xfer; 1243 struct ohci_pipe *opipe; 1244 int len, cc, s; 1245 int i, j, actlen, iframes, uedir; 1246 ohci_physaddr_t done; 1247 1248 DPRINTFN(10,("ohci_softintr: enter\n")); 1249 1250 sc->sc_bus.intr_context++; 1251 1252 s = splhardusb(); 1253 done = le32toh(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1254 sc->sc_hcca->hcca_done_head = 0; 1255 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1256 sc->sc_eintrs |= OHCI_WDH; 1257 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1258 splx(s); 1259 1260 /* Reverse the done list. */ 1261 for (sdone = NULL, sidone = NULL; done != 0; ) { 1262 std = ohci_hash_find_td(sc, done); 1263 if (std != NULL) { 1264 std->dnext = sdone; 1265 done = le32toh(std->td.td_nexttd); 1266 sdone = std; 1267 DPRINTFN(10,("add TD %p\n", std)); 1268 continue; 1269 } 1270 sitd = ohci_hash_find_itd(sc, done); 1271 if (sitd != NULL) { 1272 sitd->dnext = sidone; 1273 done = le32toh(sitd->itd.itd_nextitd); 1274 sidone = sitd; 1275 DPRINTFN(5,("add ITD %p\n", sitd)); 1276 continue; 1277 } 1278 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1279 } 1280 1281 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1282 1283 #ifdef OHCI_DEBUG 1284 if (ohcidebug > 10) { 1285 DPRINTF(("ohci_process_done: TD done:\n")); 1286 ohci_dump_tds(sdone); 1287 } 1288 #endif 1289 1290 for (std = sdone; std; std = stdnext) { 1291 xfer = std->xfer; 1292 stdnext = std->dnext; 1293 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1294 std, xfer, xfer ? xfer->hcpriv : 0)); 1295 if (xfer == NULL) { 1296 /* 1297 * xfer == NULL: There seems to be no xfer associated 1298 * with this TD. It is tailp that happened to end up on 1299 * the done queue. 1300 * Shouldn't happen, but some chips are broken(?). 1301 */ 1302 continue; 1303 } 1304 if (xfer->status == USBD_CANCELLED || 1305 xfer->status == USBD_TIMEOUT) { 1306 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1307 xfer)); 1308 /* Handled by abort routine. */ 1309 continue; 1310 } 1311 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1312 1313 len = std->len; 1314 if (std->td.td_cbp != 0) 1315 len -= le32toh(std->td.td_be) - 1316 le32toh(std->td.td_cbp) + 1; 1317 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1318 std->flags)); 1319 if (std->flags & OHCI_ADD_LEN) 1320 xfer->actlen += len; 1321 1322 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1323 if (cc == OHCI_CC_NO_ERROR) { 1324 if (std->flags & OHCI_CALL_DONE) { 1325 xfer->status = USBD_NORMAL_COMPLETION; 1326 s = splusb(); 1327 usb_transfer_complete(xfer); 1328 splx(s); 1329 } 1330 ohci_free_std(sc, std); 1331 } else { 1332 /* 1333 * Endpoint is halted. First unlink all the TDs 1334 * belonging to the failed transfer, and then restart 1335 * the endpoint. 1336 */ 1337 ohci_soft_td_t *p, *n; 1338 opipe = (struct ohci_pipe *)xfer->pipe; 1339 1340 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1341 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1342 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1343 1344 /* remove TDs */ 1345 for (p = std; p->xfer == xfer; p = n) { 1346 n = p->nexttd; 1347 ohci_free_std(sc, p); 1348 } 1349 1350 /* clear halt */ 1351 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1352 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1353 1354 if (cc == OHCI_CC_STALL) 1355 xfer->status = USBD_STALLED; 1356 else 1357 xfer->status = USBD_IOERROR; 1358 s = splusb(); 1359 usb_transfer_complete(xfer); 1360 splx(s); 1361 } 1362 } 1363 1364 #ifdef OHCI_DEBUG 1365 if (ohcidebug > 10) { 1366 DPRINTF(("ohci_softintr: ITD done:\n")); 1367 ohci_dump_itds(sidone); 1368 } 1369 #endif 1370 1371 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1372 xfer = sitd->xfer; 1373 sitdnext = sitd->dnext; 1374 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1375 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1376 if (xfer == NULL) 1377 continue; 1378 if (xfer->status == USBD_CANCELLED || 1379 xfer->status == USBD_TIMEOUT) { 1380 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1381 xfer)); 1382 /* Handled by abort routine. */ 1383 continue; 1384 } 1385 #ifdef DIAGNOSTIC 1386 if (sitd->isdone) 1387 printf("ohci_softintr: sitd=%p is done\n", sitd); 1388 sitd->isdone = 1; 1389 #endif 1390 if (sitd->flags & OHCI_CALL_DONE) { 1391 ohci_soft_itd_t *next; 1392 1393 opipe = (struct ohci_pipe *)xfer->pipe; 1394 opipe->u.iso.inuse -= xfer->nframes; 1395 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1396 bEndpointAddress); 1397 xfer->status = USBD_NORMAL_COMPLETION; 1398 actlen = 0; 1399 for (i = 0, sitd = xfer->hcpriv;; 1400 sitd = next) { 1401 next = sitd->nextitd; 1402 if (OHCI_ITD_GET_CC(le32toh(sitd-> 1403 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1404 xfer->status = USBD_IOERROR; 1405 /* For input, update frlengths with actual */ 1406 /* XXX anything necessary for output? */ 1407 if (uedir == UE_DIR_IN && 1408 xfer->status == USBD_NORMAL_COMPLETION) { 1409 iframes = OHCI_ITD_GET_FC(le32toh( 1410 sitd->itd.itd_flags)); 1411 for (j = 0; j < iframes; i++, j++) { 1412 len = le16toh(sitd-> 1413 itd.itd_offset[j]); 1414 len = 1415 (OHCI_ITD_PSW_GET_CC(len) == 1416 OHCI_CC_NOT_ACCESSED) ? 0 : 1417 OHCI_ITD_PSW_LENGTH(len); 1418 xfer->frlengths[i] = len; 1419 actlen += len; 1420 } 1421 } 1422 if (sitd->flags & OHCI_CALL_DONE) 1423 break; 1424 ohci_free_sitd(sc, sitd); 1425 } 1426 ohci_free_sitd(sc, sitd); 1427 if (uedir == UE_DIR_IN && 1428 xfer->status == USBD_NORMAL_COMPLETION) 1429 xfer->actlen = actlen; 1430 xfer->hcpriv = NULL; 1431 1432 s = splusb(); 1433 usb_transfer_complete(xfer); 1434 splx(s); 1435 } 1436 } 1437 1438 #ifdef USB_USE_SOFTINTR 1439 if (sc->sc_softwake) { 1440 sc->sc_softwake = 0; 1441 wakeup(&sc->sc_softwake); 1442 } 1443 #endif /* USB_USE_SOFTINTR */ 1444 1445 sc->sc_bus.intr_context--; 1446 DPRINTFN(10,("ohci_softintr: done:\n")); 1447 } 1448 1449 void 1450 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1451 { 1452 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1453 1454 #ifdef DIAGNOSTIC 1455 if (!(xfer->rqflags & URQ_REQUEST)) { 1456 panic("ohci_device_ctrl_done: not a request"); 1457 } 1458 #endif 1459 } 1460 1461 void 1462 ohci_device_intr_done(usbd_xfer_handle xfer) 1463 { 1464 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1465 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1466 ohci_soft_ed_t *sed = opipe->sed; 1467 ohci_soft_td_t *data, *tail; 1468 1469 1470 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1471 xfer, xfer->actlen)); 1472 1473 if (xfer->pipe->repeat) { 1474 data = opipe->tail.td; 1475 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1476 if (tail == NULL) { 1477 xfer->status = USBD_NOMEM; 1478 return; 1479 } 1480 tail->xfer = NULL; 1481 1482 data->td.td_flags = htole32( 1483 OHCI_TD_IN | OHCI_TD_NOCC | 1484 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1485 if (xfer->flags & USBD_SHORT_XFER_OK) 1486 data->td.td_flags |= htole32(OHCI_TD_R); 1487 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1488 data->nexttd = tail; 1489 data->td.td_nexttd = htole32(tail->physaddr); 1490 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1491 xfer->length - 1); 1492 data->len = xfer->length; 1493 data->xfer = xfer; 1494 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1495 xfer->hcpriv = data; 1496 xfer->actlen = 0; 1497 1498 sed->ed.ed_tailp = htole32(tail->physaddr); 1499 opipe->tail.td = tail; 1500 } 1501 } 1502 1503 void 1504 ohci_device_bulk_done(usbd_xfer_handle xfer) 1505 { 1506 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1507 xfer, xfer->actlen)); 1508 } 1509 1510 void 1511 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1512 { 1513 usbd_pipe_handle pipe; 1514 u_char *p; 1515 int i, m; 1516 int hstatus; 1517 1518 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1519 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1520 sc, xfer, hstatus)); 1521 1522 if (xfer == NULL) { 1523 /* Just ignore the change. */ 1524 return; 1525 } 1526 1527 pipe = xfer->pipe; 1528 1529 p = KERNADDR(&xfer->dmabuf, 0); 1530 m = min(sc->sc_noport, xfer->length * 8 - 1); 1531 memset(p, 0, xfer->length); 1532 for (i = 1; i <= m; i++) { 1533 /* Pick out CHANGE bits from the status reg. */ 1534 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1535 p[i/8] |= 1 << (i%8); 1536 } 1537 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1538 xfer->actlen = xfer->length; 1539 xfer->status = USBD_NORMAL_COMPLETION; 1540 1541 usb_transfer_complete(xfer); 1542 } 1543 1544 void 1545 ohci_root_intr_done(usbd_xfer_handle xfer) 1546 { 1547 } 1548 1549 void 1550 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1551 { 1552 } 1553 1554 /* 1555 * Wait here until controller claims to have an interrupt. 1556 * Then call ohci_intr and return. Use timeout to avoid waiting 1557 * too long. 1558 */ 1559 void 1560 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1561 { 1562 int timo = xfer->timeout; 1563 int usecs; 1564 u_int32_t intrs; 1565 1566 xfer->status = USBD_IN_PROGRESS; 1567 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1568 usb_delay_ms(&sc->sc_bus, 1); 1569 if (sc->sc_dying) 1570 break; 1571 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1572 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1573 #ifdef OHCI_DEBUG 1574 if (ohcidebug > 15) 1575 ohci_dumpregs(sc); 1576 #endif 1577 if (intrs) { 1578 ohci_intr1(sc); 1579 if (xfer->status != USBD_IN_PROGRESS) 1580 return; 1581 } 1582 } 1583 1584 /* Timeout */ 1585 DPRINTF(("ohci_waitintr: timeout\n")); 1586 xfer->status = USBD_TIMEOUT; 1587 usb_transfer_complete(xfer); 1588 /* XXX should free TD */ 1589 } 1590 1591 void 1592 ohci_poll(struct usbd_bus *bus) 1593 { 1594 ohci_softc_t *sc = (ohci_softc_t *)bus; 1595 #ifdef OHCI_DEBUG 1596 static int last; 1597 int new; 1598 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1599 if (new != last) { 1600 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1601 last = new; 1602 } 1603 #endif 1604 1605 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1606 ohci_intr1(sc); 1607 } 1608 1609 usbd_status 1610 ohci_device_request(usbd_xfer_handle xfer) 1611 { 1612 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1613 usb_device_request_t *req = &xfer->request; 1614 usbd_device_handle dev = opipe->pipe.device; 1615 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1616 int addr = dev->address; 1617 ohci_soft_td_t *setup, *stat, *next, *tail; 1618 ohci_soft_ed_t *sed; 1619 int isread; 1620 int len; 1621 usbd_status err; 1622 int s; 1623 1624 isread = req->bmRequestType & UT_READ; 1625 len = UGETW(req->wLength); 1626 1627 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1628 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1629 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1630 UGETW(req->wIndex), len, addr, 1631 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1632 1633 setup = opipe->tail.td; 1634 stat = ohci_alloc_std(sc); 1635 if (stat == NULL) { 1636 err = USBD_NOMEM; 1637 goto bad1; 1638 } 1639 tail = ohci_alloc_std(sc); 1640 if (tail == NULL) { 1641 err = USBD_NOMEM; 1642 goto bad2; 1643 } 1644 tail->xfer = NULL; 1645 1646 sed = opipe->sed; 1647 opipe->u.ctl.length = len; 1648 1649 /* Update device address and length since they may have changed 1650 during the setup of the control pipe in usbd_new_device(). */ 1651 /* XXX This only needs to be done once, but it's too early in open. */ 1652 /* XXXX Should not touch ED here! */ 1653 sed->ed.ed_flags = htole32( 1654 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1655 OHCI_ED_SET_FA(addr) | 1656 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1657 1658 next = stat; 1659 1660 /* Set up data transaction */ 1661 if (len != 0) { 1662 ohci_soft_td_t *std = stat; 1663 1664 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1665 std, &stat); 1666 stat = stat->nexttd; /* point at free TD */ 1667 if (err) 1668 goto bad3; 1669 /* Start toggle at 1 and then use the carried toggle. */ 1670 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1671 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1672 } 1673 1674 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1675 1676 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1677 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1678 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1679 setup->nexttd = next; 1680 setup->td.td_nexttd = htole32(next->physaddr); 1681 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1682 setup->len = 0; 1683 setup->xfer = xfer; 1684 setup->flags = 0; 1685 xfer->hcpriv = setup; 1686 1687 stat->td.td_flags = htole32( 1688 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1689 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1690 stat->td.td_cbp = 0; 1691 stat->nexttd = tail; 1692 stat->td.td_nexttd = htole32(tail->physaddr); 1693 stat->td.td_be = 0; 1694 stat->flags = OHCI_CALL_DONE; 1695 stat->len = 0; 1696 stat->xfer = xfer; 1697 1698 #ifdef OHCI_DEBUG 1699 if (ohcidebug > 5) { 1700 DPRINTF(("ohci_device_request:\n")); 1701 ohci_dump_ed(sed); 1702 ohci_dump_tds(setup); 1703 } 1704 #endif 1705 1706 /* Insert ED in schedule */ 1707 s = splusb(); 1708 sed->ed.ed_tailp = htole32(tail->physaddr); 1709 opipe->tail.td = tail; 1710 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1711 if (xfer->timeout && !sc->sc_bus.use_polling) { 1712 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1713 ohci_timeout, xfer); 1714 } 1715 splx(s); 1716 1717 #ifdef OHCI_DEBUG 1718 if (ohcidebug > 20) { 1719 delay(10000); 1720 DPRINTF(("ohci_device_request: status=%x\n", 1721 OREAD4(sc, OHCI_COMMAND_STATUS))); 1722 ohci_dumpregs(sc); 1723 printf("ctrl head:\n"); 1724 ohci_dump_ed(sc->sc_ctrl_head); 1725 printf("sed:\n"); 1726 ohci_dump_ed(sed); 1727 ohci_dump_tds(setup); 1728 } 1729 #endif 1730 1731 return (USBD_NORMAL_COMPLETION); 1732 1733 bad3: 1734 ohci_free_std(sc, tail); 1735 bad2: 1736 ohci_free_std(sc, stat); 1737 bad1: 1738 return (err); 1739 } 1740 1741 /* 1742 * Add an ED to the schedule. Called at splusb(). 1743 */ 1744 void 1745 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1746 { 1747 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1748 1749 SPLUSBCHECK; 1750 sed->next = head->next; 1751 sed->ed.ed_nexted = head->ed.ed_nexted; 1752 head->next = sed; 1753 head->ed.ed_nexted = htole32(sed->physaddr); 1754 } 1755 1756 /* 1757 * Remove an ED from the schedule. Called at splusb(). 1758 */ 1759 void 1760 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1761 { 1762 ohci_soft_ed_t *p; 1763 1764 SPLUSBCHECK; 1765 1766 /* XXX */ 1767 for (p = head; p != NULL && p->next != sed; p = p->next) 1768 ; 1769 if (p == NULL) 1770 panic("ohci_rem_ed: ED not found"); 1771 p->next = sed->next; 1772 p->ed.ed_nexted = sed->ed.ed_nexted; 1773 } 1774 1775 /* 1776 * When a transfer is completed the TD is added to the done queue by 1777 * the host controller. This queue is the processed by software. 1778 * Unfortunately the queue contains the physical address of the TD 1779 * and we have no simple way to translate this back to a kernel address. 1780 * To make the translation possible (and fast) we use a hash table of 1781 * TDs currently in the schedule. The physical address is used as the 1782 * hash value. 1783 */ 1784 1785 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1786 /* Called at splusb() */ 1787 void 1788 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1789 { 1790 int h = HASH(std->physaddr); 1791 1792 SPLUSBCHECK; 1793 1794 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1795 } 1796 1797 /* Called at splusb() */ 1798 void 1799 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1800 { 1801 SPLUSBCHECK; 1802 1803 LIST_REMOVE(std, hnext); 1804 } 1805 1806 ohci_soft_td_t * 1807 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1808 { 1809 int h = HASH(a); 1810 ohci_soft_td_t *std; 1811 1812 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1813 std != NULL; 1814 std = LIST_NEXT(std, hnext)) 1815 if (std->physaddr == a) 1816 return (std); 1817 return (NULL); 1818 } 1819 1820 /* Called at splusb() */ 1821 void 1822 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1823 { 1824 int h = HASH(sitd->physaddr); 1825 1826 SPLUSBCHECK; 1827 1828 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1829 sitd, (u_long)sitd->physaddr)); 1830 1831 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1832 } 1833 1834 /* Called at splusb() */ 1835 void 1836 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1837 { 1838 SPLUSBCHECK; 1839 1840 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1841 sitd, (u_long)sitd->physaddr)); 1842 1843 LIST_REMOVE(sitd, hnext); 1844 } 1845 1846 ohci_soft_itd_t * 1847 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1848 { 1849 int h = HASH(a); 1850 ohci_soft_itd_t *sitd; 1851 1852 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1853 sitd != NULL; 1854 sitd = LIST_NEXT(sitd, hnext)) 1855 if (sitd->physaddr == a) 1856 return (sitd); 1857 return (NULL); 1858 } 1859 1860 void 1861 ohci_timeout(void *addr) 1862 { 1863 struct ohci_xfer *oxfer = addr; 1864 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1865 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1866 1867 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1868 1869 if (sc->sc_dying) { 1870 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1871 return; 1872 } 1873 1874 /* Execute the abort in a process context. */ 1875 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1876 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1877 } 1878 1879 void 1880 ohci_timeout_task(void *addr) 1881 { 1882 usbd_xfer_handle xfer = addr; 1883 int s; 1884 1885 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1886 1887 s = splusb(); 1888 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1889 splx(s); 1890 } 1891 1892 #ifdef OHCI_DEBUG 1893 void 1894 ohci_dump_tds(ohci_soft_td_t *std) 1895 { 1896 for (; std; std = std->nexttd) 1897 ohci_dump_td(std); 1898 } 1899 1900 void 1901 ohci_dump_td(ohci_soft_td_t *std) 1902 { 1903 char sbuf[128]; 1904 1905 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1906 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1907 sbuf, sizeof(sbuf)); 1908 1909 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1910 "nexttd=0x%08lx be=0x%08lx\n", 1911 std, (u_long)std->physaddr, sbuf, 1912 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1913 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1914 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1915 (u_long)le32toh(std->td.td_cbp), 1916 (u_long)le32toh(std->td.td_nexttd), 1917 (u_long)le32toh(std->td.td_be)); 1918 } 1919 1920 void 1921 ohci_dump_itd(ohci_soft_itd_t *sitd) 1922 { 1923 int i; 1924 1925 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1926 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1927 sitd, (u_long)sitd->physaddr, 1928 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1929 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1930 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1931 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1932 (u_long)le32toh(sitd->itd.itd_bp0), 1933 (u_long)le32toh(sitd->itd.itd_nextitd), 1934 (u_long)le32toh(sitd->itd.itd_be)); 1935 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1936 printf("offs[%d]=0x%04x ", i, 1937 (u_int)le16toh(sitd->itd.itd_offset[i])); 1938 printf("\n"); 1939 } 1940 1941 void 1942 ohci_dump_itds(ohci_soft_itd_t *sitd) 1943 { 1944 for (; sitd; sitd = sitd->nextitd) 1945 ohci_dump_itd(sitd); 1946 } 1947 1948 void 1949 ohci_dump_ed(ohci_soft_ed_t *sed) 1950 { 1951 char sbuf[128], sbuf2[128]; 1952 1953 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1954 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1955 sbuf, sizeof(sbuf)); 1956 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1957 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1958 1959 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1960 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1961 sed, (u_long)sed->physaddr, 1962 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1963 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1964 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1965 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1966 (u_long)le32toh(sed->ed.ed_headp), 1967 (u_long)le32toh(sed->ed.ed_nexted)); 1968 } 1969 #endif 1970 1971 usbd_status 1972 ohci_open(usbd_pipe_handle pipe) 1973 { 1974 usbd_device_handle dev = pipe->device; 1975 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1976 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1977 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1978 u_int8_t addr = dev->address; 1979 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1980 ohci_soft_ed_t *sed; 1981 ohci_soft_td_t *std; 1982 ohci_soft_itd_t *sitd; 1983 ohci_physaddr_t tdphys; 1984 u_int32_t fmt; 1985 usbd_status err; 1986 int s; 1987 int ival; 1988 1989 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1990 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1991 1992 if (sc->sc_dying) 1993 return (USBD_IOERROR); 1994 1995 std = NULL; 1996 sed = NULL; 1997 1998 if (addr == sc->sc_addr) { 1999 switch (ed->bEndpointAddress) { 2000 case USB_CONTROL_ENDPOINT: 2001 pipe->methods = &ohci_root_ctrl_methods; 2002 break; 2003 case UE_DIR_IN | OHCI_INTR_ENDPT: 2004 pipe->methods = &ohci_root_intr_methods; 2005 break; 2006 default: 2007 return (USBD_INVAL); 2008 } 2009 } else { 2010 sed = ohci_alloc_sed(sc); 2011 if (sed == NULL) 2012 goto bad0; 2013 opipe->sed = sed; 2014 if (xfertype == UE_ISOCHRONOUS) { 2015 sitd = ohci_alloc_sitd(sc); 2016 if (sitd == NULL) 2017 goto bad1; 2018 opipe->tail.itd = sitd; 2019 tdphys = sitd->physaddr; 2020 fmt = OHCI_ED_FORMAT_ISO; 2021 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2022 fmt |= OHCI_ED_DIR_IN; 2023 else 2024 fmt |= OHCI_ED_DIR_OUT; 2025 } else { 2026 std = ohci_alloc_std(sc); 2027 if (std == NULL) 2028 goto bad1; 2029 opipe->tail.td = std; 2030 tdphys = std->physaddr; 2031 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2032 } 2033 sed->ed.ed_flags = htole32( 2034 OHCI_ED_SET_FA(addr) | 2035 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2036 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2037 fmt | 2038 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2039 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 2040 2041 switch (xfertype) { 2042 case UE_CONTROL: 2043 pipe->methods = &ohci_device_ctrl_methods; 2044 err = usb_allocmem(&sc->sc_bus, 2045 sizeof(usb_device_request_t), 2046 0, &opipe->u.ctl.reqdma); 2047 if (err) 2048 goto bad; 2049 s = splusb(); 2050 ohci_add_ed(sed, sc->sc_ctrl_head); 2051 splx(s); 2052 break; 2053 case UE_INTERRUPT: 2054 pipe->methods = &ohci_device_intr_methods; 2055 ival = pipe->interval; 2056 if (ival == USBD_DEFAULT_INTERVAL) 2057 ival = ed->bInterval; 2058 return (ohci_device_setintr(sc, opipe, ival)); 2059 case UE_ISOCHRONOUS: 2060 pipe->methods = &ohci_device_isoc_methods; 2061 return (ohci_setup_isoc(pipe)); 2062 case UE_BULK: 2063 pipe->methods = &ohci_device_bulk_methods; 2064 s = splusb(); 2065 ohci_add_ed(sed, sc->sc_bulk_head); 2066 splx(s); 2067 break; 2068 } 2069 } 2070 return (USBD_NORMAL_COMPLETION); 2071 2072 bad: 2073 if (std != NULL) 2074 ohci_free_std(sc, std); 2075 bad1: 2076 if (sed != NULL) 2077 ohci_free_sed(sc, sed); 2078 bad0: 2079 return (USBD_NOMEM); 2080 2081 } 2082 2083 /* 2084 * Close a reqular pipe. 2085 * Assumes that there are no pending transactions. 2086 */ 2087 void 2088 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2089 { 2090 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2091 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2092 ohci_soft_ed_t *sed = opipe->sed; 2093 int s; 2094 2095 s = splusb(); 2096 #ifdef DIAGNOSTIC 2097 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2098 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2099 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2100 ohci_soft_td_t *std; 2101 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2102 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2103 "tl=0x%x pipe=%p, std=%p\n", sed, 2104 (int)le32toh(sed->ed.ed_headp), 2105 (int)le32toh(sed->ed.ed_tailp), 2106 pipe, std); 2107 #ifdef USB_DEBUG 2108 usbd_dump_pipe(&opipe->pipe); 2109 #endif 2110 #ifdef OHCI_DEBUG 2111 ohci_dump_ed(sed); 2112 if (std) 2113 ohci_dump_td(std); 2114 #endif 2115 usb_delay_ms(&sc->sc_bus, 2); 2116 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2117 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2118 printf("ohci_close_pipe: pipe still not empty\n"); 2119 } 2120 #endif 2121 ohci_rem_ed(sed, head); 2122 /* Make sure the host controller is not touching this ED */ 2123 usb_delay_ms(&sc->sc_bus, 1); 2124 splx(s); 2125 ohci_free_sed(sc, opipe->sed); 2126 } 2127 2128 /* 2129 * Abort a device request. 2130 * If this routine is called at splusb() it guarantees that the request 2131 * will be removed from the hardware scheduling and that the callback 2132 * for it will be called with USBD_CANCELLED status. 2133 * It's impossible to guarantee that the requested transfer will not 2134 * have happened since the hardware runs concurrently. 2135 * If the transaction has already happened we rely on the ordinary 2136 * interrupt processing to process it. 2137 */ 2138 void 2139 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2140 { 2141 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2142 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2143 ohci_soft_ed_t *sed = opipe->sed; 2144 ohci_soft_td_t *p, *n; 2145 ohci_physaddr_t headp; 2146 int s, hit; 2147 2148 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2149 2150 if (sc->sc_dying) { 2151 /* If we're dying, just do the software part. */ 2152 s = splusb(); 2153 xfer->status = status; /* make software ignore it */ 2154 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2155 usb_transfer_complete(xfer); 2156 splx(s); 2157 } 2158 2159 if (xfer->device->bus->intr_context || !curproc) 2160 panic("ohci_abort_xfer: not in process context"); 2161 2162 /* 2163 * Step 1: Make interrupt routine and hardware ignore xfer. 2164 */ 2165 s = splusb(); 2166 xfer->status = status; /* make software ignore it */ 2167 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2168 splx(s); 2169 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2170 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2171 2172 /* 2173 * Step 2: Wait until we know hardware has finished any possible 2174 * use of the xfer. Also make sure the soft interrupt routine 2175 * has run. 2176 */ 2177 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2178 s = splusb(); 2179 #ifdef USB_USE_SOFTINTR 2180 sc->sc_softwake = 1; 2181 #endif /* USB_USE_SOFTINTR */ 2182 usb_schedsoftintr(&sc->sc_bus); 2183 #ifdef USB_USE_SOFTINTR 2184 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2185 #endif /* USB_USE_SOFTINTR */ 2186 splx(s); 2187 2188 /* 2189 * Step 3: Remove any vestiges of the xfer from the hardware. 2190 * The complication here is that the hardware may have executed 2191 * beyond the xfer we're trying to abort. So as we're scanning 2192 * the TDs of this xfer we check if the hardware points to 2193 * any of them. 2194 */ 2195 s = splusb(); /* XXX why? */ 2196 p = xfer->hcpriv; 2197 #ifdef DIAGNOSTIC 2198 if (p == NULL) { 2199 splx(s); 2200 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2201 return; 2202 } 2203 #endif 2204 #ifdef OHCI_DEBUG 2205 if (ohcidebug > 1) { 2206 DPRINTF(("ohci_abort_xfer: sed=\n")); 2207 ohci_dump_ed(sed); 2208 ohci_dump_tds(p); 2209 } 2210 #endif 2211 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2212 hit = 0; 2213 for (; p->xfer == xfer; p = n) { 2214 hit |= headp == p->physaddr; 2215 n = p->nexttd; 2216 ohci_free_std(sc, p); 2217 } 2218 /* Zap headp register if hardware pointed inside the xfer. */ 2219 if (hit) { 2220 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2221 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2222 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2223 } else { 2224 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2225 } 2226 2227 /* 2228 * Step 4: Turn on hardware again. 2229 */ 2230 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2231 2232 /* 2233 * Step 5: Execute callback. 2234 */ 2235 usb_transfer_complete(xfer); 2236 2237 splx(s); 2238 } 2239 2240 /* 2241 * Data structures and routines to emulate the root hub. 2242 */ 2243 Static usb_device_descriptor_t ohci_devd = { 2244 USB_DEVICE_DESCRIPTOR_SIZE, 2245 UDESC_DEVICE, /* type */ 2246 {0x00, 0x01}, /* USB version */ 2247 UDCLASS_HUB, /* class */ 2248 UDSUBCLASS_HUB, /* subclass */ 2249 UDPROTO_FSHUB, 2250 64, /* max packet */ 2251 {0},{0},{0x00,0x01}, /* device id */ 2252 1,2,0, /* string indicies */ 2253 1 /* # of configurations */ 2254 }; 2255 2256 Static usb_config_descriptor_t ohci_confd = { 2257 USB_CONFIG_DESCRIPTOR_SIZE, 2258 UDESC_CONFIG, 2259 {USB_CONFIG_DESCRIPTOR_SIZE + 2260 USB_INTERFACE_DESCRIPTOR_SIZE + 2261 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2262 1, 2263 1, 2264 0, 2265 UC_SELF_POWERED, 2266 0 /* max power */ 2267 }; 2268 2269 Static usb_interface_descriptor_t ohci_ifcd = { 2270 USB_INTERFACE_DESCRIPTOR_SIZE, 2271 UDESC_INTERFACE, 2272 0, 2273 0, 2274 1, 2275 UICLASS_HUB, 2276 UISUBCLASS_HUB, 2277 UIPROTO_FSHUB, 2278 0 2279 }; 2280 2281 Static usb_endpoint_descriptor_t ohci_endpd = { 2282 USB_ENDPOINT_DESCRIPTOR_SIZE, 2283 UDESC_ENDPOINT, 2284 UE_DIR_IN | OHCI_INTR_ENDPT, 2285 UE_INTERRUPT, 2286 {8, 0}, /* max packet */ 2287 255 2288 }; 2289 2290 Static usb_hub_descriptor_t ohci_hubd = { 2291 USB_HUB_DESCRIPTOR_SIZE, 2292 UDESC_HUB, 2293 0, 2294 {0,0}, 2295 0, 2296 0, 2297 {0}, 2298 }; 2299 2300 Static int 2301 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2302 { 2303 int i; 2304 2305 if (l == 0) 2306 return (0); 2307 p->bLength = 2 * strlen(s) + 2; 2308 if (l == 1) 2309 return (1); 2310 p->bDescriptorType = UDESC_STRING; 2311 l -= 2; 2312 for (i = 0; s[i] && l > 1; i++, l -= 2) 2313 USETW2(p->bString[i], 0, s[i]); 2314 return (2*i+2); 2315 } 2316 2317 /* 2318 * Simulate a hardware hub by handling all the necessary requests. 2319 */ 2320 Static usbd_status 2321 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2322 { 2323 usbd_status err; 2324 2325 /* Insert last in queue. */ 2326 err = usb_insert_transfer(xfer); 2327 if (err) 2328 return (err); 2329 2330 /* Pipe isn't running, start first */ 2331 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2332 } 2333 2334 Static usbd_status 2335 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2336 { 2337 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2338 usb_device_request_t *req; 2339 void *buf = NULL; 2340 int port, i; 2341 int s, len, value, index, l, totlen = 0; 2342 usb_port_status_t ps; 2343 usb_hub_descriptor_t hubd; 2344 usbd_status err; 2345 u_int32_t v; 2346 2347 if (sc->sc_dying) 2348 return (USBD_IOERROR); 2349 2350 #ifdef DIAGNOSTIC 2351 if (!(xfer->rqflags & URQ_REQUEST)) 2352 /* XXX panic */ 2353 return (USBD_INVAL); 2354 #endif 2355 req = &xfer->request; 2356 2357 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2358 req->bmRequestType, req->bRequest)); 2359 2360 len = UGETW(req->wLength); 2361 value = UGETW(req->wValue); 2362 index = UGETW(req->wIndex); 2363 2364 if (len != 0) 2365 buf = KERNADDR(&xfer->dmabuf, 0); 2366 2367 #define C(x,y) ((x) | ((y) << 8)) 2368 switch(C(req->bRequest, req->bmRequestType)) { 2369 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2370 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2371 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2372 /* 2373 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2374 * for the integrated root hub. 2375 */ 2376 break; 2377 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2378 if (len > 0) { 2379 *(u_int8_t *)buf = sc->sc_conf; 2380 totlen = 1; 2381 } 2382 break; 2383 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2384 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2385 switch(value >> 8) { 2386 case UDESC_DEVICE: 2387 if ((value & 0xff) != 0) { 2388 err = USBD_IOERROR; 2389 goto ret; 2390 } 2391 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2392 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2393 memcpy(buf, &ohci_devd, l); 2394 break; 2395 case UDESC_CONFIG: 2396 if ((value & 0xff) != 0) { 2397 err = USBD_IOERROR; 2398 goto ret; 2399 } 2400 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2401 memcpy(buf, &ohci_confd, l); 2402 buf = (char *)buf + l; 2403 len -= l; 2404 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2405 totlen += l; 2406 memcpy(buf, &ohci_ifcd, l); 2407 buf = (char *)buf + l; 2408 len -= l; 2409 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2410 totlen += l; 2411 memcpy(buf, &ohci_endpd, l); 2412 break; 2413 case UDESC_STRING: 2414 if (len == 0) 2415 break; 2416 *(u_int8_t *)buf = 0; 2417 totlen = 1; 2418 switch (value & 0xff) { 2419 case 0: /* Language table */ 2420 totlen = ohci_str(buf, len, "\001"); 2421 break; 2422 case 1: /* Vendor */ 2423 totlen = ohci_str(buf, len, sc->sc_vendor); 2424 break; 2425 case 2: /* Product */ 2426 totlen = ohci_str(buf, len, "OHCI root hub"); 2427 break; 2428 } 2429 break; 2430 default: 2431 err = USBD_IOERROR; 2432 goto ret; 2433 } 2434 break; 2435 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2436 if (len > 0) { 2437 *(u_int8_t *)buf = 0; 2438 totlen = 1; 2439 } 2440 break; 2441 case C(UR_GET_STATUS, UT_READ_DEVICE): 2442 if (len > 1) { 2443 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2444 totlen = 2; 2445 } 2446 break; 2447 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2448 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2449 if (len > 1) { 2450 USETW(((usb_status_t *)buf)->wStatus, 0); 2451 totlen = 2; 2452 } 2453 break; 2454 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2455 if (value >= USB_MAX_DEVICES) { 2456 err = USBD_IOERROR; 2457 goto ret; 2458 } 2459 sc->sc_addr = value; 2460 break; 2461 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2462 if (value != 0 && value != 1) { 2463 err = USBD_IOERROR; 2464 goto ret; 2465 } 2466 sc->sc_conf = value; 2467 break; 2468 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2469 break; 2470 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2471 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2472 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2473 err = USBD_IOERROR; 2474 goto ret; 2475 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2476 break; 2477 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2478 break; 2479 /* Hub requests */ 2480 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2481 break; 2482 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2483 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2484 "port=%d feature=%d\n", 2485 index, value)); 2486 if (index < 1 || index > sc->sc_noport) { 2487 err = USBD_IOERROR; 2488 goto ret; 2489 } 2490 port = OHCI_RH_PORT_STATUS(index); 2491 switch(value) { 2492 case UHF_PORT_ENABLE: 2493 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2494 break; 2495 case UHF_PORT_SUSPEND: 2496 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2497 break; 2498 case UHF_PORT_POWER: 2499 /* Yes, writing to the LOW_SPEED bit clears power. */ 2500 OWRITE4(sc, port, UPS_LOW_SPEED); 2501 break; 2502 case UHF_C_PORT_CONNECTION: 2503 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2504 break; 2505 case UHF_C_PORT_ENABLE: 2506 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2507 break; 2508 case UHF_C_PORT_SUSPEND: 2509 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2510 break; 2511 case UHF_C_PORT_OVER_CURRENT: 2512 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2513 break; 2514 case UHF_C_PORT_RESET: 2515 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2516 break; 2517 default: 2518 err = USBD_IOERROR; 2519 goto ret; 2520 } 2521 switch(value) { 2522 case UHF_C_PORT_CONNECTION: 2523 case UHF_C_PORT_ENABLE: 2524 case UHF_C_PORT_SUSPEND: 2525 case UHF_C_PORT_OVER_CURRENT: 2526 case UHF_C_PORT_RESET: 2527 /* Enable RHSC interrupt if condition is cleared. */ 2528 if ((OREAD4(sc, port) >> 16) == 0) 2529 ohci_rhsc_enable(sc); 2530 break; 2531 default: 2532 break; 2533 } 2534 break; 2535 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2536 if ((value & 0xff) != 0) { 2537 err = USBD_IOERROR; 2538 goto ret; 2539 } 2540 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2541 hubd = ohci_hubd; 2542 hubd.bNbrPorts = sc->sc_noport; 2543 USETW(hubd.wHubCharacteristics, 2544 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2545 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2546 /* XXX overcurrent */ 2547 ); 2548 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2549 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2550 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2551 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2552 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2553 l = min(len, hubd.bDescLength); 2554 totlen = l; 2555 memcpy(buf, &hubd, l); 2556 break; 2557 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2558 if (len != 4) { 2559 err = USBD_IOERROR; 2560 goto ret; 2561 } 2562 memset(buf, 0, len); /* ? XXX */ 2563 totlen = len; 2564 break; 2565 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2566 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2567 index)); 2568 if (index < 1 || index > sc->sc_noport) { 2569 err = USBD_IOERROR; 2570 goto ret; 2571 } 2572 if (len != 4) { 2573 err = USBD_IOERROR; 2574 goto ret; 2575 } 2576 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2577 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2578 v)); 2579 USETW(ps.wPortStatus, v); 2580 USETW(ps.wPortChange, v >> 16); 2581 l = min(len, sizeof ps); 2582 memcpy(buf, &ps, l); 2583 totlen = l; 2584 break; 2585 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2586 err = USBD_IOERROR; 2587 goto ret; 2588 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2589 break; 2590 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2591 if (index < 1 || index > sc->sc_noport) { 2592 err = USBD_IOERROR; 2593 goto ret; 2594 } 2595 port = OHCI_RH_PORT_STATUS(index); 2596 switch(value) { 2597 case UHF_PORT_ENABLE: 2598 OWRITE4(sc, port, UPS_PORT_ENABLED); 2599 break; 2600 case UHF_PORT_SUSPEND: 2601 OWRITE4(sc, port, UPS_SUSPEND); 2602 break; 2603 case UHF_PORT_RESET: 2604 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2605 index)); 2606 OWRITE4(sc, port, UPS_RESET); 2607 for (i = 0; i < 5; i++) { 2608 usb_delay_ms(&sc->sc_bus, 2609 USB_PORT_ROOT_RESET_DELAY); 2610 if (sc->sc_dying) { 2611 err = USBD_IOERROR; 2612 goto ret; 2613 } 2614 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2615 break; 2616 } 2617 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2618 index, OREAD4(sc, port))); 2619 break; 2620 case UHF_PORT_POWER: 2621 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2622 "%d\n", index)); 2623 OWRITE4(sc, port, UPS_PORT_POWER); 2624 break; 2625 default: 2626 err = USBD_IOERROR; 2627 goto ret; 2628 } 2629 break; 2630 default: 2631 err = USBD_IOERROR; 2632 goto ret; 2633 } 2634 xfer->actlen = totlen; 2635 err = USBD_NORMAL_COMPLETION; 2636 ret: 2637 xfer->status = err; 2638 s = splusb(); 2639 usb_transfer_complete(xfer); 2640 splx(s); 2641 return (USBD_IN_PROGRESS); 2642 } 2643 2644 /* Abort a root control request. */ 2645 Static void 2646 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2647 { 2648 /* Nothing to do, all transfers are synchronous. */ 2649 } 2650 2651 /* Close the root pipe. */ 2652 Static void 2653 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2654 { 2655 DPRINTF(("ohci_root_ctrl_close\n")); 2656 /* Nothing to do. */ 2657 } 2658 2659 Static usbd_status 2660 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2661 { 2662 usbd_status err; 2663 2664 /* Insert last in queue. */ 2665 err = usb_insert_transfer(xfer); 2666 if (err) 2667 return (err); 2668 2669 /* Pipe isn't running, start first */ 2670 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2671 } 2672 2673 Static usbd_status 2674 ohci_root_intr_start(usbd_xfer_handle xfer) 2675 { 2676 usbd_pipe_handle pipe = xfer->pipe; 2677 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2678 2679 if (sc->sc_dying) 2680 return (USBD_IOERROR); 2681 2682 sc->sc_intrxfer = xfer; 2683 2684 return (USBD_IN_PROGRESS); 2685 } 2686 2687 /* Abort a root interrupt request. */ 2688 Static void 2689 ohci_root_intr_abort(usbd_xfer_handle xfer) 2690 { 2691 int s; 2692 2693 if (xfer->pipe->intrxfer == xfer) { 2694 DPRINTF(("ohci_root_intr_abort: remove\n")); 2695 xfer->pipe->intrxfer = NULL; 2696 } 2697 xfer->status = USBD_CANCELLED; 2698 s = splusb(); 2699 usb_transfer_complete(xfer); 2700 splx(s); 2701 } 2702 2703 /* Close the root pipe. */ 2704 Static void 2705 ohci_root_intr_close(usbd_pipe_handle pipe) 2706 { 2707 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2708 2709 DPRINTF(("ohci_root_intr_close\n")); 2710 2711 sc->sc_intrxfer = NULL; 2712 } 2713 2714 /************************/ 2715 2716 Static usbd_status 2717 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2718 { 2719 usbd_status err; 2720 2721 /* Insert last in queue. */ 2722 err = usb_insert_transfer(xfer); 2723 if (err) 2724 return (err); 2725 2726 /* Pipe isn't running, start first */ 2727 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2728 } 2729 2730 Static usbd_status 2731 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2732 { 2733 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2734 usbd_status err; 2735 2736 if (sc->sc_dying) 2737 return (USBD_IOERROR); 2738 2739 #ifdef DIAGNOSTIC 2740 if (!(xfer->rqflags & URQ_REQUEST)) { 2741 /* XXX panic */ 2742 printf("ohci_device_ctrl_transfer: not a request\n"); 2743 return (USBD_INVAL); 2744 } 2745 #endif 2746 2747 err = ohci_device_request(xfer); 2748 if (err) 2749 return (err); 2750 2751 if (sc->sc_bus.use_polling) 2752 ohci_waitintr(sc, xfer); 2753 return (USBD_IN_PROGRESS); 2754 } 2755 2756 /* Abort a device control request. */ 2757 Static void 2758 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2759 { 2760 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2761 ohci_abort_xfer(xfer, USBD_CANCELLED); 2762 } 2763 2764 /* Close a device control pipe. */ 2765 Static void 2766 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2767 { 2768 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2769 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2770 2771 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2772 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2773 ohci_free_std(sc, opipe->tail.td); 2774 } 2775 2776 /************************/ 2777 2778 Static void 2779 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2780 { 2781 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2782 2783 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2784 } 2785 2786 Static void 2787 ohci_noop(usbd_pipe_handle pipe) 2788 { 2789 } 2790 2791 Static usbd_status 2792 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2793 { 2794 usbd_status err; 2795 2796 /* Insert last in queue. */ 2797 err = usb_insert_transfer(xfer); 2798 if (err) 2799 return (err); 2800 2801 /* Pipe isn't running, start first */ 2802 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2803 } 2804 2805 Static usbd_status 2806 ohci_device_bulk_start(usbd_xfer_handle xfer) 2807 { 2808 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2809 usbd_device_handle dev = opipe->pipe.device; 2810 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2811 int addr = dev->address; 2812 ohci_soft_td_t *data, *tail, *tdp; 2813 ohci_soft_ed_t *sed; 2814 int s, len, isread, endpt; 2815 usbd_status err; 2816 2817 if (sc->sc_dying) 2818 return (USBD_IOERROR); 2819 2820 #ifdef DIAGNOSTIC 2821 if (xfer->rqflags & URQ_REQUEST) { 2822 /* XXX panic */ 2823 printf("ohci_device_bulk_start: a request\n"); 2824 return (USBD_INVAL); 2825 } 2826 #endif 2827 2828 len = xfer->length; 2829 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2830 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2831 sed = opipe->sed; 2832 2833 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2834 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2835 endpt)); 2836 2837 opipe->u.bulk.isread = isread; 2838 opipe->u.bulk.length = len; 2839 2840 /* Update device address */ 2841 sed->ed.ed_flags = htole32( 2842 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2843 OHCI_ED_SET_FA(addr)); 2844 2845 /* Allocate a chain of new TDs (including a new tail). */ 2846 data = opipe->tail.td; 2847 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2848 data, &tail); 2849 /* We want interrupt at the end of the transfer. */ 2850 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2851 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2852 tail->flags |= OHCI_CALL_DONE; 2853 tail = tail->nexttd; /* point at sentinel */ 2854 if (err) 2855 return (err); 2856 2857 tail->xfer = NULL; 2858 xfer->hcpriv = data; 2859 2860 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2861 "td_cbp=0x%08x td_be=0x%08x\n", 2862 (int)le32toh(sed->ed.ed_flags), 2863 (int)le32toh(data->td.td_flags), 2864 (int)le32toh(data->td.td_cbp), 2865 (int)le32toh(data->td.td_be))); 2866 2867 #ifdef OHCI_DEBUG 2868 if (ohcidebug > 5) { 2869 ohci_dump_ed(sed); 2870 ohci_dump_tds(data); 2871 } 2872 #endif 2873 2874 /* Insert ED in schedule */ 2875 s = splusb(); 2876 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2877 tdp->xfer = xfer; 2878 } 2879 sed->ed.ed_tailp = htole32(tail->physaddr); 2880 opipe->tail.td = tail; 2881 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2882 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2883 if (xfer->timeout && !sc->sc_bus.use_polling) { 2884 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2885 ohci_timeout, xfer); 2886 } 2887 2888 #if 0 2889 /* This goes wrong if we are too slow. */ 2890 if (ohcidebug > 10) { 2891 delay(10000); 2892 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2893 OREAD4(sc, OHCI_COMMAND_STATUS))); 2894 ohci_dump_ed(sed); 2895 ohci_dump_tds(data); 2896 } 2897 #endif 2898 2899 splx(s); 2900 2901 return (USBD_IN_PROGRESS); 2902 } 2903 2904 Static void 2905 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2906 { 2907 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2908 ohci_abort_xfer(xfer, USBD_CANCELLED); 2909 } 2910 2911 /* 2912 * Close a device bulk pipe. 2913 */ 2914 Static void 2915 ohci_device_bulk_close(usbd_pipe_handle pipe) 2916 { 2917 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2918 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2919 2920 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2921 ohci_close_pipe(pipe, sc->sc_bulk_head); 2922 ohci_free_std(sc, opipe->tail.td); 2923 } 2924 2925 /************************/ 2926 2927 Static usbd_status 2928 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2929 { 2930 usbd_status err; 2931 2932 /* Insert last in queue. */ 2933 err = usb_insert_transfer(xfer); 2934 if (err) 2935 return (err); 2936 2937 /* Pipe isn't running, start first */ 2938 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2939 } 2940 2941 Static usbd_status 2942 ohci_device_intr_start(usbd_xfer_handle xfer) 2943 { 2944 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2945 usbd_device_handle dev = opipe->pipe.device; 2946 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2947 ohci_soft_ed_t *sed = opipe->sed; 2948 ohci_soft_td_t *data, *tail; 2949 int len; 2950 int s; 2951 2952 if (sc->sc_dying) 2953 return (USBD_IOERROR); 2954 2955 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2956 "flags=%d priv=%p\n", 2957 xfer, xfer->length, xfer->flags, xfer->priv)); 2958 2959 #ifdef DIAGNOSTIC 2960 if (xfer->rqflags & URQ_REQUEST) 2961 panic("ohci_device_intr_transfer: a request"); 2962 #endif 2963 2964 len = xfer->length; 2965 2966 data = opipe->tail.td; 2967 tail = ohci_alloc_std(sc); 2968 if (tail == NULL) 2969 return (USBD_NOMEM); 2970 tail->xfer = NULL; 2971 2972 data->td.td_flags = htole32( 2973 OHCI_TD_IN | OHCI_TD_NOCC | 2974 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2975 if (xfer->flags & USBD_SHORT_XFER_OK) 2976 data->td.td_flags |= htole32(OHCI_TD_R); 2977 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 2978 data->nexttd = tail; 2979 data->td.td_nexttd = htole32(tail->physaddr); 2980 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2981 data->len = len; 2982 data->xfer = xfer; 2983 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2984 xfer->hcpriv = data; 2985 2986 #ifdef OHCI_DEBUG 2987 if (ohcidebug > 5) { 2988 DPRINTF(("ohci_device_intr_transfer:\n")); 2989 ohci_dump_ed(sed); 2990 ohci_dump_tds(data); 2991 } 2992 #endif 2993 2994 /* Insert ED in schedule */ 2995 s = splusb(); 2996 sed->ed.ed_tailp = htole32(tail->physaddr); 2997 opipe->tail.td = tail; 2998 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2999 3000 #if 0 3001 /* 3002 * This goes horribly wrong, printing thousands of descriptors, 3003 * because false references are followed due to the fact that the 3004 * TD is gone. 3005 */ 3006 if (ohcidebug > 5) { 3007 usb_delay_ms(&sc->sc_bus, 5); 3008 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3009 OREAD4(sc, OHCI_COMMAND_STATUS))); 3010 ohci_dump_ed(sed); 3011 ohci_dump_tds(data); 3012 } 3013 #endif 3014 splx(s); 3015 3016 return (USBD_IN_PROGRESS); 3017 } 3018 3019 /* Abort a device control request. */ 3020 Static void 3021 ohci_device_intr_abort(usbd_xfer_handle xfer) 3022 { 3023 if (xfer->pipe->intrxfer == xfer) { 3024 DPRINTF(("ohci_device_intr_abort: remove\n")); 3025 xfer->pipe->intrxfer = NULL; 3026 } 3027 ohci_abort_xfer(xfer, USBD_CANCELLED); 3028 } 3029 3030 /* Close a device interrupt pipe. */ 3031 Static void 3032 ohci_device_intr_close(usbd_pipe_handle pipe) 3033 { 3034 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3035 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3036 int nslots = opipe->u.intr.nslots; 3037 int pos = opipe->u.intr.pos; 3038 int j; 3039 ohci_soft_ed_t *p, *sed = opipe->sed; 3040 int s; 3041 3042 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3043 pipe, nslots, pos)); 3044 s = splusb(); 3045 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3046 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3047 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3048 usb_delay_ms(&sc->sc_bus, 2); 3049 3050 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3051 ; 3052 #ifdef DIAGNOSTIC 3053 if (p == NULL) 3054 panic("ohci_device_intr_close: ED not found"); 3055 #endif 3056 p->next = sed->next; 3057 p->ed.ed_nexted = sed->ed.ed_nexted; 3058 splx(s); 3059 3060 for (j = 0; j < nslots; j++) 3061 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3062 3063 ohci_free_std(sc, opipe->tail.td); 3064 ohci_free_sed(sc, opipe->sed); 3065 } 3066 3067 Static usbd_status 3068 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3069 { 3070 int i, j, s, best; 3071 u_int npoll, slow, shigh, nslots; 3072 u_int bestbw, bw; 3073 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3074 3075 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3076 if (ival == 0) { 3077 printf("ohci_setintr: 0 interval\n"); 3078 return (USBD_INVAL); 3079 } 3080 3081 npoll = OHCI_NO_INTRS; 3082 while (npoll > ival) 3083 npoll /= 2; 3084 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3085 3086 /* 3087 * We now know which level in the tree the ED must go into. 3088 * Figure out which slot has most bandwidth left over. 3089 * Slots to examine: 3090 * npoll 3091 * 1 0 3092 * 2 1 2 3093 * 4 3 4 5 6 3094 * 8 7 8 9 10 11 12 13 14 3095 * N (N-1) .. (N-1+N-1) 3096 */ 3097 slow = npoll-1; 3098 shigh = slow + npoll; 3099 nslots = OHCI_NO_INTRS / npoll; 3100 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3101 bw = 0; 3102 for (j = 0; j < nslots; j++) 3103 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3104 if (bw < bestbw) { 3105 best = i; 3106 bestbw = bw; 3107 } 3108 } 3109 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3110 best, slow, shigh, bestbw)); 3111 3112 s = splusb(); 3113 hsed = sc->sc_eds[best]; 3114 sed->next = hsed->next; 3115 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3116 hsed->next = sed; 3117 hsed->ed.ed_nexted = htole32(sed->physaddr); 3118 splx(s); 3119 3120 for (j = 0; j < nslots; j++) 3121 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3122 opipe->u.intr.nslots = nslots; 3123 opipe->u.intr.pos = best; 3124 3125 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3126 return (USBD_NORMAL_COMPLETION); 3127 } 3128 3129 /***********************/ 3130 3131 usbd_status 3132 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3133 { 3134 usbd_status err; 3135 3136 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3137 3138 /* Put it on our queue, */ 3139 err = usb_insert_transfer(xfer); 3140 3141 /* bail out on error, */ 3142 if (err && err != USBD_IN_PROGRESS) 3143 return (err); 3144 3145 /* XXX should check inuse here */ 3146 3147 /* insert into schedule, */ 3148 ohci_device_isoc_enter(xfer); 3149 3150 /* and start if the pipe wasn't running */ 3151 if (!err) 3152 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3153 3154 return (err); 3155 } 3156 3157 void 3158 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3159 { 3160 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3161 usbd_device_handle dev = opipe->pipe.device; 3162 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3163 ohci_soft_ed_t *sed = opipe->sed; 3164 struct iso *iso = &opipe->u.iso; 3165 ohci_soft_itd_t *sitd, *nsitd; 3166 ohci_physaddr_t buf, offs, noffs, bp0; 3167 int i, ncur, nframes; 3168 int s; 3169 3170 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3171 "nframes=%d\n", 3172 iso->inuse, iso->next, xfer, xfer->nframes)); 3173 3174 if (sc->sc_dying) 3175 return; 3176 3177 if (iso->next == -1) { 3178 /* Not in use yet, schedule it a few frames ahead. */ 3179 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3180 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3181 iso->next)); 3182 } 3183 3184 sitd = opipe->tail.itd; 3185 buf = DMAADDR(&xfer->dmabuf, 0); 3186 bp0 = OHCI_PAGE(buf); 3187 offs = OHCI_PAGE_OFFSET(buf); 3188 nframes = xfer->nframes; 3189 xfer->hcpriv = sitd; 3190 for (i = ncur = 0; i < nframes; i++, ncur++) { 3191 noffs = offs + xfer->frlengths[i]; 3192 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3193 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3194 3195 /* Allocate next ITD */ 3196 nsitd = ohci_alloc_sitd(sc); 3197 if (nsitd == NULL) { 3198 /* XXX what now? */ 3199 printf("%s: isoc TD alloc failed\n", 3200 USBDEVNAME(sc->sc_bus.bdev)); 3201 return; 3202 } 3203 3204 /* Fill current ITD */ 3205 sitd->itd.itd_flags = htole32( 3206 OHCI_ITD_NOCC | 3207 OHCI_ITD_SET_SF(iso->next) | 3208 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3209 OHCI_ITD_SET_FC(ncur)); 3210 sitd->itd.itd_bp0 = htole32(bp0); 3211 sitd->nextitd = nsitd; 3212 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3213 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3214 sitd->xfer = xfer; 3215 sitd->flags = 0; 3216 3217 sitd = nsitd; 3218 iso->next = iso->next + ncur; 3219 bp0 = OHCI_PAGE(buf + offs); 3220 ncur = 0; 3221 } 3222 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3223 offs = noffs; 3224 } 3225 nsitd = ohci_alloc_sitd(sc); 3226 if (nsitd == NULL) { 3227 /* XXX what now? */ 3228 printf("%s: isoc TD alloc failed\n", 3229 USBDEVNAME(sc->sc_bus.bdev)); 3230 return; 3231 } 3232 /* Fixup last used ITD */ 3233 sitd->itd.itd_flags = htole32( 3234 OHCI_ITD_NOCC | 3235 OHCI_ITD_SET_SF(iso->next) | 3236 OHCI_ITD_SET_DI(0) | 3237 OHCI_ITD_SET_FC(ncur)); 3238 sitd->itd.itd_bp0 = htole32(bp0); 3239 sitd->nextitd = nsitd; 3240 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3241 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3242 sitd->xfer = xfer; 3243 sitd->flags = OHCI_CALL_DONE; 3244 3245 iso->next = iso->next + ncur; 3246 iso->inuse += nframes; 3247 3248 xfer->actlen = offs; /* XXX pretend we did it all */ 3249 3250 xfer->status = USBD_IN_PROGRESS; 3251 3252 #ifdef OHCI_DEBUG 3253 if (ohcidebug > 5) { 3254 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3255 le32toh(sc->sc_hcca->hcca_frame_number))); 3256 ohci_dump_itds(xfer->hcpriv); 3257 ohci_dump_ed(sed); 3258 } 3259 #endif 3260 3261 s = splusb(); 3262 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3263 opipe->tail.itd = nsitd; 3264 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3265 splx(s); 3266 3267 #ifdef OHCI_DEBUG 3268 if (ohcidebug > 5) { 3269 delay(150000); 3270 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3271 le32toh(sc->sc_hcca->hcca_frame_number))); 3272 ohci_dump_itds(xfer->hcpriv); 3273 ohci_dump_ed(sed); 3274 } 3275 #endif 3276 } 3277 3278 usbd_status 3279 ohci_device_isoc_start(usbd_xfer_handle xfer) 3280 { 3281 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3282 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3283 3284 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3285 3286 if (sc->sc_dying) 3287 return (USBD_IOERROR); 3288 3289 #ifdef DIAGNOSTIC 3290 if (xfer->status != USBD_IN_PROGRESS) 3291 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3292 #endif 3293 3294 /* XXX anything to do? */ 3295 3296 return (USBD_IN_PROGRESS); 3297 } 3298 3299 void 3300 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3301 { 3302 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3303 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3304 ohci_soft_ed_t *sed; 3305 ohci_soft_itd_t *sitd; 3306 int s; 3307 3308 s = splusb(); 3309 3310 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3311 3312 /* Transfer is already done. */ 3313 if (xfer->status != USBD_NOT_STARTED && 3314 xfer->status != USBD_IN_PROGRESS) { 3315 splx(s); 3316 printf("ohci_device_isoc_abort: early return\n"); 3317 return; 3318 } 3319 3320 /* Give xfer the requested abort code. */ 3321 xfer->status = USBD_CANCELLED; 3322 3323 sed = opipe->sed; 3324 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3325 3326 sitd = xfer->hcpriv; 3327 #ifdef DIAGNOSTIC 3328 if (sitd == NULL) { 3329 splx(s); 3330 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3331 return; 3332 } 3333 #endif 3334 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3335 #ifdef DIAGNOSTIC 3336 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3337 sitd->isdone = 1; 3338 #endif 3339 } 3340 3341 splx(s); 3342 3343 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3344 3345 s = splusb(); 3346 3347 /* Run callback. */ 3348 usb_transfer_complete(xfer); 3349 3350 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3351 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3352 3353 splx(s); 3354 } 3355 3356 void 3357 ohci_device_isoc_done(usbd_xfer_handle xfer) 3358 { 3359 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3360 } 3361 3362 usbd_status 3363 ohci_setup_isoc(usbd_pipe_handle pipe) 3364 { 3365 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3366 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3367 struct iso *iso = &opipe->u.iso; 3368 int s; 3369 3370 iso->next = -1; 3371 iso->inuse = 0; 3372 3373 s = splusb(); 3374 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3375 splx(s); 3376 3377 return (USBD_NORMAL_COMPLETION); 3378 } 3379 3380 void 3381 ohci_device_isoc_close(usbd_pipe_handle pipe) 3382 { 3383 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3384 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3385 3386 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3387 ohci_close_pipe(pipe, sc->sc_isoc_head); 3388 #ifdef DIAGNOSTIC 3389 opipe->tail.itd->isdone = 1; 3390 #endif 3391 ohci_free_sitd(sc, opipe->tail.itd); 3392 } 3393