xref: /netbsd-src/sys/dev/usb/if_ural.c (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c)
1 /*	$NetBSD: if_ural.c,v 1.55 2018/06/26 06:48:02 msaitoh Exp $ */
2 /*	$FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $	*/
3 
4 /*-
5  * Copyright (c) 2005, 2006
6  *	Damien Bergamini <damien.bergamini@free.fr>
7  *
8  * Permission to use, copy, modify, and distribute this software for any
9  * purpose with or without fee is hereby granted, provided that the above
10  * copyright notice and this permission notice appear in all copies.
11  *
12  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19  */
20 
21 /*-
22  * Ralink Technology RT2500USB chipset driver
23  * http://www.ralinktech.com/
24  */
25 
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.55 2018/06/26 06:48:02 msaitoh Exp $");
28 
29 #ifdef _KERNEL_OPT
30 #include "opt_usb.h"
31 #endif
32 
33 #include <sys/param.h>
34 #include <sys/sockio.h>
35 #include <sys/sysctl.h>
36 #include <sys/mbuf.h>
37 #include <sys/kernel.h>
38 #include <sys/socket.h>
39 #include <sys/systm.h>
40 #include <sys/conf.h>
41 #include <sys/device.h>
42 
43 #include <sys/bus.h>
44 #include <machine/endian.h>
45 #include <sys/intr.h>
46 
47 #include <net/bpf.h>
48 #include <net/if.h>
49 #include <net/if_arp.h>
50 #include <net/if_dl.h>
51 #include <net/if_ether.h>
52 #include <net/if_media.h>
53 #include <net/if_types.h>
54 
55 #include <netinet/in.h>
56 #include <netinet/in_systm.h>
57 #include <netinet/in_var.h>
58 #include <netinet/ip.h>
59 
60 #include <net80211/ieee80211_netbsd.h>
61 #include <net80211/ieee80211_var.h>
62 #include <net80211/ieee80211_amrr.h>
63 #include <net80211/ieee80211_radiotap.h>
64 
65 #include <dev/usb/usb.h>
66 #include <dev/usb/usbdi.h>
67 #include <dev/usb/usbdi_util.h>
68 #include <dev/usb/usbdevs.h>
69 
70 #include <dev/usb/if_uralreg.h>
71 #include <dev/usb/if_uralvar.h>
72 
73 #ifdef URAL_DEBUG
74 #define DPRINTF(x)	do { if (ural_debug) printf x; } while (0)
75 #define DPRINTFN(n, x)	do { if (ural_debug >= (n)) printf x; } while (0)
76 int ural_debug = 0;
77 #else
78 #define DPRINTF(x)
79 #define DPRINTFN(n, x)
80 #endif
81 
82 /* various supported device vendors/products */
83 static const struct usb_devno ural_devs[] = {
84 	{ USB_VENDOR_ASUSTEK,		USB_PRODUCT_ASUSTEK_WL167G },
85 	{ USB_VENDOR_ASUSTEK,		USB_PRODUCT_RALINK_RT2570 },
86 	{ USB_VENDOR_BELKIN,		USB_PRODUCT_BELKIN_F5D7050 },
87 	{ USB_VENDOR_CISCOLINKSYS,	USB_PRODUCT_CISCOLINKSYS_WUSB54G },
88 	{ USB_VENDOR_CISCOLINKSYS,	USB_PRODUCT_CISCOLINKSYS_WUSB54GP },
89 	{ USB_VENDOR_CISCOLINKSYS,	USB_PRODUCT_CISCOLINKSYS_HU200TS },
90 	{ USB_VENDOR_CONCEPTRONIC,	USB_PRODUCT_CONCEPTRONIC_C54RU },
91 	{ USB_VENDOR_DLINK,		USB_PRODUCT_DLINK_DWLG122 },
92 	{ USB_VENDOR_GIGABYTE,		USB_PRODUCT_GIGABYTE_GNWBKG },
93 	{ USB_VENDOR_GUILLEMOT,		USB_PRODUCT_GUILLEMOT_HWGUSB254 },
94 	{ USB_VENDOR_MELCO,		USB_PRODUCT_MELCO_KG54 },
95 	{ USB_VENDOR_MELCO,		USB_PRODUCT_MELCO_KG54AI },
96 	{ USB_VENDOR_MELCO,		USB_PRODUCT_MELCO_KG54YB },
97 	{ USB_VENDOR_MELCO,		USB_PRODUCT_MELCO_NINWIFI },
98 	{ USB_VENDOR_MSI,		USB_PRODUCT_MSI_MS6861 },
99 	{ USB_VENDOR_MSI,		USB_PRODUCT_MSI_MS6865 },
100 	{ USB_VENDOR_MSI,		USB_PRODUCT_MSI_MS6869 },
101 	{ USB_VENDOR_NOVATECH,		USB_PRODUCT_NOVATECH_NV902W },
102 	{ USB_VENDOR_RALINK,		USB_PRODUCT_RALINK_RT2570 },
103 	{ USB_VENDOR_RALINK,		USB_PRODUCT_RALINK_RT2570_2 },
104 	{ USB_VENDOR_RALINK,		USB_PRODUCT_RALINK_RT2570_3 },
105 	{ USB_VENDOR_SMC,		USB_PRODUCT_SMC_2862WG },
106 	{ USB_VENDOR_SPHAIRON,		USB_PRODUCT_SPHAIRON_UB801R },
107 	{ USB_VENDOR_SURECOM,		USB_PRODUCT_SURECOM_EP9001G },
108 	{ USB_VENDOR_VTECH,		USB_PRODUCT_VTECH_RT2570 },
109 	{ USB_VENDOR_ZINWELL,		USB_PRODUCT_ZINWELL_ZWXG261 },
110 };
111 
112 Static int		ural_alloc_tx_list(struct ural_softc *);
113 Static void		ural_free_tx_list(struct ural_softc *);
114 Static int		ural_alloc_rx_list(struct ural_softc *);
115 Static void		ural_free_rx_list(struct ural_softc *);
116 Static int		ural_media_change(struct ifnet *);
117 Static void		ural_next_scan(void *);
118 Static void		ural_task(void *);
119 Static int		ural_newstate(struct ieee80211com *,
120 			    enum ieee80211_state, int);
121 Static int		ural_rxrate(struct ural_rx_desc *);
122 Static void		ural_txeof(struct usbd_xfer *, void *,
123 			    usbd_status);
124 Static void		ural_rxeof(struct usbd_xfer *, void *,
125 			    usbd_status);
126 Static int		ural_ack_rate(struct ieee80211com *, int);
127 Static uint16_t		ural_txtime(int, int, uint32_t);
128 Static uint8_t		ural_plcp_signal(int);
129 Static void		ural_setup_tx_desc(struct ural_softc *,
130 			    struct ural_tx_desc *, uint32_t, int, int);
131 Static int		ural_tx_bcn(struct ural_softc *, struct mbuf *,
132 			    struct ieee80211_node *);
133 Static int		ural_tx_mgt(struct ural_softc *, struct mbuf *,
134 			    struct ieee80211_node *);
135 Static int		ural_tx_data(struct ural_softc *, struct mbuf *,
136 			    struct ieee80211_node *);
137 Static void		ural_start(struct ifnet *);
138 Static void		ural_watchdog(struct ifnet *);
139 Static int		ural_reset(struct ifnet *);
140 Static int		ural_ioctl(struct ifnet *, u_long, void *);
141 Static void		ural_set_testmode(struct ural_softc *);
142 Static void		ural_eeprom_read(struct ural_softc *, uint16_t, void *,
143 			    int);
144 Static uint16_t		ural_read(struct ural_softc *, uint16_t);
145 Static void		ural_read_multi(struct ural_softc *, uint16_t, void *,
146 			    int);
147 Static void		ural_write(struct ural_softc *, uint16_t, uint16_t);
148 Static void		ural_write_multi(struct ural_softc *, uint16_t, void *,
149 			    int);
150 Static void		ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
151 Static uint8_t		ural_bbp_read(struct ural_softc *, uint8_t);
152 Static void		ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
153 Static void		ural_set_chan(struct ural_softc *,
154 			    struct ieee80211_channel *);
155 Static void		ural_disable_rf_tune(struct ural_softc *);
156 Static void		ural_enable_tsf_sync(struct ural_softc *);
157 Static void		ural_update_slot(struct ifnet *);
158 Static void		ural_set_txpreamble(struct ural_softc *);
159 Static void		ural_set_basicrates(struct ural_softc *);
160 Static void		ural_set_bssid(struct ural_softc *, uint8_t *);
161 Static void		ural_set_macaddr(struct ural_softc *, uint8_t *);
162 Static void		ural_update_promisc(struct ural_softc *);
163 Static const char	*ural_get_rf(int);
164 Static void		ural_read_eeprom(struct ural_softc *);
165 Static int		ural_bbp_init(struct ural_softc *);
166 Static void		ural_set_txantenna(struct ural_softc *, int);
167 Static void		ural_set_rxantenna(struct ural_softc *, int);
168 Static int		ural_init(struct ifnet *);
169 Static void		ural_stop(struct ifnet *, int);
170 Static void		ural_amrr_start(struct ural_softc *,
171 			    struct ieee80211_node *);
172 Static void		ural_amrr_timeout(void *);
173 Static void		ural_amrr_update(struct usbd_xfer *, void *,
174 			    usbd_status status);
175 
176 /*
177  * Default values for MAC registers; values taken from the reference driver.
178  */
179 static const struct {
180 	uint16_t	reg;
181 	uint16_t	val;
182 } ural_def_mac[] = {
183 	{ RAL_TXRX_CSR5,  0x8c8d },
184 	{ RAL_TXRX_CSR6,  0x8b8a },
185 	{ RAL_TXRX_CSR7,  0x8687 },
186 	{ RAL_TXRX_CSR8,  0x0085 },
187 	{ RAL_MAC_CSR13,  0x1111 },
188 	{ RAL_MAC_CSR14,  0x1e11 },
189 	{ RAL_TXRX_CSR21, 0xe78f },
190 	{ RAL_MAC_CSR9,   0xff1d },
191 	{ RAL_MAC_CSR11,  0x0002 },
192 	{ RAL_MAC_CSR22,  0x0053 },
193 	{ RAL_MAC_CSR15,  0x0000 },
194 	{ RAL_MAC_CSR8,   0x0780 },
195 	{ RAL_TXRX_CSR19, 0x0000 },
196 	{ RAL_TXRX_CSR18, 0x005a },
197 	{ RAL_PHY_CSR2,   0x0000 },
198 	{ RAL_TXRX_CSR0,  0x1ec0 },
199 	{ RAL_PHY_CSR4,   0x000f }
200 };
201 
202 /*
203  * Default values for BBP registers; values taken from the reference driver.
204  */
205 static const struct {
206 	uint8_t	reg;
207 	uint8_t	val;
208 } ural_def_bbp[] = {
209 	{  3, 0x02 },
210 	{  4, 0x19 },
211 	{ 14, 0x1c },
212 	{ 15, 0x30 },
213 	{ 16, 0xac },
214 	{ 17, 0x48 },
215 	{ 18, 0x18 },
216 	{ 19, 0xff },
217 	{ 20, 0x1e },
218 	{ 21, 0x08 },
219 	{ 22, 0x08 },
220 	{ 23, 0x08 },
221 	{ 24, 0x80 },
222 	{ 25, 0x50 },
223 	{ 26, 0x08 },
224 	{ 27, 0x23 },
225 	{ 30, 0x10 },
226 	{ 31, 0x2b },
227 	{ 32, 0xb9 },
228 	{ 34, 0x12 },
229 	{ 35, 0x50 },
230 	{ 39, 0xc4 },
231 	{ 40, 0x02 },
232 	{ 41, 0x60 },
233 	{ 53, 0x10 },
234 	{ 54, 0x18 },
235 	{ 56, 0x08 },
236 	{ 57, 0x10 },
237 	{ 58, 0x08 },
238 	{ 61, 0x60 },
239 	{ 62, 0x10 },
240 	{ 75, 0xff }
241 };
242 
243 /*
244  * Default values for RF register R2 indexed by channel numbers.
245  */
246 static const uint32_t ural_rf2522_r2[] = {
247 	0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
248 	0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
249 };
250 
251 static const uint32_t ural_rf2523_r2[] = {
252 	0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
253 	0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
254 };
255 
256 static const uint32_t ural_rf2524_r2[] = {
257 	0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
258 	0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
259 };
260 
261 static const uint32_t ural_rf2525_r2[] = {
262 	0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
263 	0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
264 };
265 
266 static const uint32_t ural_rf2525_hi_r2[] = {
267 	0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
268 	0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
269 };
270 
271 static const uint32_t ural_rf2525e_r2[] = {
272 	0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
273 	0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
274 };
275 
276 static const uint32_t ural_rf2526_hi_r2[] = {
277 	0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
278 	0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
279 };
280 
281 static const uint32_t ural_rf2526_r2[] = {
282 	0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
283 	0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
284 };
285 
286 /*
287  * For dual-band RF, RF registers R1 and R4 also depend on channel number;
288  * values taken from the reference driver.
289  */
290 static const struct {
291 	uint8_t		chan;
292 	uint32_t	r1;
293 	uint32_t	r2;
294 	uint32_t	r4;
295 } ural_rf5222[] = {
296 	{   1, 0x08808, 0x0044d, 0x00282 },
297 	{   2, 0x08808, 0x0044e, 0x00282 },
298 	{   3, 0x08808, 0x0044f, 0x00282 },
299 	{   4, 0x08808, 0x00460, 0x00282 },
300 	{   5, 0x08808, 0x00461, 0x00282 },
301 	{   6, 0x08808, 0x00462, 0x00282 },
302 	{   7, 0x08808, 0x00463, 0x00282 },
303 	{   8, 0x08808, 0x00464, 0x00282 },
304 	{   9, 0x08808, 0x00465, 0x00282 },
305 	{  10, 0x08808, 0x00466, 0x00282 },
306 	{  11, 0x08808, 0x00467, 0x00282 },
307 	{  12, 0x08808, 0x00468, 0x00282 },
308 	{  13, 0x08808, 0x00469, 0x00282 },
309 	{  14, 0x08808, 0x0046b, 0x00286 },
310 
311 	{  36, 0x08804, 0x06225, 0x00287 },
312 	{  40, 0x08804, 0x06226, 0x00287 },
313 	{  44, 0x08804, 0x06227, 0x00287 },
314 	{  48, 0x08804, 0x06228, 0x00287 },
315 	{  52, 0x08804, 0x06229, 0x00287 },
316 	{  56, 0x08804, 0x0622a, 0x00287 },
317 	{  60, 0x08804, 0x0622b, 0x00287 },
318 	{  64, 0x08804, 0x0622c, 0x00287 },
319 
320 	{ 100, 0x08804, 0x02200, 0x00283 },
321 	{ 104, 0x08804, 0x02201, 0x00283 },
322 	{ 108, 0x08804, 0x02202, 0x00283 },
323 	{ 112, 0x08804, 0x02203, 0x00283 },
324 	{ 116, 0x08804, 0x02204, 0x00283 },
325 	{ 120, 0x08804, 0x02205, 0x00283 },
326 	{ 124, 0x08804, 0x02206, 0x00283 },
327 	{ 128, 0x08804, 0x02207, 0x00283 },
328 	{ 132, 0x08804, 0x02208, 0x00283 },
329 	{ 136, 0x08804, 0x02209, 0x00283 },
330 	{ 140, 0x08804, 0x0220a, 0x00283 },
331 
332 	{ 149, 0x08808, 0x02429, 0x00281 },
333 	{ 153, 0x08808, 0x0242b, 0x00281 },
334 	{ 157, 0x08808, 0x0242d, 0x00281 },
335 	{ 161, 0x08808, 0x0242f, 0x00281 }
336 };
337 
338 int	ural_match(device_t, cfdata_t, void *);
339 void	ural_attach(device_t, device_t, void *);
340 int	ural_detach(device_t, int);
341 int	ural_activate(device_t, enum devact);
342 extern struct cfdriver ural_cd;
343 CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach,
344     ural_detach, ural_activate);
345 
346 int
347 ural_match(device_t parent, cfdata_t match, void *aux)
348 {
349 	struct usb_attach_arg *uaa = aux;
350 
351 	return (usb_lookup(ural_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ?
352 	    UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
353 }
354 
355 void
356 ural_attach(device_t parent, device_t self, void *aux)
357 {
358 	struct ural_softc *sc = device_private(self);
359 	struct usb_attach_arg *uaa = aux;
360 	struct ieee80211com *ic = &sc->sc_ic;
361 	struct ifnet *ifp = &sc->sc_if;
362 	usb_interface_descriptor_t *id;
363 	usb_endpoint_descriptor_t *ed;
364 	usbd_status error;
365 	char *devinfop;
366 	int i;
367 
368 	sc->sc_dev = self;
369 	sc->sc_udev = uaa->uaa_device;
370 
371 	aprint_naive("\n");
372 	aprint_normal("\n");
373 
374 	devinfop = usbd_devinfo_alloc(sc->sc_udev, 0);
375 	aprint_normal_dev(self, "%s\n", devinfop);
376 	usbd_devinfo_free(devinfop);
377 
378 	error = usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0);
379 	if (error != 0) {
380 		aprint_error_dev(self, "failed to set configuration"
381 		    ", err=%s\n", usbd_errstr(error));
382 		return;
383 	}
384 
385 	/* get the first interface handle */
386 	error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX,
387 	    &sc->sc_iface);
388 	if (error != 0) {
389 		aprint_error_dev(self, "could not get interface handle\n");
390 		return;
391 	}
392 
393 	/*
394 	 * Find endpoints.
395 	 */
396 	id = usbd_get_interface_descriptor(sc->sc_iface);
397 
398 	sc->sc_rx_no = sc->sc_tx_no = -1;
399 	for (i = 0; i < id->bNumEndpoints; i++) {
400 		ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
401 		if (ed == NULL) {
402 			aprint_error_dev(self,
403 			    "no endpoint descriptor for %d\n", i);
404 			return;
405 		}
406 
407 		if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
408 		    UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
409 			sc->sc_rx_no = ed->bEndpointAddress;
410 		else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
411 		    UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
412 			sc->sc_tx_no = ed->bEndpointAddress;
413 	}
414 	if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) {
415 		aprint_error_dev(self, "missing endpoint\n");
416 		return;
417 	}
418 
419 	usb_init_task(&sc->sc_task, ural_task, sc, 0);
420 	callout_init(&sc->sc_scan_ch, 0);
421 	sc->amrr.amrr_min_success_threshold = 1;
422 	sc->amrr.amrr_max_success_threshold = 15;
423 	callout_init(&sc->sc_amrr_ch, 0);
424 
425 	/* retrieve RT2570 rev. no */
426 	sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
427 
428 	/* retrieve MAC address and various other things from EEPROM */
429 	ural_read_eeprom(sc);
430 
431 	aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n",
432 	    sc->asic_rev, ural_get_rf(sc->rf_rev));
433 
434 	ifp->if_softc = sc;
435 	memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
436 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
437 	ifp->if_init = ural_init;
438 	ifp->if_ioctl = ural_ioctl;
439 	ifp->if_start = ural_start;
440 	ifp->if_watchdog = ural_watchdog;
441 	IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
442 	IFQ_SET_READY(&ifp->if_snd);
443 
444 	ic->ic_ifp = ifp;
445 	ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
446 	ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
447 	ic->ic_state = IEEE80211_S_INIT;
448 
449 	/* set device capabilities */
450 	ic->ic_caps =
451 	    IEEE80211_C_IBSS |		/* IBSS mode supported */
452 	    IEEE80211_C_MONITOR |	/* monitor mode supported */
453 	    IEEE80211_C_HOSTAP |	/* HostAp mode supported */
454 	    IEEE80211_C_TXPMGT |	/* tx power management */
455 	    IEEE80211_C_SHPREAMBLE |	/* short preamble supported */
456 	    IEEE80211_C_SHSLOT |	/* short slot time supported */
457 	    IEEE80211_C_WPA;		/* 802.11i */
458 
459 	if (sc->rf_rev == RAL_RF_5222) {
460 		/* set supported .11a rates */
461 		ic->ic_sup_rates[IEEE80211_MODE_11A] = ieee80211_std_rateset_11a;
462 
463 		/* set supported .11a channels */
464 		for (i = 36; i <= 64; i += 4) {
465 			ic->ic_channels[i].ic_freq =
466 			    ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
467 			ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
468 		}
469 		for (i = 100; i <= 140; i += 4) {
470 			ic->ic_channels[i].ic_freq =
471 			    ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
472 			ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
473 		}
474 		for (i = 149; i <= 161; i += 4) {
475 			ic->ic_channels[i].ic_freq =
476 			    ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
477 			ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
478 		}
479 	}
480 
481 	/* set supported .11b and .11g rates */
482 	ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b;
483 	ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g;
484 
485 	/* set supported .11b and .11g channels (1 through 14) */
486 	for (i = 1; i <= 14; i++) {
487 		ic->ic_channels[i].ic_freq =
488 		    ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
489 		ic->ic_channels[i].ic_flags =
490 		    IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
491 		    IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
492 	}
493 
494 	if_attach(ifp);
495 	ieee80211_ifattach(ic);
496 	ic->ic_reset = ural_reset;
497 
498 	/* override state transition machine */
499 	sc->sc_newstate = ic->ic_newstate;
500 	ic->ic_newstate = ural_newstate;
501 	ieee80211_media_init(ic, ural_media_change, ieee80211_media_status);
502 
503 	bpf_attach2(ifp, DLT_IEEE802_11_RADIO,
504 	    sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf);
505 
506 	sc->sc_rxtap_len = sizeof(sc->sc_rxtapu);
507 	sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
508 	sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT);
509 
510 	sc->sc_txtap_len = sizeof(sc->sc_txtapu);
511 	sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
512 	sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT);
513 
514 	ieee80211_announce(ic);
515 
516 	usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev);
517 
518 	if (!pmf_device_register(self, NULL, NULL))
519 		aprint_error_dev(self, "couldn't establish power handler\n");
520 
521 	return;
522 }
523 
524 int
525 ural_detach(device_t self, int flags)
526 {
527 	struct ural_softc *sc = device_private(self);
528 	struct ieee80211com *ic = &sc->sc_ic;
529 	struct ifnet *ifp = &sc->sc_if;
530 	int s;
531 
532 	pmf_device_deregister(self);
533 
534 	s = splusb();
535 
536 	ural_stop(ifp, 1);
537 	usb_rem_task(sc->sc_udev, &sc->sc_task);
538 	callout_stop(&sc->sc_scan_ch);
539 	callout_stop(&sc->sc_amrr_ch);
540 
541 	bpf_detach(ifp);
542 	ieee80211_ifdetach(ic);
543 	if_detach(ifp);
544 
545 	splx(s);
546 
547 	usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev);
548 
549 	return 0;
550 }
551 
552 Static int
553 ural_alloc_tx_list(struct ural_softc *sc)
554 {
555 	struct ural_tx_data *data;
556 	int i, error;
557 
558 	sc->tx_queued = 0;
559 
560 	for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
561 		data = &sc->tx_data[i];
562 
563 		data->sc = sc;
564 		error = usbd_create_xfer(sc->sc_tx_pipeh,
565 		    RAL_TX_DESC_SIZE + MCLBYTES, USBD_FORCE_SHORT_XFER, 0,
566 		    &data->xfer);
567 		if (error) {
568 			printf("%s: could not allocate tx xfer\n",
569 			    device_xname(sc->sc_dev));
570 			goto fail;
571 		}
572 
573 		data->buf = usbd_get_buffer(data->xfer);
574 	}
575 
576 	return 0;
577 
578 fail:	ural_free_tx_list(sc);
579 	return error;
580 }
581 
582 Static void
583 ural_free_tx_list(struct ural_softc *sc)
584 {
585 	struct ural_tx_data *data;
586 	int i;
587 
588 	for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
589 		data = &sc->tx_data[i];
590 
591 		if (data->xfer != NULL) {
592 			usbd_destroy_xfer(data->xfer);
593 			data->xfer = NULL;
594 		}
595 
596 		if (data->ni != NULL) {
597 			ieee80211_free_node(data->ni);
598 			data->ni = NULL;
599 		}
600 	}
601 }
602 
603 Static int
604 ural_alloc_rx_list(struct ural_softc *sc)
605 {
606 	struct ural_rx_data *data;
607 	int i, error;
608 
609 	for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
610 		data = &sc->rx_data[i];
611 
612 		data->sc = sc;
613 
614 		error = usbd_create_xfer(sc->sc_rx_pipeh, MCLBYTES,
615 		    0, 0, &data->xfer);
616 		if (error) {
617 			printf("%s: could not allocate rx xfer\n",
618 			    device_xname(sc->sc_dev));
619 			goto fail;
620 		}
621 
622 		MGETHDR(data->m, M_DONTWAIT, MT_DATA);
623 		if (data->m == NULL) {
624 			printf("%s: could not allocate rx mbuf\n",
625 			    device_xname(sc->sc_dev));
626 			error = ENOMEM;
627 			goto fail;
628 		}
629 
630 		MCLGET(data->m, M_DONTWAIT);
631 		if (!(data->m->m_flags & M_EXT)) {
632 			printf("%s: could not allocate rx mbuf cluster\n",
633 			    device_xname(sc->sc_dev));
634 			error = ENOMEM;
635 			goto fail;
636 		}
637 
638 		data->buf = mtod(data->m, uint8_t *);
639 	}
640 
641 	return 0;
642 
643 fail:	ural_free_rx_list(sc);
644 	return error;
645 }
646 
647 Static void
648 ural_free_rx_list(struct ural_softc *sc)
649 {
650 	struct ural_rx_data *data;
651 	int i;
652 
653 	for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
654 		data = &sc->rx_data[i];
655 
656 		if (data->xfer != NULL) {
657 			usbd_destroy_xfer(data->xfer);
658 			data->xfer = NULL;
659 		}
660 
661 		if (data->m != NULL) {
662 			m_freem(data->m);
663 			data->m = NULL;
664 		}
665 	}
666 }
667 
668 Static int
669 ural_media_change(struct ifnet *ifp)
670 {
671 	int error;
672 
673 	error = ieee80211_media_change(ifp);
674 	if (error != ENETRESET)
675 		return error;
676 
677 	if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
678 		ural_init(ifp);
679 
680 	return 0;
681 }
682 
683 /*
684  * This function is called periodically (every 200ms) during scanning to
685  * switch from one channel to another.
686  */
687 Static void
688 ural_next_scan(void *arg)
689 {
690 	struct ural_softc *sc = arg;
691 	struct ieee80211com *ic = &sc->sc_ic;
692 
693 	if (ic->ic_state == IEEE80211_S_SCAN)
694 		ieee80211_next_scan(ic);
695 }
696 
697 Static void
698 ural_task(void *arg)
699 {
700 	struct ural_softc *sc = arg;
701 	struct ieee80211com *ic = &sc->sc_ic;
702 	enum ieee80211_state ostate;
703 	struct ieee80211_node *ni;
704 	struct mbuf *m;
705 
706 	ostate = ic->ic_state;
707 
708 	switch (sc->sc_state) {
709 	case IEEE80211_S_INIT:
710 		if (ostate == IEEE80211_S_RUN) {
711 			/* abort TSF synchronization */
712 			ural_write(sc, RAL_TXRX_CSR19, 0);
713 
714 			/* force tx led to stop blinking */
715 			ural_write(sc, RAL_MAC_CSR20, 0);
716 		}
717 		break;
718 
719 	case IEEE80211_S_SCAN:
720 		ural_set_chan(sc, ic->ic_curchan);
721 		callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc);
722 		break;
723 
724 	case IEEE80211_S_AUTH:
725 		ural_set_chan(sc, ic->ic_curchan);
726 		break;
727 
728 	case IEEE80211_S_ASSOC:
729 		ural_set_chan(sc, ic->ic_curchan);
730 		break;
731 
732 	case IEEE80211_S_RUN:
733 		ural_set_chan(sc, ic->ic_curchan);
734 
735 		ni = ic->ic_bss;
736 
737 		if (ic->ic_opmode != IEEE80211_M_MONITOR) {
738 			ural_update_slot(ic->ic_ifp);
739 			ural_set_txpreamble(sc);
740 			ural_set_basicrates(sc);
741 			ural_set_bssid(sc, ni->ni_bssid);
742 		}
743 
744 		if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
745 		    ic->ic_opmode == IEEE80211_M_IBSS) {
746 			m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo);
747 			if (m == NULL) {
748 				printf("%s: could not allocate beacon\n",
749 				    device_xname(sc->sc_dev));
750 				return;
751 			}
752 
753 			if (ural_tx_bcn(sc, m, ni) != 0) {
754 				m_freem(m);
755 				printf("%s: could not send beacon\n",
756 				    device_xname(sc->sc_dev));
757 				return;
758 			}
759 
760 			/* beacon is no longer needed */
761 			m_freem(m);
762 		}
763 
764 		/* make tx led blink on tx (controlled by ASIC) */
765 		ural_write(sc, RAL_MAC_CSR20, 1);
766 
767 		if (ic->ic_opmode != IEEE80211_M_MONITOR)
768 			ural_enable_tsf_sync(sc);
769 
770 		/* enable automatic rate adaptation in STA mode */
771 		if (ic->ic_opmode == IEEE80211_M_STA &&
772 		    ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE)
773 			ural_amrr_start(sc, ni);
774 
775 		break;
776 	}
777 
778 	sc->sc_newstate(ic, sc->sc_state, -1);
779 }
780 
781 Static int
782 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate,
783     int arg)
784 {
785 	struct ural_softc *sc = ic->ic_ifp->if_softc;
786 
787 	usb_rem_task(sc->sc_udev, &sc->sc_task);
788 	callout_stop(&sc->sc_scan_ch);
789 	callout_stop(&sc->sc_amrr_ch);
790 
791 	/* do it in a process context */
792 	sc->sc_state = nstate;
793 	usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER);
794 
795 	return 0;
796 }
797 
798 /* quickly determine if a given rate is CCK or OFDM */
799 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
800 
801 #define RAL_ACK_SIZE	14	/* 10 + 4(FCS) */
802 #define RAL_CTS_SIZE	14	/* 10 + 4(FCS) */
803 
804 #define RAL_SIFS		10	/* us */
805 
806 #define RAL_RXTX_TURNAROUND	5	/* us */
807 
808 /*
809  * This function is only used by the Rx radiotap code.
810  */
811 Static int
812 ural_rxrate(struct ural_rx_desc *desc)
813 {
814 	if (le32toh(desc->flags) & RAL_RX_OFDM) {
815 		/* reverse function of ural_plcp_signal */
816 		switch (desc->rate) {
817 		case 0xb:	return 12;
818 		case 0xf:	return 18;
819 		case 0xa:	return 24;
820 		case 0xe:	return 36;
821 		case 0x9:	return 48;
822 		case 0xd:	return 72;
823 		case 0x8:	return 96;
824 		case 0xc:	return 108;
825 		}
826 	} else {
827 		if (desc->rate == 10)
828 			return 2;
829 		if (desc->rate == 20)
830 			return 4;
831 		if (desc->rate == 55)
832 			return 11;
833 		if (desc->rate == 110)
834 			return 22;
835 	}
836 	return 2;	/* should not get there */
837 }
838 
839 Static void
840 ural_txeof(struct usbd_xfer *xfer, void * priv,
841     usbd_status status)
842 {
843 	struct ural_tx_data *data = priv;
844 	struct ural_softc *sc = data->sc;
845 	struct ifnet *ifp = &sc->sc_if;
846 	int s;
847 
848 	if (status != USBD_NORMAL_COMPLETION) {
849 		if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
850 			return;
851 
852 		printf("%s: could not transmit buffer: %s\n",
853 		    device_xname(sc->sc_dev), usbd_errstr(status));
854 
855 		if (status == USBD_STALLED)
856 			usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh);
857 
858 		ifp->if_oerrors++;
859 		return;
860 	}
861 
862 	s = splnet();
863 
864 	m_freem(data->m);
865 	data->m = NULL;
866 	ieee80211_free_node(data->ni);
867 	data->ni = NULL;
868 
869 	sc->tx_queued--;
870 	ifp->if_opackets++;
871 
872 	DPRINTFN(10, ("tx done\n"));
873 
874 	sc->sc_tx_timer = 0;
875 	ifp->if_flags &= ~IFF_OACTIVE;
876 	ural_start(ifp);
877 
878 	splx(s);
879 }
880 
881 Static void
882 ural_rxeof(struct usbd_xfer *xfer, void * priv, usbd_status status)
883 {
884 	struct ural_rx_data *data = priv;
885 	struct ural_softc *sc = data->sc;
886 	struct ieee80211com *ic = &sc->sc_ic;
887 	struct ifnet *ifp = &sc->sc_if;
888 	struct ural_rx_desc *desc;
889 	struct ieee80211_frame *wh;
890 	struct ieee80211_node *ni;
891 	struct mbuf *mnew, *m;
892 	int s, len;
893 
894 	if (status != USBD_NORMAL_COMPLETION) {
895 		if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
896 			return;
897 
898 		if (status == USBD_STALLED)
899 			usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh);
900 		goto skip;
901 	}
902 
903 	usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL);
904 
905 	if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) {
906 		DPRINTF(("%s: xfer too short %d\n", device_xname(sc->sc_dev),
907 		    len));
908 		ifp->if_ierrors++;
909 		goto skip;
910 	}
911 
912 	/* rx descriptor is located at the end */
913 	desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE);
914 
915 	if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) ||
916 	    (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) {
917 		/*
918 		 * This should not happen since we did not request to receive
919 		 * those frames when we filled RAL_TXRX_CSR2.
920 		 */
921 		DPRINTFN(5, ("PHY or CRC error\n"));
922 		ifp->if_ierrors++;
923 		goto skip;
924 	}
925 
926 	MGETHDR(mnew, M_DONTWAIT, MT_DATA);
927 	if (mnew == NULL) {
928 		ifp->if_ierrors++;
929 		goto skip;
930 	}
931 
932 	MCLGET(mnew, M_DONTWAIT);
933 	if (!(mnew->m_flags & M_EXT)) {
934 		ifp->if_ierrors++;
935 		m_freem(mnew);
936 		goto skip;
937 	}
938 
939 	m = data->m;
940 	data->m = mnew;
941 	data->buf = mtod(data->m, uint8_t *);
942 
943 	/* finalize mbuf */
944 	m_set_rcvif(m, ifp);
945 	m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff;
946 	m->m_flags |= M_HASFCS;	/* h/w leaves FCS */
947 
948 	s = splnet();
949 
950 	if (sc->sc_drvbpf != NULL) {
951 		struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
952 
953 		tap->wr_flags = IEEE80211_RADIOTAP_F_FCS;
954 		tap->wr_rate = ural_rxrate(desc);
955 		tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
956 		tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
957 		tap->wr_antenna = sc->rx_ant;
958 		tap->wr_antsignal = desc->rssi;
959 
960 		bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m, BPF_D_IN);
961 	}
962 
963 	wh = mtod(m, struct ieee80211_frame *);
964 	ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
965 
966 	/* send the frame to the 802.11 layer */
967 	ieee80211_input(ic, m, ni, desc->rssi, 0);
968 
969 	/* node is no longer needed */
970 	ieee80211_free_node(ni);
971 
972 	splx(s);
973 
974 	DPRINTFN(15, ("rx done\n"));
975 
976 skip:	/* setup a new transfer */
977 	usbd_setup_xfer(xfer, data, data->buf, MCLBYTES,
978 	    USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
979 	usbd_transfer(xfer);
980 }
981 
982 /*
983  * Return the expected ack rate for a frame transmitted at rate `rate'.
984  * XXX: this should depend on the destination node basic rate set.
985  */
986 Static int
987 ural_ack_rate(struct ieee80211com *ic, int rate)
988 {
989 	switch (rate) {
990 	/* CCK rates */
991 	case 2:
992 		return 2;
993 	case 4:
994 	case 11:
995 	case 22:
996 		return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
997 
998 	/* OFDM rates */
999 	case 12:
1000 	case 18:
1001 		return 12;
1002 	case 24:
1003 	case 36:
1004 		return 24;
1005 	case 48:
1006 	case 72:
1007 	case 96:
1008 	case 108:
1009 		return 48;
1010 	}
1011 
1012 	/* default to 1Mbps */
1013 	return 2;
1014 }
1015 
1016 /*
1017  * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
1018  * The function automatically determines the operating mode depending on the
1019  * given rate. `flags' indicates whether short preamble is in use or not.
1020  */
1021 Static uint16_t
1022 ural_txtime(int len, int rate, uint32_t flags)
1023 {
1024 	uint16_t txtime;
1025 
1026 	if (RAL_RATE_IS_OFDM(rate)) {
1027 		/* IEEE Std 802.11g-2003, pp. 37 */
1028 		txtime = (8 + 4 * len + 3 + rate - 1) / rate;
1029 		txtime = 16 + 4 + 4 * txtime + 6;
1030 	} else {
1031 		/* IEEE Std 802.11b-1999, pp. 28 */
1032 		txtime = (16 * len + rate - 1) / rate;
1033 		if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
1034 			txtime +=  72 + 24;
1035 		else
1036 			txtime += 144 + 48;
1037 	}
1038 	return txtime;
1039 }
1040 
1041 Static uint8_t
1042 ural_plcp_signal(int rate)
1043 {
1044 	switch (rate) {
1045 	/* CCK rates (returned values are device-dependent) */
1046 	case 2:		return 0x0;
1047 	case 4:		return 0x1;
1048 	case 11:	return 0x2;
1049 	case 22:	return 0x3;
1050 
1051 	/* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1052 	case 12:	return 0xb;
1053 	case 18:	return 0xf;
1054 	case 24:	return 0xa;
1055 	case 36:	return 0xe;
1056 	case 48:	return 0x9;
1057 	case 72:	return 0xd;
1058 	case 96:	return 0x8;
1059 	case 108:	return 0xc;
1060 
1061 	/* unsupported rates (should not get there) */
1062 	default:	return 0xff;
1063 	}
1064 }
1065 
1066 Static void
1067 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
1068     uint32_t flags, int len, int rate)
1069 {
1070 	struct ieee80211com *ic = &sc->sc_ic;
1071 	uint16_t plcp_length;
1072 	int remainder;
1073 
1074 	desc->flags = htole32(flags);
1075 	desc->flags |= htole32(RAL_TX_NEWSEQ);
1076 	desc->flags |= htole32(len << 16);
1077 
1078 	desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5));
1079 	desc->wme |= htole16(RAL_IVOFFSET(sizeof(struct ieee80211_frame)));
1080 
1081 	/* setup PLCP fields */
1082 	desc->plcp_signal  = ural_plcp_signal(rate);
1083 	desc->plcp_service = 4;
1084 
1085 	len += IEEE80211_CRC_LEN;
1086 	if (RAL_RATE_IS_OFDM(rate)) {
1087 		desc->flags |= htole32(RAL_TX_OFDM);
1088 
1089 		plcp_length = len & 0xfff;
1090 		desc->plcp_length_hi = plcp_length >> 6;
1091 		desc->plcp_length_lo = plcp_length & 0x3f;
1092 	} else {
1093 		plcp_length = (16 * len + rate - 1) / rate;
1094 		if (rate == 22) {
1095 			remainder = (16 * len) % 22;
1096 			if (remainder != 0 && remainder < 7)
1097 				desc->plcp_service |= RAL_PLCP_LENGEXT;
1098 		}
1099 		desc->plcp_length_hi = plcp_length >> 8;
1100 		desc->plcp_length_lo = plcp_length & 0xff;
1101 
1102 		if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1103 			desc->plcp_signal |= 0x08;
1104 	}
1105 
1106 	desc->iv = 0;
1107 	desc->eiv = 0;
1108 }
1109 
1110 #define RAL_TX_TIMEOUT	5000
1111 
1112 Static int
1113 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1114 {
1115 	struct ural_tx_desc *desc;
1116 	struct usbd_xfer *xfer;
1117 	uint8_t cmd = 0;
1118 	usbd_status error;
1119 	uint8_t *buf;
1120 	int xferlen, rate;
1121 
1122 	rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1123 
1124 	/* xfer length needs to be a multiple of two! */
1125 	xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1126 
1127 	error = usbd_create_xfer(sc->sc_tx_pipeh, xferlen,
1128 	    USBD_FORCE_SHORT_XFER, 0, &xfer);
1129 	if (error)
1130 		return error;
1131 
1132 	buf = usbd_get_buffer(xfer);
1133 
1134 	usbd_setup_xfer(xfer, NULL, &cmd, sizeof(cmd), USBD_FORCE_SHORT_XFER,
1135 	    RAL_TX_TIMEOUT, NULL);
1136 
1137 	error = usbd_sync_transfer(xfer);
1138 	if (error != 0) {
1139 		usbd_destroy_xfer(xfer);
1140 		return error;
1141 	}
1142 
1143 	desc = (struct ural_tx_desc *)buf;
1144 
1145 	m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE);
1146 	ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP,
1147 	    m0->m_pkthdr.len, rate);
1148 
1149 	DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n",
1150 	    m0->m_pkthdr.len, rate, xferlen));
1151 
1152 	usbd_setup_xfer(xfer, NULL, buf, xferlen, USBD_FORCE_SHORT_XFER,
1153 	    RAL_TX_TIMEOUT, NULL);
1154 
1155 	error = usbd_sync_transfer(xfer);
1156 	usbd_destroy_xfer(xfer);
1157 
1158 	return error;
1159 }
1160 
1161 Static int
1162 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1163 {
1164 	struct ieee80211com *ic = &sc->sc_ic;
1165 	struct ural_tx_desc *desc;
1166 	struct ural_tx_data *data;
1167 	struct ieee80211_frame *wh;
1168 	struct ieee80211_key *k;
1169 	uint32_t flags = 0;
1170 	uint16_t dur;
1171 	usbd_status error;
1172 	int xferlen, rate;
1173 
1174 	data = &sc->tx_data[0];
1175 	desc = (struct ural_tx_desc *)data->buf;
1176 
1177 	rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1178 
1179 	wh = mtod(m0, struct ieee80211_frame *);
1180 
1181 	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1182 		k = ieee80211_crypto_encap(ic, ni, m0);
1183 		if (k == NULL) {
1184 			m_freem(m0);
1185 			return ENOBUFS;
1186 		}
1187 	}
1188 
1189 	data->m = m0;
1190 	data->ni = ni;
1191 
1192 	wh = mtod(m0, struct ieee80211_frame *);
1193 
1194 	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1195 		flags |= RAL_TX_ACK;
1196 
1197 		dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS;
1198 		*(uint16_t *)wh->i_dur = htole16(dur);
1199 
1200 		/* tell hardware to add timestamp for probe responses */
1201 		if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1202 		    IEEE80211_FC0_TYPE_MGT &&
1203 		    (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1204 		    IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1205 			flags |= RAL_TX_TIMESTAMP;
1206 	}
1207 
1208 	if (sc->sc_drvbpf != NULL) {
1209 		struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1210 
1211 		tap->wt_flags = 0;
1212 		tap->wt_rate = rate;
1213 		tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1214 		tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1215 		tap->wt_antenna = sc->tx_ant;
1216 
1217 		bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT);
1218 	}
1219 
1220 	m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1221 	ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1222 
1223 	/* align end on a 2-bytes boundary */
1224 	xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1225 
1226 	/*
1227 	 * No space left in the last URB to store the extra 2 bytes, force
1228 	 * sending of another URB.
1229 	 */
1230 	if ((xferlen % 64) == 0)
1231 		xferlen += 2;
1232 
1233 	DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n",
1234 	    m0->m_pkthdr.len, rate, xferlen));
1235 
1236 	usbd_setup_xfer(data->xfer, data, data->buf, xferlen,
1237 	    USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof);
1238 
1239 	error = usbd_transfer(data->xfer);
1240 	if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) {
1241 		m_freem(m0);
1242 		return error;
1243 	}
1244 
1245 	sc->tx_queued++;
1246 
1247 	return 0;
1248 }
1249 
1250 Static int
1251 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1252 {
1253 	struct ieee80211com *ic = &sc->sc_ic;
1254 	struct ural_tx_desc *desc;
1255 	struct ural_tx_data *data;
1256 	struct ieee80211_frame *wh;
1257 	struct ieee80211_key *k;
1258 	uint32_t flags = 0;
1259 	uint16_t dur;
1260 	usbd_status error;
1261 	int xferlen, rate;
1262 
1263 	wh = mtod(m0, struct ieee80211_frame *);
1264 
1265 	if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE)
1266 		rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate];
1267 	else
1268 		rate = ni->ni_rates.rs_rates[ni->ni_txrate];
1269 
1270 	rate &= IEEE80211_RATE_VAL;
1271 
1272 	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1273 		k = ieee80211_crypto_encap(ic, ni, m0);
1274 		if (k == NULL) {
1275 			m_freem(m0);
1276 			return ENOBUFS;
1277 		}
1278 
1279 		/* packet header may have moved, reset our local pointer */
1280 		wh = mtod(m0, struct ieee80211_frame *);
1281 	}
1282 
1283 	data = &sc->tx_data[0];
1284 	desc = (struct ural_tx_desc *)data->buf;
1285 
1286 	data->m = m0;
1287 	data->ni = ni;
1288 
1289 	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1290 		flags |= RAL_TX_ACK;
1291 		flags |= RAL_TX_RETRY(7);
1292 
1293 		dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate),
1294 		    ic->ic_flags) + RAL_SIFS;
1295 		*(uint16_t *)wh->i_dur = htole16(dur);
1296 	}
1297 
1298 	if (sc->sc_drvbpf != NULL) {
1299 		struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1300 
1301 		tap->wt_flags = 0;
1302 		tap->wt_rate = rate;
1303 		tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1304 		tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1305 		tap->wt_antenna = sc->tx_ant;
1306 
1307 		bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT);
1308 	}
1309 
1310 	m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1311 	ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1312 
1313 	/* align end on a 2-bytes boundary */
1314 	xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1315 
1316 	/*
1317 	 * No space left in the last URB to store the extra 2 bytes, force
1318 	 * sending of another URB.
1319 	 */
1320 	if ((xferlen % 64) == 0)
1321 		xferlen += 2;
1322 
1323 	DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n",
1324 	    m0->m_pkthdr.len, rate, xferlen));
1325 	usbd_setup_xfer(data->xfer, data, data->buf, xferlen,
1326 	    USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof);
1327 
1328 	error = usbd_transfer(data->xfer);
1329 	if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS)
1330 		return error;
1331 
1332 	sc->tx_queued++;
1333 
1334 	return 0;
1335 }
1336 
1337 Static void
1338 ural_start(struct ifnet *ifp)
1339 {
1340 	struct ural_softc *sc = ifp->if_softc;
1341 	struct ieee80211com *ic = &sc->sc_ic;
1342 	struct mbuf *m0;
1343 	struct ether_header *eh;
1344 	struct ieee80211_node *ni;
1345 
1346 	for (;;) {
1347 		IF_POLL(&ic->ic_mgtq, m0);
1348 		if (m0 != NULL) {
1349 			if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1350 				ifp->if_flags |= IFF_OACTIVE;
1351 				break;
1352 			}
1353 			IF_DEQUEUE(&ic->ic_mgtq, m0);
1354 
1355 			ni = M_GETCTX(m0, struct ieee80211_node *);
1356 			M_CLEARCTX(m0);
1357 			bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT);
1358 			if (ural_tx_mgt(sc, m0, ni) != 0)
1359 				break;
1360 
1361 		} else {
1362 			if (ic->ic_state != IEEE80211_S_RUN)
1363 				break;
1364 			IFQ_DEQUEUE(&ifp->if_snd, m0);
1365 			if (m0 == NULL)
1366 				break;
1367 			if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1368 				IF_PREPEND(&ifp->if_snd, m0);
1369 				ifp->if_flags |= IFF_OACTIVE;
1370 				break;
1371 			}
1372 
1373 			if (m0->m_len < sizeof(struct ether_header) &&
1374 			    !(m0 = m_pullup(m0, sizeof(struct ether_header))))
1375 				continue;
1376 
1377 			eh = mtod(m0, struct ether_header *);
1378 			ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1379 			if (ni == NULL) {
1380 				m_freem(m0);
1381 				continue;
1382 			}
1383 			bpf_mtap(ifp, m0, BPF_D_OUT);
1384 			m0 = ieee80211_encap(ic, m0, ni);
1385 			if (m0 == NULL) {
1386 				ieee80211_free_node(ni);
1387 				continue;
1388 			}
1389 			bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT);
1390 			if (ural_tx_data(sc, m0, ni) != 0) {
1391 				ieee80211_free_node(ni);
1392 				ifp->if_oerrors++;
1393 				break;
1394 			}
1395 		}
1396 
1397 		sc->sc_tx_timer = 5;
1398 		ifp->if_timer = 1;
1399 	}
1400 }
1401 
1402 Static void
1403 ural_watchdog(struct ifnet *ifp)
1404 {
1405 	struct ural_softc *sc = ifp->if_softc;
1406 	struct ieee80211com *ic = &sc->sc_ic;
1407 
1408 	ifp->if_timer = 0;
1409 
1410 	if (sc->sc_tx_timer > 0) {
1411 		if (--sc->sc_tx_timer == 0) {
1412 			printf("%s: device timeout\n", device_xname(sc->sc_dev));
1413 			/*ural_init(sc); XXX needs a process context! */
1414 			ifp->if_oerrors++;
1415 			return;
1416 		}
1417 		ifp->if_timer = 1;
1418 	}
1419 
1420 	ieee80211_watchdog(ic);
1421 }
1422 
1423 /*
1424  * This function allows for fast channel switching in monitor mode (used by
1425  * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to
1426  * generate a new beacon frame.
1427  */
1428 Static int
1429 ural_reset(struct ifnet *ifp)
1430 {
1431 	struct ural_softc *sc = ifp->if_softc;
1432 	struct ieee80211com *ic = &sc->sc_ic;
1433 
1434 	if (ic->ic_opmode != IEEE80211_M_MONITOR)
1435 		return ENETRESET;
1436 
1437 	ural_set_chan(sc, ic->ic_curchan);
1438 
1439 	return 0;
1440 }
1441 
1442 Static int
1443 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data)
1444 {
1445 #define IS_RUNNING(ifp) \
1446 	(((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING))
1447 
1448 	struct ural_softc *sc = ifp->if_softc;
1449 	struct ieee80211com *ic = &sc->sc_ic;
1450 	int s, error = 0;
1451 
1452 	s = splnet();
1453 
1454 	switch (cmd) {
1455 	case SIOCSIFFLAGS:
1456 		if ((error = ifioctl_common(ifp, cmd, data)) != 0)
1457 			break;
1458 		/* XXX re-use ether_ioctl() */
1459 		switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) {
1460 		case IFF_UP|IFF_RUNNING:
1461 			ural_update_promisc(sc);
1462 			break;
1463 		case IFF_UP:
1464 			ural_init(ifp);
1465 			break;
1466 		case IFF_RUNNING:
1467 			ural_stop(ifp, 1);
1468 			break;
1469 		case 0:
1470 			break;
1471 		}
1472 		break;
1473 
1474 	case SIOCADDMULTI:
1475 	case SIOCDELMULTI:
1476 		if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) {
1477 			error = 0;
1478 		}
1479 		break;
1480 
1481 	default:
1482 		error = ieee80211_ioctl(ic, cmd, data);
1483 	}
1484 
1485 	if (error == ENETRESET) {
1486 		if (IS_RUNNING(ifp) &&
1487 			(ic->ic_roaming != IEEE80211_ROAMING_MANUAL))
1488 			ural_init(ifp);
1489 		error = 0;
1490 	}
1491 
1492 	splx(s);
1493 
1494 	return error;
1495 #undef IS_RUNNING
1496 }
1497 
1498 Static void
1499 ural_set_testmode(struct ural_softc *sc)
1500 {
1501 	usb_device_request_t req;
1502 	usbd_status error;
1503 
1504 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1505 	req.bRequest = RAL_VENDOR_REQUEST;
1506 	USETW(req.wValue, 4);
1507 	USETW(req.wIndex, 1);
1508 	USETW(req.wLength, 0);
1509 
1510 	error = usbd_do_request(sc->sc_udev, &req, NULL);
1511 	if (error != 0) {
1512 		printf("%s: could not set test mode: %s\n",
1513 		    device_xname(sc->sc_dev), usbd_errstr(error));
1514 	}
1515 }
1516 
1517 Static void
1518 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1519 {
1520 	usb_device_request_t req;
1521 	usbd_status error;
1522 
1523 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1524 	req.bRequest = RAL_READ_EEPROM;
1525 	USETW(req.wValue, 0);
1526 	USETW(req.wIndex, addr);
1527 	USETW(req.wLength, len);
1528 
1529 	error = usbd_do_request(sc->sc_udev, &req, buf);
1530 	if (error != 0) {
1531 		printf("%s: could not read EEPROM: %s\n",
1532 		    device_xname(sc->sc_dev), usbd_errstr(error));
1533 	}
1534 }
1535 
1536 Static uint16_t
1537 ural_read(struct ural_softc *sc, uint16_t reg)
1538 {
1539 	usb_device_request_t req;
1540 	usbd_status error;
1541 	uint16_t val;
1542 
1543 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1544 	req.bRequest = RAL_READ_MAC;
1545 	USETW(req.wValue, 0);
1546 	USETW(req.wIndex, reg);
1547 	USETW(req.wLength, sizeof(uint16_t));
1548 
1549 	error = usbd_do_request(sc->sc_udev, &req, &val);
1550 	if (error != 0) {
1551 		printf("%s: could not read MAC register: %s\n",
1552 		    device_xname(sc->sc_dev), usbd_errstr(error));
1553 		return 0;
1554 	}
1555 
1556 	return le16toh(val);
1557 }
1558 
1559 Static void
1560 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1561 {
1562 	usb_device_request_t req;
1563 	usbd_status error;
1564 
1565 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1566 	req.bRequest = RAL_READ_MULTI_MAC;
1567 	USETW(req.wValue, 0);
1568 	USETW(req.wIndex, reg);
1569 	USETW(req.wLength, len);
1570 
1571 	error = usbd_do_request(sc->sc_udev, &req, buf);
1572 	if (error != 0) {
1573 		printf("%s: could not read MAC register: %s\n",
1574 		    device_xname(sc->sc_dev), usbd_errstr(error));
1575 	}
1576 }
1577 
1578 Static void
1579 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1580 {
1581 	usb_device_request_t req;
1582 	usbd_status error;
1583 
1584 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1585 	req.bRequest = RAL_WRITE_MAC;
1586 	USETW(req.wValue, val);
1587 	USETW(req.wIndex, reg);
1588 	USETW(req.wLength, 0);
1589 
1590 	error = usbd_do_request(sc->sc_udev, &req, NULL);
1591 	if (error != 0) {
1592 		printf("%s: could not write MAC register: %s\n",
1593 		    device_xname(sc->sc_dev), usbd_errstr(error));
1594 	}
1595 }
1596 
1597 Static void
1598 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1599 {
1600 	usb_device_request_t req;
1601 	usbd_status error;
1602 
1603 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1604 	req.bRequest = RAL_WRITE_MULTI_MAC;
1605 	USETW(req.wValue, 0);
1606 	USETW(req.wIndex, reg);
1607 	USETW(req.wLength, len);
1608 
1609 	error = usbd_do_request(sc->sc_udev, &req, buf);
1610 	if (error != 0) {
1611 		printf("%s: could not write MAC register: %s\n",
1612 		    device_xname(sc->sc_dev), usbd_errstr(error));
1613 	}
1614 }
1615 
1616 Static void
1617 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1618 {
1619 	uint16_t tmp;
1620 	int ntries;
1621 
1622 	for (ntries = 0; ntries < 5; ntries++) {
1623 		if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1624 			break;
1625 	}
1626 	if (ntries == 5) {
1627 		printf("%s: could not write to BBP\n", device_xname(sc->sc_dev));
1628 		return;
1629 	}
1630 
1631 	tmp = reg << 8 | val;
1632 	ural_write(sc, RAL_PHY_CSR7, tmp);
1633 }
1634 
1635 Static uint8_t
1636 ural_bbp_read(struct ural_softc *sc, uint8_t reg)
1637 {
1638 	uint16_t val;
1639 	int ntries;
1640 
1641 	val = RAL_BBP_WRITE | reg << 8;
1642 	ural_write(sc, RAL_PHY_CSR7, val);
1643 
1644 	for (ntries = 0; ntries < 5; ntries++) {
1645 		if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1646 			break;
1647 	}
1648 	if (ntries == 5) {
1649 		printf("%s: could not read BBP\n", device_xname(sc->sc_dev));
1650 		return 0;
1651 	}
1652 
1653 	return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1654 }
1655 
1656 Static void
1657 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1658 {
1659 	uint32_t tmp;
1660 	int ntries;
1661 
1662 	for (ntries = 0; ntries < 5; ntries++) {
1663 		if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1664 			break;
1665 	}
1666 	if (ntries == 5) {
1667 		printf("%s: could not write to RF\n", device_xname(sc->sc_dev));
1668 		return;
1669 	}
1670 
1671 	tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1672 	ural_write(sc, RAL_PHY_CSR9,  tmp & 0xffff);
1673 	ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1674 
1675 	/* remember last written value in sc */
1676 	sc->rf_regs[reg] = val;
1677 
1678 	DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
1679 }
1680 
1681 Static void
1682 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1683 {
1684 	struct ieee80211com *ic = &sc->sc_ic;
1685 	uint8_t power, tmp;
1686 	u_int i, chan;
1687 
1688 	chan = ieee80211_chan2ieee(ic, c);
1689 	if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1690 		return;
1691 
1692 	if (IEEE80211_IS_CHAN_2GHZ(c))
1693 		power = min(sc->txpow[chan - 1], 31);
1694 	else
1695 		power = 31;
1696 
1697 	/* adjust txpower using ifconfig settings */
1698 	power -= (100 - ic->ic_txpowlimit) / 8;
1699 
1700 	DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
1701 
1702 	switch (sc->rf_rev) {
1703 	case RAL_RF_2522:
1704 		ural_rf_write(sc, RAL_RF1, 0x00814);
1705 		ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1706 		ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1707 		break;
1708 
1709 	case RAL_RF_2523:
1710 		ural_rf_write(sc, RAL_RF1, 0x08804);
1711 		ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1712 		ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1713 		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1714 		break;
1715 
1716 	case RAL_RF_2524:
1717 		ural_rf_write(sc, RAL_RF1, 0x0c808);
1718 		ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1719 		ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1720 		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1721 		break;
1722 
1723 	case RAL_RF_2525:
1724 		ural_rf_write(sc, RAL_RF1, 0x08808);
1725 		ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1726 		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1727 		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1728 
1729 		ural_rf_write(sc, RAL_RF1, 0x08808);
1730 		ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1731 		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1732 		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1733 		break;
1734 
1735 	case RAL_RF_2525E:
1736 		ural_rf_write(sc, RAL_RF1, 0x08808);
1737 		ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1738 		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1739 		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1740 		break;
1741 
1742 	case RAL_RF_2526:
1743 		ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1744 		ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1745 		ural_rf_write(sc, RAL_RF1, 0x08804);
1746 
1747 		ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1748 		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1749 		ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1750 		break;
1751 
1752 	/* dual-band RF */
1753 	case RAL_RF_5222:
1754 		for (i = 0; ural_rf5222[i].chan != chan; i++);
1755 
1756 		ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1);
1757 		ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2);
1758 		ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1759 		ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
1760 		break;
1761 	}
1762 
1763 	if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1764 	    ic->ic_state != IEEE80211_S_SCAN) {
1765 		/* set Japan filter bit for channel 14 */
1766 		tmp = ural_bbp_read(sc, 70);
1767 
1768 		tmp &= ~RAL_JAPAN_FILTER;
1769 		if (chan == 14)
1770 			tmp |= RAL_JAPAN_FILTER;
1771 
1772 		ural_bbp_write(sc, 70, tmp);
1773 
1774 		/* clear CRC errors */
1775 		ural_read(sc, RAL_STA_CSR0);
1776 
1777 		DELAY(10000);
1778 		ural_disable_rf_tune(sc);
1779 	}
1780 }
1781 
1782 /*
1783  * Disable RF auto-tuning.
1784  */
1785 Static void
1786 ural_disable_rf_tune(struct ural_softc *sc)
1787 {
1788 	uint32_t tmp;
1789 
1790 	if (sc->rf_rev != RAL_RF_2523) {
1791 		tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1792 		ural_rf_write(sc, RAL_RF1, tmp);
1793 	}
1794 
1795 	tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1796 	ural_rf_write(sc, RAL_RF3, tmp);
1797 
1798 	DPRINTFN(2, ("disabling RF autotune\n"));
1799 }
1800 
1801 /*
1802  * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1803  * synchronization.
1804  */
1805 Static void
1806 ural_enable_tsf_sync(struct ural_softc *sc)
1807 {
1808 	struct ieee80211com *ic = &sc->sc_ic;
1809 	uint16_t logcwmin, preload, tmp;
1810 
1811 	/* first, disable TSF synchronization */
1812 	ural_write(sc, RAL_TXRX_CSR19, 0);
1813 
1814 	tmp = (16 * ic->ic_bss->ni_intval) << 4;
1815 	ural_write(sc, RAL_TXRX_CSR18, tmp);
1816 
1817 	logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1818 	preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1819 	tmp = logcwmin << 12 | preload;
1820 	ural_write(sc, RAL_TXRX_CSR20, tmp);
1821 
1822 	/* finally, enable TSF synchronization */
1823 	tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1824 	if (ic->ic_opmode == IEEE80211_M_STA)
1825 		tmp |= RAL_ENABLE_TSF_SYNC(1);
1826 	else
1827 		tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1828 	ural_write(sc, RAL_TXRX_CSR19, tmp);
1829 
1830 	DPRINTF(("enabling TSF synchronization\n"));
1831 }
1832 
1833 Static void
1834 ural_update_slot(struct ifnet *ifp)
1835 {
1836 	struct ural_softc *sc = ifp->if_softc;
1837 	struct ieee80211com *ic = &sc->sc_ic;
1838 	uint16_t slottime, sifs, eifs;
1839 
1840 	slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1841 
1842 	/*
1843 	 * These settings may sound a bit inconsistent but this is what the
1844 	 * reference driver does.
1845 	 */
1846 	if (ic->ic_curmode == IEEE80211_MODE_11B) {
1847 		sifs = 16 - RAL_RXTX_TURNAROUND;
1848 		eifs = 364;
1849 	} else {
1850 		sifs = 10 - RAL_RXTX_TURNAROUND;
1851 		eifs = 64;
1852 	}
1853 
1854 	ural_write(sc, RAL_MAC_CSR10, slottime);
1855 	ural_write(sc, RAL_MAC_CSR11, sifs);
1856 	ural_write(sc, RAL_MAC_CSR12, eifs);
1857 }
1858 
1859 Static void
1860 ural_set_txpreamble(struct ural_softc *sc)
1861 {
1862 	uint16_t tmp;
1863 
1864 	tmp = ural_read(sc, RAL_TXRX_CSR10);
1865 
1866 	tmp &= ~RAL_SHORT_PREAMBLE;
1867 	if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
1868 		tmp |= RAL_SHORT_PREAMBLE;
1869 
1870 	ural_write(sc, RAL_TXRX_CSR10, tmp);
1871 }
1872 
1873 Static void
1874 ural_set_basicrates(struct ural_softc *sc)
1875 {
1876 	struct ieee80211com *ic = &sc->sc_ic;
1877 
1878 	/* update basic rate set */
1879 	if (ic->ic_curmode == IEEE80211_MODE_11B) {
1880 		/* 11b basic rates: 1, 2Mbps */
1881 		ural_write(sc, RAL_TXRX_CSR11, 0x3);
1882 	} else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) {
1883 		/* 11a basic rates: 6, 12, 24Mbps */
1884 		ural_write(sc, RAL_TXRX_CSR11, 0x150);
1885 	} else {
1886 		/* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
1887 		ural_write(sc, RAL_TXRX_CSR11, 0x15f);
1888 	}
1889 }
1890 
1891 Static void
1892 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid)
1893 {
1894 	uint16_t tmp;
1895 
1896 	tmp = bssid[0] | bssid[1] << 8;
1897 	ural_write(sc, RAL_MAC_CSR5, tmp);
1898 
1899 	tmp = bssid[2] | bssid[3] << 8;
1900 	ural_write(sc, RAL_MAC_CSR6, tmp);
1901 
1902 	tmp = bssid[4] | bssid[5] << 8;
1903 	ural_write(sc, RAL_MAC_CSR7, tmp);
1904 
1905 	DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid)));
1906 }
1907 
1908 Static void
1909 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr)
1910 {
1911 	uint16_t tmp;
1912 
1913 	tmp = addr[0] | addr[1] << 8;
1914 	ural_write(sc, RAL_MAC_CSR2, tmp);
1915 
1916 	tmp = addr[2] | addr[3] << 8;
1917 	ural_write(sc, RAL_MAC_CSR3, tmp);
1918 
1919 	tmp = addr[4] | addr[5] << 8;
1920 	ural_write(sc, RAL_MAC_CSR4, tmp);
1921 
1922 	DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr)));
1923 }
1924 
1925 Static void
1926 ural_update_promisc(struct ural_softc *sc)
1927 {
1928 	struct ifnet *ifp = sc->sc_ic.ic_ifp;
1929 	uint32_t tmp;
1930 
1931 	tmp = ural_read(sc, RAL_TXRX_CSR2);
1932 
1933 	tmp &= ~RAL_DROP_NOT_TO_ME;
1934 	if (!(ifp->if_flags & IFF_PROMISC))
1935 		tmp |= RAL_DROP_NOT_TO_ME;
1936 
1937 	ural_write(sc, RAL_TXRX_CSR2, tmp);
1938 
1939 	DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1940 	    "entering" : "leaving"));
1941 }
1942 
1943 Static const char *
1944 ural_get_rf(int rev)
1945 {
1946 	switch (rev) {
1947 	case RAL_RF_2522:	return "RT2522";
1948 	case RAL_RF_2523:	return "RT2523";
1949 	case RAL_RF_2524:	return "RT2524";
1950 	case RAL_RF_2525:	return "RT2525";
1951 	case RAL_RF_2525E:	return "RT2525e";
1952 	case RAL_RF_2526:	return "RT2526";
1953 	case RAL_RF_5222:	return "RT5222";
1954 	default:		return "unknown";
1955 	}
1956 }
1957 
1958 Static void
1959 ural_read_eeprom(struct ural_softc *sc)
1960 {
1961 	struct ieee80211com *ic = &sc->sc_ic;
1962 	uint16_t val;
1963 
1964 	ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
1965 	val = le16toh(val);
1966 	sc->rf_rev =   (val >> 11) & 0x7;
1967 	sc->hw_radio = (val >> 10) & 0x1;
1968 	sc->led_mode = (val >> 6)  & 0x7;
1969 	sc->rx_ant =   (val >> 4)  & 0x3;
1970 	sc->tx_ant =   (val >> 2)  & 0x3;
1971 	sc->nb_ant =   val & 0x3;
1972 
1973 	/* read MAC address */
1974 	ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6);
1975 
1976 	/* read default values for BBP registers */
1977 	ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
1978 
1979 	/* read Tx power for all b/g channels */
1980 	ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
1981 }
1982 
1983 Static int
1984 ural_bbp_init(struct ural_softc *sc)
1985 {
1986 	int i, ntries;
1987 
1988 	/* wait for BBP to be ready */
1989 	for (ntries = 0; ntries < 100; ntries++) {
1990 		if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
1991 			break;
1992 		DELAY(1000);
1993 	}
1994 	if (ntries == 100) {
1995 		printf("%s: timeout waiting for BBP\n", device_xname(sc->sc_dev));
1996 		return EIO;
1997 	}
1998 
1999 	/* initialize BBP registers to default values */
2000 	for (i = 0; i < __arraycount(ural_def_bbp); i++)
2001 		ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
2002 
2003 #if 0
2004 	/* initialize BBP registers to values stored in EEPROM */
2005 	for (i = 0; i < 16; i++) {
2006 		if (sc->bbp_prom[i].reg == 0xff)
2007 			continue;
2008 		ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2009 	}
2010 #endif
2011 
2012 	return 0;
2013 }
2014 
2015 Static void
2016 ural_set_txantenna(struct ural_softc *sc, int antenna)
2017 {
2018 	uint16_t tmp;
2019 	uint8_t tx;
2020 
2021 	tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
2022 	if (antenna == 1)
2023 		tx |= RAL_BBP_ANTA;
2024 	else if (antenna == 2)
2025 		tx |= RAL_BBP_ANTB;
2026 	else
2027 		tx |= RAL_BBP_DIVERSITY;
2028 
2029 	/* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2030 	if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
2031 	    sc->rf_rev == RAL_RF_5222)
2032 		tx |= RAL_BBP_FLIPIQ;
2033 
2034 	ural_bbp_write(sc, RAL_BBP_TX, tx);
2035 
2036 	/* update values in PHY_CSR5 and PHY_CSR6 */
2037 	tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
2038 	ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
2039 
2040 	tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
2041 	ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
2042 }
2043 
2044 Static void
2045 ural_set_rxantenna(struct ural_softc *sc, int antenna)
2046 {
2047 	uint8_t rx;
2048 
2049 	rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
2050 	if (antenna == 1)
2051 		rx |= RAL_BBP_ANTA;
2052 	else if (antenna == 2)
2053 		rx |= RAL_BBP_ANTB;
2054 	else
2055 		rx |= RAL_BBP_DIVERSITY;
2056 
2057 	/* need to force no I/Q flip for RF 2525e and 2526 */
2058 	if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
2059 		rx &= ~RAL_BBP_FLIPIQ;
2060 
2061 	ural_bbp_write(sc, RAL_BBP_RX, rx);
2062 }
2063 
2064 Static int
2065 ural_init(struct ifnet *ifp)
2066 {
2067 	struct ural_softc *sc = ifp->if_softc;
2068 	struct ieee80211com *ic = &sc->sc_ic;
2069 	struct ieee80211_key *wk;
2070 	uint16_t tmp;
2071 	usbd_status error;
2072 	int i, ntries;
2073 
2074 	ural_set_testmode(sc);
2075 	ural_write(sc, 0x308, 0x00f0);	/* XXX magic */
2076 
2077 	ural_stop(ifp, 0);
2078 
2079 	/* initialize MAC registers to default values */
2080 	for (i = 0; i < __arraycount(ural_def_mac); i++)
2081 		ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
2082 
2083 	/* wait for BBP and RF to wake up (this can take a long time!) */
2084 	for (ntries = 0; ntries < 100; ntries++) {
2085 		tmp = ural_read(sc, RAL_MAC_CSR17);
2086 		if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
2087 		    (RAL_BBP_AWAKE | RAL_RF_AWAKE))
2088 			break;
2089 		DELAY(1000);
2090 	}
2091 	if (ntries == 100) {
2092 		printf("%s: timeout waiting for BBP/RF to wakeup\n",
2093 		    device_xname(sc->sc_dev));
2094 		error = EIO;
2095 		goto fail;
2096 	}
2097 
2098 	/* we're ready! */
2099 	ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
2100 
2101 	/* set basic rate set (will be updated later) */
2102 	ural_write(sc, RAL_TXRX_CSR11, 0x15f);
2103 
2104 	error = ural_bbp_init(sc);
2105 	if (error != 0)
2106 		goto fail;
2107 
2108 	/* set default BSS channel */
2109 	ural_set_chan(sc, ic->ic_curchan);
2110 
2111 	/* clear statistic registers (STA_CSR0 to STA_CSR10) */
2112 	ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta));
2113 
2114 	ural_set_txantenna(sc, sc->tx_ant);
2115 	ural_set_rxantenna(sc, sc->rx_ant);
2116 
2117 	IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl));
2118 	ural_set_macaddr(sc, ic->ic_myaddr);
2119 
2120 	/*
2121 	 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31).
2122 	 */
2123 	for (i = 0; i < IEEE80211_WEP_NKID; i++) {
2124 		wk = &ic->ic_crypto.cs_nw_keys[i];
2125 		ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE +
2126 		    RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE);
2127 	}
2128 
2129 	/*
2130 	 * Allocate xfer for AMRR statistics requests.
2131 	 */
2132 	struct usbd_pipe *pipe0 = usbd_get_pipe0(sc->sc_udev);
2133 	error = usbd_create_xfer(pipe0, sizeof(sc->sta), 0, 0, &sc->amrr_xfer);
2134 	if (error) {
2135 		printf("%s: could not allocate AMRR xfer\n",
2136 		    device_xname(sc->sc_dev));
2137 		goto fail;
2138 	}
2139 
2140 	/*
2141 	 * Open Tx and Rx USB bulk pipes.
2142 	 */
2143 	error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE,
2144 	    &sc->sc_tx_pipeh);
2145 	if (error != 0) {
2146 		printf("%s: could not open Tx pipe: %s\n",
2147 		    device_xname(sc->sc_dev), usbd_errstr(error));
2148 		goto fail;
2149 	}
2150 
2151 	error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE,
2152 	    &sc->sc_rx_pipeh);
2153 	if (error != 0) {
2154 		printf("%s: could not open Rx pipe: %s\n",
2155 		    device_xname(sc->sc_dev), usbd_errstr(error));
2156 		goto fail;
2157 	}
2158 
2159 	/*
2160 	 * Allocate Tx and Rx xfer queues.
2161 	 */
2162 	error = ural_alloc_tx_list(sc);
2163 	if (error != 0) {
2164 		printf("%s: could not allocate Tx list\n",
2165 		    device_xname(sc->sc_dev));
2166 		goto fail;
2167 	}
2168 
2169 	error = ural_alloc_rx_list(sc);
2170 	if (error != 0) {
2171 		printf("%s: could not allocate Rx list\n",
2172 		    device_xname(sc->sc_dev));
2173 		goto fail;
2174 	}
2175 
2176 	/*
2177 	 * Start up the receive pipe.
2178 	 */
2179 	for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
2180 		struct ural_rx_data *data = &sc->rx_data[i];
2181 
2182 		usbd_setup_xfer(data->xfer, data, data->buf, MCLBYTES,
2183 		    USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
2184 		usbd_transfer(data->xfer);
2185 	}
2186 
2187 	/* kick Rx */
2188 	tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR;
2189 	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2190 		tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR;
2191 		if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2192 			tmp |= RAL_DROP_TODS;
2193 		if (!(ifp->if_flags & IFF_PROMISC))
2194 			tmp |= RAL_DROP_NOT_TO_ME;
2195 	}
2196 	ural_write(sc, RAL_TXRX_CSR2, tmp);
2197 
2198 	ifp->if_flags &= ~IFF_OACTIVE;
2199 	ifp->if_flags |= IFF_RUNNING;
2200 
2201 	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2202 		if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
2203 			ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2204 	} else
2205 		ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2206 
2207 	return 0;
2208 
2209 fail:	ural_stop(ifp, 1);
2210 	return error;
2211 }
2212 
2213 Static void
2214 ural_stop(struct ifnet *ifp, int disable)
2215 {
2216 	struct ural_softc *sc = ifp->if_softc;
2217 	struct ieee80211com *ic = &sc->sc_ic;
2218 
2219 	ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2220 
2221 	sc->sc_tx_timer = 0;
2222 	ifp->if_timer = 0;
2223 	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2224 
2225 	/* disable Rx */
2226 	ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2227 
2228 	/* reset ASIC and BBP (but won't reset MAC registers!) */
2229 	ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2230 	ural_write(sc, RAL_MAC_CSR1, 0);
2231 
2232 	if (sc->amrr_xfer != NULL) {
2233 		usbd_destroy_xfer(sc->amrr_xfer);
2234 		sc->amrr_xfer = NULL;
2235 	}
2236 
2237 	if (sc->sc_rx_pipeh != NULL) {
2238 		usbd_abort_pipe(sc->sc_rx_pipeh);
2239 	}
2240 
2241 	if (sc->sc_tx_pipeh != NULL) {
2242 		usbd_abort_pipe(sc->sc_tx_pipeh);
2243 	}
2244 
2245 	ural_free_rx_list(sc);
2246 	ural_free_tx_list(sc);
2247 
2248 	if (sc->sc_rx_pipeh != NULL) {
2249 		usbd_close_pipe(sc->sc_rx_pipeh);
2250 		sc->sc_rx_pipeh = NULL;
2251 	}
2252 
2253 	if (sc->sc_tx_pipeh != NULL) {
2254 		usbd_close_pipe(sc->sc_tx_pipeh);
2255 		sc->sc_tx_pipeh = NULL;
2256 	}
2257 }
2258 
2259 int
2260 ural_activate(device_t self, enum devact act)
2261 {
2262 	struct ural_softc *sc = device_private(self);
2263 
2264 	switch (act) {
2265 	case DVACT_DEACTIVATE:
2266 		if_deactivate(&sc->sc_if);
2267 		return 0;
2268 	default:
2269 		return EOPNOTSUPP;
2270 	}
2271 }
2272 
2273 Static void
2274 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni)
2275 {
2276 	int i;
2277 
2278 	/* clear statistic registers (STA_CSR0 to STA_CSR10) */
2279 	ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta));
2280 
2281 	ieee80211_amrr_node_init(&sc->amrr, &sc->amn);
2282 
2283 	/* set rate to some reasonable initial value */
2284 	for (i = ni->ni_rates.rs_nrates - 1;
2285 	     i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72;
2286 	     i--);
2287 	ni->ni_txrate = i;
2288 
2289 	callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc);
2290 }
2291 
2292 Static void
2293 ural_amrr_timeout(void *arg)
2294 {
2295 	struct ural_softc *sc = (struct ural_softc *)arg;
2296 	usb_device_request_t req;
2297 	int s;
2298 
2299 	s = splusb();
2300 
2301 	/*
2302 	 * Asynchronously read statistic registers (cleared by read).
2303 	 */
2304 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
2305 	req.bRequest = RAL_READ_MULTI_MAC;
2306 	USETW(req.wValue, 0);
2307 	USETW(req.wIndex, RAL_STA_CSR0);
2308 	USETW(req.wLength, sizeof(sc->sta));
2309 
2310 	usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc,
2311 	    USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof(sc->sta), 0,
2312 	    ural_amrr_update);
2313 	(void)usbd_transfer(sc->amrr_xfer);
2314 
2315 	splx(s);
2316 }
2317 
2318 Static void
2319 ural_amrr_update(struct usbd_xfer *xfer, void * priv,
2320     usbd_status status)
2321 {
2322 	struct ural_softc *sc = (struct ural_softc *)priv;
2323 	struct ifnet *ifp = sc->sc_ic.ic_ifp;
2324 
2325 	if (status != USBD_NORMAL_COMPLETION) {
2326 		printf("%s: could not retrieve Tx statistics - "
2327 		    "cancelling automatic rate control\n",
2328 		    device_xname(sc->sc_dev));
2329 		return;
2330 	}
2331 
2332 	/* count TX retry-fail as Tx errors */
2333 	ifp->if_oerrors += sc->sta[9];
2334 
2335 	sc->amn.amn_retrycnt =
2336 	    sc->sta[7] +	/* TX one-retry ok count */
2337 	    sc->sta[8] +	/* TX more-retry ok count */
2338 	    sc->sta[9];		/* TX retry-fail count */
2339 
2340 	sc->amn.amn_txcnt =
2341 	    sc->amn.amn_retrycnt +
2342 	    sc->sta[6];		/* TX no-retry ok count */
2343 
2344 	ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn);
2345 
2346 	callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc);
2347 }
2348