1 /* $NetBSD: if_mue.c,v 1.60 2020/06/27 13:33:26 jmcneill Exp $ */ 2 /* $OpenBSD: if_mue.c,v 1.3 2018/08/04 16:42:46 jsg Exp $ */ 3 4 /* 5 * Copyright (c) 2018 Kevin Lo <kevlo@openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /* Driver for Microchip LAN7500/LAN7800 chipsets. */ 21 22 #include <sys/cdefs.h> 23 __KERNEL_RCSID(0, "$NetBSD: if_mue.c,v 1.60 2020/06/27 13:33:26 jmcneill Exp $"); 24 25 #ifdef _KERNEL_OPT 26 #include "opt_usb.h" 27 #include "opt_inet.h" 28 #endif 29 30 #include <sys/param.h> 31 32 #include <dev/usb/usbnet.h> 33 34 #include <dev/usb/if_muereg.h> 35 #include <dev/usb/if_muevar.h> 36 37 #define MUE_PRINTF(un, fmt, args...) \ 38 device_printf((un)->un_dev, "%s: " fmt, __func__, ##args); 39 40 #ifdef USB_DEBUG 41 int muedebug = 0; 42 #define DPRINTF(un, fmt, args...) \ 43 do { \ 44 if (muedebug) \ 45 MUE_PRINTF(un, fmt, ##args); \ 46 } while (0 /* CONSTCOND */) 47 #else 48 #define DPRINTF(un, fmt, args...) __nothing 49 #endif 50 51 /* 52 * Various supported device vendors/products. 53 */ 54 struct mue_type { 55 struct usb_devno mue_dev; 56 uint16_t mue_flags; 57 #define LAN7500 0x0001 /* LAN7500 */ 58 #define LAN7800 0x0002 /* LAN7800 */ 59 #define LAN7801 0x0004 /* LAN7801 */ 60 #define LAN7850 0x0008 /* LAN7850 */ 61 }; 62 63 static const struct mue_type mue_devs[] = { 64 { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7500 }, LAN7500 }, 65 { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7505 }, LAN7500 }, 66 { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7800 }, LAN7800 }, 67 { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7801 }, LAN7801 }, 68 { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7850 }, LAN7850 } 69 }; 70 71 #define MUE_LOOKUP(uaa) ((const struct mue_type *)usb_lookup(mue_devs, \ 72 uaa->uaa_vendor, uaa->uaa_product)) 73 74 #define MUE_ENADDR_LO(enaddr) \ 75 ((enaddr[3] << 24) | (enaddr[2] << 16) | (enaddr[1] << 8) | enaddr[0]) 76 #define MUE_ENADDR_HI(enaddr) \ 77 ((enaddr[5] << 8) | enaddr[4]) 78 79 static int mue_match(device_t, cfdata_t, void *); 80 static void mue_attach(device_t, device_t, void *); 81 82 static uint32_t mue_csr_read(struct usbnet *, uint32_t); 83 static int mue_csr_write(struct usbnet *, uint32_t, uint32_t); 84 static int mue_wait_for_bits(struct usbnet *, uint32_t, uint32_t, 85 uint32_t, uint32_t); 86 static uint8_t mue_eeprom_getbyte(struct usbnet *, int, uint8_t *); 87 static bool mue_eeprom_present(struct usbnet *); 88 static void mue_dataport_write(struct usbnet *, uint32_t, uint32_t, 89 uint32_t, uint32_t *); 90 static void mue_init_ltm(struct usbnet *); 91 static int mue_chip_init(struct usbnet *); 92 static void mue_set_macaddr(struct usbnet *); 93 static int mue_get_macaddr(struct usbnet *, prop_dictionary_t); 94 static int mue_prepare_tso(struct usbnet *, struct mbuf *); 95 static void mue_setiff_locked(struct usbnet *); 96 static void mue_sethwcsum_locked(struct usbnet *); 97 static void mue_setmtu_locked(struct usbnet *); 98 static void mue_reset(struct usbnet *); 99 100 static void mue_uno_stop(struct ifnet *, int); 101 static int mue_uno_ioctl(struct ifnet *, u_long, void *); 102 static int mue_uno_mii_read_reg(struct usbnet *, int, int, uint16_t *); 103 static int mue_uno_mii_write_reg(struct usbnet *, int, int, uint16_t); 104 static void mue_uno_mii_statchg(struct ifnet *); 105 static void mue_uno_rx_loop(struct usbnet *, struct usbnet_chain *, 106 uint32_t); 107 static unsigned mue_uno_tx_prepare(struct usbnet *, struct mbuf *, 108 struct usbnet_chain *); 109 static int mue_uno_init(struct ifnet *); 110 111 static const struct usbnet_ops mue_ops = { 112 .uno_stop = mue_uno_stop, 113 .uno_ioctl = mue_uno_ioctl, 114 .uno_read_reg = mue_uno_mii_read_reg, 115 .uno_write_reg = mue_uno_mii_write_reg, 116 .uno_statchg = mue_uno_mii_statchg, 117 .uno_tx_prepare = mue_uno_tx_prepare, 118 .uno_rx_loop = mue_uno_rx_loop, 119 .uno_init = mue_uno_init, 120 }; 121 122 #define MUE_SETBIT(un, reg, x) \ 123 mue_csr_write(un, reg, mue_csr_read(un, reg) | (x)) 124 125 #define MUE_CLRBIT(un, reg, x) \ 126 mue_csr_write(un, reg, mue_csr_read(un, reg) & ~(x)) 127 128 #define MUE_WAIT_SET(un, reg, set, fail) \ 129 mue_wait_for_bits(un, reg, set, ~0, fail) 130 131 #define MUE_WAIT_CLR(un, reg, clear, fail) \ 132 mue_wait_for_bits(un, reg, 0, clear, fail) 133 134 #define ETHER_IS_VALID(addr) \ 135 (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr)) 136 137 #define ETHER_IS_ZERO(addr) \ 138 (!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5])) 139 140 CFATTACH_DECL_NEW(mue, sizeof(struct usbnet), mue_match, mue_attach, 141 usbnet_detach, usbnet_activate); 142 143 static uint32_t 144 mue_csr_read(struct usbnet *un, uint32_t reg) 145 { 146 usb_device_request_t req; 147 usbd_status err; 148 uDWord val; 149 150 if (usbnet_isdying(un)) 151 return 0; 152 153 USETDW(val, 0); 154 req.bmRequestType = UT_READ_VENDOR_DEVICE; 155 req.bRequest = MUE_UR_READREG; 156 USETW(req.wValue, 0); 157 USETW(req.wIndex, reg); 158 USETW(req.wLength, 4); 159 160 err = usbd_do_request(un->un_udev, &req, &val); 161 if (err) { 162 MUE_PRINTF(un, "reg = %#x: %s\n", reg, usbd_errstr(err)); 163 return 0; 164 } 165 166 return UGETDW(val); 167 } 168 169 static int 170 mue_csr_write(struct usbnet *un, uint32_t reg, uint32_t aval) 171 { 172 usb_device_request_t req; 173 usbd_status err; 174 uDWord val; 175 176 if (usbnet_isdying(un)) 177 return 0; 178 179 USETDW(val, aval); 180 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 181 req.bRequest = MUE_UR_WRITEREG; 182 USETW(req.wValue, 0); 183 USETW(req.wIndex, reg); 184 USETW(req.wLength, 4); 185 186 err = usbd_do_request(un->un_udev, &req, &val); 187 if (err) { 188 MUE_PRINTF(un, "reg = %#x: %s\n", reg, usbd_errstr(err)); 189 return -1; 190 } 191 192 return 0; 193 } 194 195 static int 196 mue_wait_for_bits(struct usbnet *un, uint32_t reg, 197 uint32_t set, uint32_t clear, uint32_t fail) 198 { 199 uint32_t val; 200 int ntries; 201 202 for (ntries = 0; ntries < 1000; ntries++) { 203 val = mue_csr_read(un, reg); 204 if ((val & set) || !(val & clear)) 205 return 0; 206 if (val & fail) 207 return 1; 208 usbd_delay_ms(un->un_udev, 1); 209 } 210 211 return 1; 212 } 213 214 static int 215 mue_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val) 216 { 217 uint32_t data; 218 219 if (un->un_phyno != phy) 220 return EINVAL; 221 222 if (MUE_WAIT_CLR(un, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) { 223 MUE_PRINTF(un, "not ready\n"); 224 return EBUSY; 225 } 226 227 mue_csr_write(un, MUE_MII_ACCESS, MUE_MII_ACCESS_READ | 228 MUE_MII_ACCESS_BUSY | MUE_MII_ACCESS_REGADDR(reg) | 229 MUE_MII_ACCESS_PHYADDR(phy)); 230 231 if (MUE_WAIT_CLR(un, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) { 232 MUE_PRINTF(un, "timed out\n"); 233 return ETIMEDOUT; 234 } 235 236 data = mue_csr_read(un, MUE_MII_DATA); 237 *val = data & 0xffff; 238 239 return 0; 240 } 241 242 static int 243 mue_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val) 244 { 245 246 if (un->un_phyno != phy) 247 return EINVAL; 248 249 if (MUE_WAIT_CLR(un, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) { 250 MUE_PRINTF(un, "not ready\n"); 251 return EBUSY; 252 } 253 254 mue_csr_write(un, MUE_MII_DATA, val); 255 mue_csr_write(un, MUE_MII_ACCESS, MUE_MII_ACCESS_WRITE | 256 MUE_MII_ACCESS_BUSY | MUE_MII_ACCESS_REGADDR(reg) | 257 MUE_MII_ACCESS_PHYADDR(phy)); 258 259 if (MUE_WAIT_CLR(un, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) { 260 MUE_PRINTF(un, "timed out\n"); 261 return ETIMEDOUT; 262 } 263 264 return 0; 265 } 266 267 static void 268 mue_uno_mii_statchg(struct ifnet *ifp) 269 { 270 struct usbnet * const un = ifp->if_softc; 271 struct mii_data * const mii = usbnet_mii(un); 272 uint32_t flow, threshold; 273 274 if (usbnet_isdying(un)) 275 return; 276 277 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 278 (IFM_ACTIVE | IFM_AVALID)) { 279 switch (IFM_SUBTYPE(mii->mii_media_active)) { 280 case IFM_10_T: 281 case IFM_100_TX: 282 case IFM_1000_T: 283 usbnet_set_link(un, true); 284 break; 285 default: 286 break; 287 } 288 } 289 290 /* Lost link, do nothing. */ 291 if (!usbnet_havelink(un)) { 292 DPRINTF(un, "mii_media_status = %#x\n", mii->mii_media_status); 293 return; 294 } 295 296 if (!(un->un_flags & LAN7500)) { 297 if (un->un_udev->ud_speed == USB_SPEED_SUPER) { 298 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) { 299 /* Disable U2 and enable U1. */ 300 MUE_CLRBIT(un, MUE_USB_CFG1, 301 MUE_USB_CFG1_DEV_U2_INIT_EN); 302 MUE_SETBIT(un, MUE_USB_CFG1, 303 MUE_USB_CFG1_DEV_U1_INIT_EN); 304 } else { 305 /* Enable U1 and U2. */ 306 MUE_SETBIT(un, MUE_USB_CFG1, 307 MUE_USB_CFG1_DEV_U1_INIT_EN | 308 MUE_USB_CFG1_DEV_U2_INIT_EN); 309 } 310 } 311 } 312 313 flow = 0; 314 /* XXX Linux does not check IFM_FDX flag for 7800. */ 315 if (IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) { 316 if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) 317 flow |= MUE_FLOW_TX_FCEN | MUE_FLOW_PAUSE_TIME; 318 if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) 319 flow |= MUE_FLOW_RX_FCEN; 320 } 321 322 /* XXX Magic numbers taken from Linux driver. */ 323 if (un->un_flags & LAN7500) 324 threshold = 0x820; 325 else 326 switch (un->un_udev->ud_speed) { 327 case USB_SPEED_SUPER: 328 threshold = 0x817; 329 break; 330 case USB_SPEED_HIGH: 331 threshold = 0x211; 332 break; 333 default: 334 threshold = 0; 335 break; 336 } 337 338 /* Threshold value should be set before enabling flow. */ 339 mue_csr_write(un, (un->un_flags & LAN7500) ? 340 MUE_7500_FCT_FLOW : MUE_7800_FCT_FLOW, threshold); 341 mue_csr_write(un, MUE_FLOW, flow); 342 343 DPRINTF(un, "done\n"); 344 } 345 346 static uint8_t 347 mue_eeprom_getbyte(struct usbnet *un, int off, uint8_t *dest) 348 { 349 uint32_t val; 350 351 if (MUE_WAIT_CLR(un, MUE_E2P_CMD, MUE_E2P_CMD_BUSY, 0)) { 352 MUE_PRINTF(un, "not ready\n"); 353 return ETIMEDOUT; 354 } 355 356 KASSERT((off & ~MUE_E2P_CMD_ADDR_MASK) == 0); 357 mue_csr_write(un, MUE_E2P_CMD, MUE_E2P_CMD_READ | MUE_E2P_CMD_BUSY | 358 off); 359 360 if (MUE_WAIT_CLR(un, MUE_E2P_CMD, MUE_E2P_CMD_BUSY, 361 MUE_E2P_CMD_TIMEOUT)) { 362 MUE_PRINTF(un, "timed out\n"); 363 return ETIMEDOUT; 364 } 365 366 val = mue_csr_read(un, MUE_E2P_DATA); 367 *dest = val & 0xff; 368 369 return 0; 370 } 371 372 static int 373 mue_read_eeprom(struct usbnet *un, uint8_t *dest, int off, int cnt) 374 { 375 uint32_t val = 0; /* XXX gcc */ 376 uint8_t byte; 377 int i, err = 0; 378 379 /* 380 * EEPROM pins are muxed with the LED function on LAN7800 device. 381 */ 382 if (un->un_flags & LAN7800) { 383 val = mue_csr_read(un, MUE_HW_CFG); 384 mue_csr_write(un, MUE_HW_CFG, 385 val & ~(MUE_HW_CFG_LED0_EN | MUE_HW_CFG_LED1_EN)); 386 } 387 388 for (i = 0; i < cnt; i++) { 389 err = mue_eeprom_getbyte(un, off + i, &byte); 390 if (err) 391 break; 392 *(dest + i) = byte; 393 } 394 395 if (un->un_flags & LAN7800) 396 mue_csr_write(un, MUE_HW_CFG, val); 397 398 return err ? 1 : 0; 399 } 400 401 static bool 402 mue_eeprom_present(struct usbnet *un) 403 { 404 uint32_t val; 405 uint8_t sig; 406 int ret; 407 408 if (un->un_flags & LAN7500) { 409 val = mue_csr_read(un, MUE_E2P_CMD); 410 return val & MUE_E2P_CMD_LOADED; 411 } else { 412 ret = mue_read_eeprom(un, &sig, MUE_E2P_IND_OFFSET, 1); 413 return (ret == 0) && (sig == MUE_E2P_IND); 414 } 415 } 416 417 static int 418 mue_read_otp_raw(struct usbnet *un, uint8_t *dest, int off, int cnt) 419 { 420 uint32_t val; 421 int i, err; 422 423 val = mue_csr_read(un, MUE_OTP_PWR_DN); 424 425 /* Checking if bit is set. */ 426 if (val & MUE_OTP_PWR_DN_PWRDN_N) { 427 /* Clear it, then wait for it to be cleared. */ 428 mue_csr_write(un, MUE_OTP_PWR_DN, 0); 429 err = MUE_WAIT_CLR(un, MUE_OTP_PWR_DN, MUE_OTP_PWR_DN_PWRDN_N, 430 0); 431 if (err) { 432 MUE_PRINTF(un, "not ready\n"); 433 return 1; 434 } 435 } 436 437 /* Start reading the bytes, one at a time. */ 438 for (i = 0; i < cnt; i++) { 439 mue_csr_write(un, MUE_OTP_ADDR1, 440 ((off + i) >> 8) & MUE_OTP_ADDR1_MASK); 441 mue_csr_write(un, MUE_OTP_ADDR2, 442 ((off + i) & MUE_OTP_ADDR2_MASK)); 443 mue_csr_write(un, MUE_OTP_FUNC_CMD, MUE_OTP_FUNC_CMD_READ); 444 mue_csr_write(un, MUE_OTP_CMD_GO, MUE_OTP_CMD_GO_GO); 445 446 err = MUE_WAIT_CLR(un, MUE_OTP_STATUS, MUE_OTP_STATUS_BUSY, 0); 447 if (err) { 448 MUE_PRINTF(un, "timed out\n"); 449 return 1; 450 } 451 val = mue_csr_read(un, MUE_OTP_RD_DATA); 452 *(dest + i) = (uint8_t)(val & 0xff); 453 } 454 455 return 0; 456 } 457 458 static int 459 mue_read_otp(struct usbnet *un, uint8_t *dest, int off, int cnt) 460 { 461 uint8_t sig; 462 int err; 463 464 if (un->un_flags & LAN7500) 465 return 1; 466 467 err = mue_read_otp_raw(un, &sig, MUE_OTP_IND_OFFSET, 1); 468 if (err) 469 return 1; 470 switch (sig) { 471 case MUE_OTP_IND_1: 472 break; 473 case MUE_OTP_IND_2: 474 off += 0x100; 475 break; 476 default: 477 DPRINTF(un, "OTP not found\n"); 478 return 1; 479 } 480 err = mue_read_otp_raw(un, dest, off, cnt); 481 return err; 482 } 483 484 static void 485 mue_dataport_write(struct usbnet *un, uint32_t sel, uint32_t addr, 486 uint32_t cnt, uint32_t *data) 487 { 488 uint32_t i; 489 490 if (MUE_WAIT_SET(un, MUE_DP_SEL, MUE_DP_SEL_DPRDY, 0)) { 491 MUE_PRINTF(un, "not ready\n"); 492 return; 493 } 494 495 mue_csr_write(un, MUE_DP_SEL, 496 (mue_csr_read(un, MUE_DP_SEL) & ~MUE_DP_SEL_RSEL_MASK) | sel); 497 498 for (i = 0; i < cnt; i++) { 499 mue_csr_write(un, MUE_DP_ADDR, addr + i); 500 mue_csr_write(un, MUE_DP_DATA, data[i]); 501 mue_csr_write(un, MUE_DP_CMD, MUE_DP_CMD_WRITE); 502 if (MUE_WAIT_SET(un, MUE_DP_SEL, MUE_DP_SEL_DPRDY, 0)) { 503 MUE_PRINTF(un, "timed out\n"); 504 return; 505 } 506 } 507 } 508 509 static void 510 mue_init_ltm(struct usbnet *un) 511 { 512 uint32_t idx[MUE_NUM_LTM_INDEX] = { 0, 0, 0, 0, 0, 0 }; 513 uint8_t temp[2]; 514 size_t i; 515 516 if (mue_csr_read(un, MUE_USB_CFG1) & MUE_USB_CFG1_LTM_ENABLE) { 517 if (mue_eeprom_present(un) && 518 (mue_read_eeprom(un, temp, MUE_E2P_LTM_OFFSET, 2) == 0)) { 519 if (temp[0] != sizeof(idx)) { 520 DPRINTF(un, "EEPROM: unexpected size\n"); 521 goto done; 522 } 523 if (mue_read_eeprom(un, (uint8_t *)idx, temp[1] << 1, 524 sizeof(idx))) { 525 DPRINTF(un, "EEPROM: failed to read\n"); 526 goto done; 527 } 528 DPRINTF(un, "success\n"); 529 } else if (mue_read_otp(un, temp, MUE_E2P_LTM_OFFSET, 2) == 0) { 530 if (temp[0] != sizeof(idx)) { 531 DPRINTF(un, "OTP: unexpected size\n"); 532 goto done; 533 } 534 if (mue_read_otp(un, (uint8_t *)idx, temp[1] << 1, 535 sizeof(idx))) { 536 DPRINTF(un, "OTP: failed to read\n"); 537 goto done; 538 } 539 DPRINTF(un, "success\n"); 540 } else 541 DPRINTF(un, "nothing to do\n"); 542 } else 543 DPRINTF(un, "nothing to do\n"); 544 done: 545 for (i = 0; i < __arraycount(idx); i++) 546 mue_csr_write(un, MUE_LTM_INDEX(i), idx[i]); 547 } 548 549 static int 550 mue_chip_init(struct usbnet *un) 551 { 552 uint32_t val; 553 554 if ((un->un_flags & LAN7500) && 555 MUE_WAIT_SET(un, MUE_PMT_CTL, MUE_PMT_CTL_READY, 0)) { 556 MUE_PRINTF(un, "not ready\n"); 557 return ETIMEDOUT; 558 } 559 560 MUE_SETBIT(un, MUE_HW_CFG, MUE_HW_CFG_LRST); 561 if (MUE_WAIT_CLR(un, MUE_HW_CFG, MUE_HW_CFG_LRST, 0)) { 562 MUE_PRINTF(un, "timed out\n"); 563 return ETIMEDOUT; 564 } 565 566 /* Respond to the IN token with a NAK. */ 567 if (un->un_flags & LAN7500) 568 MUE_SETBIT(un, MUE_HW_CFG, MUE_HW_CFG_BIR); 569 else 570 MUE_SETBIT(un, MUE_USB_CFG0, MUE_USB_CFG0_BIR); 571 572 if (un->un_flags & LAN7500) { 573 if (un->un_udev->ud_speed == USB_SPEED_HIGH) 574 val = MUE_7500_HS_RX_BUFSIZE / 575 MUE_HS_USB_PKT_SIZE; 576 else 577 val = MUE_7500_FS_RX_BUFSIZE / 578 MUE_FS_USB_PKT_SIZE; 579 mue_csr_write(un, MUE_7500_BURST_CAP, val); 580 mue_csr_write(un, MUE_7500_BULKIN_DELAY, 581 MUE_7500_DEFAULT_BULKIN_DELAY); 582 583 MUE_SETBIT(un, MUE_HW_CFG, MUE_HW_CFG_BCE | MUE_HW_CFG_MEF); 584 585 /* Set FIFO sizes. */ 586 val = (MUE_7500_MAX_RX_FIFO_SIZE - 512) / 512; 587 mue_csr_write(un, MUE_7500_FCT_RX_FIFO_END, val); 588 val = (MUE_7500_MAX_TX_FIFO_SIZE - 512) / 512; 589 mue_csr_write(un, MUE_7500_FCT_TX_FIFO_END, val); 590 } else { 591 /* Init LTM. */ 592 mue_init_ltm(un); 593 594 val = MUE_7800_RX_BUFSIZE; 595 switch (un->un_udev->ud_speed) { 596 case USB_SPEED_SUPER: 597 val /= MUE_SS_USB_PKT_SIZE; 598 break; 599 case USB_SPEED_HIGH: 600 val /= MUE_HS_USB_PKT_SIZE; 601 break; 602 default: 603 val /= MUE_FS_USB_PKT_SIZE; 604 break; 605 } 606 mue_csr_write(un, MUE_7800_BURST_CAP, val); 607 mue_csr_write(un, MUE_7800_BULKIN_DELAY, 608 MUE_7800_DEFAULT_BULKIN_DELAY); 609 610 MUE_SETBIT(un, MUE_HW_CFG, MUE_HW_CFG_MEF); 611 MUE_SETBIT(un, MUE_USB_CFG0, MUE_USB_CFG0_BCE); 612 613 /* 614 * Set FCL's RX and TX FIFO sizes: according to data sheet this 615 * is already the default value. But we initialize it to the 616 * same value anyways, as that's what the Linux driver does. 617 */ 618 val = (MUE_7800_MAX_RX_FIFO_SIZE - 512) / 512; 619 mue_csr_write(un, MUE_7800_FCT_RX_FIFO_END, val); 620 val = (MUE_7800_MAX_TX_FIFO_SIZE - 512) / 512; 621 mue_csr_write(un, MUE_7800_FCT_TX_FIFO_END, val); 622 } 623 624 /* Enabling interrupts. */ 625 mue_csr_write(un, MUE_INT_STATUS, ~0); 626 627 mue_csr_write(un, (un->un_flags & LAN7500) ? 628 MUE_7500_FCT_FLOW : MUE_7800_FCT_FLOW, 0); 629 mue_csr_write(un, MUE_FLOW, 0); 630 631 /* Reset PHY. */ 632 MUE_SETBIT(un, MUE_PMT_CTL, MUE_PMT_CTL_PHY_RST); 633 if (MUE_WAIT_CLR(un, MUE_PMT_CTL, MUE_PMT_CTL_PHY_RST, 0)) { 634 MUE_PRINTF(un, "PHY not ready\n"); 635 return ETIMEDOUT; 636 } 637 638 /* LAN7801 only has RGMII mode. */ 639 if (un->un_flags & LAN7801) 640 MUE_CLRBIT(un, MUE_MAC_CR, MUE_MAC_CR_GMII_EN); 641 642 if ((un->un_flags & (LAN7500 | LAN7800)) || 643 !mue_eeprom_present(un)) { 644 /* Allow MAC to detect speed and duplex from PHY. */ 645 MUE_SETBIT(un, MUE_MAC_CR, MUE_MAC_CR_AUTO_SPEED | 646 MUE_MAC_CR_AUTO_DUPLEX); 647 } 648 649 MUE_SETBIT(un, MUE_MAC_TX, MUE_MAC_TX_TXEN); 650 MUE_SETBIT(un, (un->un_flags & LAN7500) ? 651 MUE_7500_FCT_TX_CTL : MUE_7800_FCT_TX_CTL, MUE_FCT_TX_CTL_EN); 652 653 MUE_SETBIT(un, (un->un_flags & LAN7500) ? 654 MUE_7500_FCT_RX_CTL : MUE_7800_FCT_RX_CTL, MUE_FCT_RX_CTL_EN); 655 656 /* Set default GPIO/LED settings only if no EEPROM is detected. */ 657 if ((un->un_flags & LAN7500) && !mue_eeprom_present(un)) { 658 MUE_CLRBIT(un, MUE_LED_CFG, MUE_LED_CFG_LED10_FUN_SEL); 659 MUE_SETBIT(un, MUE_LED_CFG, 660 MUE_LED_CFG_LEDGPIO_EN | MUE_LED_CFG_LED2_FUN_SEL); 661 } 662 663 /* XXX We assume two LEDs at least when EEPROM is missing. */ 664 if (un->un_flags & LAN7800 && 665 !mue_eeprom_present(un)) 666 MUE_SETBIT(un, MUE_HW_CFG, 667 MUE_HW_CFG_LED0_EN | MUE_HW_CFG_LED1_EN); 668 669 return 0; 670 } 671 672 static void 673 mue_set_macaddr(struct usbnet *un) 674 { 675 struct ifnet * const ifp = usbnet_ifp(un); 676 const uint8_t *enaddr = CLLADDR(ifp->if_sadl); 677 uint32_t lo, hi; 678 679 lo = MUE_ENADDR_LO(enaddr); 680 hi = MUE_ENADDR_HI(enaddr); 681 682 mue_csr_write(un, MUE_RX_ADDRL, lo); 683 mue_csr_write(un, MUE_RX_ADDRH, hi); 684 } 685 686 static int 687 mue_get_macaddr(struct usbnet *un, prop_dictionary_t dict) 688 { 689 prop_data_t eaprop; 690 uint32_t low, high; 691 692 if (!(un->un_flags & LAN7500)) { 693 low = mue_csr_read(un, MUE_RX_ADDRL); 694 high = mue_csr_read(un, MUE_RX_ADDRH); 695 un->un_eaddr[5] = (uint8_t)((high >> 8) & 0xff); 696 un->un_eaddr[4] = (uint8_t)((high) & 0xff); 697 un->un_eaddr[3] = (uint8_t)((low >> 24) & 0xff); 698 un->un_eaddr[2] = (uint8_t)((low >> 16) & 0xff); 699 un->un_eaddr[1] = (uint8_t)((low >> 8) & 0xff); 700 un->un_eaddr[0] = (uint8_t)((low) & 0xff); 701 if (ETHER_IS_VALID(un->un_eaddr)) 702 return 0; 703 else 704 DPRINTF(un, "registers: %s\n", 705 ether_sprintf(un->un_eaddr)); 706 } 707 708 if (mue_eeprom_present(un) && !mue_read_eeprom(un, un->un_eaddr, 709 MUE_E2P_MAC_OFFSET, ETHER_ADDR_LEN)) { 710 if (ETHER_IS_VALID(un->un_eaddr)) 711 return 0; 712 else 713 DPRINTF(un, "EEPROM: %s\n", 714 ether_sprintf(un->un_eaddr)); 715 } 716 717 if (mue_read_otp(un, un->un_eaddr, MUE_OTP_MAC_OFFSET, 718 ETHER_ADDR_LEN) == 0) { 719 if (ETHER_IS_VALID(un->un_eaddr)) 720 return 0; 721 else 722 DPRINTF(un, "OTP: %s\n", 723 ether_sprintf(un->un_eaddr)); 724 } 725 726 /* 727 * Other MD methods. This should be tried only if other methods fail. 728 * Otherwise, MAC address for internal device can be assinged to 729 * external devices on Raspberry Pi, for example. 730 */ 731 eaprop = prop_dictionary_get(dict, "mac-address"); 732 if (eaprop != NULL) { 733 KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA); 734 KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN); 735 memcpy(un->un_eaddr, prop_data_value(eaprop), 736 ETHER_ADDR_LEN); 737 if (ETHER_IS_VALID(un->un_eaddr)) 738 return 0; 739 else 740 DPRINTF(un, "prop_dictionary_get: %s\n", 741 ether_sprintf(un->un_eaddr)); 742 } 743 744 return 1; 745 } 746 747 748 /* 749 * Probe for a Microchip chip. 750 */ 751 static int 752 mue_match(device_t parent, cfdata_t match, void *aux) 753 { 754 struct usb_attach_arg *uaa = aux; 755 756 return (MUE_LOOKUP(uaa) != NULL) ? UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 757 } 758 759 static void 760 mue_attach(device_t parent, device_t self, void *aux) 761 { 762 USBNET_MII_DECL_DEFAULT(unm); 763 struct usbnet * const un = device_private(self); 764 prop_dictionary_t dict = device_properties(self); 765 struct usb_attach_arg *uaa = aux; 766 struct usbd_device *dev = uaa->uaa_device; 767 usb_interface_descriptor_t *id; 768 usb_endpoint_descriptor_t *ed; 769 char *devinfop; 770 usbd_status err; 771 const char *descr; 772 uint32_t id_rev; 773 uint8_t i; 774 unsigned rx_list_cnt, tx_list_cnt; 775 unsigned rx_bufsz; 776 777 aprint_naive("\n"); 778 aprint_normal("\n"); 779 devinfop = usbd_devinfo_alloc(dev, 0); 780 aprint_normal_dev(self, "%s\n", devinfop); 781 usbd_devinfo_free(devinfop); 782 783 un->un_dev = self; 784 un->un_udev = dev; 785 un->un_sc = un; 786 un->un_ops = &mue_ops; 787 un->un_rx_xfer_flags = USBD_SHORT_XFER_OK; 788 un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER; 789 790 #define MUE_CONFIG_NO 1 791 err = usbd_set_config_no(dev, MUE_CONFIG_NO, 1); 792 if (err) { 793 aprint_error_dev(self, "failed to set configuration: %s\n", 794 usbd_errstr(err)); 795 return; 796 } 797 798 #define MUE_IFACE_IDX 0 799 err = usbd_device2interface_handle(dev, MUE_IFACE_IDX, &un->un_iface); 800 if (err) { 801 aprint_error_dev(self, "failed to get interface handle: %s\n", 802 usbd_errstr(err)); 803 return; 804 } 805 806 un->un_flags = MUE_LOOKUP(uaa)->mue_flags; 807 808 /* Decide on what our bufsize will be. */ 809 if (un->un_flags & LAN7500) { 810 rx_bufsz = (un->un_udev->ud_speed == USB_SPEED_HIGH) ? 811 MUE_7500_HS_RX_BUFSIZE : MUE_7500_FS_RX_BUFSIZE; 812 rx_list_cnt = 1; 813 tx_list_cnt = 1; 814 } else { 815 rx_bufsz = MUE_7800_RX_BUFSIZE; 816 rx_list_cnt = MUE_RX_LIST_CNT; 817 tx_list_cnt = MUE_TX_LIST_CNT; 818 } 819 820 un->un_rx_list_cnt = rx_list_cnt; 821 un->un_tx_list_cnt = tx_list_cnt; 822 un->un_rx_bufsz = rx_bufsz; 823 un->un_tx_bufsz = MUE_TX_BUFSIZE; 824 825 /* Find endpoints. */ 826 id = usbd_get_interface_descriptor(un->un_iface); 827 for (i = 0; i < id->bNumEndpoints; i++) { 828 ed = usbd_interface2endpoint_descriptor(un->un_iface, i); 829 if (ed == NULL) { 830 aprint_error_dev(self, "failed to get ep %hhd\n", i); 831 return; 832 } 833 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 834 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) { 835 un->un_ed[USBNET_ENDPT_RX] = ed->bEndpointAddress; 836 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 837 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) { 838 un->un_ed[USBNET_ENDPT_TX] = ed->bEndpointAddress; 839 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 840 UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) { 841 un->un_ed[USBNET_ENDPT_INTR] = ed->bEndpointAddress; 842 } 843 } 844 if (un->un_ed[USBNET_ENDPT_RX] == 0 || 845 un->un_ed[USBNET_ENDPT_TX] == 0 || 846 un->un_ed[USBNET_ENDPT_INTR] == 0) { 847 aprint_error_dev(self, "failed to find endpoints\n"); 848 return; 849 } 850 851 /* Set these up now for mue_cmd(). */ 852 usbnet_attach(un, "muedet"); 853 854 un->un_phyno = 1; 855 856 if (mue_chip_init(un)) { 857 aprint_error_dev(self, "failed to initialize chip\n"); 858 return; 859 } 860 861 /* A Microchip chip was detected. Inform the world. */ 862 id_rev = mue_csr_read(un, MUE_ID_REV); 863 descr = (un->un_flags & LAN7500) ? "LAN7500" : "LAN7800"; 864 aprint_normal_dev(self, "%s id %#x rev %#x\n", descr, 865 (unsigned)__SHIFTOUT(id_rev, MUE_ID_REV_ID), 866 (unsigned)__SHIFTOUT(id_rev, MUE_ID_REV_REV)); 867 868 if (mue_get_macaddr(un, dict)) { 869 aprint_error_dev(self, "failed to read MAC address\n"); 870 return; 871 } 872 873 struct ifnet *ifp = usbnet_ifp(un); 874 ifp->if_capabilities = IFCAP_TSOv4 | IFCAP_TSOv6 | 875 IFCAP_CSUM_IPv4_Tx | IFCAP_CSUM_IPv4_Rx | 876 IFCAP_CSUM_TCPv4_Tx | IFCAP_CSUM_TCPv4_Rx | 877 IFCAP_CSUM_UDPv4_Tx | IFCAP_CSUM_UDPv4_Rx | 878 IFCAP_CSUM_TCPv6_Tx | IFCAP_CSUM_TCPv6_Rx | 879 IFCAP_CSUM_UDPv6_Tx | IFCAP_CSUM_UDPv6_Rx; 880 881 struct ethercom *ec = usbnet_ec(un); 882 ec->ec_capabilities = ETHERCAP_VLAN_MTU; 883 #if 0 /* XXX not yet */ 884 ec->ec_capabilities = ETHERCAP_VLAN_MTU | ETHERCAP_JUMBO_MTU; 885 #endif 886 887 usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST, 888 0, &unm); 889 } 890 891 static unsigned 892 mue_uno_tx_prepare(struct usbnet *un, struct mbuf *m, struct usbnet_chain *c) 893 { 894 struct ifnet * const ifp = usbnet_ifp(un); 895 struct mue_txbuf_hdr hdr; 896 uint32_t tx_cmd_a, tx_cmd_b; 897 int csum, len, rv; 898 bool tso, ipe, tpe; 899 900 if ((unsigned)m->m_pkthdr.len > un->un_tx_bufsz - sizeof(hdr)) 901 return 0; 902 903 csum = m->m_pkthdr.csum_flags; 904 tso = csum & (M_CSUM_TSOv4 | M_CSUM_TSOv6); 905 ipe = csum & M_CSUM_IPv4; 906 tpe = csum & (M_CSUM_TCPv4 | M_CSUM_UDPv4 | 907 M_CSUM_TCPv6 | M_CSUM_UDPv6); 908 909 len = m->m_pkthdr.len; 910 if (__predict_false((!tso && len > (int)MUE_FRAME_LEN(ifp->if_mtu)) || 911 ( tso && len > MUE_TSO_FRAME_LEN))) { 912 MUE_PRINTF(un, "packet length %d\n too long", len); 913 return 0; 914 } 915 916 KASSERT((len & ~MUE_TX_CMD_A_LEN_MASK) == 0); 917 tx_cmd_a = len | MUE_TX_CMD_A_FCS; 918 919 if (tso) { 920 tx_cmd_a |= MUE_TX_CMD_A_LSO; 921 if (__predict_true(m->m_pkthdr.segsz > MUE_TX_MSS_MIN)) 922 tx_cmd_b = m->m_pkthdr.segsz; 923 else 924 tx_cmd_b = MUE_TX_MSS_MIN; 925 tx_cmd_b <<= MUE_TX_CMD_B_MSS_SHIFT; 926 KASSERT((tx_cmd_b & ~MUE_TX_CMD_B_MSS_MASK) == 0); 927 rv = mue_prepare_tso(un, m); 928 if (__predict_false(rv)) 929 return 0; 930 } else { 931 if (ipe) 932 tx_cmd_a |= MUE_TX_CMD_A_IPE; 933 if (tpe) 934 tx_cmd_a |= MUE_TX_CMD_A_TPE; 935 tx_cmd_b = 0; 936 } 937 938 hdr.tx_cmd_a = htole32(tx_cmd_a); 939 hdr.tx_cmd_b = htole32(tx_cmd_b); 940 941 memcpy(c->unc_buf, &hdr, sizeof(hdr)); 942 m_copydata(m, 0, len, c->unc_buf + sizeof(hdr)); 943 944 return len + sizeof(hdr); 945 } 946 947 /* 948 * L3 length field should be cleared. 949 */ 950 static int 951 mue_prepare_tso(struct usbnet *un, struct mbuf *m) 952 { 953 struct ether_header *eh; 954 struct ip *ip; 955 struct ip6_hdr *ip6; 956 uint16_t type, len = 0; 957 int off; 958 959 if (__predict_true(m->m_len >= (int)sizeof(*eh))) { 960 eh = mtod(m, struct ether_header *); 961 type = eh->ether_type; 962 } else 963 m_copydata(m, offsetof(struct ether_header, ether_type), 964 sizeof(type), &type); 965 switch (type = htons(type)) { 966 case ETHERTYPE_IP: 967 case ETHERTYPE_IPV6: 968 off = ETHER_HDR_LEN; 969 break; 970 case ETHERTYPE_VLAN: 971 off = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN; 972 break; 973 default: 974 return EINVAL; 975 } 976 977 if (m->m_pkthdr.csum_flags & M_CSUM_TSOv4) { 978 if (__predict_true(m->m_len >= off + (int)sizeof(*ip))) { 979 ip = (void *)(mtod(m, char *) + off); 980 ip->ip_len = 0; 981 } else 982 m_copyback(m, off + offsetof(struct ip, ip_len), 983 sizeof(len), &len); 984 } else { 985 if (__predict_true(m->m_len >= off + (int)sizeof(*ip6))) { 986 ip6 = (void *)(mtod(m, char *) + off); 987 ip6->ip6_plen = 0; 988 } else 989 m_copyback(m, off + offsetof(struct ip6_hdr, ip6_plen), 990 sizeof(len), &len); 991 } 992 return 0; 993 } 994 995 static void 996 mue_setiff_locked(struct usbnet *un) 997 { 998 struct ethercom *ec = usbnet_ec(un); 999 struct ifnet * const ifp = usbnet_ifp(un); 1000 const uint8_t *enaddr = CLLADDR(ifp->if_sadl); 1001 struct ether_multi *enm; 1002 struct ether_multistep step; 1003 uint32_t pfiltbl[MUE_NUM_ADDR_FILTX][2]; 1004 uint32_t hashtbl[MUE_DP_SEL_VHF_HASH_LEN]; 1005 uint32_t reg, rxfilt, h, hireg, loreg; 1006 size_t i; 1007 1008 if (usbnet_isdying(un)) 1009 return; 1010 1011 /* Clear perfect filter and hash tables. */ 1012 memset(pfiltbl, 0, sizeof(pfiltbl)); 1013 memset(hashtbl, 0, sizeof(hashtbl)); 1014 1015 reg = (un->un_flags & LAN7500) ? MUE_7500_RFE_CTL : MUE_7800_RFE_CTL; 1016 rxfilt = mue_csr_read(un, reg); 1017 rxfilt &= ~(MUE_RFE_CTL_PERFECT | MUE_RFE_CTL_MULTICAST_HASH | 1018 MUE_RFE_CTL_UNICAST | MUE_RFE_CTL_MULTICAST); 1019 1020 /* Always accept broadcast frames. */ 1021 rxfilt |= MUE_RFE_CTL_BROADCAST; 1022 1023 if (ifp->if_flags & IFF_PROMISC) { 1024 rxfilt |= MUE_RFE_CTL_UNICAST; 1025 allmulti: rxfilt |= MUE_RFE_CTL_MULTICAST; 1026 ifp->if_flags |= IFF_ALLMULTI; 1027 if (ifp->if_flags & IFF_PROMISC) 1028 DPRINTF(un, "promisc\n"); 1029 else 1030 DPRINTF(un, "allmulti\n"); 1031 } else { 1032 /* Now program new ones. */ 1033 pfiltbl[0][0] = MUE_ENADDR_HI(enaddr) | MUE_ADDR_FILTX_VALID; 1034 pfiltbl[0][1] = MUE_ENADDR_LO(enaddr); 1035 i = 1; 1036 ETHER_LOCK(ec); 1037 ETHER_FIRST_MULTI(step, ec, enm); 1038 while (enm != NULL) { 1039 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 1040 ETHER_ADDR_LEN)) { 1041 memset(pfiltbl, 0, sizeof(pfiltbl)); 1042 memset(hashtbl, 0, sizeof(hashtbl)); 1043 rxfilt &= ~MUE_RFE_CTL_MULTICAST_HASH; 1044 ETHER_UNLOCK(ec); 1045 goto allmulti; 1046 } 1047 if (i < MUE_NUM_ADDR_FILTX) { 1048 /* Use perfect address table if possible. */ 1049 pfiltbl[i][0] = MUE_ENADDR_HI(enm->enm_addrlo) | 1050 MUE_ADDR_FILTX_VALID; 1051 pfiltbl[i][1] = MUE_ENADDR_LO(enm->enm_addrlo); 1052 } else { 1053 /* Otherwise, use hash table. */ 1054 rxfilt |= MUE_RFE_CTL_MULTICAST_HASH; 1055 h = (ether_crc32_be(enm->enm_addrlo, 1056 ETHER_ADDR_LEN) >> 23) & 0x1ff; 1057 hashtbl[h / 32] |= 1 << (h % 32); 1058 } 1059 i++; 1060 ETHER_NEXT_MULTI(step, enm); 1061 } 1062 ETHER_UNLOCK(ec); 1063 rxfilt |= MUE_RFE_CTL_PERFECT; 1064 ifp->if_flags &= ~IFF_ALLMULTI; 1065 if (rxfilt & MUE_RFE_CTL_MULTICAST_HASH) 1066 DPRINTF(un, "perfect filter and hash tables\n"); 1067 else 1068 DPRINTF(un, "perfect filter\n"); 1069 } 1070 1071 for (i = 0; i < MUE_NUM_ADDR_FILTX; i++) { 1072 hireg = (un->un_flags & LAN7500) ? 1073 MUE_7500_ADDR_FILTX(i) : MUE_7800_ADDR_FILTX(i); 1074 loreg = hireg + 4; 1075 mue_csr_write(un, hireg, 0); 1076 mue_csr_write(un, loreg, pfiltbl[i][1]); 1077 mue_csr_write(un, hireg, pfiltbl[i][0]); 1078 } 1079 1080 mue_dataport_write(un, MUE_DP_SEL_VHF, MUE_DP_SEL_VHF_VLAN_LEN, 1081 MUE_DP_SEL_VHF_HASH_LEN, hashtbl); 1082 1083 mue_csr_write(un, reg, rxfilt); 1084 } 1085 1086 static void 1087 mue_sethwcsum_locked(struct usbnet *un) 1088 { 1089 struct ifnet * const ifp = usbnet_ifp(un); 1090 uint32_t reg, val; 1091 1092 reg = (un->un_flags & LAN7500) ? MUE_7500_RFE_CTL : MUE_7800_RFE_CTL; 1093 val = mue_csr_read(un, reg); 1094 1095 if (ifp->if_capenable & IFCAP_CSUM_IPv4_Rx) { 1096 DPRINTF(un, "RX IPv4 hwcsum enabled\n"); 1097 val |= MUE_RFE_CTL_IP_COE; 1098 } else { 1099 DPRINTF(un, "RX IPv4 hwcsum disabled\n"); 1100 val &= ~MUE_RFE_CTL_IP_COE; 1101 } 1102 1103 if (ifp->if_capenable & 1104 (IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx | 1105 IFCAP_CSUM_TCPv6_Rx | IFCAP_CSUM_UDPv6_Rx)) { 1106 DPRINTF(un, "RX L4 hwcsum enabled\n"); 1107 val |= MUE_RFE_CTL_TCPUDP_COE; 1108 } else { 1109 DPRINTF(un, "RX L4 hwcsum disabled\n"); 1110 val &= ~MUE_RFE_CTL_TCPUDP_COE; 1111 } 1112 1113 val &= ~MUE_RFE_CTL_VLAN_FILTER; 1114 1115 mue_csr_write(un, reg, val); 1116 } 1117 1118 static void 1119 mue_setmtu_locked(struct usbnet *un) 1120 { 1121 struct ifnet * const ifp = usbnet_ifp(un); 1122 uint32_t val; 1123 1124 /* Set the maximum frame size. */ 1125 MUE_CLRBIT(un, MUE_MAC_RX, MUE_MAC_RX_RXEN); 1126 val = mue_csr_read(un, MUE_MAC_RX); 1127 val &= ~MUE_MAC_RX_MAX_SIZE_MASK; 1128 val |= MUE_MAC_RX_MAX_LEN(MUE_FRAME_LEN(ifp->if_mtu)); 1129 mue_csr_write(un, MUE_MAC_RX, val); 1130 MUE_SETBIT(un, MUE_MAC_RX, MUE_MAC_RX_RXEN); 1131 } 1132 1133 static void 1134 mue_uno_rx_loop(struct usbnet *un, struct usbnet_chain *c, uint32_t total_len) 1135 { 1136 struct ifnet * const ifp = usbnet_ifp(un); 1137 struct mue_rxbuf_hdr *hdrp; 1138 uint32_t rx_cmd_a; 1139 uint16_t pktlen; 1140 int csum; 1141 uint8_t *buf = c->unc_buf; 1142 bool v6; 1143 1144 KASSERTMSG(total_len <= un->un_rx_bufsz, "%u vs %u", 1145 total_len, un->un_rx_bufsz); 1146 1147 do { 1148 if (__predict_false(total_len < sizeof(*hdrp))) { 1149 MUE_PRINTF(un, "packet length %u too short\n", total_len); 1150 if_statinc(ifp, if_ierrors); 1151 return; 1152 } 1153 1154 hdrp = (struct mue_rxbuf_hdr *)buf; 1155 rx_cmd_a = le32toh(hdrp->rx_cmd_a); 1156 1157 if (__predict_false(rx_cmd_a & MUE_RX_CMD_A_ERRORS)) { 1158 /* 1159 * We cannot use MUE_RX_CMD_A_RED bit here; 1160 * it is turned on in the cases of L3/L4 1161 * checksum errors which we handle below. 1162 */ 1163 MUE_PRINTF(un, "rx_cmd_a: %#x\n", rx_cmd_a); 1164 if_statinc(ifp, if_ierrors); 1165 return; 1166 } 1167 1168 pktlen = (uint16_t)(rx_cmd_a & MUE_RX_CMD_A_LEN_MASK); 1169 if (un->un_flags & LAN7500) 1170 pktlen -= 2; 1171 1172 if (__predict_false(pktlen < ETHER_HDR_LEN + ETHER_CRC_LEN || 1173 pktlen > MCLBYTES - ETHER_ALIGN || /* XXX */ 1174 pktlen + sizeof(*hdrp) > total_len)) { 1175 MUE_PRINTF(un, "invalid packet length %d\n", pktlen); 1176 if_statinc(ifp, if_ierrors); 1177 return; 1178 } 1179 1180 if (__predict_false(rx_cmd_a & MUE_RX_CMD_A_ICSM)) { 1181 csum = 0; 1182 } else { 1183 v6 = rx_cmd_a & MUE_RX_CMD_A_IPV; 1184 switch (rx_cmd_a & MUE_RX_CMD_A_PID) { 1185 case MUE_RX_CMD_A_PID_TCP: 1186 csum = v6 ? 1187 M_CSUM_TCPv6 : M_CSUM_IPv4 | M_CSUM_TCPv4; 1188 break; 1189 case MUE_RX_CMD_A_PID_UDP: 1190 csum = v6 ? 1191 M_CSUM_UDPv6 : M_CSUM_IPv4 | M_CSUM_UDPv4; 1192 break; 1193 case MUE_RX_CMD_A_PID_IP: 1194 csum = v6 ? 0 : M_CSUM_IPv4; 1195 break; 1196 default: 1197 csum = 0; 1198 break; 1199 } 1200 csum &= ifp->if_csum_flags_rx; 1201 if (__predict_false((csum & M_CSUM_IPv4) && 1202 (rx_cmd_a & MUE_RX_CMD_A_ICE))) 1203 csum |= M_CSUM_IPv4_BAD; 1204 if (__predict_false((csum & ~M_CSUM_IPv4) && 1205 (rx_cmd_a & MUE_RX_CMD_A_TCE))) 1206 csum |= M_CSUM_TCP_UDP_BAD; 1207 } 1208 1209 usbnet_enqueue(un, buf + sizeof(*hdrp), pktlen, csum, 1210 0, M_HASFCS); 1211 1212 /* Attention: sizeof(hdr) = 10 */ 1213 pktlen = roundup(pktlen + sizeof(*hdrp), 4); 1214 if (pktlen > total_len) 1215 pktlen = total_len; 1216 total_len -= pktlen; 1217 buf += pktlen; 1218 } while (total_len > 0); 1219 } 1220 1221 static int 1222 mue_init_locked(struct ifnet *ifp) 1223 { 1224 struct usbnet * const un = ifp->if_softc; 1225 1226 if (usbnet_isdying(un)) { 1227 DPRINTF(un, "dying\n"); 1228 return EIO; 1229 } 1230 1231 /* Cancel pending I/O and free all TX/RX buffers. */ 1232 if (ifp->if_flags & IFF_RUNNING) 1233 usbnet_stop(un, ifp, 1); 1234 1235 mue_reset(un); 1236 1237 /* Set MAC address. */ 1238 mue_set_macaddr(un); 1239 1240 /* Load the multicast filter. */ 1241 mue_setiff_locked(un); 1242 1243 /* TCP/UDP checksum offload engines. */ 1244 mue_sethwcsum_locked(un); 1245 1246 /* Set MTU. */ 1247 mue_setmtu_locked(un); 1248 1249 return usbnet_init_rx_tx(un); 1250 } 1251 1252 static int 1253 mue_uno_init(struct ifnet *ifp) 1254 { 1255 struct usbnet * const un = ifp->if_softc; 1256 int rv; 1257 1258 usbnet_lock_core(un); 1259 usbnet_busy(un); 1260 rv = mue_init_locked(ifp); 1261 usbnet_unbusy(un); 1262 usbnet_unlock_core(un); 1263 1264 return rv; 1265 } 1266 1267 static int 1268 mue_uno_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1269 { 1270 struct usbnet * const un = ifp->if_softc; 1271 1272 usbnet_lock_core(un); 1273 usbnet_busy(un); 1274 1275 switch (cmd) { 1276 case SIOCSIFFLAGS: 1277 case SIOCSETHERCAP: 1278 case SIOCADDMULTI: 1279 case SIOCDELMULTI: 1280 mue_setiff_locked(un); 1281 break; 1282 case SIOCSIFCAP: 1283 mue_sethwcsum_locked(un); 1284 break; 1285 case SIOCSIFMTU: 1286 mue_setmtu_locked(un); 1287 break; 1288 default: 1289 break; 1290 } 1291 1292 usbnet_unbusy(un); 1293 usbnet_unlock_core(un); 1294 1295 return 0; 1296 } 1297 1298 static void 1299 mue_reset(struct usbnet *un) 1300 { 1301 if (usbnet_isdying(un)) 1302 return; 1303 1304 /* Wait a little while for the chip to get its brains in order. */ 1305 usbd_delay_ms(un->un_udev, 1); 1306 1307 // mue_chip_init(un); /* XXX */ 1308 } 1309 1310 static void 1311 mue_uno_stop(struct ifnet *ifp, int disable) 1312 { 1313 struct usbnet * const un = ifp->if_softc; 1314 1315 mue_reset(un); 1316 } 1317 1318 #ifdef _MODULE 1319 #include "ioconf.c" 1320 #endif 1321 1322 USBNET_MODULE(mue) 1323