1 /* $NetBSD: if_axe.c,v 1.72 2016/06/10 13:27:15 ozaki-r Exp $ */ 2 /* $OpenBSD: if_axe.c,v 1.96 2010/01/09 05:33:08 jsg Exp $ */ 3 4 /* 5 * Copyright (c) 2005, 2006, 2007 Jonathan Gray <jsg@openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /* 21 * Copyright (c) 1997, 1998, 1999, 2000-2003 22 * Bill Paul <wpaul@windriver.com>. All rights reserved. 23 * 24 * Redistribution and use in source and binary forms, with or without 25 * modification, are permitted provided that the following conditions 26 * are met: 27 * 1. Redistributions of source code must retain the above copyright 28 * notice, this list of conditions and the following disclaimer. 29 * 2. Redistributions in binary form must reproduce the above copyright 30 * notice, this list of conditions and the following disclaimer in the 31 * documentation and/or other materials provided with the distribution. 32 * 3. All advertising materials mentioning features or use of this software 33 * must display the following acknowledgement: 34 * This product includes software developed by Bill Paul. 35 * 4. Neither the name of the author nor the names of any co-contributors 36 * may be used to endorse or promote products derived from this software 37 * without specific prior written permission. 38 * 39 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 40 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 41 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 42 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 43 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 44 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 45 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 46 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 47 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 48 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 49 * THE POSSIBILITY OF SUCH DAMAGE. 50 */ 51 52 /* 53 * ASIX Electronics AX88172 USB 2.0 ethernet driver. Used in the 54 * LinkSys USB200M and various other adapters. 55 * 56 * Manuals available from: 57 * http://www.asix.com.tw/datasheet/mac/Ax88172.PDF 58 * Note: you need the manual for the AX88170 chip (USB 1.x ethernet 59 * controller) to find the definitions for the RX control register. 60 * http://www.asix.com.tw/datasheet/mac/Ax88170.PDF 61 * 62 * Written by Bill Paul <wpaul@windriver.com> 63 * Senior Engineer 64 * Wind River Systems 65 */ 66 67 /* 68 * The AX88172 provides USB ethernet supports at 10 and 100Mbps. 69 * It uses an external PHY (reference designs use a RealTek chip), 70 * and has a 64-bit multicast hash filter. There is some information 71 * missing from the manual which one needs to know in order to make 72 * the chip function: 73 * 74 * - You must set bit 7 in the RX control register, otherwise the 75 * chip won't receive any packets. 76 * - You must initialize all 3 IPG registers, or you won't be able 77 * to send any packets. 78 * 79 * Note that this device appears to only support loading the station 80 * address via autoload from the EEPROM (i.e. there's no way to manaully 81 * set it). 82 * 83 * (Adam Weinberger wanted me to name this driver if_gir.c.) 84 */ 85 86 /* 87 * Ported to OpenBSD 3/28/2004 by Greg Taleck <taleck@oz.net> 88 * with bits and pieces from the aue and url drivers. 89 */ 90 91 #include <sys/cdefs.h> 92 __KERNEL_RCSID(0, "$NetBSD: if_axe.c,v 1.72 2016/06/10 13:27:15 ozaki-r Exp $"); 93 94 #ifdef _KERNEL_OPT 95 #include "opt_inet.h" 96 #endif 97 98 #include <sys/param.h> 99 #include <sys/bus.h> 100 #include <sys/device.h> 101 #include <sys/kernel.h> 102 #include <sys/mbuf.h> 103 #include <sys/module.h> 104 #include <sys/mutex.h> 105 #include <sys/socket.h> 106 #include <sys/sockio.h> 107 #include <sys/systm.h> 108 109 #include <sys/rndsource.h> 110 111 #include <net/if.h> 112 #include <net/if_dl.h> 113 #include <net/if_ether.h> 114 #include <net/if_media.h> 115 116 #include <net/bpf.h> 117 118 #include <dev/mii/mii.h> 119 #include <dev/mii/miivar.h> 120 121 #include <dev/usb/usb.h> 122 #include <dev/usb/usbdi.h> 123 #include <dev/usb/usbdi_util.h> 124 #include <dev/usb/usbdivar.h> 125 #include <dev/usb/usbdevs.h> 126 127 #include <dev/usb/if_axereg.h> 128 129 #ifdef AXE_DEBUG 130 #define DPRINTF(x) do { if (axedebug) printf x; } while (0) 131 #define DPRINTFN(n,x) do { if (axedebug >= (n)) printf x; } while (0) 132 int axedebug = 0; 133 #else 134 #define DPRINTF(x) 135 #define DPRINTFN(n,x) 136 #endif 137 138 /* 139 * Various supported device vendors/products. 140 */ 141 static const struct axe_type axe_devs[] = { 142 { { USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_UFE2000}, 0 }, 143 { { USB_VENDOR_ACERCM, USB_PRODUCT_ACERCM_EP1427X2}, 0 }, 144 { { USB_VENDOR_APPLE, USB_PRODUCT_APPLE_ETHERNET }, AX772 }, 145 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88172}, 0 }, 146 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772}, AX772 }, 147 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772A}, AX772 }, 148 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772B}, AX772 | AX772B }, 149 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772B_1}, AX772 | AX772B }, 150 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88178}, AX178 }, 151 { { USB_VENDOR_ATEN, USB_PRODUCT_ATEN_UC210T}, 0 }, 152 { { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D5055 }, AX178 }, 153 { { USB_VENDOR_BILLIONTON, USB_PRODUCT_BILLIONTON_USB2AR}, 0}, 154 { { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_USB200MV2}, AX772 }, 155 { { USB_VENDOR_COREGA, USB_PRODUCT_COREGA_FETHER_USB2_TX }, 0}, 156 { { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100}, 0 }, 157 { { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100B1 }, AX772 }, 158 { { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100C1 }, AX772 | AX772B }, 159 { { USB_VENDOR_GOODWAY, USB_PRODUCT_GOODWAY_GWUSB2E}, 0 }, 160 { { USB_VENDOR_IODATA, USB_PRODUCT_IODATA_ETGUS2 }, AX178 }, 161 { { USB_VENDOR_JVC, USB_PRODUCT_JVC_MP_PRX1}, 0 }, 162 { { USB_VENDOR_LENOVO, USB_PRODUCT_LENOVO_ETHERNET }, AX772 | AX772B }, 163 { { USB_VENDOR_LINKSYS2, USB_PRODUCT_LINKSYS2_USB200M}, 0 }, 164 { { USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_USB1000 }, AX178 }, 165 { { USB_VENDOR_LOGITEC, USB_PRODUCT_LOGITEC_LAN_GTJU2}, AX178 }, 166 { { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAU2GT}, AX178 }, 167 { { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAU2KTX}, 0 }, 168 { { USB_VENDOR_MSI, USB_PRODUCT_MSI_AX88772A}, AX772 }, 169 { { USB_VENDOR_NETGEAR, USB_PRODUCT_NETGEAR_FA120}, 0 }, 170 { { USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01PLUS }, AX772 }, 171 { { USB_VENDOR_PLANEX3, USB_PRODUCT_PLANEX3_GU1000T }, AX178 }, 172 { { USB_VENDOR_SYSTEMTALKS, USB_PRODUCT_SYSTEMTALKS_SGCX2UL}, 0 }, 173 { { USB_VENDOR_SITECOM, USB_PRODUCT_SITECOM_LN029}, 0 }, 174 { { USB_VENDOR_SITECOMEU, USB_PRODUCT_SITECOMEU_LN028 }, AX178 } 175 }; 176 #define axe_lookup(v, p) ((const struct axe_type *)usb_lookup(axe_devs, v, p)) 177 178 int axe_match(device_t, cfdata_t, void *); 179 void axe_attach(device_t, device_t, void *); 180 int axe_detach(device_t, int); 181 int axe_activate(device_t, devact_t); 182 183 CFATTACH_DECL_NEW(axe, sizeof(struct axe_softc), 184 axe_match, axe_attach, axe_detach, axe_activate); 185 186 static int axe_tx_list_init(struct axe_softc *); 187 static int axe_rx_list_init(struct axe_softc *); 188 static int axe_encap(struct axe_softc *, struct mbuf *, int); 189 static void axe_rxeof(struct usbd_xfer *, void *, usbd_status); 190 static void axe_txeof(struct usbd_xfer *, void *, usbd_status); 191 static void axe_tick(void *); 192 static void axe_tick_task(void *); 193 static void axe_start(struct ifnet *); 194 static int axe_ioctl(struct ifnet *, u_long, void *); 195 static int axe_init(struct ifnet *); 196 static void axe_stop(struct ifnet *, int); 197 static void axe_watchdog(struct ifnet *); 198 static int axe_miibus_readreg_locked(device_t, int, int); 199 static int axe_miibus_readreg(device_t, int, int); 200 static void axe_miibus_writereg_locked(device_t, int, int, int); 201 static void axe_miibus_writereg(device_t, int, int, int); 202 static void axe_miibus_statchg(struct ifnet *); 203 static int axe_cmd(struct axe_softc *, int, int, int, void *); 204 static void axe_reset(struct axe_softc *); 205 static int axe_ifmedia_upd(struct ifnet *); 206 static void axe_ifmedia_sts(struct ifnet *, struct ifmediareq *); 207 208 static void axe_setmulti(struct axe_softc *); 209 static void axe_lock_mii(struct axe_softc *); 210 static void axe_unlock_mii(struct axe_softc *); 211 212 static void axe_ax88178_init(struct axe_softc *); 213 static void axe_ax88772_init(struct axe_softc *); 214 215 /* Get exclusive access to the MII registers */ 216 static void 217 axe_lock_mii(struct axe_softc *sc) 218 { 219 220 sc->axe_refcnt++; 221 mutex_enter(&sc->axe_mii_lock); 222 } 223 224 static void 225 axe_unlock_mii(struct axe_softc *sc) 226 { 227 228 mutex_exit(&sc->axe_mii_lock); 229 if (--sc->axe_refcnt < 0) 230 usb_detach_wakeupold((sc->axe_dev)); 231 } 232 233 static int 234 axe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf) 235 { 236 usb_device_request_t req; 237 usbd_status err; 238 239 KASSERT(mutex_owned(&sc->axe_mii_lock)); 240 241 if (sc->axe_dying) 242 return 0; 243 244 if (AXE_CMD_DIR(cmd)) 245 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 246 else 247 req.bmRequestType = UT_READ_VENDOR_DEVICE; 248 req.bRequest = AXE_CMD_CMD(cmd); 249 USETW(req.wValue, val); 250 USETW(req.wIndex, index); 251 USETW(req.wLength, AXE_CMD_LEN(cmd)); 252 253 err = usbd_do_request(sc->axe_udev, &req, buf); 254 255 if (err) { 256 DPRINTF(("axe_cmd err: cmd %d err %d\n", cmd, err)); 257 return -1; 258 } 259 return 0; 260 } 261 262 static int 263 axe_miibus_readreg_locked(device_t dev, int phy, int reg) 264 { 265 struct axe_softc *sc = device_private(dev); 266 usbd_status err; 267 uint16_t val; 268 269 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 270 err = axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, (void *)&val); 271 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 272 if (err) { 273 aprint_error_dev(sc->axe_dev, "read PHY failed\n"); 274 return -1; 275 } 276 277 val = le16toh(val); 278 if (sc->axe_flags & AX772 && reg == MII_BMSR) { 279 /* 280 * BMSR of AX88772 indicates it supports extended 281 * capability but the extended status register is 282 * reserverd for embedded ethernet PHY. So clear the 283 * extended capability bit of BMSR. 284 */ 285 val &= ~BMSR_EXTCAP; 286 } 287 288 DPRINTF(("axe_miibus_readreg: phy 0x%x reg 0x%x val 0x%x\n", 289 phy, reg, val)); 290 291 return val; 292 } 293 294 static int 295 axe_miibus_readreg(device_t dev, int phy, int reg) 296 { 297 struct axe_softc *sc = device_private(dev); 298 int val; 299 300 if (sc->axe_dying) 301 return 0; 302 303 if (sc->axe_phyno != phy) 304 return 0; 305 306 axe_lock_mii(sc); 307 val = axe_miibus_readreg_locked(dev, phy, reg); 308 axe_unlock_mii(sc); 309 310 return val; 311 } 312 313 static void 314 axe_miibus_writereg_locked(device_t dev, int phy, int reg, int aval) 315 { 316 struct axe_softc *sc = device_private(dev); 317 usbd_status err; 318 uint16_t val; 319 320 val = htole16(aval); 321 322 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 323 err = axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, (void *)&val); 324 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 325 326 if (err) { 327 aprint_error_dev(sc->axe_dev, "write PHY failed\n"); 328 return; 329 } 330 } 331 332 static void 333 axe_miibus_writereg(device_t dev, int phy, int reg, int aval) 334 { 335 struct axe_softc *sc = device_private(dev); 336 337 if (sc->axe_dying) 338 return; 339 340 if (sc->axe_phyno != phy) 341 return; 342 343 axe_lock_mii(sc); 344 axe_miibus_writereg_locked(dev, phy, reg, aval); 345 axe_unlock_mii(sc); 346 } 347 348 static void 349 axe_miibus_statchg(struct ifnet *ifp) 350 { 351 struct axe_softc *sc = ifp->if_softc; 352 struct mii_data *mii = &sc->axe_mii; 353 int val, err; 354 355 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) 356 val = AXE_MEDIA_FULL_DUPLEX; 357 else 358 val = 0; 359 360 if (sc->axe_flags & AX178 || sc->axe_flags & AX772) { 361 val |= (AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC); 362 if (sc->axe_flags & AX178) 363 val |= AXE_178_MEDIA_ENCK; 364 switch (IFM_SUBTYPE(mii->mii_media_active)) { 365 case IFM_1000_T: 366 val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK; 367 break; 368 case IFM_100_TX: 369 val |= AXE_178_MEDIA_100TX; 370 break; 371 case IFM_10_T: 372 /* doesn't need to be handled */ 373 break; 374 } 375 } 376 377 DPRINTF(("axe_miibus_statchg: val=0x%x\n", val)); 378 axe_lock_mii(sc); 379 err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL); 380 axe_unlock_mii(sc); 381 if (err) { 382 aprint_error_dev(sc->axe_dev, "media change failed\n"); 383 return; 384 } 385 } 386 387 /* 388 * Set media options 389 */ 390 static int 391 axe_ifmedia_upd(struct ifnet *ifp) 392 { 393 struct axe_softc *sc = ifp->if_softc; 394 struct mii_data *mii = &sc->axe_mii; 395 int rc; 396 397 sc->axe_link = 0; 398 399 if (mii->mii_instance) { 400 struct mii_softc *miisc; 401 402 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 403 mii_phy_reset(miisc); 404 } 405 406 if ((rc = mii_mediachg(mii)) == ENXIO) 407 return 0; 408 return rc; 409 } 410 411 /* 412 * Report current media status 413 */ 414 static void 415 axe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 416 { 417 struct axe_softc *sc = ifp->if_softc; 418 struct mii_data *mii = &sc->axe_mii; 419 420 mii_pollstat(mii); 421 ifmr->ifm_active = mii->mii_media_active; 422 ifmr->ifm_status = mii->mii_media_status; 423 } 424 425 static void 426 axe_setmulti(struct axe_softc *sc) 427 { 428 struct ifnet *ifp = &sc->sc_if; 429 struct ether_multi *enm; 430 struct ether_multistep step; 431 uint32_t h = 0; 432 uint16_t rxmode; 433 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 434 435 if (sc->axe_dying) 436 return; 437 438 axe_lock_mii(sc); 439 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, (void *)&rxmode); 440 rxmode = le16toh(rxmode); 441 442 rxmode &= ~(AXE_RXCMD_ALLMULTI | AXE_RXCMD_PROMISC); 443 444 /* If we want promiscuous mode, set the allframes bit */ 445 if (ifp->if_flags & IFF_PROMISC) { 446 rxmode |= AXE_RXCMD_PROMISC; 447 goto allmulti; 448 } 449 450 /* Now program new ones */ 451 ETHER_FIRST_MULTI(step, &sc->axe_ec, enm); 452 while (enm != NULL) { 453 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 454 ETHER_ADDR_LEN) != 0) 455 goto allmulti; 456 457 h = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26; 458 hashtbl[h >> 3] |= 1U << (h & 7); 459 ETHER_NEXT_MULTI(step, enm); 460 } 461 ifp->if_flags &= ~IFF_ALLMULTI; 462 axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, (void *)&hashtbl); 463 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 464 axe_unlock_mii(sc); 465 return; 466 467 allmulti: 468 ifp->if_flags |= IFF_ALLMULTI; 469 rxmode |= AXE_RXCMD_ALLMULTI; 470 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 471 axe_unlock_mii(sc); 472 } 473 474 static void 475 axe_reset(struct axe_softc *sc) 476 { 477 478 if (sc->axe_dying) 479 return; 480 /* XXX What to reset? */ 481 482 /* Wait a little while for the chip to get its brains in order. */ 483 DELAY(1000); 484 } 485 486 static int 487 axe_get_phyno(struct axe_softc *sc, int sel) 488 { 489 int phyno; 490 491 switch (AXE_PHY_TYPE(sc->axe_phyaddrs[sel])) { 492 case PHY_TYPE_100_HOME: 493 /* FALLTHROUGH */ 494 case PHY_TYPE_GIG: 495 phyno = AXE_PHY_NO(sc->axe_phyaddrs[sel]); 496 break; 497 case PHY_TYPE_SPECIAL: 498 /* FALLTHROUGH */ 499 case PHY_TYPE_RSVD: 500 /* FALLTHROUGH */ 501 case PHY_TYPE_NON_SUP: 502 /* FALLTHROUGH */ 503 default: 504 phyno = -1; 505 break; 506 } 507 508 return phyno; 509 } 510 511 #define AXE_GPIO_WRITE(x, y) do { \ 512 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, (x), NULL); \ 513 usbd_delay_ms(sc->axe_udev, hztoms(y)); \ 514 } while (0) 515 516 static void 517 axe_ax88178_init(struct axe_softc *sc) 518 { 519 int gpio0, ledmode, phymode; 520 uint16_t eeprom, val; 521 522 axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL); 523 /* XXX magic */ 524 axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom); 525 axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL); 526 527 eeprom = le16toh(eeprom); 528 529 DPRINTF((" EEPROM is 0x%x\n", eeprom)); 530 531 /* if EEPROM is invalid we have to use to GPIO0 */ 532 if (eeprom == 0xffff) { 533 phymode = AXE_PHY_MODE_MARVELL; 534 gpio0 = 1; 535 ledmode = 0; 536 } else { 537 phymode = eeprom & 0x7f; 538 gpio0 = (eeprom & 0x80) ? 0 : 1; 539 ledmode = eeprom >> 8; 540 } 541 542 DPRINTF(("use gpio0: %d, phymode %d\n", gpio0, phymode)); 543 544 /* Program GPIOs depending on PHY hardware. */ 545 switch (phymode) { 546 case AXE_PHY_MODE_MARVELL: 547 if (gpio0 == 1) { 548 AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO0_EN, 549 hz / 32); 550 AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2 | AXE_GPIO2_EN, 551 hz / 32); 552 AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2_EN, hz / 4); 553 AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2 | AXE_GPIO2_EN, 554 hz / 32); 555 } else { 556 AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 | 557 AXE_GPIO1_EN, hz / 3); 558 if (ledmode == 1) { 559 AXE_GPIO_WRITE(AXE_GPIO1_EN, hz / 3); 560 AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN, 561 hz / 3); 562 } else { 563 AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | 564 AXE_GPIO2 | AXE_GPIO2_EN, hz / 32); 565 AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | 566 AXE_GPIO2_EN, hz / 4); 567 AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | 568 AXE_GPIO2 | AXE_GPIO2_EN, hz / 32); 569 } 570 } 571 break; 572 case AXE_PHY_MODE_CICADA: 573 case AXE_PHY_MODE_CICADA_V2: 574 case AXE_PHY_MODE_CICADA_V2_ASIX: 575 if (gpio0 == 1) 576 AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO0 | 577 AXE_GPIO0_EN, hz / 32); 578 else 579 AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 | 580 AXE_GPIO1_EN, hz / 32); 581 break; 582 case AXE_PHY_MODE_AGERE: 583 AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 | 584 AXE_GPIO1_EN, hz / 32); 585 AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2 | 586 AXE_GPIO2_EN, hz / 32); 587 AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2_EN, hz / 4); 588 AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2 | 589 AXE_GPIO2_EN, hz / 32); 590 break; 591 case AXE_PHY_MODE_REALTEK_8211CL: 592 case AXE_PHY_MODE_REALTEK_8211BN: 593 case AXE_PHY_MODE_REALTEK_8251CL: 594 val = gpio0 == 1 ? AXE_GPIO0 | AXE_GPIO0_EN : 595 AXE_GPIO1 | AXE_GPIO1_EN; 596 AXE_GPIO_WRITE(val, hz / 32); 597 AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32); 598 AXE_GPIO_WRITE(val | AXE_GPIO2_EN, hz / 4); 599 AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32); 600 if (phymode == AXE_PHY_MODE_REALTEK_8211CL) { 601 axe_miibus_writereg_locked(sc->axe_dev, 602 sc->axe_phyno, 0x1F, 0x0005); 603 axe_miibus_writereg_locked(sc->axe_dev, 604 sc->axe_phyno, 0x0C, 0x0000); 605 val = axe_miibus_readreg_locked(sc->axe_dev, 606 sc->axe_phyno, 0x0001); 607 axe_miibus_writereg_locked(sc->axe_dev, 608 sc->axe_phyno, 0x01, val | 0x0080); 609 axe_miibus_writereg_locked(sc->axe_dev, 610 sc->axe_phyno, 0x1F, 0x0000); 611 } 612 break; 613 default: 614 /* Unknown PHY model or no need to program GPIOs. */ 615 break; 616 } 617 618 /* soft reset */ 619 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL); 620 usbd_delay_ms(sc->axe_udev, 150); 621 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 622 AXE_SW_RESET_PRL | AXE_178_RESET_MAGIC, NULL); 623 usbd_delay_ms(sc->axe_udev, 150); 624 /* Enable MII/GMII/RGMII for external PHY */ 625 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL); 626 usbd_delay_ms(sc->axe_udev, 10); 627 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 628 } 629 630 static void 631 axe_ax88772_init(struct axe_softc *sc) 632 { 633 634 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL); 635 usbd_delay_ms(sc->axe_udev, 40); 636 637 if (sc->axe_phyno == AXE_772_PHY_NO_EPHY) { 638 /* ask for the embedded PHY */ 639 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL); 640 usbd_delay_ms(sc->axe_udev, 10); 641 642 /* power down and reset state, pin reset state */ 643 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL); 644 usbd_delay_ms(sc->axe_udev, 60); 645 646 /* power down/reset state, pin operating state */ 647 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 648 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 649 usbd_delay_ms(sc->axe_udev, 150); 650 651 /* power up, reset */ 652 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL); 653 654 /* power up, operating */ 655 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 656 AXE_SW_RESET_IPRL | AXE_SW_RESET_PRL, NULL); 657 } else { 658 /* ask for external PHY */ 659 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL); 660 usbd_delay_ms(sc->axe_udev, 10); 661 662 /* power down internal PHY */ 663 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 664 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 665 } 666 667 usbd_delay_ms(sc->axe_udev, 150); 668 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 669 } 670 671 /* 672 * Probe for a AX88172 chip. 673 */ 674 int 675 axe_match(device_t parent, cfdata_t match, void *aux) 676 { 677 struct usb_attach_arg *uaa = aux; 678 679 return axe_lookup(uaa->uaa_vendor, uaa->uaa_product) != NULL ? 680 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 681 } 682 683 /* 684 * Attach the interface. Allocate softc structures, do ifmedia 685 * setup and ethernet/BPF attach. 686 */ 687 void 688 axe_attach(device_t parent, device_t self, void *aux) 689 { 690 struct axe_softc *sc = device_private(self); 691 struct usb_attach_arg *uaa = aux; 692 struct usbd_device *dev = uaa->uaa_device; 693 usbd_status err; 694 usb_interface_descriptor_t *id; 695 usb_endpoint_descriptor_t *ed; 696 struct mii_data *mii; 697 uint8_t eaddr[ETHER_ADDR_LEN]; 698 char *devinfop; 699 const char *devname = device_xname(self); 700 struct ifnet *ifp; 701 int i, s; 702 703 aprint_naive("\n"); 704 aprint_normal("\n"); 705 706 sc->axe_dev = self; 707 sc->axe_udev = dev; 708 709 devinfop = usbd_devinfo_alloc(dev, 0); 710 aprint_normal_dev(self, "%s\n", devinfop); 711 usbd_devinfo_free(devinfop); 712 713 err = usbd_set_config_no(dev, AXE_CONFIG_NO, 1); 714 if (err) { 715 aprint_error_dev(self, "failed to set configuration" 716 ", err=%s\n", usbd_errstr(err)); 717 return; 718 } 719 720 sc->axe_flags = axe_lookup(uaa->uaa_vendor, uaa->uaa_product)->axe_flags; 721 722 mutex_init(&sc->axe_mii_lock, MUTEX_DEFAULT, IPL_NONE); 723 usb_init_task(&sc->axe_tick_task, axe_tick_task, sc, 0); 724 725 err = usbd_device2interface_handle(dev, AXE_IFACE_IDX, &sc->axe_iface); 726 if (err) { 727 aprint_error_dev(self, "getting interface handle failed\n"); 728 return; 729 } 730 731 sc->axe_product = uaa->uaa_product; 732 sc->axe_vendor = uaa->uaa_vendor; 733 734 id = usbd_get_interface_descriptor(sc->axe_iface); 735 736 /* decide on what our bufsize will be */ 737 if (sc->axe_flags & AX178 || sc->axe_flags & AX772) 738 sc->axe_bufsz = (sc->axe_udev->ud_speed == USB_SPEED_HIGH) ? 739 AXE_178_MAX_BUFSZ : AXE_178_MIN_BUFSZ; 740 else 741 sc->axe_bufsz = AXE_172_BUFSZ; 742 743 /* Find endpoints. */ 744 for (i = 0; i < id->bNumEndpoints; i++) { 745 ed = usbd_interface2endpoint_descriptor(sc->axe_iface, i); 746 if (ed == NULL) { 747 aprint_error_dev(self, "couldn't get ep %d\n", i); 748 return; 749 } 750 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 751 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) { 752 sc->axe_ed[AXE_ENDPT_RX] = ed->bEndpointAddress; 753 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 754 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) { 755 sc->axe_ed[AXE_ENDPT_TX] = ed->bEndpointAddress; 756 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 757 UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) { 758 sc->axe_ed[AXE_ENDPT_INTR] = ed->bEndpointAddress; 759 } 760 } 761 762 s = splnet(); 763 764 /* We need the PHYID for init dance in some cases */ 765 axe_lock_mii(sc); 766 axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, (void *)&sc->axe_phyaddrs); 767 768 DPRINTF((" phyaddrs[0]: %x phyaddrs[1]: %x\n", 769 sc->axe_phyaddrs[0], sc->axe_phyaddrs[1])); 770 sc->axe_phyno = axe_get_phyno(sc, AXE_PHY_SEL_PRI); 771 if (sc->axe_phyno == -1) 772 sc->axe_phyno = axe_get_phyno(sc, AXE_PHY_SEL_SEC); 773 if (sc->axe_phyno == -1) { 774 DPRINTF((" no valid PHY address found, assuming PHY address 0\n")); 775 sc->axe_phyno = 0; 776 } 777 778 if (sc->axe_flags & AX178) 779 axe_ax88178_init(sc); 780 else if (sc->axe_flags & AX772) 781 axe_ax88772_init(sc); 782 783 /* 784 * Get station address. 785 */ 786 if (sc->axe_flags & AX178 || sc->axe_flags & AX772) 787 axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, &eaddr); 788 else 789 axe_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, &eaddr); 790 791 /* 792 * Load IPG values 793 */ 794 axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, (void *)&sc->axe_ipgs); 795 axe_unlock_mii(sc); 796 797 /* 798 * An ASIX chip was detected. Inform the world. 799 */ 800 aprint_normal_dev(self, "Ethernet address %s\n", ether_sprintf(eaddr)); 801 802 /* Initialize interface info.*/ 803 ifp = &sc->sc_if; 804 ifp->if_softc = sc; 805 strncpy(ifp->if_xname, devname, IFNAMSIZ); 806 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 807 ifp->if_ioctl = axe_ioctl; 808 ifp->if_start = axe_start; 809 ifp->if_init = axe_init; 810 ifp->if_stop = axe_stop; 811 ifp->if_watchdog = axe_watchdog; 812 813 IFQ_SET_READY(&ifp->if_snd); 814 815 sc->axe_ec.ec_capabilities = ETHERCAP_VLAN_MTU; 816 817 /* Initialize MII/media info. */ 818 mii = &sc->axe_mii; 819 mii->mii_ifp = ifp; 820 mii->mii_readreg = axe_miibus_readreg; 821 mii->mii_writereg = axe_miibus_writereg; 822 mii->mii_statchg = axe_miibus_statchg; 823 mii->mii_flags = MIIF_AUTOTSLEEP; 824 825 sc->axe_ec.ec_mii = mii; 826 if (sc->axe_flags & AXE_MII) 827 ifmedia_init(&mii->mii_media, 0, axe_ifmedia_upd, 828 axe_ifmedia_sts); 829 else 830 ifmedia_init(&mii->mii_media, 0, ether_mediachange, 831 ether_mediastatus); 832 833 mii_attach(sc->axe_dev, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 834 0); 835 836 if (LIST_EMPTY(&mii->mii_phys)) { 837 ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL); 838 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE); 839 } else 840 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO); 841 842 /* Attach the interface. */ 843 if_attach(ifp); 844 ether_ifattach(ifp, eaddr); 845 rnd_attach_source(&sc->rnd_source, device_xname(sc->axe_dev), 846 RND_TYPE_NET, RND_FLAG_DEFAULT); 847 848 callout_init(&sc->axe_stat_ch, 0); 849 callout_setfunc(&sc->axe_stat_ch, axe_tick, sc); 850 851 sc->axe_attached = true; 852 splx(s); 853 854 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->axe_udev, sc->axe_dev); 855 856 if (!pmf_device_register(self, NULL, NULL)) 857 aprint_error_dev(self, "couldn't establish power handler\n"); 858 } 859 860 int 861 axe_detach(device_t self, int flags) 862 { 863 struct axe_softc *sc = device_private(self); 864 int s; 865 struct ifnet *ifp = &sc->sc_if; 866 867 DPRINTFN(2,("%s: %s: enter\n", device_xname(sc->axe_dev), __func__)); 868 869 /* Detached before attached finished, so just bail out. */ 870 if (!sc->axe_attached) 871 return 0; 872 873 pmf_device_deregister(self); 874 875 sc->axe_dying = true; 876 877 /* 878 * Remove any pending tasks. They cannot be executing because they run 879 * in the same thread as detach. 880 */ 881 usb_rem_task(sc->axe_udev, &sc->axe_tick_task); 882 883 s = splusb(); 884 885 if (ifp->if_flags & IFF_RUNNING) 886 axe_stop(ifp, 1); 887 888 callout_destroy(&sc->axe_stat_ch); 889 mutex_destroy(&sc->axe_mii_lock); 890 rnd_detach_source(&sc->rnd_source); 891 mii_detach(&sc->axe_mii, MII_PHY_ANY, MII_OFFSET_ANY); 892 ifmedia_delete_instance(&sc->axe_mii.mii_media, IFM_INST_ANY); 893 ether_ifdetach(ifp); 894 if_detach(ifp); 895 896 #ifdef DIAGNOSTIC 897 if (sc->axe_ep[AXE_ENDPT_TX] != NULL || 898 sc->axe_ep[AXE_ENDPT_RX] != NULL || 899 sc->axe_ep[AXE_ENDPT_INTR] != NULL) 900 aprint_debug_dev(self, "detach has active endpoints\n"); 901 #endif 902 903 sc->axe_attached = false; 904 905 if (--sc->axe_refcnt >= 0) { 906 /* Wait for processes to go away. */ 907 usb_detach_waitold(sc->axe_dev); 908 } 909 splx(s); 910 911 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->axe_udev, sc->axe_dev); 912 913 return 0; 914 } 915 916 int 917 axe_activate(device_t self, devact_t act) 918 { 919 struct axe_softc *sc = device_private(self); 920 921 DPRINTFN(2,("%s: %s: enter\n", device_xname(sc->axe_dev), __func__)); 922 923 switch (act) { 924 case DVACT_DEACTIVATE: 925 if_deactivate(&sc->axe_ec.ec_if); 926 sc->axe_dying = true; 927 return 0; 928 default: 929 return EOPNOTSUPP; 930 } 931 } 932 933 static int 934 axe_rx_list_init(struct axe_softc *sc) 935 { 936 struct axe_cdata *cd; 937 struct axe_chain *c; 938 int i; 939 940 DPRINTF(("%s: %s: enter\n", device_xname(sc->axe_dev), __func__)); 941 942 cd = &sc->axe_cdata; 943 for (i = 0; i < AXE_RX_LIST_CNT; i++) { 944 c = &cd->axe_rx_chain[i]; 945 c->axe_sc = sc; 946 c->axe_idx = i; 947 if (c->axe_xfer == NULL) { 948 int err = usbd_create_xfer(sc->axe_ep[AXE_ENDPT_RX], 949 sc->axe_bufsz, USBD_SHORT_XFER_OK, 0, &c->axe_xfer); 950 if (err) 951 return err; 952 c->axe_buf = usbd_get_buffer(c->axe_xfer); 953 } 954 } 955 956 return 0; 957 } 958 959 static int 960 axe_tx_list_init(struct axe_softc *sc) 961 { 962 struct axe_cdata *cd; 963 struct axe_chain *c; 964 int i; 965 966 DPRINTF(("%s: %s: enter\n", device_xname(sc->axe_dev), __func__)); 967 968 cd = &sc->axe_cdata; 969 for (i = 0; i < AXE_TX_LIST_CNT; i++) { 970 c = &cd->axe_tx_chain[i]; 971 c->axe_sc = sc; 972 c->axe_idx = i; 973 if (c->axe_xfer == NULL) { 974 int err = usbd_create_xfer(sc->axe_ep[AXE_ENDPT_TX], 975 sc->axe_bufsz, USBD_FORCE_SHORT_XFER, 0, 976 &c->axe_xfer); 977 if (err) 978 return err; 979 c->axe_buf = usbd_get_buffer(c->axe_xfer); 980 } 981 } 982 983 return 0; 984 } 985 986 /* 987 * A frame has been uploaded: pass the resulting mbuf chain up to 988 * the higher level protocols. 989 */ 990 static void 991 axe_rxeof(struct usbd_xfer *xfer, void * priv, usbd_status status) 992 { 993 struct axe_softc *sc; 994 struct axe_chain *c; 995 struct ifnet *ifp; 996 uint8_t *buf; 997 uint32_t total_len; 998 u_int rxlen, pktlen; 999 struct mbuf *m; 1000 struct axe_sframe_hdr hdr; 1001 int s; 1002 1003 c = (struct axe_chain *)priv; 1004 sc = c->axe_sc; 1005 buf = c->axe_buf; 1006 ifp = &sc->sc_if; 1007 1008 DPRINTFN(10,("%s: %s: enter\n", device_xname(sc->axe_dev),__func__)); 1009 1010 if (sc->axe_dying) 1011 return; 1012 1013 if ((ifp->if_flags & IFF_RUNNING) == 0) 1014 return; 1015 1016 if (status != USBD_NORMAL_COMPLETION) { 1017 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 1018 return; 1019 if (usbd_ratecheck(&sc->axe_rx_notice)) 1020 aprint_error_dev(sc->axe_dev, "usb errors on rx: %s\n", 1021 usbd_errstr(status)); 1022 if (status == USBD_STALLED) 1023 usbd_clear_endpoint_stall_async(sc->axe_ep[AXE_ENDPT_RX]); 1024 goto done; 1025 } 1026 1027 usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL); 1028 1029 do { 1030 if (sc->axe_flags & AX178 || sc->axe_flags & AX772) { 1031 if (total_len < sizeof(hdr)) { 1032 ifp->if_ierrors++; 1033 goto done; 1034 } 1035 1036 memcpy(&hdr, buf, sizeof(hdr)); 1037 total_len -= sizeof(hdr); 1038 buf += sizeof(hdr); 1039 1040 if (((le16toh(hdr.len) & AXE_RH1M_RXLEN_MASK) ^ 1041 (le16toh(hdr.ilen) & AXE_RH1M_RXLEN_MASK)) != 1042 AXE_RH1M_RXLEN_MASK) { 1043 ifp->if_ierrors++; 1044 goto done; 1045 } 1046 1047 rxlen = le16toh(hdr.len) & AXE_RH1M_RXLEN_MASK; 1048 if (total_len < rxlen) { 1049 pktlen = total_len; 1050 total_len = 0; 1051 } else { 1052 pktlen = rxlen; 1053 rxlen = roundup2(rxlen, 2); 1054 total_len -= rxlen; 1055 } 1056 1057 } else { /* AX172 */ 1058 pktlen = rxlen = total_len; 1059 total_len = 0; 1060 } 1061 1062 MGETHDR(m, M_DONTWAIT, MT_DATA); 1063 if (m == NULL) { 1064 ifp->if_ierrors++; 1065 goto done; 1066 } 1067 1068 if (pktlen > MHLEN - ETHER_ALIGN) { 1069 MCLGET(m, M_DONTWAIT); 1070 if ((m->m_flags & M_EXT) == 0) { 1071 m_freem(m); 1072 ifp->if_ierrors++; 1073 goto done; 1074 } 1075 } 1076 m->m_data += ETHER_ALIGN; 1077 1078 ifp->if_ipackets++; 1079 m_set_rcvif(m, ifp); 1080 m->m_pkthdr.len = m->m_len = pktlen; 1081 1082 memcpy(mtod(m, uint8_t *), buf, pktlen); 1083 buf += rxlen; 1084 1085 s = splnet(); 1086 1087 bpf_mtap(ifp, m); 1088 1089 DPRINTFN(10,("%s: %s: deliver %d\n", device_xname(sc->axe_dev), 1090 __func__, m->m_len)); 1091 if_percpuq_enqueue((ifp)->if_percpuq, (m)); 1092 1093 splx(s); 1094 1095 } while (total_len > 0); 1096 1097 done: 1098 1099 /* Setup new transfer. */ 1100 usbd_setup_xfer(xfer, c, c->axe_buf, sc->axe_bufsz, 1101 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, axe_rxeof); 1102 usbd_transfer(xfer); 1103 1104 DPRINTFN(10,("%s: %s: start rx\n", device_xname(sc->axe_dev), __func__)); 1105 } 1106 1107 /* 1108 * A frame was downloaded to the chip. It's safe for us to clean up 1109 * the list buffers. 1110 */ 1111 1112 static void 1113 axe_txeof(struct usbd_xfer *xfer, void * priv, usbd_status status) 1114 { 1115 struct axe_softc *sc; 1116 struct axe_chain *c; 1117 struct ifnet *ifp; 1118 int s; 1119 1120 c = priv; 1121 sc = c->axe_sc; 1122 ifp = &sc->sc_if; 1123 1124 if (sc->axe_dying) 1125 return; 1126 1127 s = splnet(); 1128 1129 ifp->if_timer = 0; 1130 ifp->if_flags &= ~IFF_OACTIVE; 1131 1132 if (status != USBD_NORMAL_COMPLETION) { 1133 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) { 1134 splx(s); 1135 return; 1136 } 1137 ifp->if_oerrors++; 1138 aprint_error_dev(sc->axe_dev, "usb error on tx: %s\n", 1139 usbd_errstr(status)); 1140 if (status == USBD_STALLED) 1141 usbd_clear_endpoint_stall_async(sc->axe_ep[AXE_ENDPT_TX]); 1142 splx(s); 1143 return; 1144 } 1145 ifp->if_opackets++; 1146 1147 if (!IFQ_IS_EMPTY(&ifp->if_snd)) 1148 axe_start(ifp); 1149 1150 splx(s); 1151 } 1152 1153 static void 1154 axe_tick(void *xsc) 1155 { 1156 struct axe_softc *sc = xsc; 1157 1158 if (sc == NULL) 1159 return; 1160 1161 DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->axe_dev), __func__)); 1162 1163 if (sc->axe_dying) 1164 return; 1165 1166 /* Perform periodic stuff in process context */ 1167 usb_add_task(sc->axe_udev, &sc->axe_tick_task, USB_TASKQ_DRIVER); 1168 } 1169 1170 static void 1171 axe_tick_task(void *xsc) 1172 { 1173 int s; 1174 struct axe_softc *sc; 1175 struct ifnet *ifp; 1176 struct mii_data *mii; 1177 1178 sc = xsc; 1179 1180 if (sc == NULL) 1181 return; 1182 1183 if (sc->axe_dying) 1184 return; 1185 1186 ifp = &sc->sc_if; 1187 mii = &sc->axe_mii; 1188 1189 if (mii == NULL) 1190 return; 1191 1192 s = splnet(); 1193 1194 mii_tick(mii); 1195 if (sc->axe_link == 0 && 1196 (mii->mii_media_status & IFM_ACTIVE) != 0 && 1197 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { 1198 DPRINTF(("%s: %s: got link\n", device_xname(sc->axe_dev), 1199 __func__)); 1200 sc->axe_link++; 1201 if (!IFQ_IS_EMPTY(&ifp->if_snd)) 1202 axe_start(ifp); 1203 } 1204 1205 callout_schedule(&sc->axe_stat_ch, hz); 1206 1207 splx(s); 1208 } 1209 1210 static int 1211 axe_encap(struct axe_softc *sc, struct mbuf *m, int idx) 1212 { 1213 struct ifnet *ifp = &sc->sc_if; 1214 struct axe_chain *c; 1215 usbd_status err; 1216 struct axe_sframe_hdr hdr; 1217 int length, boundary; 1218 1219 c = &sc->axe_cdata.axe_tx_chain[idx]; 1220 1221 /* 1222 * Copy the mbuf data into a contiguous buffer, leaving two 1223 * bytes at the beginning to hold the frame length. 1224 */ 1225 if (sc->axe_flags & AX178 || sc->axe_flags & AX772) { 1226 boundary = (sc->axe_udev->ud_speed == USB_SPEED_HIGH) ? 512 : 64; 1227 1228 hdr.len = htole16(m->m_pkthdr.len); 1229 hdr.ilen = ~hdr.len; 1230 1231 memcpy(c->axe_buf, &hdr, sizeof(hdr)); 1232 length = sizeof(hdr); 1233 1234 m_copydata(m, 0, m->m_pkthdr.len, c->axe_buf + length); 1235 length += m->m_pkthdr.len; 1236 1237 if ((length % boundary) == 0) { 1238 hdr.len = 0x0000; 1239 hdr.ilen = 0xffff; 1240 memcpy(c->axe_buf + length, &hdr, sizeof(hdr)); 1241 length += sizeof(hdr); 1242 } 1243 } else { 1244 m_copydata(m, 0, m->m_pkthdr.len, c->axe_buf); 1245 length = m->m_pkthdr.len; 1246 } 1247 1248 usbd_setup_xfer(c->axe_xfer, c, c->axe_buf, length, 1249 USBD_FORCE_SHORT_XFER, 10000, axe_txeof); 1250 1251 /* Transmit */ 1252 err = usbd_transfer(c->axe_xfer); 1253 if (err != USBD_IN_PROGRESS) { 1254 axe_stop(ifp, 0); 1255 return EIO; 1256 } 1257 1258 sc->axe_cdata.axe_tx_cnt++; 1259 1260 return 0; 1261 } 1262 1263 static void 1264 axe_start(struct ifnet *ifp) 1265 { 1266 struct axe_softc *sc; 1267 struct mbuf *m; 1268 1269 sc = ifp->if_softc; 1270 1271 if ((sc->axe_flags & AXE_MII) != 0 && sc->axe_link == 0) 1272 return; 1273 1274 if ((ifp->if_flags & (IFF_OACTIVE|IFF_RUNNING)) != IFF_RUNNING) 1275 return; 1276 1277 IFQ_POLL(&ifp->if_snd, m); 1278 if (m == NULL) { 1279 return; 1280 } 1281 1282 if (axe_encap(sc, m, 0)) { 1283 ifp->if_flags |= IFF_OACTIVE; 1284 return; 1285 } 1286 IFQ_DEQUEUE(&ifp->if_snd, m); 1287 1288 /* 1289 * If there's a BPF listener, bounce a copy of this frame 1290 * to him. 1291 */ 1292 bpf_mtap(ifp, m); 1293 m_freem(m); 1294 1295 ifp->if_flags |= IFF_OACTIVE; 1296 1297 /* 1298 * Set a timeout in case the chip goes out to lunch. 1299 */ 1300 ifp->if_timer = 5; 1301 1302 return; 1303 } 1304 1305 static int 1306 axe_init(struct ifnet *ifp) 1307 { 1308 struct axe_softc *sc = ifp->if_softc; 1309 struct axe_chain *c; 1310 usbd_status err; 1311 int rxmode; 1312 int i, s; 1313 uint8_t eaddr[ETHER_ADDR_LEN]; 1314 1315 s = splnet(); 1316 1317 if (ifp->if_flags & IFF_RUNNING) 1318 axe_stop(ifp, 0); 1319 1320 /* 1321 * Cancel pending I/O and free all RX/TX buffers. 1322 */ 1323 axe_reset(sc); 1324 1325 /* Set MAC address */ 1326 if (sc->axe_flags & AX178 || sc->axe_flags & AX772) { 1327 memcpy(eaddr, CLLADDR(ifp->if_sadl), sizeof(eaddr)); 1328 axe_lock_mii(sc); 1329 axe_cmd(sc, AXE_178_CMD_WRITE_NODEID, 0, 0, eaddr); 1330 axe_unlock_mii(sc); 1331 } 1332 1333 /* Set transmitter IPG values */ 1334 axe_lock_mii(sc); 1335 if (sc->axe_flags & AX178 || sc->axe_flags & AX772) 1336 axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->axe_ipgs[2], 1337 (sc->axe_ipgs[1] << 8) | (sc->axe_ipgs[0]), NULL); 1338 else { 1339 axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->axe_ipgs[0], NULL); 1340 axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->axe_ipgs[1], NULL); 1341 axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->axe_ipgs[2], NULL); 1342 } 1343 1344 /* Enable receiver, set RX mode */ 1345 rxmode = AXE_RXCMD_BROADCAST | AXE_RXCMD_MULTICAST | AXE_RXCMD_ENABLE; 1346 if (sc->axe_flags & AX772B) 1347 rxmode |= AXE_772B_RXCMD_RH1M; 1348 else if (sc->axe_flags & AX178 || sc->axe_flags & AX772) { 1349 if (sc->axe_udev->ud_speed == USB_SPEED_HIGH) { 1350 /* Largest possible USB buffer size for AX88178 */ 1351 rxmode |= AXE_178_RXCMD_MFB; 1352 } 1353 } else 1354 rxmode |= AXE_172_RXCMD_UNICAST; 1355 1356 /* If we want promiscuous mode, set the allframes bit. */ 1357 if (ifp->if_flags & IFF_PROMISC) 1358 rxmode |= AXE_RXCMD_PROMISC; 1359 1360 if (ifp->if_flags & IFF_BROADCAST) 1361 rxmode |= AXE_RXCMD_BROADCAST; 1362 1363 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 1364 axe_unlock_mii(sc); 1365 1366 /* Load the multicast filter. */ 1367 axe_setmulti(sc); 1368 1369 /* Open RX and TX pipes. */ 1370 err = usbd_open_pipe(sc->axe_iface, sc->axe_ed[AXE_ENDPT_RX], 1371 USBD_EXCLUSIVE_USE, &sc->axe_ep[AXE_ENDPT_RX]); 1372 if (err) { 1373 aprint_error_dev(sc->axe_dev, "open rx pipe failed: %s\n", 1374 usbd_errstr(err)); 1375 splx(s); 1376 return EIO; 1377 } 1378 1379 err = usbd_open_pipe(sc->axe_iface, sc->axe_ed[AXE_ENDPT_TX], 1380 USBD_EXCLUSIVE_USE, &sc->axe_ep[AXE_ENDPT_TX]); 1381 if (err) { 1382 aprint_error_dev(sc->axe_dev, "open tx pipe failed: %s\n", 1383 usbd_errstr(err)); 1384 splx(s); 1385 return EIO; 1386 } 1387 1388 /* Init RX ring. */ 1389 if (axe_rx_list_init(sc) != 0) { 1390 aprint_error_dev(sc->axe_dev, "rx list init failed\n"); 1391 splx(s); 1392 return ENOBUFS; 1393 } 1394 1395 /* Init TX ring. */ 1396 if (axe_tx_list_init(sc) != 0) { 1397 aprint_error_dev(sc->axe_dev, "tx list init failed\n"); 1398 splx(s); 1399 return ENOBUFS; 1400 } 1401 1402 /* Start up the receive pipe. */ 1403 for (i = 0; i < AXE_RX_LIST_CNT; i++) { 1404 c = &sc->axe_cdata.axe_rx_chain[i]; 1405 usbd_setup_xfer(c->axe_xfer, c, c->axe_buf, sc->axe_bufsz, 1406 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, axe_rxeof); 1407 usbd_transfer(c->axe_xfer); 1408 } 1409 1410 ifp->if_flags |= IFF_RUNNING; 1411 ifp->if_flags &= ~IFF_OACTIVE; 1412 1413 splx(s); 1414 1415 callout_schedule(&sc->axe_stat_ch, hz); 1416 return 0; 1417 } 1418 1419 static int 1420 axe_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1421 { 1422 struct axe_softc *sc = ifp->if_softc; 1423 int s; 1424 int error = 0; 1425 1426 s = splnet(); 1427 1428 switch(cmd) { 1429 case SIOCSIFFLAGS: 1430 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1431 break; 1432 1433 switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) { 1434 case IFF_RUNNING: 1435 axe_stop(ifp, 1); 1436 break; 1437 case IFF_UP: 1438 axe_init(ifp); 1439 break; 1440 case IFF_UP | IFF_RUNNING: 1441 if ((ifp->if_flags ^ sc->axe_if_flags) == IFF_PROMISC) 1442 axe_setmulti(sc); 1443 else 1444 axe_init(ifp); 1445 break; 1446 } 1447 sc->axe_if_flags = ifp->if_flags; 1448 break; 1449 1450 default: 1451 if ((error = ether_ioctl(ifp, cmd, data)) != ENETRESET) 1452 break; 1453 1454 error = 0; 1455 1456 if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI) 1457 axe_setmulti(sc); 1458 1459 } 1460 splx(s); 1461 1462 return error; 1463 } 1464 1465 static void 1466 axe_watchdog(struct ifnet *ifp) 1467 { 1468 struct axe_softc *sc; 1469 struct axe_chain *c; 1470 usbd_status stat; 1471 int s; 1472 1473 sc = ifp->if_softc; 1474 1475 ifp->if_oerrors++; 1476 aprint_error_dev(sc->axe_dev, "watchdog timeout\n"); 1477 1478 s = splusb(); 1479 c = &sc->axe_cdata.axe_tx_chain[0]; 1480 usbd_get_xfer_status(c->axe_xfer, NULL, NULL, NULL, &stat); 1481 axe_txeof(c->axe_xfer, c, stat); 1482 1483 if (!IFQ_IS_EMPTY(&ifp->if_snd)) 1484 axe_start(ifp); 1485 splx(s); 1486 } 1487 1488 /* 1489 * Stop the adapter and free any mbufs allocated to the 1490 * RX and TX lists. 1491 */ 1492 static void 1493 axe_stop(struct ifnet *ifp, int disable) 1494 { 1495 struct axe_softc *sc = ifp->if_softc; 1496 usbd_status err; 1497 int i; 1498 1499 axe_reset(sc); 1500 1501 ifp->if_timer = 0; 1502 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1503 1504 callout_stop(&sc->axe_stat_ch); 1505 1506 /* Stop transfers. */ 1507 if (sc->axe_ep[AXE_ENDPT_RX] != NULL) { 1508 err = usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_RX]); 1509 if (err) { 1510 aprint_error_dev(sc->axe_dev, 1511 "abort rx pipe failed: %s\n", usbd_errstr(err)); 1512 } 1513 } 1514 1515 if (sc->axe_ep[AXE_ENDPT_TX] != NULL) { 1516 err = usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_TX]); 1517 if (err) { 1518 aprint_error_dev(sc->axe_dev, 1519 "abort tx pipe failed: %s\n", usbd_errstr(err)); 1520 } 1521 } 1522 1523 if (sc->axe_ep[AXE_ENDPT_INTR] != NULL) { 1524 err = usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_INTR]); 1525 if (err) { 1526 aprint_error_dev(sc->axe_dev, 1527 "abort intr pipe failed: %s\n", usbd_errstr(err)); 1528 } 1529 } 1530 1531 /* Free RX resources. */ 1532 for (i = 0; i < AXE_RX_LIST_CNT; i++) { 1533 if (sc->axe_cdata.axe_rx_chain[i].axe_xfer != NULL) { 1534 usbd_destroy_xfer(sc->axe_cdata.axe_rx_chain[i].axe_xfer); 1535 sc->axe_cdata.axe_rx_chain[i].axe_xfer = NULL; 1536 } 1537 } 1538 1539 /* Free TX resources. */ 1540 for (i = 0; i < AXE_TX_LIST_CNT; i++) { 1541 if (sc->axe_cdata.axe_tx_chain[i].axe_xfer != NULL) { 1542 usbd_destroy_xfer(sc->axe_cdata.axe_tx_chain[i].axe_xfer); 1543 sc->axe_cdata.axe_tx_chain[i].axe_xfer = NULL; 1544 } 1545 } 1546 1547 /* Close pipes. */ 1548 if (sc->axe_ep[AXE_ENDPT_RX] != NULL) { 1549 err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_RX]); 1550 if (err) { 1551 aprint_error_dev(sc->axe_dev, 1552 "close rx pipe failed: %s\n", usbd_errstr(err)); 1553 } 1554 sc->axe_ep[AXE_ENDPT_RX] = NULL; 1555 } 1556 1557 if (sc->axe_ep[AXE_ENDPT_TX] != NULL) { 1558 err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_TX]); 1559 if (err) { 1560 aprint_error_dev(sc->axe_dev, 1561 "close tx pipe failed: %s\n", usbd_errstr(err)); 1562 } 1563 sc->axe_ep[AXE_ENDPT_TX] = NULL; 1564 } 1565 1566 if (sc->axe_ep[AXE_ENDPT_INTR] != NULL) { 1567 err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_INTR]); 1568 if (err) { 1569 aprint_error_dev(sc->axe_dev, 1570 "close intr pipe failed: %s\n", usbd_errstr(err)); 1571 } 1572 sc->axe_ep[AXE_ENDPT_INTR] = NULL; 1573 } 1574 1575 sc->axe_link = 0; 1576 } 1577 1578 MODULE(MODULE_CLASS_DRIVER, if_axe, "bpf"); 1579 1580 #ifdef _MODULE 1581 #include "ioconf.c" 1582 #endif 1583 1584 static int 1585 if_axe_modcmd(modcmd_t cmd, void *aux) 1586 { 1587 int error = 0; 1588 1589 switch (cmd) { 1590 case MODULE_CMD_INIT: 1591 #ifdef _MODULE 1592 error = config_init_component(cfdriver_ioconf_axe, 1593 cfattach_ioconf_axe, cfdata_ioconf_axe); 1594 #endif 1595 return error; 1596 case MODULE_CMD_FINI: 1597 #ifdef _MODULE 1598 error = config_fini_component(cfdriver_ioconf_axe, 1599 cfattach_ioconf_axe, cfdata_ioconf_axe); 1600 #endif 1601 return error; 1602 default: 1603 return ENOTTY; 1604 } 1605 } 1606