1 /* $NetBSD: ehcivar.h,v 1.36 2010/02/24 22:38:09 dyoung Exp $ */ 2 3 /* 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart@augustsson.net). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 typedef struct ehci_soft_qtd { 33 ehci_qtd_t qtd; 34 struct ehci_soft_qtd *nextqtd; /* mirrors nextqtd in TD */ 35 ehci_physaddr_t physaddr; 36 usb_dma_t dma; /* qTD's DMA infos */ 37 int offs; /* qTD's offset in usb_dma_t */ 38 usbd_xfer_handle xfer; 39 LIST_ENTRY(ehci_soft_qtd) hnext; 40 u_int16_t len; 41 } ehci_soft_qtd_t; 42 #define EHCI_SQTD_SIZE ((sizeof (struct ehci_soft_qtd) + EHCI_QTD_ALIGN - 1) / EHCI_QTD_ALIGN * EHCI_QTD_ALIGN) 43 #define EHCI_SQTD_CHUNK (EHCI_PAGE_SIZE / EHCI_SQTD_SIZE) 44 45 typedef struct ehci_soft_qh { 46 ehci_qh_t qh; 47 struct ehci_soft_qh *next; 48 struct ehci_soft_qtd *sqtd; 49 ehci_physaddr_t physaddr; 50 usb_dma_t dma; /* QH's DMA infos */ 51 int offs; /* QH's offset in usb_dma_t */ 52 int islot; 53 } ehci_soft_qh_t; 54 #define EHCI_SQH_SIZE ((sizeof (struct ehci_soft_qh) + EHCI_QH_ALIGN - 1) / EHCI_QH_ALIGN * EHCI_QH_ALIGN) 55 #define EHCI_SQH_CHUNK (EHCI_PAGE_SIZE / EHCI_SQH_SIZE) 56 57 typedef struct ehci_soft_itd { 58 ehci_itd_t itd; 59 union { 60 struct { 61 /* soft_itds links in a periodic frame*/ 62 struct ehci_soft_itd *next; 63 struct ehci_soft_itd *prev; 64 } frame_list; 65 /* circular list of free itds */ 66 LIST_ENTRY(ehci_soft_itd) free_list; 67 } u; 68 struct ehci_soft_itd *xfer_next; /* Next soft_itd in xfer */ 69 ehci_physaddr_t physaddr; 70 usb_dma_t dma; 71 int offs; 72 int slot; 73 struct timeval t; /* store free time */ 74 } ehci_soft_itd_t; 75 #define EHCI_ITD_SIZE ((sizeof(struct ehci_soft_itd) + EHCI_QH_ALIGN - 1) / EHCI_ITD_ALIGN * EHCI_ITD_ALIGN) 76 #define EHCI_ITD_CHUNK (EHCI_PAGE_SIZE / EHCI_ITD_SIZE) 77 78 struct ehci_xfer { 79 struct usbd_xfer xfer; 80 struct usb_task abort_task; 81 TAILQ_ENTRY(ehci_xfer) inext; /* list of active xfers */ 82 ehci_soft_qtd_t *sqtdstart; 83 ehci_soft_qtd_t *sqtdend; 84 ehci_soft_itd_t *itdstart; 85 ehci_soft_itd_t *itdend; 86 u_int isoc_len; 87 int isdone; /* used only when DIAGNOSTIC is defined */ 88 }; 89 #define EXFER(xfer) ((struct ehci_xfer *)(xfer)) 90 91 /* Information about an entry in the interrupt list. */ 92 struct ehci_soft_islot { 93 ehci_soft_qh_t *sqh; /* Queue Head. */ 94 }; 95 96 #define EHCI_FRAMELIST_MAXCOUNT 1024 97 #define EHCI_IPOLLRATES 8 /* Poll rates (1ms, 2, 4, 8 .. 128) */ 98 #define EHCI_INTRQHS ((1 << EHCI_IPOLLRATES) - 1) 99 #define EHCI_MAX_POLLRATE (1 << (EHCI_IPOLLRATES - 1)) 100 #define EHCI_IQHIDX(lev, pos) \ 101 ((((pos) & ((1 << (lev)) - 1)) | (1 << (lev))) - 1) 102 #define EHCI_ILEV_IVAL(lev) (1 << (lev)) 103 104 105 #define EHCI_HASH_SIZE 128 106 #define EHCI_COMPANION_MAX 8 107 108 #define EHCI_FREE_LIST_INTERVAL 100 109 110 typedef struct ehci_softc { 111 device_t sc_dev; 112 struct usbd_bus sc_bus; 113 bus_space_tag_t iot; 114 bus_space_handle_t ioh; 115 bus_size_t sc_size; 116 u_int sc_offs; /* offset to operational regs */ 117 int sc_flags; /* misc flags */ 118 #define EHCIF_DROPPED_INTR_WORKAROUND 0x01 119 120 char sc_vendor[32]; /* vendor string for root hub */ 121 int sc_id_vendor; /* vendor ID for root hub */ 122 123 u_int32_t sc_cmd; /* shadow of cmd reg during suspend */ 124 125 u_int sc_ncomp; 126 u_int sc_npcomp; 127 device_t sc_comps[EHCI_COMPANION_MAX]; 128 129 usb_dma_t sc_fldma; 130 ehci_link_t *sc_flist; 131 u_int sc_flsize; 132 u_int sc_rand; /* XXX need proper intr scheduling */ 133 134 struct ehci_soft_islot sc_islots[EHCI_INTRQHS]; 135 136 /* jcmm - an array matching sc_flist, but with software pointers, 137 * not hardware address pointers 138 */ 139 struct ehci_soft_itd **sc_softitds; 140 141 TAILQ_HEAD(, ehci_xfer) sc_intrhead; 142 kmutex_t sc_intrhead_lock; 143 144 ehci_soft_qh_t *sc_freeqhs; 145 ehci_soft_qtd_t *sc_freeqtds; 146 LIST_HEAD(sc_freeitds, ehci_soft_itd) sc_freeitds; 147 148 int sc_noport; 149 u_int8_t sc_hasppc; /* has Port Power Control */ 150 u_int8_t sc_addr; /* device address */ 151 u_int8_t sc_conf; /* device configuration */ 152 usbd_xfer_handle sc_intrxfer; 153 char sc_isreset[EHCI_MAX_PORTS]; 154 #ifdef USB_USE_SOFTINTR 155 char sc_softwake; 156 #endif /* USB_USE_SOFTINTR */ 157 158 u_int32_t sc_eintrs; 159 ehci_soft_qh_t *sc_async_head; 160 161 SIMPLEQ_HEAD(, usbd_xfer) sc_free_xfers; /* free xfers */ 162 163 kmutex_t sc_doorbell_lock; 164 165 struct callout sc_tmo_intrlist; 166 167 device_t sc_child; /* /dev/usb# device */ 168 char sc_dying; 169 struct usb_dma_reserve sc_dma_reserve; 170 } ehci_softc_t; 171 172 #define EREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (a)) 173 #define EREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (a)) 174 #define EREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (a)) 175 #define EWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (a), (x)) 176 #define EWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (a), (x)) 177 #define EWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (a), (x)) 178 #define EOREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a)) 179 #define EOREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a)) 180 #define EOREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a)) 181 #define EOWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x)) 182 #define EOWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x)) 183 #define EOWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x)) 184 185 usbd_status ehci_init(ehci_softc_t *); 186 int ehci_intr(void *); 187 int ehci_detach(ehci_softc_t *, int); 188 int ehci_activate(device_t, enum devact); 189 void ehci_childdet(device_t, device_t); 190 bool ehci_suspend(device_t, const pmf_qual_t *); 191 bool ehci_resume(device_t, const pmf_qual_t *); 192 bool ehci_shutdown(device_t, int); 193