1 /* $NetBSD: ehci.c,v 1.42 2003/02/04 18:41:20 augustss Exp $ */ 2 3 /* 4 * TODO 5 * hold off explorations by companion controllers until ehci has started. 6 */ 7 8 /* 9 * Copyright (c) 2001 The NetBSD Foundation, Inc. 10 * All rights reserved. 11 * 12 * This code is derived from software contributed to The NetBSD Foundation 13 * by Lennart Augustsson (lennart@augustsson.net). 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the NetBSD 26 * Foundation, Inc. and its contributors. 27 * 4. Neither the name of The NetBSD Foundation nor the names of its 28 * contributors may be used to endorse or promote products derived 29 * from this software without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 32 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 33 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 34 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 35 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 36 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 37 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 38 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 39 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 40 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGE. 42 */ 43 44 /* 45 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 46 * 47 * The EHCI 1.0 spec can be found at 48 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 49 * and the USB 2.0 spec at 50 * http://www.usb.org/developers/data/usb_20.zip 51 * 52 */ 53 54 #include <sys/cdefs.h> 55 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.42 2003/02/04 18:41:20 augustss Exp $"); 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/kernel.h> 60 #include <sys/malloc.h> 61 #include <sys/device.h> 62 #include <sys/select.h> 63 #include <sys/proc.h> 64 #include <sys/queue.h> 65 66 #include <machine/bus.h> 67 #include <machine/endian.h> 68 69 #include <dev/usb/usb.h> 70 #include <dev/usb/usbdi.h> 71 #include <dev/usb/usbdivar.h> 72 #include <dev/usb/usb_mem.h> 73 #include <dev/usb/usb_quirks.h> 74 75 #include <dev/usb/ehcireg.h> 76 #include <dev/usb/ehcivar.h> 77 78 #ifdef EHCI_DEBUG 79 #define DPRINTF(x) if (ehcidebug) printf x 80 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 81 int ehcidebug = 0; 82 #ifndef __NetBSD__ 83 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 84 #endif 85 #else 86 #define DPRINTF(x) 87 #define DPRINTFN(n,x) 88 #endif 89 90 struct ehci_pipe { 91 struct usbd_pipe pipe; 92 ehci_soft_qh_t *sqh; 93 union { 94 ehci_soft_qtd_t *qtd; 95 /* ehci_soft_itd_t *itd; */ 96 } tail; 97 union { 98 /* Control pipe */ 99 struct { 100 usb_dma_t reqdma; 101 u_int length; 102 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 103 } ctl; 104 /* Interrupt pipe */ 105 /* XXX */ 106 /* Bulk pipe */ 107 struct { 108 u_int length; 109 } bulk; 110 /* Iso pipe */ 111 /* XXX */ 112 } u; 113 }; 114 115 Static void ehci_shutdown(void *); 116 Static void ehci_power(int, void *); 117 118 Static usbd_status ehci_open(usbd_pipe_handle); 119 Static void ehci_poll(struct usbd_bus *); 120 Static void ehci_softintr(void *); 121 Static int ehci_intr1(ehci_softc_t *); 122 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 123 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 124 Static void ehci_idone(struct ehci_xfer *); 125 Static void ehci_timeout(void *); 126 Static void ehci_timeout_task(void *); 127 128 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 129 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 130 131 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 132 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 133 134 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 135 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 136 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 137 Static void ehci_root_ctrl_close(usbd_pipe_handle); 138 Static void ehci_root_ctrl_done(usbd_xfer_handle); 139 140 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 141 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 142 Static void ehci_root_intr_abort(usbd_xfer_handle); 143 Static void ehci_root_intr_close(usbd_pipe_handle); 144 Static void ehci_root_intr_done(usbd_xfer_handle); 145 146 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 147 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 148 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 149 Static void ehci_device_ctrl_close(usbd_pipe_handle); 150 Static void ehci_device_ctrl_done(usbd_xfer_handle); 151 152 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 153 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 154 Static void ehci_device_bulk_abort(usbd_xfer_handle); 155 Static void ehci_device_bulk_close(usbd_pipe_handle); 156 Static void ehci_device_bulk_done(usbd_xfer_handle); 157 158 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 159 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 160 Static void ehci_device_intr_abort(usbd_xfer_handle); 161 Static void ehci_device_intr_close(usbd_pipe_handle); 162 Static void ehci_device_intr_done(usbd_xfer_handle); 163 164 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 165 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 166 Static void ehci_device_isoc_abort(usbd_xfer_handle); 167 Static void ehci_device_isoc_close(usbd_pipe_handle); 168 Static void ehci_device_isoc_done(usbd_xfer_handle); 169 170 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 171 Static void ehci_noop(usbd_pipe_handle pipe); 172 173 Static int ehci_str(usb_string_descriptor_t *, int, char *); 174 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 175 Static void ehci_pcd_able(ehci_softc_t *, int); 176 Static void ehci_pcd_enable(void *); 177 Static void ehci_disown(ehci_softc_t *, int, int); 178 179 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 180 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 181 182 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 183 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 184 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 185 ehci_softc_t *, int, int, usbd_xfer_handle, 186 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 187 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 188 ehci_soft_qtd_t *); 189 190 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 191 192 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 193 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 194 ehci_soft_qh_t *); 195 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 196 Static void ehci_sync_hc(ehci_softc_t *); 197 198 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 199 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 200 201 #ifdef EHCI_DEBUG 202 Static void ehci_dump_regs(ehci_softc_t *); 203 Static void ehci_dump(void); 204 Static ehci_softc_t *theehci; 205 Static void ehci_dump_link(ehci_link_t, int); 206 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 207 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 208 Static void ehci_dump_qtd(ehci_qtd_t *); 209 Static void ehci_dump_sqh(ehci_soft_qh_t *); 210 #ifdef DIAGNOSTIC 211 Static void ehci_dump_exfer(struct ehci_xfer *); 212 #endif 213 #endif 214 215 #define MS_TO_TICKS(ms) ((ms) * hz / 1000) 216 217 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 218 219 #define EHCI_INTR_ENDPT 1 220 221 #define ehci_add_intr_list(sc, ex) \ 222 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 223 #define ehci_del_intr_list(ex) \ 224 LIST_REMOVE((ex), inext) 225 226 Static struct usbd_bus_methods ehci_bus_methods = { 227 ehci_open, 228 ehci_softintr, 229 ehci_poll, 230 ehci_allocm, 231 ehci_freem, 232 ehci_allocx, 233 ehci_freex, 234 }; 235 236 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 237 ehci_root_ctrl_transfer, 238 ehci_root_ctrl_start, 239 ehci_root_ctrl_abort, 240 ehci_root_ctrl_close, 241 ehci_noop, 242 ehci_root_ctrl_done, 243 }; 244 245 Static struct usbd_pipe_methods ehci_root_intr_methods = { 246 ehci_root_intr_transfer, 247 ehci_root_intr_start, 248 ehci_root_intr_abort, 249 ehci_root_intr_close, 250 ehci_noop, 251 ehci_root_intr_done, 252 }; 253 254 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 255 ehci_device_ctrl_transfer, 256 ehci_device_ctrl_start, 257 ehci_device_ctrl_abort, 258 ehci_device_ctrl_close, 259 ehci_noop, 260 ehci_device_ctrl_done, 261 }; 262 263 Static struct usbd_pipe_methods ehci_device_intr_methods = { 264 ehci_device_intr_transfer, 265 ehci_device_intr_start, 266 ehci_device_intr_abort, 267 ehci_device_intr_close, 268 ehci_device_clear_toggle, 269 ehci_device_intr_done, 270 }; 271 272 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 273 ehci_device_bulk_transfer, 274 ehci_device_bulk_start, 275 ehci_device_bulk_abort, 276 ehci_device_bulk_close, 277 ehci_device_clear_toggle, 278 ehci_device_bulk_done, 279 }; 280 281 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 282 ehci_device_isoc_transfer, 283 ehci_device_isoc_start, 284 ehci_device_isoc_abort, 285 ehci_device_isoc_close, 286 ehci_noop, 287 ehci_device_isoc_done, 288 }; 289 290 usbd_status 291 ehci_init(ehci_softc_t *sc) 292 { 293 u_int32_t version, sparams, cparams, hcr; 294 u_int i; 295 usbd_status err; 296 ehci_soft_qh_t *sqh; 297 298 DPRINTF(("ehci_init: start\n")); 299 #ifdef EHCI_DEBUG 300 theehci = sc; 301 #endif 302 303 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 304 305 version = EREAD2(sc, EHCI_HCIVERSION); 306 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 307 version >> 8, version & 0xff); 308 309 sparams = EREAD4(sc, EHCI_HCSPARAMS); 310 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 311 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 312 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 313 aprint_error("%s: wrong number of companions (%d != %d)\n", 314 USBDEVNAME(sc->sc_bus.bdev), 315 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 316 return (USBD_IOERROR); 317 } 318 if (sc->sc_ncomp > 0) { 319 aprint_normal("%s: companion controller%s, %d port%s each:", 320 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 321 EHCI_HCS_N_PCC(sparams), 322 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 323 for (i = 0; i < sc->sc_ncomp; i++) 324 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 325 aprint_normal("\n"); 326 } 327 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 328 cparams = EREAD4(sc, EHCI_HCCPARAMS); 329 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 330 331 if (EHCI_HCC_64BIT(cparams)) { 332 /* MUST clear segment register if 64 bit capable. */ 333 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 334 } 335 336 sc->sc_bus.usbrev = USBREV_2_0; 337 338 /* Reset the controller */ 339 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 340 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 341 usb_delay_ms(&sc->sc_bus, 1); 342 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 343 for (i = 0; i < 100; i++) { 344 usb_delay_ms(&sc->sc_bus, 1); 345 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 346 if (!hcr) 347 break; 348 } 349 if (hcr) { 350 aprint_error("%s: reset timeout\n", 351 USBDEVNAME(sc->sc_bus.bdev)); 352 return (USBD_IOERROR); 353 } 354 355 /* frame list size at default, read back what we got and use that */ 356 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 357 case 0: sc->sc_flsize = 1024*4; break; 358 case 1: sc->sc_flsize = 512*4; break; 359 case 2: sc->sc_flsize = 256*4; break; 360 case 3: return (USBD_IOERROR); 361 } 362 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 363 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 364 if (err) 365 return (err); 366 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 367 368 /* Set up the bus struct. */ 369 sc->sc_bus.methods = &ehci_bus_methods; 370 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 371 372 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 373 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 374 375 sc->sc_eintrs = EHCI_NORMAL_INTRS; 376 377 /* Allocate dummy QH that starts the async list. */ 378 sqh = ehci_alloc_sqh(sc); 379 if (sqh == NULL) { 380 err = USBD_NOMEM; 381 goto bad1; 382 } 383 /* Fill the QH */ 384 sqh->qh.qh_endp = 385 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 386 sqh->qh.qh_link = 387 htole32(sqh->physaddr | EHCI_LINK_QH); 388 sqh->qh.qh_curqtd = EHCI_NULL; 389 sqh->next = NULL; 390 /* Fill the overlay qTD */ 391 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 392 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 393 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 394 sqh->sqtd = NULL; 395 #ifdef EHCI_DEBUG 396 if (ehcidebug) { 397 ehci_dump_sqh(sqh); 398 } 399 #endif 400 401 /* Point to async list */ 402 sc->sc_async_head = sqh; 403 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 404 405 usb_callout_init(sc->sc_tmo_pcd); 406 407 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 408 409 /* Enable interrupts */ 410 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 411 412 /* Turn on controller */ 413 EOWRITE4(sc, EHCI_USBCMD, 414 EHCI_CMD_ITC_8 | /* 8 microframes */ 415 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 416 EHCI_CMD_ASE | 417 /* EHCI_CMD_PSE | */ 418 EHCI_CMD_RS); 419 420 /* Take over port ownership */ 421 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 422 423 for (i = 0; i < 100; i++) { 424 usb_delay_ms(&sc->sc_bus, 1); 425 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 426 if (!hcr) 427 break; 428 } 429 if (hcr) { 430 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 431 return (USBD_IOERROR); 432 } 433 434 return (USBD_NORMAL_COMPLETION); 435 436 #if 0 437 bad2: 438 ehci_free_sqh(sc, sc->sc_async_head); 439 #endif 440 bad1: 441 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 442 return (err); 443 } 444 445 int 446 ehci_intr(void *v) 447 { 448 ehci_softc_t *sc = v; 449 450 if (sc == NULL || sc->sc_dying) 451 return (0); 452 453 /* If we get an interrupt while polling, then just ignore it. */ 454 if (sc->sc_bus.use_polling) { 455 #ifdef DIAGNOSTIC 456 printf("ehci_intr: ignored interrupt while polling\n"); 457 #endif 458 return (0); 459 } 460 461 return (ehci_intr1(sc)); 462 } 463 464 Static int 465 ehci_intr1(ehci_softc_t *sc) 466 { 467 u_int32_t intrs, eintrs; 468 469 DPRINTFN(20,("ehci_intr1: enter\n")); 470 471 /* In case the interrupt occurs before initialization has completed. */ 472 if (sc == NULL) { 473 #ifdef DIAGNOSTIC 474 printf("ehci_intr: sc == NULL\n"); 475 #endif 476 return (0); 477 } 478 479 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 480 481 if (!intrs) 482 return (0); 483 484 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 485 eintrs = intrs & sc->sc_eintrs; 486 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 487 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 488 (u_int)eintrs)); 489 if (!eintrs) 490 return (0); 491 492 sc->sc_bus.intr_context++; 493 sc->sc_bus.no_intrs++; 494 if (eintrs & EHCI_STS_IAA) { 495 DPRINTF(("ehci_intr1: door bell\n")); 496 wakeup(&sc->sc_async_head); 497 eintrs &= ~EHCI_STS_IAA; 498 } 499 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 500 DPRINTF(("ehci_intr1: %s %s\n", 501 eintrs & EHCI_STS_INT ? "INT" : "", 502 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 503 usb_schedsoftintr(&sc->sc_bus); 504 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 505 } 506 if (eintrs & EHCI_STS_HSE) { 507 printf("%s: unrecoverable error, controller halted\n", 508 USBDEVNAME(sc->sc_bus.bdev)); 509 /* XXX what else */ 510 } 511 if (eintrs & EHCI_STS_PCD) { 512 ehci_pcd(sc, sc->sc_intrxfer); 513 /* 514 * Disable PCD interrupt for now, because it will be 515 * on until the port has been reset. 516 */ 517 ehci_pcd_able(sc, 0); 518 /* Do not allow RHSC interrupts > 1 per second */ 519 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 520 eintrs &= ~EHCI_STS_PCD; 521 } 522 523 sc->sc_bus.intr_context--; 524 525 if (eintrs != 0) { 526 /* Block unprocessed interrupts. */ 527 sc->sc_eintrs &= ~eintrs; 528 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 529 printf("%s: blocking intrs 0x%x\n", 530 USBDEVNAME(sc->sc_bus.bdev), eintrs); 531 } 532 533 return (1); 534 } 535 536 void 537 ehci_pcd_able(ehci_softc_t *sc, int on) 538 { 539 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 540 if (on) 541 sc->sc_eintrs |= EHCI_STS_PCD; 542 else 543 sc->sc_eintrs &= ~EHCI_STS_PCD; 544 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 545 } 546 547 void 548 ehci_pcd_enable(void *v_sc) 549 { 550 ehci_softc_t *sc = v_sc; 551 552 ehci_pcd_able(sc, 1); 553 } 554 555 void 556 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 557 { 558 usbd_pipe_handle pipe; 559 struct ehci_pipe *epipe; 560 u_char *p; 561 int i, m; 562 563 if (xfer == NULL) { 564 /* Just ignore the change. */ 565 return; 566 } 567 568 pipe = xfer->pipe; 569 epipe = (struct ehci_pipe *)pipe; 570 571 p = KERNADDR(&xfer->dmabuf, 0); 572 m = min(sc->sc_noport, xfer->length * 8 - 1); 573 memset(p, 0, xfer->length); 574 for (i = 1; i <= m; i++) { 575 /* Pick out CHANGE bits from the status reg. */ 576 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 577 p[i/8] |= 1 << (i%8); 578 } 579 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 580 xfer->actlen = xfer->length; 581 xfer->status = USBD_NORMAL_COMPLETION; 582 583 usb_transfer_complete(xfer); 584 } 585 586 void 587 ehci_softintr(void *v) 588 { 589 ehci_softc_t *sc = v; 590 struct ehci_xfer *ex; 591 592 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 593 sc->sc_bus.intr_context)); 594 595 sc->sc_bus.intr_context++; 596 597 /* 598 * The only explanation I can think of for why EHCI is as brain dead 599 * as UHCI interrupt-wise is that Intel was involved in both. 600 * An interrupt just tells us that something is done, we have no 601 * clue what, so we need to scan through all active transfers. :-( 602 */ 603 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = LIST_NEXT(ex, inext)) 604 ehci_check_intr(sc, ex); 605 606 if (sc->sc_softwake) { 607 sc->sc_softwake = 0; 608 wakeup(&sc->sc_softwake); 609 } 610 611 sc->sc_bus.intr_context--; 612 } 613 614 /* Check for an interrupt. */ 615 void 616 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 617 { 618 ehci_soft_qtd_t *sqtd, *lsqtd; 619 u_int32_t status; 620 621 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 622 623 if (ex->sqtdstart == NULL) { 624 printf("ehci_check_intr: sqtdstart=NULL\n"); 625 return; 626 } 627 lsqtd = ex->sqtdend; 628 #ifdef DIAGNOSTIC 629 if (lsqtd == NULL) { 630 printf("ehci_check_intr: sqtd==0\n"); 631 return; 632 } 633 #endif 634 /* 635 * If the last TD is still active we need to check whether there 636 * is a an error somewhere in the middle, or whether there was a 637 * short packet (SPD and not ACTIVE). 638 */ 639 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 640 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 641 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 642 status = le32toh(sqtd->qtd.qtd_status); 643 /* If there's an active QTD the xfer isn't done. */ 644 if (status & EHCI_QTD_ACTIVE) 645 break; 646 /* Any kind of error makes the xfer done. */ 647 if (status & EHCI_QTD_HALTED) 648 goto done; 649 /* We want short packets, and it is short: it's done */ 650 if (EHCI_QTD_SET_BYTES(status) != 0) 651 goto done; 652 } 653 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 654 ex, ex->sqtdstart)); 655 return; 656 } 657 done: 658 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 659 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 660 ehci_idone(ex); 661 } 662 663 void 664 ehci_idone(struct ehci_xfer *ex) 665 { 666 usbd_xfer_handle xfer = &ex->xfer; 667 #ifdef EHCI_DEBUG 668 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 669 #endif 670 ehci_soft_qtd_t *sqtd; 671 u_int32_t status = 0, nstatus; 672 int actlen; 673 674 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 675 #ifdef DIAGNOSTIC 676 { 677 int s = splhigh(); 678 if (ex->isdone) { 679 splx(s); 680 #ifdef EHCI_DEBUG 681 printf("ehci_idone: ex is done!\n "); 682 ehci_dump_exfer(ex); 683 #else 684 printf("ehci_idone: ex=%p is done!\n", ex); 685 #endif 686 return; 687 } 688 ex->isdone = 1; 689 splx(s); 690 } 691 #endif 692 693 if (xfer->status == USBD_CANCELLED || 694 xfer->status == USBD_TIMEOUT) { 695 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 696 return; 697 } 698 699 #ifdef EHCI_DEBUG 700 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 701 if (ehcidebug > 10) 702 ehci_dump_sqtds(ex->sqtdstart); 703 #endif 704 705 /* The transfer is done, compute actual length and status. */ 706 actlen = 0; 707 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 708 nstatus = le32toh(sqtd->qtd.qtd_status); 709 if (nstatus & EHCI_QTD_ACTIVE) 710 break; 711 712 status = nstatus; 713 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 714 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 715 } 716 717 /* If there are left over TDs we need to update the toggle. */ 718 if (sqtd != NULL) { 719 if (!(xfer->rqflags & URQ_REQUEST)) 720 printf("ehci_idone: need toggle update\n"); 721 #if 0 722 epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token)); 723 #endif 724 } 725 726 status &= EHCI_QTD_STATERRS; 727 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 728 xfer->length, actlen, status)); 729 xfer->actlen = actlen; 730 if (status != 0) { 731 #ifdef EHCI_DEBUG 732 char sbuf[128]; 733 734 bitmask_snprintf((u_int32_t)status, 735 "\20\3MISSEDMICRO\4XACT\5BABBLE\6BABBLE" 736 "\7HALTED", 737 sbuf, sizeof(sbuf)); 738 739 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2, 740 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 741 "status 0x%s\n", 742 xfer->pipe->device->address, 743 xfer->pipe->endpoint->edesc->bEndpointAddress, 744 sbuf)); 745 if (ehcidebug > 2) { 746 ehci_dump_sqh(epipe->sqh); 747 ehci_dump_sqtds(ex->sqtdstart); 748 } 749 #endif 750 if (status == EHCI_QTD_HALTED) 751 xfer->status = USBD_STALLED; 752 else 753 xfer->status = USBD_IOERROR; /* more info XXX */ 754 } else { 755 xfer->status = USBD_NORMAL_COMPLETION; 756 } 757 758 usb_transfer_complete(xfer); 759 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 760 } 761 762 /* 763 * Wait here until controller claims to have an interrupt. 764 * Then call ehci_intr and return. Use timeout to avoid waiting 765 * too long. 766 */ 767 void 768 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 769 { 770 int timo = xfer->timeout; 771 int usecs; 772 u_int32_t intrs; 773 774 xfer->status = USBD_IN_PROGRESS; 775 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 776 usb_delay_ms(&sc->sc_bus, 1); 777 if (sc->sc_dying) 778 break; 779 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 780 sc->sc_eintrs; 781 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 782 #ifdef OHCI_DEBUG 783 if (ehcidebug > 15) 784 ehci_dump_regs(sc); 785 #endif 786 if (intrs) { 787 ehci_intr1(sc); 788 if (xfer->status != USBD_IN_PROGRESS) 789 return; 790 } 791 } 792 793 /* Timeout */ 794 DPRINTF(("ehci_waitintr: timeout\n")); 795 xfer->status = USBD_TIMEOUT; 796 usb_transfer_complete(xfer); 797 /* XXX should free TD */ 798 } 799 800 void 801 ehci_poll(struct usbd_bus *bus) 802 { 803 ehci_softc_t *sc = (ehci_softc_t *)bus; 804 #ifdef EHCI_DEBUG 805 static int last; 806 int new; 807 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 808 if (new != last) { 809 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 810 last = new; 811 } 812 #endif 813 814 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 815 ehci_intr1(sc); 816 } 817 818 int 819 ehci_detach(struct ehci_softc *sc, int flags) 820 { 821 int rv = 0; 822 823 if (sc->sc_child != NULL) 824 rv = config_detach(sc->sc_child, flags); 825 826 if (rv != 0) 827 return (rv); 828 829 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 830 831 if (sc->sc_powerhook != NULL) 832 powerhook_disestablish(sc->sc_powerhook); 833 if (sc->sc_shutdownhook != NULL) 834 shutdownhook_disestablish(sc->sc_shutdownhook); 835 836 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 837 838 /* XXX free other data structures XXX */ 839 840 return (rv); 841 } 842 843 844 int 845 ehci_activate(device_ptr_t self, enum devact act) 846 { 847 struct ehci_softc *sc = (struct ehci_softc *)self; 848 int rv = 0; 849 850 switch (act) { 851 case DVACT_ACTIVATE: 852 return (EOPNOTSUPP); 853 break; 854 855 case DVACT_DEACTIVATE: 856 if (sc->sc_child != NULL) 857 rv = config_deactivate(sc->sc_child); 858 sc->sc_dying = 1; 859 break; 860 } 861 return (rv); 862 } 863 864 /* 865 * Handle suspend/resume. 866 * 867 * We need to switch to polling mode here, because this routine is 868 * called from an intterupt context. This is all right since we 869 * are almost suspended anyway. 870 */ 871 void 872 ehci_power(int why, void *v) 873 { 874 ehci_softc_t *sc = v; 875 //u_int32_t ctl; 876 int s; 877 878 #ifdef EHCI_DEBUG 879 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 880 ehci_dump_regs(sc); 881 #endif 882 883 s = splhardusb(); 884 switch (why) { 885 case PWR_SUSPEND: 886 case PWR_STANDBY: 887 sc->sc_bus.use_polling++; 888 #if 0 889 OOO 890 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 891 if (sc->sc_control == 0) { 892 /* 893 * Preserve register values, in case that APM BIOS 894 * does not recover them. 895 */ 896 sc->sc_control = ctl; 897 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 898 } 899 ctl |= EHCI_HCFS_SUSPEND; 900 OWRITE4(sc, EHCI_CONTROL, ctl); 901 #endif 902 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 903 sc->sc_bus.use_polling--; 904 break; 905 case PWR_RESUME: 906 sc->sc_bus.use_polling++; 907 #if 0 908 OOO 909 /* Some broken BIOSes do not recover these values */ 910 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 911 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 912 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 913 if (sc->sc_intre) 914 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 915 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 916 if (sc->sc_control) 917 ctl = sc->sc_control; 918 else 919 ctl = OREAD4(sc, EHCI_CONTROL); 920 ctl |= EHCI_HCFS_RESUME; 921 OWRITE4(sc, EHCI_CONTROL, ctl); 922 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 923 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 924 OWRITE4(sc, EHCI_CONTROL, ctl); 925 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 926 sc->sc_control = sc->sc_intre = 0; 927 #endif 928 sc->sc_bus.use_polling--; 929 break; 930 case PWR_SOFTSUSPEND: 931 case PWR_SOFTSTANDBY: 932 case PWR_SOFTRESUME: 933 break; 934 } 935 splx(s); 936 } 937 938 /* 939 * Shut down the controller when the system is going down. 940 */ 941 void 942 ehci_shutdown(void *v) 943 { 944 ehci_softc_t *sc = v; 945 946 DPRINTF(("ehci_shutdown: stopping the HC\n")); 947 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 948 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 949 } 950 951 usbd_status 952 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 953 { 954 struct ehci_softc *sc = (struct ehci_softc *)bus; 955 usbd_status err; 956 957 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 958 #ifdef EHCI_DEBUG 959 if (err) 960 printf("ehci_allocm: usb_allocmem()=%d\n", err); 961 #endif 962 return (err); 963 } 964 965 void 966 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 967 { 968 struct ehci_softc *sc = (struct ehci_softc *)bus; 969 970 usb_freemem(&sc->sc_bus, dma); 971 } 972 973 usbd_xfer_handle 974 ehci_allocx(struct usbd_bus *bus) 975 { 976 struct ehci_softc *sc = (struct ehci_softc *)bus; 977 usbd_xfer_handle xfer; 978 979 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 980 if (xfer != NULL) { 981 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 982 #ifdef DIAGNOSTIC 983 if (xfer->busy_free != XFER_FREE) { 984 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 985 xfer->busy_free); 986 } 987 #endif 988 } else { 989 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 990 } 991 if (xfer != NULL) { 992 memset(xfer, 0, sizeof (struct ehci_xfer)); 993 #ifdef DIAGNOSTIC 994 EXFER(xfer)->isdone = 1; 995 xfer->busy_free = XFER_BUSY; 996 #endif 997 } 998 return (xfer); 999 } 1000 1001 void 1002 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1003 { 1004 struct ehci_softc *sc = (struct ehci_softc *)bus; 1005 1006 #ifdef DIAGNOSTIC 1007 if (xfer->busy_free != XFER_BUSY) { 1008 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1009 xfer->busy_free); 1010 return; 1011 } 1012 xfer->busy_free = XFER_FREE; 1013 if (!EXFER(xfer)->isdone) { 1014 printf("ehci_freex: !isdone\n"); 1015 return; 1016 } 1017 #endif 1018 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1019 } 1020 1021 Static void 1022 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1023 { 1024 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1025 1026 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1027 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1028 #ifdef USB_DEBUG 1029 if (ehcidebug) 1030 usbd_dump_pipe(pipe); 1031 #endif 1032 epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 1033 } 1034 1035 Static void 1036 ehci_noop(usbd_pipe_handle pipe) 1037 { 1038 } 1039 1040 #ifdef EHCI_DEBUG 1041 void 1042 ehci_dump_regs(ehci_softc_t *sc) 1043 { 1044 int i; 1045 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1046 EOREAD4(sc, EHCI_USBCMD), 1047 EOREAD4(sc, EHCI_USBSTS), 1048 EOREAD4(sc, EHCI_USBINTR)); 1049 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1050 EOREAD4(sc, EHCI_FRINDEX), 1051 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1052 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1053 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1054 for (i = 1; i <= sc->sc_noport; i++) 1055 printf("port %d status=0x%08x\n", i, 1056 EOREAD4(sc, EHCI_PORTSC(i))); 1057 } 1058 1059 /* 1060 * Unused function - this is meant to be called from a kernel 1061 * debugger. 1062 */ 1063 void 1064 ehci_dump() 1065 { 1066 ehci_dump_regs(theehci); 1067 } 1068 1069 void 1070 ehci_dump_link(ehci_link_t link, int type) 1071 { 1072 link = le32toh(link); 1073 printf("0x%08x", link); 1074 if (link & EHCI_LINK_TERMINATE) 1075 printf("<T>"); 1076 else { 1077 printf("<"); 1078 if (type) { 1079 switch (EHCI_LINK_TYPE(link)) { 1080 case EHCI_LINK_ITD: printf("ITD"); break; 1081 case EHCI_LINK_QH: printf("QH"); break; 1082 case EHCI_LINK_SITD: printf("SITD"); break; 1083 case EHCI_LINK_FSTN: printf("FSTN"); break; 1084 } 1085 } 1086 printf(">"); 1087 } 1088 } 1089 1090 void 1091 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1092 { 1093 int i; 1094 u_int32_t stop; 1095 1096 stop = 0; 1097 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1098 ehci_dump_sqtd(sqtd); 1099 stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE; 1100 } 1101 if (sqtd) 1102 printf("dump aborted, too many TDs\n"); 1103 } 1104 1105 void 1106 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1107 { 1108 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1109 ehci_dump_qtd(&sqtd->qtd); 1110 } 1111 1112 void 1113 ehci_dump_qtd(ehci_qtd_t *qtd) 1114 { 1115 u_int32_t s; 1116 char sbuf[128]; 1117 1118 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1119 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1120 printf("\n"); 1121 s = le32toh(qtd->qtd_status); 1122 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1123 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1124 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1125 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1126 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1127 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1128 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1129 EHCI_QTD_GET_PID(s), sbuf); 1130 for (s = 0; s < 5; s++) 1131 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1132 } 1133 1134 void 1135 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1136 { 1137 ehci_qh_t *qh = &sqh->qh; 1138 u_int32_t endp, endphub; 1139 1140 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1141 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1142 endp = le32toh(qh->qh_endp); 1143 printf(" endp=0x%08x\n", endp); 1144 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1145 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1146 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1147 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1148 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1149 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1150 EHCI_QH_GET_NRL(endp)); 1151 endphub = le32toh(qh->qh_endphub); 1152 printf(" endphub=0x%08x\n", endphub); 1153 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1154 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1155 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1156 EHCI_QH_GET_MULT(endphub)); 1157 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1158 printf("Overlay qTD:\n"); 1159 ehci_dump_qtd(&qh->qh_qtd); 1160 } 1161 1162 #ifdef DIAGNOSTIC 1163 Static void 1164 ehci_dump_exfer(struct ehci_xfer *ex) 1165 { 1166 printf("ehci_dump_exfer: ex=%p\n", ex); 1167 } 1168 #endif 1169 #endif 1170 1171 usbd_status 1172 ehci_open(usbd_pipe_handle pipe) 1173 { 1174 usbd_device_handle dev = pipe->device; 1175 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1176 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1177 u_int8_t addr = dev->address; 1178 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1179 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1180 ehci_soft_qh_t *sqh; 1181 usbd_status err; 1182 int s; 1183 int speed, naks; 1184 1185 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1186 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1187 1188 if (sc->sc_dying) 1189 return (USBD_IOERROR); 1190 1191 if (addr == sc->sc_addr) { 1192 switch (ed->bEndpointAddress) { 1193 case USB_CONTROL_ENDPOINT: 1194 pipe->methods = &ehci_root_ctrl_methods; 1195 break; 1196 case UE_DIR_IN | EHCI_INTR_ENDPT: 1197 pipe->methods = &ehci_root_intr_methods; 1198 break; 1199 default: 1200 return (USBD_INVAL); 1201 } 1202 return (USBD_NORMAL_COMPLETION); 1203 } 1204 1205 /* XXX All this stuff is only valid for async. */ 1206 switch (dev->speed) { 1207 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1208 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1209 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1210 default: panic("ehci_open: bad device speed %d", dev->speed); 1211 } 1212 naks = 8; /* XXX */ 1213 sqh = ehci_alloc_sqh(sc); 1214 if (sqh == NULL) 1215 goto bad0; 1216 /* qh_link filled when the QH is added */ 1217 sqh->qh.qh_endp = htole32( 1218 EHCI_QH_SET_ADDR(addr) | 1219 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) | 1220 EHCI_QH_SET_EPS(speed) | /* XXX */ 1221 /* XXX EHCI_QH_DTC ? */ 1222 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1223 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1224 EHCI_QH_CTL : 0) | 1225 EHCI_QH_SET_NRL(naks) 1226 ); 1227 sqh->qh.qh_endphub = htole32( 1228 EHCI_QH_SET_MULT(1) 1229 /* XXX TT stuff */ 1230 /* XXX interrupt mask */ 1231 ); 1232 sqh->qh.qh_curqtd = EHCI_NULL; 1233 /* Fill the overlay qTD */ 1234 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1235 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1236 sqh->qh.qh_qtd.qtd_status = htole32(0); 1237 1238 epipe->sqh = sqh; 1239 1240 switch (xfertype) { 1241 case UE_CONTROL: 1242 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1243 0, &epipe->u.ctl.reqdma); 1244 #ifdef EHCI_DEBUG 1245 if (err) 1246 printf("ehci_open: usb_allocmem()=%d\n", err); 1247 #endif 1248 if (err) 1249 goto bad1; 1250 pipe->methods = &ehci_device_ctrl_methods; 1251 s = splusb(); 1252 ehci_add_qh(sqh, sc->sc_async_head); 1253 splx(s); 1254 break; 1255 case UE_BULK: 1256 pipe->methods = &ehci_device_bulk_methods; 1257 s = splusb(); 1258 ehci_add_qh(sqh, sc->sc_async_head); 1259 splx(s); 1260 break; 1261 case UE_INTERRUPT: 1262 pipe->methods = &ehci_device_intr_methods; 1263 return (USBD_INVAL); 1264 case UE_ISOCHRONOUS: 1265 pipe->methods = &ehci_device_isoc_methods; 1266 return (USBD_INVAL); 1267 default: 1268 return (USBD_INVAL); 1269 } 1270 return (USBD_NORMAL_COMPLETION); 1271 1272 bad1: 1273 ehci_free_sqh(sc, sqh); 1274 bad0: 1275 return (USBD_NOMEM); 1276 } 1277 1278 /* 1279 * Add an ED to the schedule. Called at splusb(). 1280 */ 1281 void 1282 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1283 { 1284 SPLUSBCHECK; 1285 1286 sqh->next = head->next; 1287 sqh->qh.qh_link = head->qh.qh_link; 1288 head->next = sqh; 1289 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1290 1291 #ifdef EHCI_DEBUG 1292 if (ehcidebug > 5) { 1293 printf("ehci_add_qh:\n"); 1294 ehci_dump_sqh(sqh); 1295 } 1296 #endif 1297 } 1298 1299 /* 1300 * Remove an ED from the schedule. Called at splusb(). 1301 */ 1302 void 1303 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1304 { 1305 ehci_soft_qh_t *p; 1306 1307 SPLUSBCHECK; 1308 /* XXX */ 1309 for (p = head; p != NULL && p->next != sqh; p = p->next) 1310 ; 1311 if (p == NULL) 1312 panic("ehci_rem_qh: ED not found"); 1313 p->next = sqh->next; 1314 p->qh.qh_link = sqh->qh.qh_link; 1315 1316 ehci_sync_hc(sc); 1317 } 1318 1319 void 1320 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1321 { 1322 /* Halt while we are messing. */ 1323 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1324 sqh->qh.qh_curqtd = 0; 1325 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1326 sqh->sqtd = sqtd; 1327 /* Keep toggle, clear the rest, including length. */ 1328 sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_TOGGLE); 1329 } 1330 1331 /* 1332 * Ensure that the HC has released all references to the QH. We do this 1333 * by asking for a Async Advance Doorbell interrupt and then we wait for 1334 * the interrupt. 1335 * To make this easier we first obtain exclusive use of the doorbell. 1336 */ 1337 void 1338 ehci_sync_hc(ehci_softc_t *sc) 1339 { 1340 int s, error; 1341 1342 if (sc->sc_dying) { 1343 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1344 return; 1345 } 1346 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1347 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1348 s = splhardusb(); 1349 /* ask for doorbell */ 1350 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1351 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1352 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1353 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1354 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1355 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1356 splx(s); 1357 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1358 #ifdef DIAGNOSTIC 1359 if (error) 1360 printf("ehci_sync_hc: tsleep() = %d\n", error); 1361 #endif 1362 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1363 } 1364 1365 /***********/ 1366 1367 /* 1368 * Data structures and routines to emulate the root hub. 1369 */ 1370 Static usb_device_descriptor_t ehci_devd = { 1371 USB_DEVICE_DESCRIPTOR_SIZE, 1372 UDESC_DEVICE, /* type */ 1373 {0x00, 0x02}, /* USB version */ 1374 UDCLASS_HUB, /* class */ 1375 UDSUBCLASS_HUB, /* subclass */ 1376 UDPROTO_HSHUBSTT, /* protocol */ 1377 64, /* max packet */ 1378 {0},{0},{0x00,0x01}, /* device id */ 1379 1,2,0, /* string indicies */ 1380 1 /* # of configurations */ 1381 }; 1382 1383 Static usb_device_qualifier_t ehci_odevd = { 1384 USB_DEVICE_DESCRIPTOR_SIZE, 1385 UDESC_DEVICE_QUALIFIER, /* type */ 1386 {0x00, 0x02}, /* USB version */ 1387 UDCLASS_HUB, /* class */ 1388 UDSUBCLASS_HUB, /* subclass */ 1389 UDPROTO_FSHUB, /* protocol */ 1390 64, /* max packet */ 1391 1, /* # of configurations */ 1392 0 1393 }; 1394 1395 Static usb_config_descriptor_t ehci_confd = { 1396 USB_CONFIG_DESCRIPTOR_SIZE, 1397 UDESC_CONFIG, 1398 {USB_CONFIG_DESCRIPTOR_SIZE + 1399 USB_INTERFACE_DESCRIPTOR_SIZE + 1400 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1401 1, 1402 1, 1403 0, 1404 UC_SELF_POWERED, 1405 0 /* max power */ 1406 }; 1407 1408 Static usb_interface_descriptor_t ehci_ifcd = { 1409 USB_INTERFACE_DESCRIPTOR_SIZE, 1410 UDESC_INTERFACE, 1411 0, 1412 0, 1413 1, 1414 UICLASS_HUB, 1415 UISUBCLASS_HUB, 1416 UIPROTO_HSHUBSTT, 1417 0 1418 }; 1419 1420 Static usb_endpoint_descriptor_t ehci_endpd = { 1421 USB_ENDPOINT_DESCRIPTOR_SIZE, 1422 UDESC_ENDPOINT, 1423 UE_DIR_IN | EHCI_INTR_ENDPT, 1424 UE_INTERRUPT, 1425 {8, 0}, /* max packet */ 1426 255 1427 }; 1428 1429 Static usb_hub_descriptor_t ehci_hubd = { 1430 USB_HUB_DESCRIPTOR_SIZE, 1431 UDESC_HUB, 1432 0, 1433 {0,0}, 1434 0, 1435 0, 1436 {0}, 1437 }; 1438 1439 Static int 1440 ehci_str(p, l, s) 1441 usb_string_descriptor_t *p; 1442 int l; 1443 char *s; 1444 { 1445 int i; 1446 1447 if (l == 0) 1448 return (0); 1449 p->bLength = 2 * strlen(s) + 2; 1450 if (l == 1) 1451 return (1); 1452 p->bDescriptorType = UDESC_STRING; 1453 l -= 2; 1454 for (i = 0; s[i] && l > 1; i++, l -= 2) 1455 USETW2(p->bString[i], 0, s[i]); 1456 return (2*i+2); 1457 } 1458 1459 /* 1460 * Simulate a hardware hub by handling all the necessary requests. 1461 */ 1462 Static usbd_status 1463 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1464 { 1465 usbd_status err; 1466 1467 /* Insert last in queue. */ 1468 err = usb_insert_transfer(xfer); 1469 if (err) 1470 return (err); 1471 1472 /* Pipe isn't running, start first */ 1473 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1474 } 1475 1476 Static usbd_status 1477 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1478 { 1479 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1480 usb_device_request_t *req; 1481 void *buf = NULL; 1482 int port, i; 1483 int s, len, value, index, l, totlen = 0; 1484 usb_port_status_t ps; 1485 usb_hub_descriptor_t hubd; 1486 usbd_status err; 1487 u_int32_t v; 1488 1489 if (sc->sc_dying) 1490 return (USBD_IOERROR); 1491 1492 #ifdef DIAGNOSTIC 1493 if (!(xfer->rqflags & URQ_REQUEST)) 1494 /* XXX panic */ 1495 return (USBD_INVAL); 1496 #endif 1497 req = &xfer->request; 1498 1499 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1500 req->bmRequestType, req->bRequest)); 1501 1502 len = UGETW(req->wLength); 1503 value = UGETW(req->wValue); 1504 index = UGETW(req->wIndex); 1505 1506 if (len != 0) 1507 buf = KERNADDR(&xfer->dmabuf, 0); 1508 1509 #define C(x,y) ((x) | ((y) << 8)) 1510 switch(C(req->bRequest, req->bmRequestType)) { 1511 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1512 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1513 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1514 /* 1515 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1516 * for the integrated root hub. 1517 */ 1518 break; 1519 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1520 if (len > 0) { 1521 *(u_int8_t *)buf = sc->sc_conf; 1522 totlen = 1; 1523 } 1524 break; 1525 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1526 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1527 switch(value >> 8) { 1528 case UDESC_DEVICE: 1529 if ((value & 0xff) != 0) { 1530 err = USBD_IOERROR; 1531 goto ret; 1532 } 1533 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1534 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1535 memcpy(buf, &ehci_devd, l); 1536 break; 1537 /* 1538 * We can't really operate at another speed, but the spec says 1539 * we need this descriptor. 1540 */ 1541 case UDESC_DEVICE_QUALIFIER: 1542 if ((value & 0xff) != 0) { 1543 err = USBD_IOERROR; 1544 goto ret; 1545 } 1546 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1547 memcpy(buf, &ehci_odevd, l); 1548 break; 1549 /* 1550 * We can't really operate at another speed, but the spec says 1551 * we need this descriptor. 1552 */ 1553 case UDESC_OTHER_SPEED_CONFIGURATION: 1554 case UDESC_CONFIG: 1555 if ((value & 0xff) != 0) { 1556 err = USBD_IOERROR; 1557 goto ret; 1558 } 1559 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1560 memcpy(buf, &ehci_confd, l); 1561 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1562 value >> 8; 1563 buf = (char *)buf + l; 1564 len -= l; 1565 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1566 totlen += l; 1567 memcpy(buf, &ehci_ifcd, l); 1568 buf = (char *)buf + l; 1569 len -= l; 1570 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1571 totlen += l; 1572 memcpy(buf, &ehci_endpd, l); 1573 break; 1574 case UDESC_STRING: 1575 if (len == 0) 1576 break; 1577 *(u_int8_t *)buf = 0; 1578 totlen = 1; 1579 switch (value & 0xff) { 1580 case 1: /* Vendor */ 1581 totlen = ehci_str(buf, len, sc->sc_vendor); 1582 break; 1583 case 2: /* Product */ 1584 totlen = ehci_str(buf, len, "EHCI root hub"); 1585 break; 1586 } 1587 break; 1588 default: 1589 err = USBD_IOERROR; 1590 goto ret; 1591 } 1592 break; 1593 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1594 if (len > 0) { 1595 *(u_int8_t *)buf = 0; 1596 totlen = 1; 1597 } 1598 break; 1599 case C(UR_GET_STATUS, UT_READ_DEVICE): 1600 if (len > 1) { 1601 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1602 totlen = 2; 1603 } 1604 break; 1605 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1606 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1607 if (len > 1) { 1608 USETW(((usb_status_t *)buf)->wStatus, 0); 1609 totlen = 2; 1610 } 1611 break; 1612 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1613 if (value >= USB_MAX_DEVICES) { 1614 err = USBD_IOERROR; 1615 goto ret; 1616 } 1617 sc->sc_addr = value; 1618 break; 1619 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1620 if (value != 0 && value != 1) { 1621 err = USBD_IOERROR; 1622 goto ret; 1623 } 1624 sc->sc_conf = value; 1625 break; 1626 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1627 break; 1628 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1629 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1630 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1631 err = USBD_IOERROR; 1632 goto ret; 1633 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1634 break; 1635 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1636 break; 1637 /* Hub requests */ 1638 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1639 break; 1640 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1641 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1642 "port=%d feature=%d\n", 1643 index, value)); 1644 if (index < 1 || index > sc->sc_noport) { 1645 err = USBD_IOERROR; 1646 goto ret; 1647 } 1648 port = EHCI_PORTSC(index); 1649 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1650 switch(value) { 1651 case UHF_PORT_ENABLE: 1652 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1653 break; 1654 case UHF_PORT_SUSPEND: 1655 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1656 break; 1657 case UHF_PORT_POWER: 1658 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1659 break; 1660 case UHF_PORT_TEST: 1661 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1662 "%d\n", index)); 1663 break; 1664 case UHF_PORT_INDICATOR: 1665 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1666 "%d\n", index)); 1667 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1668 break; 1669 case UHF_C_PORT_CONNECTION: 1670 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1671 break; 1672 case UHF_C_PORT_ENABLE: 1673 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1674 break; 1675 case UHF_C_PORT_SUSPEND: 1676 /* how? */ 1677 break; 1678 case UHF_C_PORT_OVER_CURRENT: 1679 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1680 break; 1681 case UHF_C_PORT_RESET: 1682 sc->sc_isreset = 0; 1683 break; 1684 default: 1685 err = USBD_IOERROR; 1686 goto ret; 1687 } 1688 #if 0 1689 switch(value) { 1690 case UHF_C_PORT_CONNECTION: 1691 case UHF_C_PORT_ENABLE: 1692 case UHF_C_PORT_SUSPEND: 1693 case UHF_C_PORT_OVER_CURRENT: 1694 case UHF_C_PORT_RESET: 1695 /* Enable RHSC interrupt if condition is cleared. */ 1696 if ((OREAD4(sc, port) >> 16) == 0) 1697 ehci_pcd_able(sc, 1); 1698 break; 1699 default: 1700 break; 1701 } 1702 #endif 1703 break; 1704 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1705 if (value != 0) { 1706 err = USBD_IOERROR; 1707 goto ret; 1708 } 1709 hubd = ehci_hubd; 1710 hubd.bNbrPorts = sc->sc_noport; 1711 v = EOREAD4(sc, EHCI_HCSPARAMS); 1712 USETW(hubd.wHubCharacteristics, 1713 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1714 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1715 ? UHD_PORT_IND : 0); 1716 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1717 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1718 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1719 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1720 l = min(len, hubd.bDescLength); 1721 totlen = l; 1722 memcpy(buf, &hubd, l); 1723 break; 1724 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1725 if (len != 4) { 1726 err = USBD_IOERROR; 1727 goto ret; 1728 } 1729 memset(buf, 0, len); /* ? XXX */ 1730 totlen = len; 1731 break; 1732 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1733 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1734 index)); 1735 if (index < 1 || index > sc->sc_noport) { 1736 err = USBD_IOERROR; 1737 goto ret; 1738 } 1739 if (len != 4) { 1740 err = USBD_IOERROR; 1741 goto ret; 1742 } 1743 v = EOREAD4(sc, EHCI_PORTSC(index)); 1744 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1745 v)); 1746 i = UPS_HIGH_SPEED; 1747 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1748 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1749 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1750 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1751 if (v & EHCI_PS_PR) i |= UPS_RESET; 1752 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1753 USETW(ps.wPortStatus, i); 1754 i = 0; 1755 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1756 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1757 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1758 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1759 USETW(ps.wPortChange, i); 1760 l = min(len, sizeof ps); 1761 memcpy(buf, &ps, l); 1762 totlen = l; 1763 break; 1764 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1765 err = USBD_IOERROR; 1766 goto ret; 1767 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1768 break; 1769 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1770 if (index < 1 || index > sc->sc_noport) { 1771 err = USBD_IOERROR; 1772 goto ret; 1773 } 1774 port = EHCI_PORTSC(index); 1775 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1776 switch(value) { 1777 case UHF_PORT_ENABLE: 1778 EOWRITE4(sc, port, v | EHCI_PS_PE); 1779 break; 1780 case UHF_PORT_SUSPEND: 1781 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1782 break; 1783 case UHF_PORT_RESET: 1784 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1785 index)); 1786 if (EHCI_PS_IS_LOWSPEED(v)) { 1787 /* Low speed device, give up ownership. */ 1788 ehci_disown(sc, index, 1); 1789 break; 1790 } 1791 /* Start reset sequence. */ 1792 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1793 EOWRITE4(sc, port, v | EHCI_PS_PR); 1794 /* Wait for reset to complete. */ 1795 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1796 if (sc->sc_dying) { 1797 err = USBD_IOERROR; 1798 goto ret; 1799 } 1800 /* Terminate reset sequence. */ 1801 EOWRITE4(sc, port, v); 1802 /* Wait for HC to complete reset. */ 1803 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1804 if (sc->sc_dying) { 1805 err = USBD_IOERROR; 1806 goto ret; 1807 } 1808 v = EOREAD4(sc, port); 1809 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1810 if (v & EHCI_PS_PR) { 1811 printf("%s: port reset timeout\n", 1812 USBDEVNAME(sc->sc_bus.bdev)); 1813 return (USBD_TIMEOUT); 1814 } 1815 if (!(v & EHCI_PS_PE)) { 1816 /* Not a high speed device, give up ownership.*/ 1817 ehci_disown(sc, index, 0); 1818 break; 1819 } 1820 sc->sc_isreset = 1; 1821 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1822 index, v)); 1823 break; 1824 case UHF_PORT_POWER: 1825 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1826 "%d\n", index)); 1827 EOWRITE4(sc, port, v | EHCI_PS_PP); 1828 break; 1829 case UHF_PORT_TEST: 1830 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1831 "%d\n", index)); 1832 break; 1833 case UHF_PORT_INDICATOR: 1834 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1835 "%d\n", index)); 1836 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1837 break; 1838 default: 1839 err = USBD_IOERROR; 1840 goto ret; 1841 } 1842 break; 1843 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1844 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1845 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1846 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1847 break; 1848 default: 1849 err = USBD_IOERROR; 1850 goto ret; 1851 } 1852 xfer->actlen = totlen; 1853 err = USBD_NORMAL_COMPLETION; 1854 ret: 1855 xfer->status = err; 1856 s = splusb(); 1857 usb_transfer_complete(xfer); 1858 splx(s); 1859 return (USBD_IN_PROGRESS); 1860 } 1861 1862 void 1863 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1864 { 1865 int port; 1866 u_int32_t v; 1867 1868 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1869 #ifdef DIAGNOSTIC 1870 if (sc->sc_npcomp != 0) { 1871 int i = (index-1) / sc->sc_npcomp; 1872 if (i >= sc->sc_ncomp) 1873 printf("%s: strange port\n", 1874 USBDEVNAME(sc->sc_bus.bdev)); 1875 else 1876 printf("%s: handing over %s speed device on " 1877 "port %d to %s\n", 1878 USBDEVNAME(sc->sc_bus.bdev), 1879 lowspeed ? "low" : "full", 1880 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1881 } else { 1882 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1883 } 1884 #endif 1885 port = EHCI_PORTSC(index); 1886 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1887 EOWRITE4(sc, port, v | EHCI_PS_PO); 1888 } 1889 1890 /* Abort a root control request. */ 1891 Static void 1892 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1893 { 1894 /* Nothing to do, all transfers are synchronous. */ 1895 } 1896 1897 /* Close the root pipe. */ 1898 Static void 1899 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1900 { 1901 DPRINTF(("ehci_root_ctrl_close\n")); 1902 /* Nothing to do. */ 1903 } 1904 1905 void 1906 ehci_root_intr_done(usbd_xfer_handle xfer) 1907 { 1908 xfer->hcpriv = NULL; 1909 } 1910 1911 Static usbd_status 1912 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1913 { 1914 usbd_status err; 1915 1916 /* Insert last in queue. */ 1917 err = usb_insert_transfer(xfer); 1918 if (err) 1919 return (err); 1920 1921 /* Pipe isn't running, start first */ 1922 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1923 } 1924 1925 Static usbd_status 1926 ehci_root_intr_start(usbd_xfer_handle xfer) 1927 { 1928 usbd_pipe_handle pipe = xfer->pipe; 1929 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1930 1931 if (sc->sc_dying) 1932 return (USBD_IOERROR); 1933 1934 sc->sc_intrxfer = xfer; 1935 1936 return (USBD_IN_PROGRESS); 1937 } 1938 1939 /* Abort a root interrupt request. */ 1940 Static void 1941 ehci_root_intr_abort(usbd_xfer_handle xfer) 1942 { 1943 int s; 1944 1945 if (xfer->pipe->intrxfer == xfer) { 1946 DPRINTF(("ehci_root_intr_abort: remove\n")); 1947 xfer->pipe->intrxfer = NULL; 1948 } 1949 xfer->status = USBD_CANCELLED; 1950 s = splusb(); 1951 usb_transfer_complete(xfer); 1952 splx(s); 1953 } 1954 1955 /* Close the root pipe. */ 1956 Static void 1957 ehci_root_intr_close(usbd_pipe_handle pipe) 1958 { 1959 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1960 1961 DPRINTF(("ehci_root_intr_close\n")); 1962 1963 sc->sc_intrxfer = NULL; 1964 } 1965 1966 void 1967 ehci_root_ctrl_done(usbd_xfer_handle xfer) 1968 { 1969 xfer->hcpriv = NULL; 1970 } 1971 1972 /************************/ 1973 1974 ehci_soft_qh_t * 1975 ehci_alloc_sqh(ehci_softc_t *sc) 1976 { 1977 ehci_soft_qh_t *sqh; 1978 usbd_status err; 1979 int i, offs; 1980 usb_dma_t dma; 1981 1982 if (sc->sc_freeqhs == NULL) { 1983 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 1984 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 1985 EHCI_PAGE_SIZE, &dma); 1986 #ifdef EHCI_DEBUG 1987 if (err) 1988 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 1989 #endif 1990 if (err) 1991 return (NULL); 1992 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 1993 offs = i * EHCI_SQH_SIZE; 1994 sqh = KERNADDR(&dma, offs); 1995 sqh->physaddr = DMAADDR(&dma, offs); 1996 sqh->next = sc->sc_freeqhs; 1997 sc->sc_freeqhs = sqh; 1998 } 1999 } 2000 sqh = sc->sc_freeqhs; 2001 sc->sc_freeqhs = sqh->next; 2002 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2003 sqh->next = NULL; 2004 return (sqh); 2005 } 2006 2007 void 2008 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2009 { 2010 sqh->next = sc->sc_freeqhs; 2011 sc->sc_freeqhs = sqh; 2012 } 2013 2014 ehci_soft_qtd_t * 2015 ehci_alloc_sqtd(ehci_softc_t *sc) 2016 { 2017 ehci_soft_qtd_t *sqtd; 2018 usbd_status err; 2019 int i, offs; 2020 usb_dma_t dma; 2021 int s; 2022 2023 if (sc->sc_freeqtds == NULL) { 2024 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2025 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2026 EHCI_PAGE_SIZE, &dma); 2027 #ifdef EHCI_DEBUG 2028 if (err) 2029 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2030 #endif 2031 if (err) 2032 return (NULL); 2033 s = splusb(); 2034 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2035 offs = i * EHCI_SQTD_SIZE; 2036 sqtd = KERNADDR(&dma, offs); 2037 sqtd->physaddr = DMAADDR(&dma, offs); 2038 sqtd->nextqtd = sc->sc_freeqtds; 2039 sc->sc_freeqtds = sqtd; 2040 } 2041 splx(s); 2042 } 2043 2044 s = splusb(); 2045 sqtd = sc->sc_freeqtds; 2046 sc->sc_freeqtds = sqtd->nextqtd; 2047 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2048 sqtd->nextqtd = NULL; 2049 sqtd->xfer = NULL; 2050 splx(s); 2051 2052 return (sqtd); 2053 } 2054 2055 void 2056 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2057 { 2058 int s; 2059 2060 s = splusb(); 2061 sqtd->nextqtd = sc->sc_freeqtds; 2062 sc->sc_freeqtds = sqtd; 2063 splx(s); 2064 } 2065 2066 usbd_status 2067 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2068 int alen, int rd, usbd_xfer_handle xfer, 2069 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2070 { 2071 ehci_soft_qtd_t *next, *cur; 2072 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2073 u_int32_t qtdstatus; 2074 int len, curlen; 2075 int i; 2076 usb_dma_t *dma = &xfer->dmabuf; 2077 2078 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2079 2080 len = alen; 2081 dataphys = DMAADDR(dma, 0); 2082 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2083 qtdstatus = htole32( 2084 EHCI_QTD_ACTIVE | 2085 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2086 EHCI_QTD_SET_CERR(3) 2087 /* IOC set below */ 2088 /* BYTES set below */ 2089 /* XXX Data toggle */ 2090 ); 2091 2092 cur = ehci_alloc_sqtd(sc); 2093 *sp = cur; 2094 if (cur == NULL) 2095 goto nomem; 2096 for (;;) { 2097 dataphyspage = EHCI_PAGE(dataphys); 2098 /* The EHCI hardware can handle at most 5 pages. */ 2099 if (dataphyslastpage - dataphyspage < 2100 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2101 /* we can handle it in this QTD */ 2102 curlen = len; 2103 } else { 2104 /* must use multiple TDs, fill as much as possible. */ 2105 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2106 EHCI_PAGE_OFFSET(dataphys); 2107 #ifdef DIAGNOSTIC 2108 if (curlen > len) { 2109 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2110 "len=0x%x offs=0x%x\n", curlen, len, 2111 EHCI_PAGE_OFFSET(dataphys)); 2112 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2113 dataphyslastpage, dataphyspage, 2114 dataphys); 2115 curlen = len; 2116 } 2117 #endif 2118 2119 /* XXX true for EHCI? */ 2120 /* the length must be a multiple of the max size */ 2121 curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2122 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2123 "curlen=%d\n", curlen)); 2124 #ifdef DIAGNOSTIC 2125 if (curlen == 0) 2126 panic("ehci_alloc_std: curlen == 0"); 2127 #endif 2128 } 2129 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2130 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2131 dataphys, dataphyslastpage, 2132 len, curlen)); 2133 len -= curlen; 2134 2135 if (len != 0) { 2136 next = ehci_alloc_sqtd(sc); 2137 if (next == NULL) 2138 goto nomem; 2139 nextphys = next->physaddr; 2140 } else { 2141 next = NULL; 2142 nextphys = EHCI_NULL; 2143 } 2144 2145 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2146 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2147 if (i != 0) /* use offset only in first buffer */ 2148 a = EHCI_PAGE(a); 2149 cur->qtd.qtd_buffer[i] = htole32(a); 2150 #ifdef DIAGNOSTIC 2151 if (i >= EHCI_QTD_NBUFFERS) { 2152 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2153 goto nomem; 2154 } 2155 #endif 2156 } 2157 cur->nextqtd = next; 2158 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys); 2159 cur->qtd.qtd_status = 2160 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen)); 2161 cur->xfer = xfer; 2162 cur->len = curlen; 2163 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2164 dataphys, dataphys + curlen)); 2165 if (len == 0) 2166 break; 2167 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2168 dataphys += curlen; 2169 cur = next; 2170 } 2171 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2172 *ep = cur; 2173 2174 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2175 *sp, *ep)); 2176 2177 return (USBD_NORMAL_COMPLETION); 2178 2179 nomem: 2180 /* XXX free chain */ 2181 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2182 return (USBD_NOMEM); 2183 } 2184 2185 Static void 2186 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2187 ehci_soft_qtd_t *sqtdend) 2188 { 2189 ehci_soft_qtd_t *p; 2190 int i; 2191 2192 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2193 sqtd, sqtdend)); 2194 2195 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2196 p = sqtd->nextqtd; 2197 ehci_free_sqtd(sc, sqtd); 2198 } 2199 } 2200 2201 /****************/ 2202 2203 /* 2204 * Close a reqular pipe. 2205 * Assumes that there are no pending transactions. 2206 */ 2207 void 2208 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2209 { 2210 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2211 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2212 ehci_soft_qh_t *sqh = epipe->sqh; 2213 int s; 2214 2215 s = splusb(); 2216 ehci_rem_qh(sc, sqh, head); 2217 splx(s); 2218 ehci_free_sqh(sc, epipe->sqh); 2219 } 2220 2221 /* 2222 * Abort a device request. 2223 * If this routine is called at splusb() it guarantees that the request 2224 * will be removed from the hardware scheduling and that the callback 2225 * for it will be called with USBD_CANCELLED status. 2226 * It's impossible to guarantee that the requested transfer will not 2227 * have happened since the hardware runs concurrently. 2228 * If the transaction has already happened we rely on the ordinary 2229 * interrupt processing to process it. 2230 * XXX This is most probably wrong. 2231 */ 2232 void 2233 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2234 { 2235 #define exfer EXFER(xfer) 2236 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2237 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2238 ehci_soft_qh_t *sqh = epipe->sqh; 2239 ehci_soft_qtd_t *sqtd; 2240 ehci_physaddr_t cur; 2241 u_int32_t qhstatus; 2242 int s; 2243 int hit; 2244 2245 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2246 2247 if (sc->sc_dying) { 2248 /* If we're dying, just do the software part. */ 2249 s = splusb(); 2250 xfer->status = status; /* make software ignore it */ 2251 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2252 usb_transfer_complete(xfer); 2253 splx(s); 2254 return; 2255 } 2256 2257 if (xfer->device->bus->intr_context || !curproc) 2258 panic("ehci_abort_xfer: not in process context"); 2259 2260 /* 2261 * Step 1: Make interrupt routine and hardware ignore xfer. 2262 */ 2263 s = splusb(); 2264 xfer->status = status; /* make software ignore it */ 2265 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2266 qhstatus = sqh->qh.qh_qtd.qtd_status; 2267 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2268 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2269 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2270 if (sqtd == exfer->sqtdend) 2271 break; 2272 } 2273 splx(s); 2274 2275 /* 2276 * Step 2: Wait until we know hardware has finished any possible 2277 * use of the xfer. Also make sure the soft interrupt routine 2278 * has run. 2279 */ 2280 ehci_sync_hc(sc); 2281 s = splusb(); 2282 sc->sc_softwake = 1; 2283 usb_schedsoftintr(&sc->sc_bus); 2284 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2285 splx(s); 2286 2287 /* 2288 * Step 3: Remove any vestiges of the xfer from the hardware. 2289 * The complication here is that the hardware may have executed 2290 * beyond the xfer we're trying to abort. So as we're scanning 2291 * the TDs of this xfer we check if the hardware points to 2292 * any of them. 2293 */ 2294 s = splusb(); /* XXX why? */ 2295 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2296 hit = 0; 2297 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2298 hit |= cur == sqtd->physaddr; 2299 if (sqtd == exfer->sqtdend) 2300 break; 2301 } 2302 sqtd = sqtd->nextqtd; 2303 /* Zap curqtd register if hardware pointed inside the xfer. */ 2304 if (hit && sqtd != NULL) { 2305 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2306 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2307 sqh->qh.qh_qtd.qtd_status = qhstatus; 2308 } else { 2309 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2310 } 2311 2312 /* 2313 * Step 4: Execute callback. 2314 */ 2315 #ifdef DIAGNOSTIC 2316 exfer->isdone = 1; 2317 #endif 2318 usb_transfer_complete(xfer); 2319 2320 splx(s); 2321 #undef exfer 2322 } 2323 2324 void 2325 ehci_timeout(void *addr) 2326 { 2327 struct ehci_xfer *exfer = addr; 2328 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2329 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2330 2331 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2332 #ifdef USB_DEBUG 2333 if (ehcidebug > 1) 2334 usbd_dump_pipe(exfer->xfer.pipe); 2335 #endif 2336 2337 if (sc->sc_dying) { 2338 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2339 return; 2340 } 2341 2342 /* Execute the abort in a process context. */ 2343 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2344 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2345 } 2346 2347 void 2348 ehci_timeout_task(void *addr) 2349 { 2350 usbd_xfer_handle xfer = addr; 2351 int s; 2352 2353 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2354 2355 s = splusb(); 2356 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2357 splx(s); 2358 } 2359 2360 /************************/ 2361 2362 Static usbd_status 2363 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2364 { 2365 usbd_status err; 2366 2367 /* Insert last in queue. */ 2368 err = usb_insert_transfer(xfer); 2369 if (err) 2370 return (err); 2371 2372 /* Pipe isn't running, start first */ 2373 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2374 } 2375 2376 Static usbd_status 2377 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2378 { 2379 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2380 usbd_status err; 2381 2382 if (sc->sc_dying) 2383 return (USBD_IOERROR); 2384 2385 #ifdef DIAGNOSTIC 2386 if (!(xfer->rqflags & URQ_REQUEST)) { 2387 /* XXX panic */ 2388 printf("ehci_device_ctrl_transfer: not a request\n"); 2389 return (USBD_INVAL); 2390 } 2391 #endif 2392 2393 err = ehci_device_request(xfer); 2394 if (err) 2395 return (err); 2396 2397 if (sc->sc_bus.use_polling) 2398 ehci_waitintr(sc, xfer); 2399 return (USBD_IN_PROGRESS); 2400 } 2401 2402 void 2403 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2404 { 2405 struct ehci_xfer *ex = EXFER(xfer); 2406 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2407 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2408 2409 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2410 2411 #ifdef DIAGNOSTIC 2412 if (!(xfer->rqflags & URQ_REQUEST)) { 2413 panic("ehci_ctrl_done: not a request"); 2414 } 2415 #endif 2416 2417 if (xfer->status != USBD_NOMEM) { 2418 ehci_del_intr_list(ex); /* remove from active list */ 2419 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2420 } 2421 2422 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2423 } 2424 2425 /* Abort a device control request. */ 2426 Static void 2427 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2428 { 2429 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2430 ehci_abort_xfer(xfer, USBD_CANCELLED); 2431 } 2432 2433 /* Close a device control pipe. */ 2434 Static void 2435 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2436 { 2437 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2438 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2439 2440 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2441 ehci_close_pipe(pipe, sc->sc_async_head); 2442 } 2443 2444 usbd_status 2445 ehci_device_request(usbd_xfer_handle xfer) 2446 { 2447 #define exfer EXFER(xfer) 2448 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2449 usb_device_request_t *req = &xfer->request; 2450 usbd_device_handle dev = epipe->pipe.device; 2451 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2452 int addr = dev->address; 2453 ehci_soft_qtd_t *setup, *stat, *next; 2454 ehci_soft_qh_t *sqh; 2455 int isread; 2456 int len; 2457 usbd_status err; 2458 int s; 2459 2460 isread = req->bmRequestType & UT_READ; 2461 len = UGETW(req->wLength); 2462 2463 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2464 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2465 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2466 UGETW(req->wIndex), len, addr, 2467 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2468 2469 setup = ehci_alloc_sqtd(sc); 2470 if (setup == NULL) { 2471 err = USBD_NOMEM; 2472 goto bad1; 2473 } 2474 stat = ehci_alloc_sqtd(sc); 2475 if (stat == NULL) { 2476 err = USBD_NOMEM; 2477 goto bad2; 2478 } 2479 2480 sqh = epipe->sqh; 2481 epipe->u.ctl.length = len; 2482 2483 /* XXX 2484 * Since we're messing with the QH we must know the HC is in sync. 2485 * This needs to go away since it slows down control transfers. 2486 * Removing it entails: 2487 * - fill the QH only once with addr & wMaxPacketSize 2488 * - put the correct data toggles in the qtds and set DTC 2489 */ 2490 /* ehci_sync_hc(sc); */ 2491 /* Update device address and length since they may have changed. */ 2492 /* XXX This only needs to be done once, but it's too early in open. */ 2493 /* XXXX Should not touch ED here! */ 2494 sqh->qh.qh_endp = 2495 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) | 2496 htole32( 2497 EHCI_QH_SET_ADDR(addr) | 2498 /* EHCI_QH_DTC | */ 2499 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2500 ); 2501 /* Clear toggle */ 2502 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 2503 2504 /* Set up data transaction */ 2505 if (len != 0) { 2506 ehci_soft_qtd_t *end; 2507 2508 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2509 &next, &end); 2510 if (err) 2511 goto bad3; 2512 end->nextqtd = stat; 2513 end->qtd.qtd_next = 2514 end->qtd.qtd_altnext = htole32(stat->physaddr); 2515 /* Start toggle at 1. */ 2516 /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/ 2517 } else { 2518 next = stat; 2519 } 2520 2521 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2522 2523 setup->qtd.qtd_status = htole32( 2524 EHCI_QTD_ACTIVE | 2525 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2526 EHCI_QTD_SET_CERR(3) | 2527 EHCI_QTD_SET_BYTES(sizeof *req) 2528 ); 2529 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2530 setup->nextqtd = next; 2531 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2532 setup->xfer = xfer; 2533 setup->len = sizeof *req; 2534 2535 stat->qtd.qtd_status = htole32( 2536 EHCI_QTD_ACTIVE | 2537 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2538 EHCI_QTD_SET_CERR(3) | 2539 EHCI_QTD_IOC 2540 ); 2541 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2542 stat->nextqtd = NULL; 2543 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2544 stat->xfer = xfer; 2545 stat->len = 0; 2546 2547 #ifdef EHCI_DEBUG 2548 if (ehcidebug > 5) { 2549 DPRINTF(("ehci_device_request:\n")); 2550 ehci_dump_sqh(sqh); 2551 ehci_dump_sqtds(setup); 2552 } 2553 #endif 2554 2555 exfer->sqtdstart = setup; 2556 exfer->sqtdend = stat; 2557 #ifdef DIAGNOSTIC 2558 if (!exfer->isdone) { 2559 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2560 } 2561 exfer->isdone = 0; 2562 #endif 2563 2564 /* Insert qTD in QH list. */ 2565 s = splusb(); 2566 ehci_set_qh_qtd(sqh, setup); 2567 if (xfer->timeout && !sc->sc_bus.use_polling) { 2568 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2569 ehci_timeout, xfer); 2570 } 2571 ehci_add_intr_list(sc, exfer); 2572 xfer->status = USBD_IN_PROGRESS; 2573 splx(s); 2574 2575 #ifdef EHCI_DEBUG 2576 if (ehcidebug > 10) { 2577 DPRINTF(("ehci_device_request: status=%x\n", 2578 EOREAD4(sc, EHCI_USBSTS))); 2579 delay(10000); 2580 ehci_dump_regs(sc); 2581 ehci_dump_sqh(sc->sc_async_head); 2582 ehci_dump_sqh(sqh); 2583 ehci_dump_sqtds(setup); 2584 } 2585 #endif 2586 2587 return (USBD_NORMAL_COMPLETION); 2588 2589 bad3: 2590 ehci_free_sqtd(sc, stat); 2591 bad2: 2592 ehci_free_sqtd(sc, setup); 2593 bad1: 2594 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2595 xfer->status = err; 2596 usb_transfer_complete(xfer); 2597 return (err); 2598 #undef exfer 2599 } 2600 2601 /************************/ 2602 2603 Static usbd_status 2604 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2605 { 2606 usbd_status err; 2607 2608 /* Insert last in queue. */ 2609 err = usb_insert_transfer(xfer); 2610 if (err) 2611 return (err); 2612 2613 /* Pipe isn't running, start first */ 2614 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2615 } 2616 2617 usbd_status 2618 ehci_device_bulk_start(usbd_xfer_handle xfer) 2619 { 2620 #define exfer EXFER(xfer) 2621 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2622 usbd_device_handle dev = epipe->pipe.device; 2623 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2624 ehci_soft_qtd_t *data, *dataend; 2625 ehci_soft_qh_t *sqh; 2626 usbd_status err; 2627 int len, isread, endpt; 2628 int s; 2629 2630 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n", 2631 xfer, xfer->length, xfer->flags)); 2632 2633 if (sc->sc_dying) 2634 return (USBD_IOERROR); 2635 2636 #ifdef DIAGNOSTIC 2637 if (xfer->rqflags & URQ_REQUEST) 2638 panic("ehci_device_bulk_transfer: a request"); 2639 #endif 2640 2641 len = xfer->length; 2642 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2643 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2644 sqh = epipe->sqh; 2645 2646 epipe->u.bulk.length = len; 2647 2648 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2649 &dataend); 2650 if (err) { 2651 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2652 xfer->status = err; 2653 usb_transfer_complete(xfer); 2654 return (err); 2655 } 2656 2657 #ifdef EHCI_DEBUG 2658 if (ehcidebug > 5) { 2659 DPRINTF(("ehci_device_bulk_transfer: data(1)\n")); 2660 ehci_dump_sqh(sqh); 2661 ehci_dump_sqtds(data); 2662 } 2663 #endif 2664 2665 /* Set up interrupt info. */ 2666 exfer->sqtdstart = data; 2667 exfer->sqtdend = dataend; 2668 #ifdef DIAGNOSTIC 2669 if (!exfer->isdone) { 2670 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer); 2671 } 2672 exfer->isdone = 0; 2673 #endif 2674 2675 s = splusb(); 2676 ehci_set_qh_qtd(sqh, data); 2677 if (xfer->timeout && !sc->sc_bus.use_polling) { 2678 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2679 ehci_timeout, xfer); 2680 } 2681 ehci_add_intr_list(sc, exfer); 2682 xfer->status = USBD_IN_PROGRESS; 2683 splx(s); 2684 2685 #ifdef EHCI_DEBUG 2686 if (ehcidebug > 10) { 2687 DPRINTF(("ehci_device_bulk_transfer: data(2)\n")); 2688 delay(10000); 2689 DPRINTF(("ehci_device_bulk_transfer: data(3)\n")); 2690 ehci_dump_regs(sc); 2691 #if 0 2692 printf("async_head:\n"); 2693 ehci_dump_sqh(sc->sc_async_head); 2694 #endif 2695 printf("sqh:\n"); 2696 ehci_dump_sqh(sqh); 2697 ehci_dump_sqtds(data); 2698 } 2699 #endif 2700 2701 if (sc->sc_bus.use_polling) 2702 ehci_waitintr(sc, xfer); 2703 2704 return (USBD_IN_PROGRESS); 2705 #undef exfer 2706 } 2707 2708 Static void 2709 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2710 { 2711 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2712 ehci_abort_xfer(xfer, USBD_CANCELLED); 2713 } 2714 2715 /* 2716 * Close a device bulk pipe. 2717 */ 2718 Static void 2719 ehci_device_bulk_close(usbd_pipe_handle pipe) 2720 { 2721 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2722 2723 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2724 ehci_close_pipe(pipe, sc->sc_async_head); 2725 } 2726 2727 void 2728 ehci_device_bulk_done(usbd_xfer_handle xfer) 2729 { 2730 struct ehci_xfer *ex = EXFER(xfer); 2731 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2732 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2733 2734 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2735 xfer, xfer->actlen)); 2736 2737 if (xfer->status != USBD_NOMEM) { 2738 ehci_del_intr_list(ex); /* remove from active list */ 2739 ehci_free_sqtd_chain(sc, ex->sqtdstart, 0); 2740 } 2741 2742 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2743 } 2744 2745 /************************/ 2746 2747 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2748 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2749 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2750 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2751 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2752 2753 /************************/ 2754 2755 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2756 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2757 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2758 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2759 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2760