1 /* $NetBSD: tprof_armv8.c,v 1.8 2021/11/01 17:03:53 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2018 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: tprof_armv8.c,v 1.8 2021/11/01 17:03:53 skrll Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/cpu.h> 35 #include <sys/xcall.h> 36 37 #include <dev/tprof/tprof.h> 38 39 #include <arm/armreg.h> 40 #include <arm/cpufunc.h> 41 42 #include <dev/tprof/tprof_armv8.h> 43 44 static tprof_param_t armv8_pmu_param; 45 static const u_int armv8_pmu_counter = 1; 46 static uint32_t counter_val; 47 static uint32_t counter_reset_val; 48 49 static bool 50 armv8_pmu_event_implemented(uint16_t event) 51 { 52 uint64_t eid[2]; 53 54 if (event >= 64) 55 return false; 56 57 eid[0] = reg_pmceid0_el0_read(); 58 eid[1] = reg_pmceid1_el0_read(); 59 60 const u_int idx = event / 32; 61 const u_int bit = event % 32; 62 63 if (eid[idx] & __BIT(bit)) 64 return true; 65 66 return false; 67 } 68 69 static void 70 armv8_pmu_set_pmevtyper(u_int counter, uint64_t val) 71 { 72 reg_pmselr_el0_write(counter); 73 isb(); 74 reg_pmxevtyper_el0_write(val); 75 } 76 77 static void 78 armv8_pmu_set_pmevcntr(u_int counter, uint32_t val) 79 { 80 reg_pmselr_el0_write(counter); 81 isb(); 82 reg_pmxevcntr_el0_write(val); 83 } 84 85 static void 86 armv8_pmu_start_cpu(void *arg1, void *arg2) 87 { 88 const uint32_t counter_mask = __BIT(armv8_pmu_counter); 89 uint64_t pmevtyper; 90 91 /* Disable event counter */ 92 reg_pmcntenclr_el0_write(counter_mask); 93 94 /* Configure event counter */ 95 pmevtyper = __SHIFTIN(armv8_pmu_param.p_event, PMEVTYPER_EVTCOUNT); 96 if (!ISSET(armv8_pmu_param.p_flags, TPROF_PARAM_USER)) 97 pmevtyper |= PMEVTYPER_U; 98 if (!ISSET(armv8_pmu_param.p_flags, TPROF_PARAM_KERN)) 99 pmevtyper |= PMEVTYPER_P; 100 101 armv8_pmu_set_pmevtyper(armv8_pmu_counter, pmevtyper); 102 103 /* Enable overflow interrupts */ 104 reg_pmintenset_el1_write(counter_mask); 105 106 /* Clear overflow flag */ 107 reg_pmovsclr_el0_write(counter_mask); 108 109 /* Initialize event counter value */ 110 armv8_pmu_set_pmevcntr(armv8_pmu_counter, counter_reset_val); 111 112 /* Enable event counter */ 113 reg_pmcntenset_el0_write(counter_mask); 114 reg_pmcr_el0_write(PMCR_E); 115 } 116 117 static void 118 armv8_pmu_stop_cpu(void *arg1, void *arg2) 119 { 120 const uint32_t counter_mask = __BIT(armv8_pmu_counter); 121 122 /* Disable overflow interrupts */ 123 reg_pmintenclr_el1_write(counter_mask); 124 125 /* Disable event counter */ 126 reg_pmcntenclr_el0_write(counter_mask); 127 reg_pmcr_el0_write(0); 128 } 129 130 static uint64_t 131 armv8_pmu_estimate_freq(void) 132 { 133 uint64_t cpufreq = curcpu()->ci_data.cpu_cc_freq; 134 uint64_t freq = 10000; 135 136 counter_val = cpufreq / freq; 137 if (counter_val == 0) 138 counter_val = 4000000000ULL / freq; 139 140 return freq; 141 } 142 143 static uint32_t 144 armv8_pmu_ident(void) 145 { 146 return TPROF_IDENT_ARMV8_GENERIC; 147 } 148 149 static int 150 armv8_pmu_start(const tprof_param_t *param) 151 { 152 uint64_t xc; 153 154 if (!armv8_pmu_event_implemented(param->p_event)) { 155 printf("%s: event %#" PRIx64 " not implemented on this CPU\n", 156 __func__, param->p_event); 157 return EINVAL; 158 } 159 160 counter_reset_val = -counter_val + 1; 161 162 armv8_pmu_param = *param; 163 xc = xc_broadcast(0, armv8_pmu_start_cpu, NULL, NULL); 164 xc_wait(xc); 165 166 return 0; 167 } 168 169 static void 170 armv8_pmu_stop(const tprof_param_t *param) 171 { 172 uint64_t xc; 173 174 xc = xc_broadcast(0, armv8_pmu_stop_cpu, NULL, NULL); 175 xc_wait(xc); 176 } 177 178 static const tprof_backend_ops_t tprof_armv8_pmu_ops = { 179 .tbo_estimate_freq = armv8_pmu_estimate_freq, 180 .tbo_ident = armv8_pmu_ident, 181 .tbo_start = armv8_pmu_start, 182 .tbo_stop = armv8_pmu_stop, 183 }; 184 185 int 186 armv8_pmu_intr(void *priv) 187 { 188 const struct trapframe * const tf = priv; 189 const uint32_t counter_mask = __BIT(armv8_pmu_counter); 190 tprof_frame_info_t tfi; 191 192 const uint32_t pmovs = reg_pmovsset_el0_read(); 193 if ((pmovs & counter_mask) != 0) { 194 tfi.tfi_pc = tf->tf_pc; 195 tfi.tfi_inkernel = tfi.tfi_pc >= VM_MIN_KERNEL_ADDRESS && 196 tfi.tfi_pc < VM_MAX_KERNEL_ADDRESS; 197 tprof_sample(NULL, &tfi); 198 199 armv8_pmu_set_pmevcntr(armv8_pmu_counter, counter_reset_val); 200 } 201 reg_pmovsclr_el0_write(pmovs); 202 203 return 1; 204 } 205 206 static void 207 armv8_pmu_init_cpu(void *arg1, void *arg2) 208 { 209 /* Disable EL0 access to performance monitors */ 210 reg_pmuserenr_el0_write(0); 211 212 /* Disable interrupts */ 213 reg_pmintenclr_el1_write(~0U); 214 215 /* Disable event counters */ 216 reg_pmcntenclr_el0_write(PMCNTEN_P); 217 } 218 219 int 220 armv8_pmu_init(void) 221 { 222 uint64_t xc; 223 224 xc = xc_broadcast(0, armv8_pmu_init_cpu, NULL, NULL); 225 xc_wait(xc); 226 227 return tprof_backend_register("tprof_armv8", &tprof_armv8_pmu_ops, 228 TPROF_BACKEND_VERSION); 229 } 230