1 /* $NetBSD: px.c,v 1.11 2001/11/15 09:48:19 lukem Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Driver for DEC PixelStamp graphics adapters (PMAG-C). 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: px.c,v 1.11 2001/11/15 09:48:19 lukem Exp $"); 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/device.h> 49 #include <sys/malloc.h> 50 #include <sys/callout.h> 51 52 #include <uvm/uvm_extern.h> 53 54 #if defined(pmax) 55 #include <mips/cpuregs.h> 56 #elif defined(alpha) 57 #include <alpha/alpha_cpu.h> 58 #endif 59 60 #include <machine/autoconf.h> 61 #include <machine/cpu.h> 62 #include <machine/bus.h> 63 64 #include <dev/cons.h> 65 66 #include <dev/wscons/wsconsio.h> 67 #include <dev/wscons/wsdisplayvar.h> 68 69 #include <dev/ic/bt459reg.h> 70 71 #include <dev/tc/tcvar.h> 72 #include <dev/tc/sticreg.h> 73 #include <dev/tc/sticio.h> 74 #include <dev/tc/sticvar.h> 75 76 #define PX_STIC_POLL_OFFSET 0x000000 /* STIC DMA poll space */ 77 #define PX_STAMP_OFFSET 0x0c0000 /* pixelstamp space on STIC */ 78 #define PX_STIC_OFFSET 0x180000 /* STIC registers */ 79 #define PX_VDAC_OFFSET 0x200000 /* VDAC registers (bt459) */ 80 #define PX_VDAC_RESET_OFFSET 0x300000 /* VDAC reset register */ 81 #define PX_ROM_OFFSET 0x300000 /* ROM code */ 82 83 #define PX_BUF_COUNT 16 84 #define PX_BUF_INC(x) ((x + 1) & (PX_BUF_COUNT - 1)) 85 86 /* 87 * We need enough aligned memory to hold: 88 * 89 * - Xserver communication area (4096 bytes) 90 * - 16 packet buffers (4096 bytes each) 91 * - 2 image buffers (5120 bytes each) 92 * 93 */ 94 #define PX_BUF_SIZE \ 95 (STIC_PACKET_SIZE * PX_BUF_COUNT + STIC_IMGBUF_SIZE*2 + STIC_XCOMM_SIZE) 96 #define PX_BUF_ALIGN 32768 97 98 #define PXF_QUEUE 0x01 99 100 void px_attach(struct device *, struct device *, void *); 101 void px_init(struct stic_info *, int); 102 int px_ioctl(struct stic_info *, u_long, caddr_t, int, struct proc *); 103 int px_match(struct device *, struct cfdata *, void *); 104 105 int px_intr(void *); 106 u_int32_t *px_pbuf_get(struct stic_info *); 107 int px_pbuf_post(struct stic_info *, u_int32_t *); 108 109 void px_cnattach(tc_addr_t); 110 111 struct px_softc { 112 struct device px_dv; 113 struct stic_info *px_si; 114 volatile u_int32_t *px_qpoll[PX_BUF_COUNT]; 115 }; 116 117 struct cfattach px_ca = { 118 sizeof(struct px_softc), px_match, px_attach 119 }; 120 121 int 122 px_match(struct device *parent, struct cfdata *match, void *aux) 123 { 124 struct tc_attach_args *ta; 125 126 ta = aux; 127 128 return (strncmp("PMAG-CA ", ta->ta_modname, TC_ROM_LLEN) == 0); 129 } 130 131 void 132 px_attach(struct device *parent, struct device *self, void *aux) 133 { 134 struct stic_info *si; 135 struct tc_attach_args *ta; 136 struct px_softc *px; 137 int console, i; 138 u_long v; 139 140 px = (struct px_softc *)self; 141 ta = (struct tc_attach_args *)aux; 142 143 if (ta->ta_addr == stic_consinfo.si_slotbase) { 144 si = &stic_consinfo; 145 console = 1; 146 } else { 147 if (stic_consinfo.si_slotbase == NULL) 148 si = &stic_consinfo; 149 else { 150 si = malloc(sizeof(*si), M_DEVBUF, M_NOWAIT); 151 memset(si, 0, sizeof(*si)); 152 } 153 si->si_slotbase = ta->ta_addr; 154 px_init(si, 0); 155 console = 0; 156 } 157 158 px->px_si = si; 159 si->si_dv = self; 160 tc_intr_establish(parent, ta->ta_cookie, IPL_TTY, px_intr, si); 161 162 printf(": 8 plane, %dx%d stamp\n", si->si_stampw, si->si_stamph); 163 164 for (i = 0; i < PX_BUF_COUNT; i++) { 165 v = i * STIC_PACKET_SIZE + 166 si->si_buf_phys + STIC_XCOMM_SIZE; 167 v = ((v & 0xffff8000) << 3) | (v & 0x7fff); 168 px->px_qpoll[i] = (volatile u_int32_t *) 169 ((caddr_t)si->si_slotbase + (v >> 9)); 170 } 171 172 stic_attach(self, si, console); 173 } 174 175 void 176 px_cnattach(tc_addr_t addr) 177 { 178 struct stic_info *si; 179 180 si = &stic_consinfo; 181 si->si_slotbase = addr; 182 px_init(si, 1); 183 stic_cnattach(si); 184 } 185 186 void 187 px_init(struct stic_info *si, int bootstrap) 188 { 189 struct pglist pglist; 190 caddr_t kva, bva; 191 paddr_t bpa; 192 193 /* 194 * Allocate memory for the packet buffers. It must be located below 195 * 8MB, since the STIC can't access outside that region. Also, due 196 * to the holes in STIC address space, each buffer mustn't cross a 197 * 32kB boundary. 198 */ 199 if (bootstrap) { 200 /* 201 * UVM won't be initialised at this point, so grab memory 202 * directly from vm_physmem[]. 203 */ 204 bva = (caddr_t)uvm_pageboot_alloc(PX_BUF_SIZE + PX_BUF_ALIGN); 205 bpa = (STIC_KSEG_TO_PHYS(kva) + PX_BUF_ALIGN - 1) & 206 ~(PX_BUF_ALIGN - 1); 207 if (bpa + PX_BUF_SIZE > 8192*1024) 208 panic("px_init: allocation out of bounds"); 209 } else { 210 TAILQ_INIT(&pglist); 211 if (uvm_pglistalloc(PX_BUF_SIZE, 0, 8192*1024, PX_BUF_ALIGN, 212 0, &pglist, 1, 0) != 0) 213 panic("px_init: allocation failure"); 214 bpa = TAILQ_FIRST(&pglist)->phys_addr; 215 } 216 217 kva = (caddr_t)si->si_slotbase; 218 219 si->si_vdac = (u_int32_t *)(kva + PX_VDAC_OFFSET); 220 si->si_vdac_reset = (u_int32_t *)(kva + PX_VDAC_RESET_OFFSET); 221 si->si_stic = (volatile struct stic_regs *)(kva + PX_STIC_OFFSET); 222 si->si_stamp = (u_int32_t *)(kva + PX_STAMP_OFFSET); 223 si->si_buf = (u_int32_t *)TC_PHYS_TO_UNCACHED(bpa); 224 si->si_buf_phys = bpa; 225 si->si_buf_size = PX_BUF_SIZE; 226 si->si_disptype = WSDISPLAY_TYPE_PX; 227 si->si_depth = 8; 228 si->si_sxc = (volatile struct stic_xcomm *)si->si_buf; 229 230 si->si_pbuf_get = px_pbuf_get; 231 si->si_pbuf_post = px_pbuf_post; 232 si->si_ioctl = px_ioctl; 233 234 memset(si->si_buf, 0, PX_BUF_SIZE); 235 236 stic_init(si); 237 } 238 239 int 240 px_intr(void *cookie) 241 { 242 volatile struct stic_regs *sr; 243 volatile struct stic_xcomm *sxc; 244 struct stic_info *si; 245 struct px_softc *px; 246 int state; 247 248 si = cookie; 249 px = (struct px_softc *)si->si_dv; 250 sr = si->si_stic; 251 state = sr->sr_ipdvint; 252 sxc = si->si_sxc; 253 254 /* 255 * Vertical-retrace condition. 256 * 257 * Clear the flag and flush out any waiting VDAC updates. We do 258 * this at retrace time to avoid producing `shearing' and other 259 * nasty artifacts. 260 */ 261 if ((state & STIC_INT_V) != 0) { 262 sr->sr_ipdvint = STIC_INT_V_WE | STIC_INT_V_EN; 263 tc_wmb(); 264 stic_flush(si); 265 } 266 267 /* 268 * Error condition. 269 * 270 * Simply clear the flag and report the error. 271 */ 272 if ((state & STIC_INT_E) != 0) { 273 printf("%s: error intr, %x %x %x %x %x", px->px_dv.dv_xname, 274 sr->sr_ipdvint, sr->sr_sticsr, sr->sr_buscsr, 275 sr->sr_busadr, sr->sr_busdat); 276 sr->sr_ipdvint = STIC_INT_E_WE | STIC_INT_E_EN; 277 tc_wmb(); 278 } 279 280 /* 281 * Check for queue stalls. 282 */ 283 if (sxc->sxc_tail != sxc->sxc_head && !sxc->sxc_busy) 284 state |= STIC_INT_P; 285 286 /* 287 * Packet-done condition. 288 * 289 * If packet queueing is enabled, clear the condition, and increment 290 * the tail (submitted) pointer. 291 */ 292 if ((si->si_hwflags & PXF_QUEUE) != 0 && (state & STIC_INT_P) != 0) { 293 sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P_EN; 294 tc_wmb(); 295 296 if (sxc->sxc_tail != sxc->sxc_head) { 297 sxc->sxc_done[sxc->sxc_tail] = 0; 298 sxc->sxc_tail = PX_BUF_INC(sxc->sxc_tail); 299 } 300 301 if (sxc->sxc_tail != sxc->sxc_head) { 302 if (*px->px_qpoll[sxc->sxc_tail] != STAMP_OK) { 303 sxc->sxc_nreject++; 304 sxc->sxc_busy = 0; 305 } else 306 sxc->sxc_busy = 1; 307 } else 308 sxc->sxc_busy = 0; 309 } 310 311 if ((si->si_hwflags & PXF_QUEUE) != 0 && (state & STIC_INT_P_EN) == 0) 312 printf("px_intr: STIC_INT_P_EN == 0\n"); 313 314 return (1); 315 } 316 317 u_int32_t * 318 px_pbuf_get(struct stic_info *si) 319 { 320 u_long off; 321 322 si->si_pbuf_select ^= STIC_PACKET_SIZE; 323 off = si->si_pbuf_select + STIC_XCOMM_SIZE; 324 return ((u_int32_t *)((caddr_t)si->si_buf + off)); 325 } 326 327 int 328 px_pbuf_post(struct stic_info *si, u_int32_t *buf) 329 { 330 volatile u_int32_t *poll, junk; 331 volatile struct stic_regs *sr; 332 u_long v; 333 int c; 334 335 sr = si->si_stic; 336 337 /* Get address of poll register for this buffer. */ 338 v = (u_long)STIC_KSEG_TO_PHYS(buf); 339 v = ((v & 0xffff8000) << 3) | (v & 0x7fff); 340 poll = (volatile u_int32_t *)((caddr_t)si->si_slotbase + (v >> 9)); 341 342 /* 343 * Read the poll register and make sure the stamp wants to accept 344 * our packet. This read will initiate the DMA. Don't wait for 345 * ever, just in case something's wrong. 346 */ 347 tc_mb(); 348 349 for (c = STAMP_RETRIES; c != 0; c--) { 350 if ((sr->sr_ipdvint & STIC_INT_P) != 0) { 351 sr->sr_ipdvint = STIC_INT_P_WE; 352 tc_wmb(); 353 junk = *poll; 354 return (0); 355 } 356 DELAY(STAMP_DELAY); 357 } 358 359 /* STIC has lost the plot, punish it. */ 360 stic_reset(si); 361 return (-1); 362 } 363 364 int 365 px_ioctl(struct stic_info *si, u_long cmd, caddr_t data, int flag, 366 struct proc *p) 367 { 368 volatile struct stic_xcomm *sxc; 369 volatile struct stic_regs *sr; 370 struct stic_xinfo *sxi; 371 int rv, s; 372 373 sr = si->si_stic; 374 375 switch (cmd) { 376 case STICIO_STARTQ: 377 if (si->si_dispmode != WSDISPLAYIO_MODE_MAPPED || 378 (si->si_hwflags & PXF_QUEUE) != 0) { 379 rv = EBUSY; 380 break; 381 } 382 383 sxc = si->si_sxc; 384 memset((void *)sxc->sxc_done, 0, sizeof(sxc->sxc_done)); 385 sxc->sxc_head = 0; 386 sxc->sxc_tail = 0; 387 sxc->sxc_nreject = 0; 388 sxc->sxc_nstall = 0; 389 390 s = spltty(); 391 si->si_hwflags |= PXF_QUEUE; 392 sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P_EN; 393 tc_wmb(); 394 splx(s); 395 396 rv = 0; 397 break; 398 399 case STICIO_STOPQ: 400 s = spltty(); 401 si->si_hwflags &= ~PXF_QUEUE; 402 sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P; 403 tc_wmb(); 404 splx(s); 405 rv = 0; 406 break; 407 408 case STICIO_GXINFO: 409 sxi = (struct stic_xinfo *)data; 410 sxi->sxi_unit = si->si_unit; 411 sxi->sxi_stampw = si->si_stampw; 412 sxi->sxi_stamph = si->si_stamph; 413 sxi->sxi_buf_size = si->si_buf_size; 414 sxi->sxi_buf_phys = (u_int)si->si_buf_phys; 415 sxi->sxi_buf_pktoff = STIC_XCOMM_SIZE; 416 sxi->sxi_buf_pktcnt = PX_BUF_COUNT; 417 sxi->sxi_buf_imgoff = 418 STIC_XCOMM_SIZE + STIC_PACKET_SIZE * PX_BUF_COUNT; 419 rv = 0; 420 break; 421 422 default: 423 rv = ENOTTY; 424 break; 425 } 426 427 return (rv); 428 } 429