1 /* $NetBSD: bba.c,v 1.33 2008/04/05 16:44:41 cegger Exp $ */ 2 3 /* 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the NetBSD 18 * Foundation, Inc. and its contributors. 19 * 4. Neither the name of The NetBSD Foundation nor the names of its 20 * contributors may be used to endorse or promote products derived 21 * from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* maxine/alpha baseboard audio (bba) */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: bba.c,v 1.33 2008/04/05 16:44:41 cegger Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/kernel.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 47 #include <sys/bus.h> 48 #include <machine/autoconf.h> 49 #include <sys/cpu.h> 50 51 #include <sys/audioio.h> 52 #include <dev/audio_if.h> 53 #include <dev/auconv.h> 54 55 #include <dev/ic/am7930reg.h> 56 #include <dev/ic/am7930var.h> 57 58 #include <dev/tc/tcvar.h> 59 #include <dev/tc/ioasicreg.h> 60 #include <dev/tc/ioasicvar.h> 61 62 #ifdef AUDIO_DEBUG 63 #define DPRINTF(x) if (am7930debug) printf x 64 #else 65 #define DPRINTF(x) 66 #endif /* AUDIO_DEBUG */ 67 68 #define BBA_MAX_DMA_SEGMENTS 16 69 #define BBA_DMABUF_SIZE (BBA_MAX_DMA_SEGMENTS*IOASIC_DMA_BLOCKSIZE) 70 #define BBA_DMABUF_ALIGN IOASIC_DMA_BLOCKSIZE 71 #define BBA_DMABUF_BOUNDARY 0 72 73 struct bba_mem { 74 struct bba_mem *next; 75 bus_addr_t addr; 76 bus_size_t size; 77 void *kva; 78 }; 79 80 struct bba_dma_state { 81 bus_dmamap_t dmam; /* DMA map */ 82 int active; 83 int curseg; /* current segment in DMA buffer */ 84 void (*intr)(void *); /* higher-level audio handler */ 85 void *intr_arg; 86 }; 87 88 struct bba_softc { 89 struct am7930_softc sc_am7930; /* glue to MI code */ 90 91 bus_space_tag_t sc_bst; /* IOASIC bus tag/handle */ 92 bus_space_handle_t sc_bsh; 93 bus_dma_tag_t sc_dmat; 94 bus_space_handle_t sc_codec_bsh; /* codec bus space handle */ 95 96 struct bba_mem *sc_mem_head; /* list of buffers */ 97 98 struct bba_dma_state sc_tx_dma_state; 99 struct bba_dma_state sc_rx_dma_state; 100 }; 101 102 static int bba_match(struct device *, struct cfdata *, void *); 103 static void bba_attach(struct device *, struct device *, void *); 104 105 CFATTACH_DECL(bba, sizeof(struct bba_softc), 106 bba_match, bba_attach, NULL, NULL); 107 108 /* 109 * Define our interface into the am7930 MI driver. 110 */ 111 112 static uint8_t bba_codec_iread(struct am7930_softc *, int); 113 static uint16_t bba_codec_iread16(struct am7930_softc *, int); 114 static void bba_codec_iwrite(struct am7930_softc *, int, uint8_t); 115 static void bba_codec_iwrite16(struct am7930_softc *, int, uint16_t); 116 static void bba_onopen(struct am7930_softc *); 117 static void bba_onclose(struct am7930_softc *); 118 119 static stream_filter_factory_t bba_output_conv; 120 static stream_filter_factory_t bba_input_conv; 121 static int bba_output_conv_fetch_to(stream_fetcher_t *, audio_stream_t *, 122 int); 123 static int bba_input_conv_fetch_to(stream_fetcher_t *, audio_stream_t *, 124 int); 125 126 struct am7930_glue bba_glue = { 127 bba_codec_iread, 128 bba_codec_iwrite, 129 bba_codec_iread16, 130 bba_codec_iwrite16, 131 bba_onopen, 132 bba_onclose, 133 4, 134 bba_input_conv, 135 bba_output_conv, 136 }; 137 138 /* 139 * Define our interface to the higher level audio driver. 140 */ 141 142 static int bba_round_blocksize(void *, int, int, const audio_params_t *); 143 static int bba_halt_output(void *); 144 static int bba_halt_input(void *); 145 static int bba_getdev(void *, struct audio_device *); 146 static void *bba_allocm(void *, int, size_t, struct malloc_type *, int); 147 static void bba_freem(void *, void *, struct malloc_type *); 148 static size_t bba_round_buffersize(void *, int, size_t); 149 static int bba_get_props(void *); 150 static paddr_t bba_mappage(void *, void *, off_t, int); 151 static int bba_trigger_output(void *, void *, void *, int, 152 void (*)(void *), void *, 153 const audio_params_t *); 154 static int bba_trigger_input(void *, void *, void *, int, 155 void (*)(void *), void *, 156 const audio_params_t *); 157 158 static const struct audio_hw_if sa_hw_if = { 159 am7930_open, 160 am7930_close, 161 0, 162 am7930_query_encoding, 163 am7930_set_params, 164 bba_round_blocksize, /* md */ 165 am7930_commit_settings, 166 0, 167 0, 168 0, 169 0, 170 bba_halt_output, /* md */ 171 bba_halt_input, /* md */ 172 0, 173 bba_getdev, 174 0, 175 am7930_set_port, 176 am7930_get_port, 177 am7930_query_devinfo, 178 bba_allocm, /* md */ 179 bba_freem, /* md */ 180 bba_round_buffersize, /* md */ 181 bba_mappage, 182 bba_get_props, 183 bba_trigger_output, /* md */ 184 bba_trigger_input, /* md */ 185 0, 186 }; 187 188 static struct audio_device bba_device = { 189 "am7930", 190 "x", 191 "bba" 192 }; 193 194 static int bba_intr(void *); 195 static void bba_reset(struct bba_softc *, int); 196 static void bba_codec_dwrite(struct am7930_softc *, int, u_int8_t); 197 static uint8_t bba_codec_dread(struct am7930_softc *, int); 198 199 static int 200 bba_match(struct device *parent, struct cfdata *cf, void *aux) 201 { 202 struct ioasicdev_attach_args *ia; 203 204 ia = aux; 205 if (strcmp(ia->iada_modname, "isdn") != 0 && 206 strcmp(ia->iada_modname, "AMD79c30") != 0) 207 return 0; 208 209 return 1; 210 } 211 212 213 static void 214 bba_attach(struct device *parent, struct device *self, void *aux) 215 { 216 struct ioasicdev_attach_args *ia; 217 struct bba_softc *sc; 218 struct am7930_softc *asc; 219 struct ioasic_softc *iosc = device_private(parent); 220 221 ia = aux; 222 sc = device_private(self); 223 asc = &sc->sc_am7930; 224 sc->sc_bst = iosc->sc_bst; 225 sc->sc_bsh = iosc->sc_bsh; 226 sc->sc_dmat = iosc->sc_dmat; 227 228 /* get the bus space handle for codec */ 229 if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, 230 ia->iada_offset, 0, &sc->sc_codec_bsh)) { 231 aprint_error_dev(&asc->sc_dev, "unable to map device\n"); 232 return; 233 } 234 235 printf("\n"); 236 237 bba_reset(sc,1); 238 239 /* 240 * Set up glue for MI code early; we use some of it here. 241 */ 242 asc->sc_glue = &bba_glue; 243 244 /* 245 * MI initialisation. We will be doing DMA. 246 */ 247 am7930_init(asc, AUDIOAMD_DMA_MODE); 248 249 ioasic_intr_establish(parent, ia->iada_cookie, TC_IPL_NONE, 250 bba_intr, sc); 251 252 audio_attach_mi(&sa_hw_if, asc, &asc->sc_dev); 253 } 254 255 256 static void 257 bba_onopen(struct am7930_softc *sc) 258 { 259 } 260 261 262 static void 263 bba_onclose(struct am7930_softc *sc) 264 { 265 } 266 267 268 static void 269 bba_reset(struct bba_softc *sc, int reset) 270 { 271 uint32_t ssr; 272 273 /* disable any DMA and reset the codec */ 274 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 275 ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R); 276 if (reset) 277 ssr &= ~IOASIC_CSR_ISDN_ENABLE; 278 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 279 DELAY(10); /* 400ns required for codec to reset */ 280 281 /* initialise DMA pointers */ 282 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1); 283 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1); 284 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1); 285 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1); 286 287 /* take out of reset state */ 288 if (reset) { 289 ssr |= IOASIC_CSR_ISDN_ENABLE; 290 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 291 } 292 293 } 294 295 296 static void * 297 bba_allocm(void *addr, int direction, size_t size, 298 struct malloc_type *pool, int flags) 299 { 300 struct am7930_softc *asc; 301 struct bba_softc *sc; 302 bus_dma_segment_t seg; 303 int rseg; 304 void *kva; 305 struct bba_mem *m; 306 int w; 307 int state; 308 309 DPRINTF(("bba_allocm: size = %zu\n", size)); 310 asc = addr; 311 sc = addr; 312 state = 0; 313 w = (flags & M_NOWAIT) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK; 314 315 if (bus_dmamem_alloc(sc->sc_dmat, size, BBA_DMABUF_ALIGN, 316 BBA_DMABUF_BOUNDARY, &seg, 1, &rseg, w)) { 317 aprint_error_dev(&asc->sc_dev, "can't allocate DMA buffer\n"); 318 goto bad; 319 } 320 state |= 1; 321 322 if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 323 &kva, w | BUS_DMA_COHERENT)) { 324 aprint_error_dev(&asc->sc_dev, "can't map DMA buffer\n"); 325 goto bad; 326 } 327 state |= 2; 328 329 m = malloc(sizeof(struct bba_mem), pool, flags); 330 if (m == NULL) 331 goto bad; 332 m->addr = seg.ds_addr; 333 m->size = seg.ds_len; 334 m->kva = kva; 335 m->next = sc->sc_mem_head; 336 sc->sc_mem_head = m; 337 338 return (void *)kva; 339 340 bad: 341 if (state & 2) 342 bus_dmamem_unmap(sc->sc_dmat, kva, size); 343 if (state & 1) 344 bus_dmamem_free(sc->sc_dmat, &seg, 1); 345 return NULL; 346 } 347 348 349 static void 350 bba_freem(void *addr, void *ptr, struct malloc_type *pool) 351 { 352 struct bba_softc *sc; 353 struct bba_mem **mp, *m; 354 bus_dma_segment_t seg; 355 void *kva; 356 357 sc = addr; 358 kva = (void *)addr; 359 for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva; 360 mp = &(*mp)->next) 361 continue; 362 m = *mp; 363 if (m == NULL) { 364 printf("bba_freem: freeing unallocated memory\n"); 365 return; 366 } 367 *mp = m->next; 368 bus_dmamem_unmap(sc->sc_dmat, kva, m->size); 369 370 seg.ds_addr = m->addr; 371 seg.ds_len = m->size; 372 bus_dmamem_free(sc->sc_dmat, &seg, 1); 373 free(m, pool); 374 } 375 376 377 static size_t 378 bba_round_buffersize(void *addr, int direction, size_t size) 379 { 380 381 DPRINTF(("bba_round_buffersize: size=%zu\n", size)); 382 return size > BBA_DMABUF_SIZE ? BBA_DMABUF_SIZE : 383 roundup(size, IOASIC_DMA_BLOCKSIZE); 384 } 385 386 387 static int 388 bba_halt_output(void *addr) 389 { 390 struct bba_softc *sc; 391 struct bba_dma_state *d; 392 uint32_t ssr; 393 394 sc = addr; 395 d = &sc->sc_tx_dma_state; 396 /* disable any DMA */ 397 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 398 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T; 399 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 400 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1); 401 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1); 402 403 if (d->active) { 404 bus_dmamap_unload(sc->sc_dmat, d->dmam); 405 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 406 d->active = 0; 407 } 408 409 return 0; 410 } 411 412 413 static int 414 bba_halt_input(void *addr) 415 { 416 struct bba_softc *sc; 417 struct bba_dma_state *d; 418 uint32_t ssr; 419 420 sc = addr; 421 d = &sc->sc_rx_dma_state; 422 /* disable any DMA */ 423 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 424 ssr &= ~IOASIC_CSR_DMAEN_ISDN_R; 425 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 426 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1); 427 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1); 428 429 if (d->active) { 430 bus_dmamap_unload(sc->sc_dmat, d->dmam); 431 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 432 d->active = 0; 433 } 434 435 return 0; 436 } 437 438 439 static int 440 bba_getdev(void *addr, struct audio_device *retp) 441 { 442 443 *retp = bba_device; 444 return 0; 445 } 446 447 448 static int 449 bba_trigger_output(void *addr, void *start, void *end, int blksize, 450 void (*intr)(void *), void *arg, 451 const audio_params_t *param) 452 { 453 struct bba_softc *sc; 454 struct bba_dma_state *d; 455 uint32_t ssr; 456 tc_addr_t phys, nphys; 457 int state; 458 459 DPRINTF(("bba_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 460 addr, start, end, blksize, intr, arg)); 461 sc = addr; 462 d = &sc->sc_tx_dma_state; 463 state = 0; 464 465 /* disable any DMA */ 466 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 467 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T; 468 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 469 470 if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start, 471 BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE, 472 BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) { 473 printf("bba_trigger_output: can't create DMA map\n"); 474 goto bad; 475 } 476 state |= 1; 477 478 if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, 479 (char *)end - (char *)start, NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT)) { 480 printf("bba_trigger_output: can't load DMA map\n"); 481 goto bad; 482 } 483 state |= 2; 484 485 d->intr = intr; 486 d->intr_arg = arg; 487 d->curseg = 1; 488 489 /* get physical address of buffer start */ 490 phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr; 491 nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr; 492 493 /* setup DMA pointer */ 494 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, 495 IOASIC_DMA_ADDR(phys)); 496 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, 497 IOASIC_DMA_ADDR(nphys)); 498 499 /* kick off DMA */ 500 ssr |= IOASIC_CSR_DMAEN_ISDN_T; 501 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 502 503 d->active = 1; 504 505 return 0; 506 507 bad: 508 if (state & 2) 509 bus_dmamap_unload(sc->sc_dmat, d->dmam); 510 if (state & 1) 511 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 512 return 1; 513 } 514 515 516 static int 517 bba_trigger_input(void *addr, void *start, void *end, int blksize, 518 void (*intr)(void *), void *arg, const audio_params_t *param) 519 { 520 struct bba_softc *sc; 521 struct bba_dma_state *d; 522 tc_addr_t phys, nphys; 523 u_int32_t ssr; 524 int state = 0; 525 526 DPRINTF(("bba_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 527 addr, start, end, blksize, intr, arg)); 528 sc = (struct bba_softc *)addr; 529 d = &sc->sc_rx_dma_state; 530 state = 0; 531 532 /* disable any DMA */ 533 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 534 ssr &= ~IOASIC_CSR_DMAEN_ISDN_R; 535 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 536 537 if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start, 538 BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE, 539 BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) { 540 printf("bba_trigger_input: can't create DMA map\n"); 541 goto bad; 542 } 543 state |= 1; 544 545 if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, 546 (char *)end - (char *)start, NULL, BUS_DMA_READ|BUS_DMA_NOWAIT)) { 547 printf("bba_trigger_input: can't load DMA map\n"); 548 goto bad; 549 } 550 state |= 2; 551 552 d->intr = intr; 553 d->intr_arg = arg; 554 d->curseg = 1; 555 556 /* get physical address of buffer start */ 557 phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr; 558 nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr; 559 560 /* setup DMA pointer */ 561 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, 562 IOASIC_DMA_ADDR(phys)); 563 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, 564 IOASIC_DMA_ADDR(nphys)); 565 566 /* kick off DMA */ 567 ssr |= IOASIC_CSR_DMAEN_ISDN_R; 568 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 569 570 d->active = 1; 571 572 return 0; 573 574 bad: 575 if (state & 2) 576 bus_dmamap_unload(sc->sc_dmat, d->dmam); 577 if (state & 1) 578 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 579 return 1; 580 } 581 582 static int 583 bba_intr(void *addr) 584 { 585 struct bba_softc *sc; 586 struct bba_dma_state *d; 587 tc_addr_t nphys; 588 int s, mask; 589 590 sc = addr; 591 s = splaudio(); 592 593 mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR); 594 595 if (mask & IOASIC_INTR_ISDN_TXLOAD) { 596 d = &sc->sc_tx_dma_state; 597 d->curseg = (d->curseg+1) % d->dmam->dm_nsegs; 598 nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr; 599 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 600 IOASIC_ISDN_X_NEXTPTR, IOASIC_DMA_ADDR(nphys)); 601 if (d->intr != NULL) 602 (*d->intr)(d->intr_arg); 603 } 604 if (mask & IOASIC_INTR_ISDN_RXLOAD) { 605 d = &sc->sc_rx_dma_state; 606 d->curseg = (d->curseg+1) % d->dmam->dm_nsegs; 607 nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr; 608 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 609 IOASIC_ISDN_R_NEXTPTR, IOASIC_DMA_ADDR(nphys)); 610 if (d->intr != NULL) 611 (*d->intr)(d->intr_arg); 612 } 613 614 splx(s); 615 616 return 0; 617 } 618 619 static int 620 bba_get_props(void *addr) 621 { 622 623 return AUDIO_PROP_MMAP | am7930_get_props(addr); 624 } 625 626 static paddr_t 627 bba_mappage(void *addr, void *mem, off_t offset, int prot) 628 { 629 struct bba_softc *sc; 630 struct bba_mem **mp; 631 bus_dma_segment_t seg; 632 void *kva; 633 634 sc = addr; 635 kva = (void *)mem; 636 for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva; 637 mp = &(*mp)->next) 638 continue; 639 if (*mp == NULL || offset < 0) { 640 return -1; 641 } 642 643 seg.ds_addr = (*mp)->addr; 644 seg.ds_len = (*mp)->size; 645 646 return bus_dmamem_mmap(sc->sc_dmat, &seg, 1, offset, 647 prot, BUS_DMA_WAITOK); 648 } 649 650 static stream_filter_t * 651 bba_input_conv(struct audio_softc *sc, const audio_params_t *from, 652 const audio_params_t *to) 653 { 654 return auconv_nocontext_filter_factory(bba_input_conv_fetch_to); 655 } 656 657 static int 658 bba_input_conv_fetch_to(stream_fetcher_t *self, audio_stream_t *dst, 659 int max_used) 660 { 661 stream_filter_t *this; 662 int m, err; 663 664 this = (stream_filter_t *)self; 665 if ((err = this->prev->fetch_to(this->prev, this->src, max_used * 4))) 666 return err; 667 m = dst->end - dst->start; 668 m = min(m, max_used); 669 FILTER_LOOP_PROLOGUE(this->src, 4, dst, 1, m) { 670 *d = ((*(const uint32_t *)s) >> 16) & 0xff; 671 } FILTER_LOOP_EPILOGUE(this->src, dst); 672 return 0; 673 } 674 675 static stream_filter_t * 676 bba_output_conv(struct audio_softc *sc, const audio_params_t *from, 677 const audio_params_t *to) 678 { 679 return auconv_nocontext_filter_factory(bba_output_conv_fetch_to); 680 } 681 682 static int 683 bba_output_conv_fetch_to(stream_fetcher_t *self, audio_stream_t *dst, 684 int max_used) 685 { 686 stream_filter_t *this; 687 int m, err; 688 689 this = (stream_filter_t *)self; 690 max_used = (max_used + 3) & ~3; 691 if ((err = this->prev->fetch_to(this->prev, this->src, max_used / 4))) 692 return err; 693 m = (dst->end - dst->start) & ~3; 694 m = min(m, max_used); 695 FILTER_LOOP_PROLOGUE(this->src, 1, dst, 4, m) { 696 *(uint32_t *)d = (*s << 16); 697 } FILTER_LOOP_EPILOGUE(this->src, dst); 698 return 0; 699 } 700 701 static int 702 bba_round_blocksize(void *addr, int blk, int mode, const audio_params_t *param) 703 { 704 705 return IOASIC_DMA_BLOCKSIZE; 706 } 707 708 709 /* indirect write */ 710 static void 711 bba_codec_iwrite(struct am7930_softc *sc, int reg, uint8_t val) 712 { 713 714 DPRINTF(("bba_codec_iwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 715 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 716 bba_codec_dwrite(sc, AM7930_DREG_DR, val); 717 } 718 719 720 static void 721 bba_codec_iwrite16(struct am7930_softc *sc, int reg, uint16_t val) 722 { 723 724 DPRINTF(("bba_codec_iwrite16(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 725 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 726 bba_codec_dwrite(sc, AM7930_DREG_DR, val); 727 bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8); 728 } 729 730 731 static uint16_t 732 bba_codec_iread16(struct am7930_softc *sc, int reg) 733 { 734 uint16_t val; 735 736 DPRINTF(("bba_codec_iread16(): sc=%p, reg=%d\n", sc, reg)); 737 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 738 val = bba_codec_dread(sc, AM7930_DREG_DR) << 8; 739 val |= bba_codec_dread(sc, AM7930_DREG_DR); 740 741 return val; 742 } 743 744 745 /* indirect read */ 746 static uint8_t 747 bba_codec_iread(struct am7930_softc *sc, int reg) 748 { 749 uint8_t val; 750 751 DPRINTF(("bba_codec_iread(): sc=%p, reg=%d\n", sc, reg)); 752 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 753 val = bba_codec_dread(sc, AM7930_DREG_DR); 754 755 DPRINTF(("read 0x%x (%d)\n", val, val)); 756 757 return val; 758 } 759 760 /* direct write */ 761 static void 762 bba_codec_dwrite(struct am7930_softc *asc, int reg, uint8_t val) 763 { 764 struct bba_softc *sc; 765 766 sc = (struct bba_softc *)asc; 767 DPRINTF(("bba_codec_dwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 768 769 #if defined(__alpha__) 770 bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, 771 reg << 2, val << 8); 772 #else 773 bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, 774 reg << 6, val); 775 #endif 776 } 777 778 /* direct read */ 779 static uint8_t 780 bba_codec_dread(struct am7930_softc *asc, int reg) 781 { 782 struct bba_softc *sc; 783 784 sc = (struct bba_softc *)asc; 785 DPRINTF(("bba_codec_dread(): sc=%p, reg=%d\n", sc, reg)); 786 787 #if defined(__alpha__) 788 return ((bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, 789 reg << 2) >> 8) & 0xff); 790 #else 791 return (bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, 792 reg << 6) & 0xff); 793 #endif 794 } 795