1 /* $NetBSD: cgsix.c,v 1.8 2002/09/06 13:18:43 gehenna Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Paul Kranenburg. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1993 41 * The Regents of the University of California. All rights reserved. 42 * 43 * This software was developed by the Computer Systems Engineering group 44 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 45 * contributed to Berkeley. 46 * 47 * All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by the University of 50 * California, Lawrence Berkeley Laboratory. 51 * 52 * Redistribution and use in source and binary forms, with or without 53 * modification, are permitted provided that the following conditions 54 * are met: 55 * 1. Redistributions of source code must retain the above copyright 56 * notice, this list of conditions and the following disclaimer. 57 * 2. Redistributions in binary form must reproduce the above copyright 58 * notice, this list of conditions and the following disclaimer in the 59 * documentation and/or other materials provided with the distribution. 60 * 3. All advertising materials mentioning features or use of this software 61 * must display the following acknowledgement: 62 * This product includes software developed by the University of 63 * California, Berkeley and its contributors. 64 * 4. Neither the name of the University nor the names of its contributors 65 * may be used to endorse or promote products derived from this software 66 * without specific prior written permission. 67 * 68 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 69 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 70 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 71 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 72 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 73 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 74 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 75 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 76 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 77 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 78 * SUCH DAMAGE. 79 * 80 * @(#)cgsix.c 8.4 (Berkeley) 1/21/94 81 */ 82 83 /* 84 * color display (cgsix) driver. 85 * 86 * Does not handle interrupts, even though they can occur. 87 * 88 * XXX should defer colormap updates to vertical retrace interrupts 89 */ 90 91 #include <sys/cdefs.h> 92 __KERNEL_RCSID(0, "$NetBSD: cgsix.c,v 1.8 2002/09/06 13:18:43 gehenna Exp $"); 93 94 #include <sys/param.h> 95 #include <sys/systm.h> 96 #include <sys/buf.h> 97 #include <sys/device.h> 98 #include <sys/ioctl.h> 99 #include <sys/malloc.h> 100 #include <sys/mman.h> 101 #include <sys/tty.h> 102 #include <sys/conf.h> 103 104 #ifdef DEBUG 105 #include <sys/proc.h> 106 #include <sys/syslog.h> 107 #endif 108 109 #include <uvm/uvm_extern.h> 110 111 #include <machine/bus.h> 112 113 #include <dev/sun/fbio.h> 114 #include <dev/sun/fbvar.h> 115 116 #include <dev/sun/btreg.h> 117 #include <dev/sun/btvar.h> 118 #include <dev/sun/cgsixreg.h> 119 #include <dev/sun/cgsixvar.h> 120 #include <dev/sun/pfourreg.h> 121 122 #ifdef RASTERCONSOLE 123 #include <dev/rasops/rasops.h> 124 #include <dev/wscons/wsconsio.h> 125 #endif 126 127 static void cg6_unblank(struct device *); 128 129 extern struct cfdriver cgsix_cd; 130 131 dev_type_open(cgsixopen); 132 dev_type_close(cgsixclose); 133 dev_type_ioctl(cgsixioctl); 134 dev_type_mmap(cgsixmmap); 135 136 const struct cdevsw cgsix_cdevsw = { 137 cgsixopen, cgsixclose, noread, nowrite, cgsixioctl, 138 nostop, notty, nopoll, cgsixmmap, 139 }; 140 141 /* frame buffer generic driver */ 142 static struct fbdriver cg6_fbdriver = { 143 cg6_unblank, cgsixopen, cgsixclose, cgsixioctl, nopoll, cgsixmmap 144 }; 145 146 static void cg6_reset (struct cgsix_softc *); 147 static void cg6_loadcmap (struct cgsix_softc *, int, int); 148 static void cg6_loadomap (struct cgsix_softc *); 149 static void cg6_setcursor (struct cgsix_softc *);/* set position */ 150 static void cg6_loadcursor (struct cgsix_softc *);/* set shape */ 151 152 #ifdef RASTERCONSOLE 153 int cgsix_use_rasterconsole = 1; 154 155 /* 156 * cg6 accelerated console routines. 157 * 158 * Note that buried in this code in several places is the assumption 159 * that pixels are exactly one byte wide. Since this is cg6-specific 160 * code, this seems safe. This assumption resides in things like the 161 * use of ri_emuwidth without messing around with ri_pelbytes, or the 162 * assumption that ri_font->fontwidth is the right thing to multiply 163 * character-cell counts by to get byte counts. 164 */ 165 166 /* 167 * Magic values for blitter 168 */ 169 170 /* Values for the mode register */ 171 #define CG6_MODE ( \ 172 0x00200000 /* GX_BLIT_SRC */ \ 173 | 0x00020000 /* GX_MODE_COLOR8 */ \ 174 | 0x00008000 /* GX_DRAW_RENDER */ \ 175 | 0x00002000 /* GX_BWRITE0_ENABLE */ \ 176 | 0x00001000 /* GX_BWRITE1_DISABLE */ \ 177 | 0x00000200 /* GX_BREAD_0 */ \ 178 | 0x00000080 /* GX_BDISP_0 */ \ 179 ) 180 #define CG6_MODE_MASK ( \ 181 0x00300000 /* GX_BLIT_ALL */ \ 182 | 0x00060000 /* GX_MODE_ALL */ \ 183 | 0x00018000 /* GX_DRAW_ALL */ \ 184 | 0x00006000 /* GX_BWRITE0_ALL */ \ 185 | 0x00001800 /* GX_BWRITE1_ALL */ \ 186 | 0x00000600 /* GX_BREAD_ALL */ \ 187 | 0x00000180 /* GX_BDISP_ALL */ \ 188 ) 189 190 /* Value for the alu register for screen-to-screen copies */ 191 #define CG6_ALU_COPY ( \ 192 0x80000000 /* GX_PLANE_ONES (ignore planemask register) */ \ 193 | 0x20000000 /* GX_PIXEL_ONES (ignore pixelmask register) */ \ 194 | 0x00800000 /* GX_ATTR_SUPP (function unknown) */ \ 195 | 0x00000000 /* GX_RAST_BOOL (function unknown) */ \ 196 | 0x00000000 /* GX_PLOT_PLOT (function unknown) */ \ 197 | 0x08000000 /* GX_PATTERN_ONES (ignore pattern) */ \ 198 | 0x01000000 /* GX_POLYG_OVERLAP (unsure - handle overlap?) */ \ 199 | 0x0000cccc /* ALU = src */ \ 200 ) 201 202 /* Value for the alu register for region fills */ 203 #define CG6_ALU_FILL ( \ 204 0x80000000 /* GX_PLANE_ONES (ignore planemask register) */ \ 205 | 0x20000000 /* GX_PIXEL_ONES (ignore pixelmask register) */ \ 206 | 0x00800000 /* GX_ATTR_SUPP (function unknown) */ \ 207 | 0x00000000 /* GX_RAST_BOOL (function unknown) */ \ 208 | 0x00000000 /* GX_PLOT_PLOT (function unknown) */ \ 209 | 0x08000000 /* GX_PATTERN_ONES (ignore pattern) */ \ 210 | 0x01000000 /* GX_POLYG_OVERLAP (unsure - handle overlap?) */ \ 211 | 0x0000ff00 /* ALU = fg color */ \ 212 ) 213 214 /* Value for the alu register for toggling an area */ 215 #define CG6_ALU_FLIP ( \ 216 0x80000000 /* GX_PLANE_ONES (ignore planemask register) */ \ 217 | 0x20000000 /* GX_PIXEL_ONES (ignore pixelmask register) */ \ 218 | 0x00800000 /* GX_ATTR_SUPP (function unknown) */ \ 219 | 0x00000000 /* GX_RAST_BOOL (function unknown) */ \ 220 | 0x00000000 /* GX_PLOT_PLOT (function unknown) */ \ 221 | 0x08000000 /* GX_PATTERN_ONES (ignore pattern) */ \ 222 | 0x01000000 /* GX_POLYG_OVERLAP (unsure - handle overlap?) */ \ 223 | 0x00005555 /* ALU = ~dst */ \ 224 ) 225 226 /* 227 * Wait for a blit to finish. 228 * 0x8000000 bit: function unknown; 0x20000000 bit: GX_BLT_INPROGRESS 229 */ 230 #define CG6_BLIT_WAIT(fbc) do { \ 231 while (((fbc)->fbc_blit & 0xa0000000) == 0xa0000000) \ 232 /*EMPTY*/; \ 233 } while (0) 234 235 /* 236 * Wait for a drawing operation to finish, or at least get queued. 237 * 0x8000000 bit: function unknown; 0x20000000 bit: GX_FULL 238 */ 239 #define CG6_DRAW_WAIT(fbc) do { \ 240 while (((fbc)->fbc_draw & 0xa0000000) == 0xa0000000) \ 241 /*EMPTY*/; \ 242 } while (0) 243 244 /* 245 * Wait for the whole engine to go idle. This may not matter in our case; 246 * I'm not sure whether blits are actually queued or not. It more likely 247 * is intended for lines and such that do get queued. 248 * 0x10000000 bit: GX_INPROGRESS 249 */ 250 #define CG6_DRAIN(fbc) do { \ 251 while ((fbc)->fbc_s & 0x10000000) \ 252 /*EMPTY*/; \ 253 } while (0) 254 255 static void cg6_ras_init(struct cgsix_softc *); 256 static void cg6_ras_copyrows(void *, int, int, int); 257 static void cg6_ras_copycols(void *, int, int, int, int); 258 static void cg6_ras_erasecols(void *, int, int, int, long int); 259 static void cg6_ras_eraserows(void *, int, int, long int); 260 static void cg6_ras_do_cursor(struct rasops_info *); 261 262 static void 263 cg6_ras_init(struct cgsix_softc *sc) 264 { 265 volatile struct cg6_fbc *fbc = sc->sc_fbc; 266 267 CG6_DRAIN(fbc); 268 fbc->fbc_mode &= ~CG6_MODE_MASK; 269 fbc->fbc_mode |= CG6_MODE; 270 } 271 272 static void 273 cg6_ras_copyrows(void *cookie, int src, int dst, int n) 274 { 275 struct rasops_info *ri; 276 volatile struct cg6_fbc *fbc; 277 278 ri = cookie; 279 if (dst == src) 280 return; 281 if (src < 0) { 282 n += src; 283 src = 0; 284 } 285 if (src+n > ri->ri_rows) 286 n = ri->ri_rows - src; 287 if (dst < 0) { 288 n += dst; 289 dst = 0; 290 } 291 if (dst+n > ri->ri_rows) 292 n = ri->ri_rows - dst; 293 if (n <= 0) 294 return; 295 n *= ri->ri_font->fontheight; 296 src *= ri->ri_font->fontheight; 297 dst *= ri->ri_font->fontheight; 298 fbc = ((struct cgsix_softc *)ri->ri_hw)->sc_fbc; 299 fbc->fbc_clip = 0; 300 fbc->fbc_s = 0; 301 fbc->fbc_offx = 0; 302 fbc->fbc_offy = 0; 303 fbc->fbc_clipminx = 0; 304 fbc->fbc_clipminy = 0; 305 fbc->fbc_clipmaxx = ri->ri_width - 1; 306 fbc->fbc_clipmaxy = ri->ri_height - 1; 307 fbc->fbc_alu = CG6_ALU_COPY; 308 fbc->fbc_x0 = ri->ri_xorigin; 309 fbc->fbc_y0 = ri->ri_yorigin + src; 310 fbc->fbc_x1 = ri->ri_xorigin + ri->ri_emuwidth - 1; 311 fbc->fbc_y1 = ri->ri_yorigin + src + n - 1; 312 fbc->fbc_x2 = ri->ri_xorigin; 313 fbc->fbc_y2 = ri->ri_yorigin + dst; 314 fbc->fbc_x3 = ri->ri_xorigin + ri->ri_emuwidth - 1; 315 fbc->fbc_y3 = ri->ri_yorigin + dst + n - 1; 316 CG6_BLIT_WAIT(fbc); 317 CG6_DRAIN(fbc); 318 } 319 320 static void 321 cg6_ras_copycols(void *cookie, int row, int src, int dst, int n) 322 { 323 struct rasops_info *ri; 324 volatile struct cg6_fbc *fbc; 325 326 ri = cookie; 327 if (dst == src) 328 return; 329 if ((row < 0) || (row >= ri->ri_rows)) 330 return; 331 if (src < 0) { 332 n += src; 333 src = 0; 334 } 335 if (src+n > ri->ri_cols) 336 n = ri->ri_cols - src; 337 if (dst < 0) { 338 n += dst; 339 dst = 0; 340 } 341 if (dst+n > ri->ri_cols) 342 n = ri->ri_cols - dst; 343 if (n <= 0) 344 return; 345 n *= ri->ri_font->fontwidth; 346 src *= ri->ri_font->fontwidth; 347 dst *= ri->ri_font->fontwidth; 348 row *= ri->ri_font->fontheight; 349 fbc = ((struct cgsix_softc *)ri->ri_hw)->sc_fbc; 350 fbc->fbc_clip = 0; 351 fbc->fbc_s = 0; 352 fbc->fbc_offx = 0; 353 fbc->fbc_offy = 0; 354 fbc->fbc_clipminx = 0; 355 fbc->fbc_clipminy = 0; 356 fbc->fbc_clipmaxx = ri->ri_width - 1; 357 fbc->fbc_clipmaxy = ri->ri_height - 1; 358 fbc->fbc_alu = CG6_ALU_COPY; 359 fbc->fbc_x0 = ri->ri_xorigin + src; 360 fbc->fbc_y0 = ri->ri_yorigin + row; 361 fbc->fbc_x1 = ri->ri_xorigin + src + n - 1; 362 fbc->fbc_y1 = ri->ri_yorigin + row + ri->ri_font->fontheight - 1; 363 fbc->fbc_x2 = ri->ri_xorigin + dst; 364 fbc->fbc_y2 = ri->ri_yorigin + row; 365 fbc->fbc_x3 = ri->ri_xorigin + dst + n - 1; 366 fbc->fbc_y3 = ri->ri_yorigin + row + ri->ri_font->fontheight - 1; 367 CG6_BLIT_WAIT(fbc); 368 CG6_DRAIN(fbc); 369 } 370 371 static void 372 cg6_ras_erasecols(void *cookie, int row, int col, int n, long int attr) 373 { 374 struct rasops_info *ri; 375 volatile struct cg6_fbc *fbc; 376 377 ri = cookie; 378 if ((row < 0) || (row >= ri->ri_rows)) 379 return; 380 if (col < 0) { 381 n += col; 382 col = 0; 383 } 384 if (col+n > ri->ri_cols) 385 n = ri->ri_cols - col; 386 if (n <= 0) 387 return; 388 n *= ri->ri_font->fontwidth; 389 col *= ri->ri_font->fontwidth; 390 row *= ri->ri_font->fontheight; 391 fbc = ((struct cgsix_softc *)ri->ri_hw)->sc_fbc; 392 fbc->fbc_clip = 0; 393 fbc->fbc_s = 0; 394 fbc->fbc_offx = 0; 395 fbc->fbc_offy = 0; 396 fbc->fbc_clipminx = 0; 397 fbc->fbc_clipminy = 0; 398 fbc->fbc_clipmaxx = ri->ri_width - 1; 399 fbc->fbc_clipmaxy = ri->ri_height - 1; 400 fbc->fbc_alu = CG6_ALU_FILL; 401 fbc->fbc_fg = ri->ri_devcmap[(attr >> 16) & 0xf]; 402 fbc->fbc_arecty = ri->ri_yorigin + row; 403 fbc->fbc_arectx = ri->ri_xorigin + col; 404 fbc->fbc_arecty = ri->ri_yorigin + row + ri->ri_font->fontheight - 1; 405 fbc->fbc_arectx = ri->ri_xorigin + col + n - 1; 406 CG6_DRAW_WAIT(fbc); 407 CG6_DRAIN(fbc); 408 } 409 410 static void 411 cg6_ras_eraserows(void *cookie, int row, int n, long int attr) 412 { 413 struct rasops_info *ri; 414 volatile struct cg6_fbc *fbc; 415 416 ri = cookie; 417 if (row < 0) { 418 n += row; 419 row = 0; 420 } 421 if (row+n > ri->ri_rows) 422 n = ri->ri_rows - row; 423 if (n <= 0) 424 return; 425 fbc = ((struct cgsix_softc *)ri->ri_hw)->sc_fbc; 426 fbc->fbc_clip = 0; 427 fbc->fbc_s = 0; 428 fbc->fbc_offx = 0; 429 fbc->fbc_offy = 0; 430 fbc->fbc_clipminx = 0; 431 fbc->fbc_clipminy = 0; 432 fbc->fbc_clipmaxx = ri->ri_width - 1; 433 fbc->fbc_clipmaxy = ri->ri_height - 1; 434 fbc->fbc_alu = CG6_ALU_FILL; 435 fbc->fbc_fg = ri->ri_devcmap[(attr >> 16) & 0xf]; 436 if ((n == ri->ri_rows) && (ri->ri_flg & RI_FULLCLEAR)) { 437 fbc->fbc_arecty = 0; 438 fbc->fbc_arectx = 0; 439 fbc->fbc_arecty = ri->ri_height - 1; 440 fbc->fbc_arectx = ri->ri_width - 1; 441 } else { 442 row *= ri->ri_font->fontheight; 443 fbc->fbc_arecty = ri->ri_yorigin + row; 444 fbc->fbc_arectx = ri->ri_xorigin; 445 fbc->fbc_arecty = ri->ri_yorigin + row + (n * ri->ri_font->fontheight) - 1; 446 fbc->fbc_arectx = ri->ri_xorigin + ri->ri_emuwidth - 1; 447 } 448 CG6_DRAW_WAIT(fbc); 449 CG6_DRAIN(fbc); 450 } 451 452 /* 453 * Really want something more like fg^bg here, but that would be more 454 * or less impossible to migrate to colors. So we hope there's 455 * something not too inappropriate in the colormap...besides, it's what 456 * the non-accelerated code did. :-) 457 */ 458 static void 459 cg6_ras_do_cursor(struct rasops_info *ri) 460 { 461 volatile struct cg6_fbc *fbc; 462 int row; 463 int col; 464 465 row = ri->ri_crow * ri->ri_font->fontheight; 466 col = ri->ri_ccol * ri->ri_font->fontwidth; 467 fbc = ((struct cgsix_softc *)ri->ri_hw)->sc_fbc; 468 fbc->fbc_clip = 0; 469 fbc->fbc_s = 0; 470 fbc->fbc_offx = 0; 471 fbc->fbc_offy = 0; 472 fbc->fbc_clipminx = 0; 473 fbc->fbc_clipminy = 0; 474 fbc->fbc_clipmaxx = ri->ri_width - 1; 475 fbc->fbc_clipmaxy = ri->ri_height - 1; 476 fbc->fbc_alu = CG6_ALU_FLIP; 477 fbc->fbc_arecty = ri->ri_yorigin + row; 478 fbc->fbc_arectx = ri->ri_xorigin + col; 479 fbc->fbc_arecty = ri->ri_yorigin + row + ri->ri_font->fontheight - 1; 480 fbc->fbc_arectx = ri->ri_xorigin + col + ri->ri_font->fontwidth - 1; 481 CG6_DRAW_WAIT(fbc); 482 CG6_DRAIN(fbc); 483 } 484 #endif /* RASTERCONSOLE */ 485 486 void 487 cg6attach(sc, name, isconsole) 488 struct cgsix_softc *sc; 489 char *name; 490 int isconsole; 491 { 492 struct fbdevice *fb = &sc->sc_fb; 493 494 fb->fb_driver = &cg6_fbdriver; 495 496 /* Don't have to map the pfour register on the cgsix. */ 497 fb->fb_pfour = NULL; 498 499 fb->fb_type.fb_cmsize = 256; 500 fb->fb_type.fb_size = fb->fb_type.fb_height * fb->fb_linebytes; 501 printf(": %s, %d x %d", name, 502 fb->fb_type.fb_width, fb->fb_type.fb_height); 503 504 sc->sc_fhcrev = (*sc->sc_fhc >> FHC_REV_SHIFT) & 505 (FHC_REV_MASK >> FHC_REV_SHIFT); 506 507 printf(", rev %d", sc->sc_fhcrev); 508 509 /* reset cursor & frame buffer controls */ 510 cg6_reset(sc); 511 512 /* enable video */ 513 sc->sc_thc->thc_misc |= THC_MISC_VIDEN; 514 515 if (isconsole) { 516 printf(" (console)"); 517 #ifdef RASTERCONSOLE 518 if (cgsix_use_rasterconsole) { 519 fbrcons_init(&sc->sc_fb); 520 sc->sc_fb.fb_rinfo.ri_hw = sc; 521 sc->sc_fb.fb_rinfo.ri_ops.copyrows = cg6_ras_copyrows; 522 sc->sc_fb.fb_rinfo.ri_ops.copycols = cg6_ras_copycols; 523 sc->sc_fb.fb_rinfo.ri_ops.erasecols = cg6_ras_erasecols; 524 sc->sc_fb.fb_rinfo.ri_ops.eraserows = cg6_ras_eraserows; 525 sc->sc_fb.fb_rinfo.ri_do_cursor = cg6_ras_do_cursor; 526 cg6_ras_init(sc); 527 } 528 #endif 529 } 530 531 printf("\n"); 532 fb_attach(&sc->sc_fb, isconsole); 533 } 534 535 536 int 537 cgsixopen(dev, flags, mode, p) 538 dev_t dev; 539 int flags, mode; 540 struct proc *p; 541 { 542 int unit = minor(dev); 543 544 if (unit >= cgsix_cd.cd_ndevs || cgsix_cd.cd_devs[unit] == NULL) 545 return (ENXIO); 546 return (0); 547 } 548 549 int 550 cgsixclose(dev, flags, mode, p) 551 dev_t dev; 552 int flags, mode; 553 struct proc *p; 554 { 555 struct cgsix_softc *sc = cgsix_cd.cd_devs[minor(dev)]; 556 557 cg6_reset(sc); 558 559 /* (re-)initialize the default color map */ 560 bt_initcmap(&sc->sc_cmap, 256); 561 cg6_loadcmap(sc, 0, 256); 562 563 return (0); 564 } 565 566 int 567 cgsixioctl(dev, cmd, data, flags, p) 568 dev_t dev; 569 u_long cmd; 570 caddr_t data; 571 int flags; 572 struct proc *p; 573 { 574 struct cgsix_softc *sc = cgsix_cd.cd_devs[minor(dev)]; 575 u_int count; 576 int v, error; 577 union cursor_cmap tcm; 578 579 switch (cmd) { 580 581 case FBIOGTYPE: 582 *(struct fbtype *)data = sc->sc_fb.fb_type; 583 break; 584 585 case FBIOGATTR: 586 #define fba ((struct fbgattr *)data) 587 fba->real_type = sc->sc_fb.fb_type.fb_type; 588 fba->owner = 0; /* XXX ??? */ 589 fba->fbtype = sc->sc_fb.fb_type; 590 fba->sattr.flags = 0; 591 fba->sattr.emu_type = sc->sc_fb.fb_type.fb_type; 592 fba->sattr.dev_specific[0] = -1; 593 fba->emu_types[0] = sc->sc_fb.fb_type.fb_type; 594 fba->emu_types[1] = -1; 595 #undef fba 596 break; 597 598 case FBIOGETCMAP: 599 #define p ((struct fbcmap *)data) 600 return (bt_getcmap(p, &sc->sc_cmap, 256, 1)); 601 602 case FBIOPUTCMAP: 603 /* copy to software map */ 604 error = bt_putcmap(p, &sc->sc_cmap, 256, 1); 605 if (error) 606 return (error); 607 /* now blast them into the chip */ 608 /* XXX should use retrace interrupt */ 609 cg6_loadcmap(sc, p->index, p->count); 610 #undef p 611 break; 612 613 case FBIOGVIDEO: 614 *(int *)data = sc->sc_blanked; 615 break; 616 617 case FBIOSVIDEO: 618 if (*(int *)data) 619 cg6_unblank(&sc->sc_dev); 620 else if (!sc->sc_blanked) { 621 sc->sc_blanked = 1; 622 sc->sc_thc->thc_misc &= ~THC_MISC_VIDEN; 623 } 624 break; 625 626 /* these are for both FBIOSCURSOR and FBIOGCURSOR */ 627 #define p ((struct fbcursor *)data) 628 #define cc (&sc->sc_cursor) 629 630 case FBIOGCURSOR: 631 /* do not quite want everything here... */ 632 p->set = FB_CUR_SETALL; /* close enough, anyway */ 633 p->enable = cc->cc_enable; 634 p->pos = cc->cc_pos; 635 p->hot = cc->cc_hot; 636 p->size = cc->cc_size; 637 638 /* begin ugh ... can we lose some of this crap?? */ 639 if (p->image != NULL) { 640 count = cc->cc_size.y * 32 / NBBY; 641 error = copyout((caddr_t)cc->cc_bits[1], 642 (caddr_t)p->image, count); 643 if (error) 644 return (error); 645 error = copyout((caddr_t)cc->cc_bits[0], 646 (caddr_t)p->mask, count); 647 if (error) 648 return (error); 649 } 650 if (p->cmap.red != NULL) { 651 error = bt_getcmap(&p->cmap, 652 (union bt_cmap *)&cc->cc_color, 2, 1); 653 if (error) 654 return (error); 655 } else { 656 p->cmap.index = 0; 657 p->cmap.count = 2; 658 } 659 /* end ugh */ 660 break; 661 662 case FBIOSCURSOR: 663 /* 664 * For setcmap and setshape, verify parameters, so that 665 * we do not get halfway through an update and then crap 666 * out with the software state screwed up. 667 */ 668 v = p->set; 669 if (v & FB_CUR_SETCMAP) { 670 /* 671 * This use of a temporary copy of the cursor 672 * colormap is not terribly efficient, but these 673 * copies are small (8 bytes)... 674 */ 675 tcm = cc->cc_color; 676 error = bt_putcmap(&p->cmap, (union bt_cmap *)&tcm, 2, 1); 677 if (error) 678 return (error); 679 } 680 if (v & FB_CUR_SETSHAPE) { 681 if ((u_int)p->size.x > 32 || (u_int)p->size.y > 32) 682 return (EINVAL); 683 count = p->size.y * 32 / NBBY; 684 if (!uvm_useracc(p->image, count, B_READ) || 685 !uvm_useracc(p->mask, count, B_READ)) 686 return (EFAULT); 687 } 688 689 /* parameters are OK; do it */ 690 if (v & (FB_CUR_SETCUR | FB_CUR_SETPOS | FB_CUR_SETHOT)) { 691 if (v & FB_CUR_SETCUR) 692 cc->cc_enable = p->enable; 693 if (v & FB_CUR_SETPOS) 694 cc->cc_pos = p->pos; 695 if (v & FB_CUR_SETHOT) 696 cc->cc_hot = p->hot; 697 cg6_setcursor(sc); 698 } 699 if (v & FB_CUR_SETCMAP) { 700 cc->cc_color = tcm; 701 cg6_loadomap(sc); /* XXX defer to vertical retrace */ 702 } 703 if (v & FB_CUR_SETSHAPE) { 704 cc->cc_size = p->size; 705 count = p->size.y * 32 / NBBY; 706 bzero((caddr_t)cc->cc_bits, sizeof cc->cc_bits); 707 copyin(p->mask, (caddr_t)cc->cc_bits[0], count); 708 copyin(p->image, (caddr_t)cc->cc_bits[1], count); 709 cg6_loadcursor(sc); 710 } 711 break; 712 713 #undef p 714 #undef cc 715 716 case FBIOGCURPOS: 717 *(struct fbcurpos *)data = sc->sc_cursor.cc_pos; 718 break; 719 720 case FBIOSCURPOS: 721 sc->sc_cursor.cc_pos = *(struct fbcurpos *)data; 722 cg6_setcursor(sc); 723 break; 724 725 case FBIOGCURMAX: 726 /* max cursor size is 32x32 */ 727 ((struct fbcurpos *)data)->x = 32; 728 ((struct fbcurpos *)data)->y = 32; 729 break; 730 731 default: 732 #ifdef DEBUG 733 log(LOG_NOTICE, "cgsixioctl(0x%lx) (%s[%d])\n", cmd, 734 p->p_comm, p->p_pid); 735 #endif 736 return (ENOTTY); 737 } 738 return (0); 739 } 740 741 /* 742 * Clean up hardware state (e.g., after bootup or after X crashes). 743 */ 744 static void 745 cg6_reset(sc) 746 struct cgsix_softc *sc; 747 { 748 volatile struct cg6_tec_xxx *tec; 749 int fhc; 750 volatile struct bt_regs *bt; 751 752 /* hide the cursor, just in case */ 753 sc->sc_thc->thc_cursxy = (THC_CURSOFF << 16) | THC_CURSOFF; 754 755 /* turn off frobs in transform engine (makes X11 work) */ 756 tec = sc->sc_tec; 757 tec->tec_mv = 0; 758 tec->tec_clip = 0; 759 tec->tec_vdc = 0; 760 761 /* take care of hardware bugs in old revisions */ 762 if (sc->sc_fhcrev < 5) { 763 /* 764 * Keep current resolution; set cpu to 68020, set test 765 * window (size 1Kx1K), and for rev 1, disable dest cache. 766 */ 767 fhc = (*sc->sc_fhc & FHC_RES_MASK) | FHC_CPU_68020 | 768 FHC_TEST | 769 (11 << FHC_TESTX_SHIFT) | (11 << FHC_TESTY_SHIFT); 770 if (sc->sc_fhcrev < 2) 771 fhc |= FHC_DST_DISABLE; 772 *sc->sc_fhc = fhc; 773 } 774 775 /* Enable cursor in Brooktree DAC. */ 776 bt = sc->sc_bt; 777 bt->bt_addr = 0x06 << 24; 778 bt->bt_ctrl |= 0x03 << 24; 779 } 780 781 static void 782 cg6_setcursor(sc) 783 struct cgsix_softc *sc; 784 { 785 786 /* we need to subtract the hot-spot value here */ 787 #define COORD(f) (sc->sc_cursor.cc_pos.f - sc->sc_cursor.cc_hot.f) 788 sc->sc_thc->thc_cursxy = sc->sc_cursor.cc_enable ? 789 ((COORD(x) << 16) | (COORD(y) & 0xffff)) : 790 (THC_CURSOFF << 16) | THC_CURSOFF; 791 #undef COORD 792 } 793 794 static void 795 cg6_loadcursor(sc) 796 struct cgsix_softc *sc; 797 { 798 volatile struct cg6_thc *thc; 799 u_int edgemask, m; 800 int i; 801 802 /* 803 * Keep the top size.x bits. Here we *throw out* the top 804 * size.x bits from an all-one-bits word, introducing zeros in 805 * the top size.x bits, then invert all the bits to get what 806 * we really wanted as our mask. But this fails if size.x is 807 * 32---a sparc uses only the low 5 bits of the shift count--- 808 * so we have to special case that. 809 */ 810 edgemask = ~0; 811 if (sc->sc_cursor.cc_size.x < 32) 812 edgemask = ~(edgemask >> sc->sc_cursor.cc_size.x); 813 thc = sc->sc_thc; 814 for (i = 0; i < 32; i++) { 815 m = sc->sc_cursor.cc_bits[0][i] & edgemask; 816 thc->thc_cursmask[i] = m; 817 thc->thc_cursbits[i] = m & sc->sc_cursor.cc_bits[1][i]; 818 } 819 } 820 821 /* 822 * Load a subset of the current (new) colormap into the color DAC. 823 */ 824 static void 825 cg6_loadcmap(sc, start, ncolors) 826 struct cgsix_softc *sc; 827 int start, ncolors; 828 { 829 volatile struct bt_regs *bt; 830 u_int *ip, i; 831 int count; 832 833 ip = &sc->sc_cmap.cm_chip[BT_D4M3(start)]; /* start/4 * 3 */ 834 count = BT_D4M3(start + ncolors - 1) - BT_D4M3(start) + 3; 835 bt = sc->sc_bt; 836 bt->bt_addr = BT_D4M4(start) << 24; 837 while (--count >= 0) { 838 i = *ip++; 839 /* hardware that makes one want to pound boards with hammers */ 840 bt->bt_cmap = i; 841 bt->bt_cmap = i << 8; 842 bt->bt_cmap = i << 16; 843 bt->bt_cmap = i << 24; 844 } 845 } 846 847 /* 848 * Load the cursor (overlay `foreground' and `background') colors. 849 */ 850 static void 851 cg6_loadomap(sc) 852 struct cgsix_softc *sc; 853 { 854 volatile struct bt_regs *bt; 855 u_int i; 856 857 bt = sc->sc_bt; 858 bt->bt_addr = 0x01 << 24; /* set background color */ 859 i = sc->sc_cursor.cc_color.cm_chip[0]; 860 bt->bt_omap = i; /* R */ 861 bt->bt_omap = i << 8; /* G */ 862 bt->bt_omap = i << 16; /* B */ 863 864 bt->bt_addr = 0x03 << 24; /* set foreground color */ 865 bt->bt_omap = i << 24; /* R */ 866 i = sc->sc_cursor.cc_color.cm_chip[1]; 867 bt->bt_omap = i; /* G */ 868 bt->bt_omap = i << 8; /* B */ 869 } 870 871 static void 872 cg6_unblank(dev) 873 struct device *dev; 874 { 875 struct cgsix_softc *sc = (struct cgsix_softc *)dev; 876 877 if (sc->sc_blanked) { 878 sc->sc_blanked = 0; 879 sc->sc_thc->thc_misc |= THC_MISC_VIDEN; 880 } 881 } 882 883 /* XXX the following should be moved to a "user interface" header */ 884 /* 885 * Base addresses at which users can mmap() the various pieces of a cg6. 886 * Note that although the Brooktree color registers do not occupy 8K, 887 * the X server dies if we do not allow it to map 8K there (it just maps 888 * from 0x70000000 forwards, as a contiguous chunk). 889 */ 890 #define CG6_USER_FBC 0x70000000 891 #define CG6_USER_TEC 0x70001000 892 #define CG6_USER_BTREGS 0x70002000 893 #define CG6_USER_FHC 0x70004000 894 #define CG6_USER_THC 0x70005000 895 #define CG6_USER_ROM 0x70006000 896 #define CG6_USER_RAM 0x70016000 897 #define CG6_USER_DHC 0x80000000 898 899 struct mmo { 900 u_long mo_uaddr; /* user (virtual) address */ 901 u_long mo_size; /* size, or 0 for video ram size */ 902 u_long mo_physoff; /* offset from sc_physadr */ 903 }; 904 905 /* 906 * Return the address that would map the given device at the given 907 * offset, allowing for the given protection, or return -1 for error. 908 * 909 * XXX needs testing against `demanding' applications (e.g., aviator) 910 */ 911 paddr_t 912 cgsixmmap(dev, off, prot) 913 dev_t dev; 914 off_t off; 915 int prot; 916 { 917 struct cgsix_softc *sc = cgsix_cd.cd_devs[minor(dev)]; 918 struct mmo *mo; 919 u_int u, sz; 920 static struct mmo mmo[] = { 921 { CG6_USER_RAM, 0, CGSIX_RAM_OFFSET }, 922 923 /* do not actually know how big most of these are! */ 924 { CG6_USER_FBC, 1, CGSIX_FBC_OFFSET }, 925 { CG6_USER_TEC, 1, CGSIX_TEC_OFFSET }, 926 { CG6_USER_BTREGS, 8192 /* XXX */, CGSIX_BT_OFFSET }, 927 { CG6_USER_FHC, 1, CGSIX_FHC_OFFSET }, 928 { CG6_USER_THC, sizeof(struct cg6_thc), CGSIX_THC_OFFSET }, 929 { CG6_USER_ROM, 65536, CGSIX_ROM_OFFSET }, 930 { CG6_USER_DHC, 1, CGSIX_DHC_OFFSET }, 931 }; 932 #define NMMO (sizeof mmo / sizeof *mmo) 933 934 if (off & PGOFSET) 935 panic("cgsixmmap"); 936 937 /* 938 * Entries with size 0 map video RAM (i.e., the size in fb data). 939 * 940 * Since we work in pages, the fact that the map offset table's 941 * sizes are sometimes bizarre (e.g., 1) is effectively ignored: 942 * one byte is as good as one page. 943 */ 944 for (mo = mmo; mo < &mmo[NMMO]; mo++) { 945 if ((u_long)off < mo->mo_uaddr) 946 continue; 947 u = off - mo->mo_uaddr; 948 sz = mo->mo_size ? mo->mo_size : sc->sc_fb.fb_type.fb_size; 949 if (u < sz) { 950 return (bus_space_mmap(sc->sc_bustag, 951 sc->sc_paddr, u+mo->mo_physoff, 952 prot, BUS_SPACE_MAP_LINEAR)); 953 } 954 } 955 956 #ifdef DEBUG 957 { 958 struct proc *p = curproc; /* XXX */ 959 log(LOG_NOTICE, "cgsixmmap(0x%llx) (%s[%d])\n", 960 (long long)off, p->p_comm, p->p_pid); 961 } 962 #endif 963 return (-1); /* not a user-map offset */ 964 } 965