xref: /netbsd-src/sys/dev/sdmmc/sdmmcvar.h (revision c2f76ff004a2cb67efe5b12d97bd3ef7fe89e18d)
1 /*	$NetBSD: sdmmcvar.h,v 1.8 2010/10/07 12:24:23 kiyohara Exp $	*/
2 /*	$OpenBSD: sdmmcvar.h,v 1.13 2009/01/09 10:55:22 jsg Exp $	*/
3 
4 /*
5  * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
6  *
7  * Permission to use, copy, modify, and distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 #ifndef	_SDMMCVAR_H_
21 #define	_SDMMCVAR_H_
22 
23 #include <sys/queue.h>
24 #include <sys/mutex.h>
25 #include <sys/callout.h>
26 
27 #include <machine/bus.h>
28 
29 #include <dev/sdmmc/sdmmcchip.h>
30 #include <dev/sdmmc/sdmmcreg.h>
31 
32 #define	SDMMC_SECTOR_SIZE_SB	9
33 #define	SDMMC_SECTOR_SIZE	(1 << SDMMC_SECTOR_SIZE_SB)	/* =512 */
34 
35 struct sdmmc_csd {
36 	int	csdver;		/* CSD structure format */
37 	u_int	mmcver;		/* MMC version (for CID format) */
38 	int	capacity;	/* total number of sectors */
39 	int	read_bl_len;	/* block length for reads */
40 	int	write_bl_len;	/* block length for writes */
41 	int	r2w_factor;
42 	int	tran_speed;	/* transfer speed (kbit/s) */
43 	int	ccc;		/* Card Command Class for SD */
44 	/* ... */
45 };
46 
47 struct sdmmc_cid {
48 	int	mid;		/* manufacturer identification number */
49 	int	oid;		/* OEM/product identification number */
50 	char	pnm[8];		/* product name (MMC v1 has the longest) */
51 	int	rev;		/* product revision */
52 	int	psn;		/* product serial number */
53 	int	mdt;		/* manufacturing date */
54 };
55 
56 struct sdmmc_scr {
57 	int	sd_spec;
58 	int	bus_width;
59 };
60 
61 typedef uint32_t sdmmc_response[4];
62 
63 struct sdmmc_softc;
64 
65 struct sdmmc_task {
66 	void (*func)(void *arg);
67 	void *arg;
68 	int onqueue;
69 	struct sdmmc_softc *sc;
70 	TAILQ_ENTRY(sdmmc_task) next;
71 };
72 
73 #define	sdmmc_init_task(xtask, xfunc, xarg)				\
74 do {									\
75 	(xtask)->func = (xfunc);					\
76 	(xtask)->arg = (xarg);						\
77 	(xtask)->onqueue = 0;						\
78 	(xtask)->sc = NULL;						\
79 } while (/*CONSTCOND*/0)
80 
81 #define sdmmc_task_pending(xtask) ((xtask)->onqueue)
82 
83 struct sdmmc_command {
84 	struct sdmmc_task c_task;	/* task queue entry */
85 	uint16_t	 c_opcode;	/* SD or MMC command index */
86 	uint32_t	 c_arg;		/* SD/MMC command argument */
87 	sdmmc_response	 c_resp;	/* response buffer */
88 	bus_dmamap_t	 c_dmamap;
89 	int		 c_dmaseg;	/* DMA segment number */
90 	int		 c_dmaoff;	/* offset in DMA segment */
91 	void		*c_data;	/* buffer to send or read into */
92 	int		 c_datalen;	/* length of data buffer */
93 	int		 c_blklen;	/* block length */
94 	int		 c_flags;	/* see below */
95 #define SCF_ITSDONE	(1U << 0)		/* command is complete */
96 #define SCF_RSP_PRESENT	(1U << 1)
97 #define SCF_RSP_BSY	(1U << 2)
98 #define SCF_RSP_136	(1U << 3)
99 #define SCF_RSP_CRC	(1U << 4)
100 #define SCF_RSP_IDX	(1U << 5)
101 #define SCF_CMD_READ	(1U << 6)	/* read command (data expected) */
102 /* non SPI */
103 #define SCF_CMD_AC	(0U << 8)
104 #define SCF_CMD_ADTC	(1U << 8)
105 #define SCF_CMD_BC	(2U << 8)
106 #define SCF_CMD_BCR	(3U << 8)
107 #define SCF_CMD_MASK	(3U << 8)
108 /* SPI */
109 #define SCF_RSP_SPI_S1	(1U << 10)
110 #define SCF_RSP_SPI_S2	(1U << 11)
111 #define SCF_RSP_SPI_B4	(1U << 12)
112 #define SCF_RSP_SPI_BSY	(1U << 13)
113 /* response types */
114 #define SCF_RSP_R0	0	/* none */
115 #define SCF_RSP_R1	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
116 #define SCF_RSP_R1B	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY)
117 #define SCF_RSP_R2	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_136)
118 #define SCF_RSP_R3	(SCF_RSP_PRESENT)
119 #define SCF_RSP_R4	(SCF_RSP_PRESENT)
120 #define SCF_RSP_R5	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
121 #define SCF_RSP_R5B	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY)
122 #define SCF_RSP_R6	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
123 #define SCF_RSP_R7	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
124 /* SPI */
125 #define SCF_RSP_SPI_R1	(SCF_RSP_SPI_S1)
126 #define SCF_RSP_SPI_R1B	(SCF_RSP_SPI_S1|SCF_RSP_SPI_BSY)
127 #define SCF_RSP_SPI_R2	(SCF_RSP_SPI_S1|SCF_RSP_SPI_S2)
128 #define SCF_RSP_SPI_R3	(SCF_RSP_SPI_S1|SCF_RSP_SPI_B4)
129 #define SCF_RSP_SPI_R4	(SCF_RSP_SPI_S1|SCF_RSP_SPI_B4)
130 #define SCF_RSP_SPI_R5	(SCF_RSP_SPI_S1|SCF_RSP_SPI_S2)
131 #define SCF_RSP_SPI_R7	(SCF_RSP_SPI_S1|SCF_RSP_SPI_B4)
132 	int		 c_error;	/* errno value on completion */
133 
134 	/* Host controller owned fields for data xfer in progress */
135 	int c_resid;			/* remaining I/O */
136 	u_char *c_buf;			/* remaining data */
137 };
138 
139 /*
140  * Decoded PC Card 16 based Card Information Structure (CIS),
141  * per card (function 0) and per function (1 and greater).
142  */
143 struct sdmmc_cis {
144 	uint16_t	 manufacturer;
145 #define SDMMC_VENDOR_INVALID	0xffff
146 	uint16_t	 product;
147 #define SDMMC_PRODUCT_INVALID	0xffff
148 	uint8_t		 function;
149 #define SDMMC_FUNCTION_INVALID	0xff
150 	u_char		 cis1_major;
151 	u_char		 cis1_minor;
152 	char		 cis1_info_buf[256];
153 	char		*cis1_info[4];
154 };
155 
156 /*
157  * Structure describing either an SD card I/O function or a SD/MMC
158  * memory card from a "stack of cards" that responded to CMD2.  For a
159  * combo card with one I/O function and one memory card, there will be
160  * two of these structures allocated.  Each card slot has such a list
161  * of sdmmc_function structures.
162  */
163 struct sdmmc_function {
164 	/* common members */
165 	struct sdmmc_softc *sc;		/* card slot softc */
166 	uint16_t rca;			/* relative card address */
167 	int interface;			/* SD/MMC:0, SDIO:standard interface */
168 	int width;			/* bus width */
169 	int flags;
170 #define SFF_ERROR		0x0001	/* function is poo; ignore it */
171 #define SFF_SDHC		0x0002	/* SD High Capacity card */
172 	SIMPLEQ_ENTRY(sdmmc_function) sf_list;
173 	/* SD card I/O function members */
174 	int number;			/* I/O function number or -1 */
175 	device_t child;			/* function driver */
176 	struct sdmmc_cis cis;		/* decoded CIS */
177 	/* SD/MMC memory card members */
178 	struct sdmmc_csd csd;		/* decoded CSD value */
179 	struct sdmmc_cid cid;		/* decoded CID value */
180 	sdmmc_response raw_cid;		/* temp. storage for decoding */
181 	uint32_t raw_scr[2];
182 	struct sdmmc_scr scr;		/* decoded CSR value */
183 
184 	void *bbuf;			/* bounce buffer */
185 	bus_dmamap_t bbuf_dmap;		/* DMA map for bounce buffer */
186 };
187 
188 /*
189  * Structure describing a single SD/MMC/SDIO card slot.
190  */
191 struct sdmmc_softc {
192 	device_t sc_dev;		/* base device */
193 #define SDMMCDEVNAME(sc)	(device_xname(sc->sc_dev))
194 
195 	sdmmc_chipset_tag_t sc_sct;	/* host controller chipset tag */
196 	sdmmc_spi_chipset_tag_t sc_spi_sct;
197 	sdmmc_chipset_handle_t sc_sch;	/* host controller chipset handle */
198 	bus_dma_tag_t sc_dmat;
199 	bus_dmamap_t sc_dmap;
200 #define	SDMMC_MAXNSEGS		17	/* (MAXPHYS / PAGE_SIZE) + 1 */
201 
202 	struct kmutex sc_mtx;		/* lock around host controller */
203 	int sc_dying;			/* bus driver is shutting down */
204 
205 	uint32_t sc_flags;
206 #define SMF_INITED		0x0001
207 #define SMF_SD_MODE		0x0002	/* host in SD mode (MMC otherwise) */
208 #define SMF_IO_MODE		0x0004	/* host in I/O mode (SD mode only) */
209 #define SMF_MEM_MODE		0x0008	/* host in memory mode (SD or MMC) */
210 #define SMF_CARD_PRESENT	0x4000	/* card presence noticed */
211 #define SMF_CARD_ATTACHED	0x8000	/* card driver(s) attached */
212 
213 	uint32_t sc_caps;		/* host capability */
214 #define SMC_CAPS_AUTO_STOP	0x0001	/* send CMD12 automagically by host */
215 #define SMC_CAPS_4BIT_MODE	0x0002	/* 4-bits data bus width */
216 #define SMC_CAPS_DMA		0x0004	/* DMA transfer */
217 #define SMC_CAPS_SPI_MODE	0x0008	/* SPI mode */
218 #define SMC_CAPS_POLL_CARD_DET	0x0010	/* Polling card detect */
219 #define SMC_CAPS_SINGLE_ONLY	0x0020	/* only single read/write */
220 #define SMC_CAPS_8BIT_MODE	0x0040	/* 8-bits data bus width */
221 #define SMC_CAPS_MULTI_SEG_DMA	0x0080	/* multiple segment DMA transfer */
222 
223 	/* function */
224 	int sc_function_count;		/* number of I/O functions (SDIO) */
225 	struct sdmmc_function *sc_card;	/* selected card */
226 	struct sdmmc_function *sc_fn0;	/* function 0, the card itself */
227 	SIMPLEQ_HEAD(, sdmmc_function) sf_head; /* list of card functions */
228 
229 	/* task queue */
230 	struct lwp *sc_tskq_lwp;	/* asynchronous tasks */
231 	TAILQ_HEAD(, sdmmc_task) sc_tskq;   /* task thread work queue */
232 	struct kmutex sc_tskq_mtx;
233 	struct kcondvar sc_tskq_cv;
234 
235 	/* discover task */
236 	struct sdmmc_task sc_discover_task; /* card attach/detach task */
237 	struct kmutex sc_discover_task_mtx;
238 
239 	/* interrupt task */
240 	struct sdmmc_task sc_intr_task;	/* card interrupt task */
241 	struct kmutex sc_intr_task_mtx;
242 	TAILQ_HEAD(, sdmmc_intr_handler) sc_intrq; /* interrupt handlers */
243 
244 	u_int sc_clkmin;		/* host min bus clock */
245 	u_int sc_clkmax;		/* host max bus clock */
246 	u_int sc_busclk;		/* host bus clock */
247 	int sc_buswidth;		/* host bus width */
248 
249 	callout_t sc_card_detect_ch;	/* polling card insert/remove */
250 };
251 
252 /*
253  * Attach devices at the sdmmc bus.
254  */
255 struct sdmmc_attach_args {
256 	uint16_t manufacturer;
257 	uint16_t product;
258 	int interface;
259 	struct sdmmc_function *sf;
260 };
261 
262 struct sdmmc_product {
263 	uint16_t	pp_vendor;
264 	uint16_t	pp_product;
265 	const char	*pp_cisinfo[4];
266 };
267 
268 #ifndef	IPL_SDMMC
269 #define IPL_SDMMC	IPL_BIO
270 #endif
271 
272 #ifndef	splsdmmc
273 #define splsdmmc()	splbio()
274 #endif
275 
276 #define	SDMMC_LOCK(sc)
277 #define	SDMMC_UNLOCK(sc)
278 
279 #ifdef SDMMC_DEBUG
280 extern int sdmmcdebug;
281 #endif
282 
283 void	sdmmc_add_task(struct sdmmc_softc *, struct sdmmc_task *);
284 void	sdmmc_del_task(struct sdmmc_task *);
285 
286 struct	sdmmc_function *sdmmc_function_alloc(struct sdmmc_softc *);
287 void	sdmmc_function_free(struct sdmmc_function *);
288 int	sdmmc_set_bus_power(struct sdmmc_softc *, uint32_t, uint32_t);
289 int	sdmmc_mmc_command(struct sdmmc_softc *, struct sdmmc_command *);
290 int	sdmmc_app_command(struct sdmmc_softc *, struct sdmmc_function *,
291 	    struct sdmmc_command *);
292 void	sdmmc_go_idle_state(struct sdmmc_softc *);
293 int	sdmmc_select_card(struct sdmmc_softc *, struct sdmmc_function *);
294 int	sdmmc_set_relative_addr(struct sdmmc_softc *, struct sdmmc_function *);
295 
296 void	sdmmc_intr_enable(struct sdmmc_function *);
297 void	sdmmc_intr_disable(struct sdmmc_function *);
298 void	*sdmmc_intr_establish(device_t, int (*)(void *), void *, const char *);
299 void	sdmmc_intr_disestablish(void *);
300 void	sdmmc_intr_task(void *);
301 
302 int	sdmmc_decode_csd(struct sdmmc_softc *, sdmmc_response,
303 	    struct sdmmc_function *);
304 int	sdmmc_decode_cid(struct sdmmc_softc *, sdmmc_response,
305 	    struct sdmmc_function *);
306 void	sdmmc_print_cid(struct sdmmc_cid *);
307 #ifdef SDMMC_DUMP_CSD
308 void	sdmmc_print_csd(sdmmc_response, struct sdmmc_csd *);
309 #endif
310 void	sdmmc_dump_data(const char *, void *, size_t);
311 
312 int	sdmmc_io_enable(struct sdmmc_softc *);
313 void	sdmmc_io_scan(struct sdmmc_softc *);
314 int	sdmmc_io_init(struct sdmmc_softc *, struct sdmmc_function *);
315 uint8_t sdmmc_io_read_1(struct sdmmc_function *, int);
316 uint16_t sdmmc_io_read_2(struct sdmmc_function *, int);
317 uint32_t sdmmc_io_read_4(struct sdmmc_function *, int);
318 int	sdmmc_io_read_multi_1(struct sdmmc_function *, int, u_char *, int);
319 void	sdmmc_io_write_1(struct sdmmc_function *, int, uint8_t);
320 void	sdmmc_io_write_2(struct sdmmc_function *, int, uint16_t);
321 void	sdmmc_io_write_4(struct sdmmc_function *, int, uint32_t);
322 int	sdmmc_io_write_multi_1(struct sdmmc_function *, int, u_char *, int);
323 int	sdmmc_io_function_enable(struct sdmmc_function *);
324 void	sdmmc_io_function_disable(struct sdmmc_function *);
325 
326 int	sdmmc_read_cis(struct sdmmc_function *, struct sdmmc_cis *);
327 void	sdmmc_print_cis(struct sdmmc_function *);
328 void	sdmmc_check_cis_quirks(struct sdmmc_function *);
329 
330 int	sdmmc_mem_enable(struct sdmmc_softc *);
331 void	sdmmc_mem_scan(struct sdmmc_softc *);
332 int	sdmmc_mem_init(struct sdmmc_softc *, struct sdmmc_function *);
333 int	sdmmc_mem_send_op_cond(struct sdmmc_softc *, uint32_t, uint32_t *);
334 int	sdmmc_mem_send_if_cond(struct sdmmc_softc *, uint32_t, uint32_t *);
335 int	sdmmc_mem_set_blocklen(struct sdmmc_softc *, struct sdmmc_function *);
336 int	sdmmc_mem_read_block(struct sdmmc_function *, uint32_t, u_char *,
337 	    size_t);
338 int	sdmmc_mem_write_block(struct sdmmc_function *, uint32_t, u_char *,
339 	    size_t);
340 
341 #endif	/* _SDMMCVAR_H_ */
342