1 /* $NetBSD: sdmmcvar.h,v 1.3 2010/04/06 15:10:09 nonaka Exp $ */ 2 /* $OpenBSD: sdmmcvar.h,v 1.13 2009/01/09 10:55:22 jsg Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #ifndef _SDMMCVAR_H_ 21 #define _SDMMCVAR_H_ 22 23 #include <sys/queue.h> 24 #include <sys/mutex.h> 25 #include <sys/callout.h> 26 27 #include <machine/bus.h> 28 29 #include <dev/sdmmc/sdmmcchip.h> 30 #include <dev/sdmmc/sdmmcreg.h> 31 32 #define SDMMC_SECTOR_SIZE_SB 9 33 #define SDMMC_SECTOR_SIZE (1 << SDMMC_SECTOR_SIZE_SB) /* =512 */ 34 35 struct sdmmc_csd { 36 int csdver; /* CSD structure format */ 37 u_int mmcver; /* MMC version (for CID format) */ 38 int capacity; /* total number of sectors */ 39 int read_bl_len; /* block length for reads */ 40 int write_bl_len; /* block length for writes */ 41 int r2w_factor; 42 int tran_speed; /* transfer speed (kbit/s) */ 43 /* ... */ 44 }; 45 46 struct sdmmc_cid { 47 int mid; /* manufacturer identification number */ 48 int oid; /* OEM/product identification number */ 49 char pnm[8]; /* product name (MMC v1 has the longest) */ 50 int rev; /* product revision */ 51 int psn; /* product serial number */ 52 int mdt; /* manufacturing date */ 53 }; 54 55 struct sdmmc_scr { 56 int sd_spec; 57 int bus_width; 58 }; 59 60 typedef uint32_t sdmmc_response[4]; 61 62 struct sdmmc_softc; 63 64 struct sdmmc_task { 65 void (*func)(void *arg); 66 void *arg; 67 int onqueue; 68 struct sdmmc_softc *sc; 69 TAILQ_ENTRY(sdmmc_task) next; 70 }; 71 72 #define sdmmc_init_task(xtask, xfunc, xarg) \ 73 do { \ 74 (xtask)->func = (xfunc); \ 75 (xtask)->arg = (xarg); \ 76 (xtask)->onqueue = 0; \ 77 (xtask)->sc = NULL; \ 78 } while (/*CONSTCOND*/0) 79 80 #define sdmmc_task_pending(xtask) ((xtask)->onqueue) 81 82 struct sdmmc_command { 83 struct sdmmc_task c_task; /* task queue entry */ 84 uint16_t c_opcode; /* SD or MMC command index */ 85 uint32_t c_arg; /* SD/MMC command argument */ 86 sdmmc_response c_resp; /* response buffer */ 87 bus_dmamap_t c_dmamap; 88 void *c_data; /* buffer to send or read into */ 89 int c_datalen; /* length of data buffer */ 90 int c_blklen; /* block length */ 91 int c_flags; /* see below */ 92 #define SCF_ITSDONE (1U << 0) /* command is complete */ 93 #define SCF_RSP_PRESENT (1U << 1) 94 #define SCF_RSP_BSY (1U << 2) 95 #define SCF_RSP_136 (1U << 3) 96 #define SCF_RSP_CRC (1U << 4) 97 #define SCF_RSP_IDX (1U << 5) 98 #define SCF_CMD_READ (1U << 6) /* read command (data expected) */ 99 /* non SPI */ 100 #define SCF_CMD_AC (0U << 8) 101 #define SCF_CMD_ADTC (1U << 8) 102 #define SCF_CMD_BC (2U << 8) 103 #define SCF_CMD_BCR (3U << 8) 104 #define SCF_CMD_MASK (3U << 8) 105 /* SPI */ 106 #define SCF_RSP_SPI_S1 (1U << 10) 107 #define SCF_RSP_SPI_S2 (1U << 11) 108 #define SCF_RSP_SPI_B4 (1U << 12) 109 #define SCF_RSP_SPI_BSY (1U << 13) 110 /* response types */ 111 #define SCF_RSP_R0 0 /* none */ 112 #define SCF_RSP_R1 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 113 #define SCF_RSP_R1B (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY) 114 #define SCF_RSP_R2 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_136) 115 #define SCF_RSP_R3 (SCF_RSP_PRESENT) 116 #define SCF_RSP_R4 (SCF_RSP_PRESENT) 117 #define SCF_RSP_R5 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 118 #define SCF_RSP_R5B (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY) 119 #define SCF_RSP_R6 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 120 #define SCF_RSP_R7 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 121 /* SPI */ 122 #define SCF_RSP_SPI_R1 (SCF_RSP_SPI_S1) 123 #define SCF_RSP_SPI_R1B (SCF_RSP_SPI_S1|SCF_RSP_SPI_BSY) 124 #define SCF_RSP_SPI_R2 (SCF_RSP_SPI_S1|SCF_RSP_SPI_S2) 125 #define SCF_RSP_SPI_R3 (SCF_RSP_SPI_S1|SCF_RSP_SPI_B4) 126 #define SCF_RSP_SPI_R4 (SCF_RSP_SPI_S1|SCF_RSP_SPI_B4) 127 #define SCF_RSP_SPI_R5 (SCF_RSP_SPI_S1|SCF_RSP_SPI_S2) 128 #define SCF_RSP_SPI_R7 (SCF_RSP_SPI_S1|SCF_RSP_SPI_B4) 129 int c_error; /* errno value on completion */ 130 131 /* Host controller owned fields for data xfer in progress */ 132 int c_resid; /* remaining I/O */ 133 u_char *c_buf; /* remaining data */ 134 }; 135 136 /* 137 * Decoded PC Card 16 based Card Information Structure (CIS), 138 * per card (function 0) and per function (1 and greater). 139 */ 140 struct sdmmc_cis { 141 uint16_t manufacturer; 142 #define SDMMC_VENDOR_INVALID 0xffff 143 uint16_t product; 144 #define SDMMC_PRODUCT_INVALID 0xffff 145 uint8_t function; 146 #define SDMMC_FUNCTION_INVALID 0xff 147 u_char cis1_major; 148 u_char cis1_minor; 149 char cis1_info_buf[256]; 150 char *cis1_info[4]; 151 }; 152 153 /* 154 * Structure describing either an SD card I/O function or a SD/MMC 155 * memory card from a "stack of cards" that responded to CMD2. For a 156 * combo card with one I/O function and one memory card, there will be 157 * two of these structures allocated. Each card slot has such a list 158 * of sdmmc_function structures. 159 */ 160 struct sdmmc_function { 161 /* common members */ 162 struct sdmmc_softc *sc; /* card slot softc */ 163 uint16_t rca; /* relative card address */ 164 int flags; 165 #define SFF_ERROR 0x0001 /* function is poo; ignore it */ 166 #define SFF_SDHC 0x0002 /* SD High Capacity card */ 167 SIMPLEQ_ENTRY(sdmmc_function) sf_list; 168 /* SD card I/O function members */ 169 int number; /* I/O function number or -1 */ 170 device_t child; /* function driver */ 171 struct sdmmc_cis cis; /* decoded CIS */ 172 /* SD/MMC memory card members */ 173 struct sdmmc_csd csd; /* decoded CSD value */ 174 struct sdmmc_cid cid; /* decoded CID value */ 175 sdmmc_response raw_cid; /* temp. storage for decoding */ 176 uint32_t raw_scr[2]; 177 struct sdmmc_scr scr; /* decoded CSR value */ 178 }; 179 180 /* 181 * Structure describing a single SD/MMC/SDIO card slot. 182 */ 183 struct sdmmc_softc { 184 device_t sc_dev; /* base device */ 185 #define SDMMCDEVNAME(sc) (device_xname(sc->sc_dev)) 186 187 sdmmc_chipset_tag_t sc_sct; /* host controller chipset tag */ 188 sdmmc_spi_chipset_tag_t sc_spi_sct; 189 sdmmc_chipset_handle_t sc_sch; /* host controller chipset handle */ 190 bus_dma_tag_t sc_dmat; 191 bus_dmamap_t sc_dmap; 192 #define SDMMC_MAXNSEGS 17 /* (MAXPHYS / PAGE_SIZE) + 1 */ 193 194 struct kmutex sc_mtx; /* lock around host controller */ 195 int sc_dying; /* bus driver is shutting down */ 196 197 uint32_t sc_flags; 198 #define SMF_INITED 0x0001 199 #define SMF_SD_MODE 0x0002 /* host in SD mode (MMC otherwise) */ 200 #define SMF_IO_MODE 0x0004 /* host in I/O mode (SD mode only) */ 201 #define SMF_MEM_MODE 0x0008 /* host in memory mode (SD or MMC) */ 202 #define SMF_CARD_PRESENT 0x4000 /* card presence noticed */ 203 #define SMF_CARD_ATTACHED 0x8000 /* card driver(s) attached */ 204 205 uint32_t sc_caps; /* host capability */ 206 #define SMC_CAPS_AUTO_STOP 0x0001 /* send CMD12 automagically by host */ 207 #define SMC_CAPS_4BIT_MODE 0x0002 /* 4-bits data bus width */ 208 #define SMC_CAPS_DMA 0x0004 /* DMA transfer */ 209 #define SMC_CAPS_SPI_MODE 0x0008 /* SPI mode */ 210 #define SMC_CAPS_POLL_CARD_DET 0x0010 /* Polling card detect */ 211 #define SMC_CAPS_SINGLE_ONLY 0x0020 /* only single read/write */ 212 213 /* function */ 214 int sc_function_count; /* number of I/O functions (SDIO) */ 215 struct sdmmc_function *sc_card; /* selected card */ 216 struct sdmmc_function *sc_fn0; /* function 0, the card itself */ 217 SIMPLEQ_HEAD(, sdmmc_function) sf_head; /* list of card functions */ 218 219 /* task queue */ 220 struct lwp *sc_tskq_lwp; /* asynchronous tasks */ 221 TAILQ_HEAD(, sdmmc_task) sc_tskq; /* task thread work queue */ 222 struct kmutex sc_tskq_mtx; 223 struct kcondvar sc_tskq_cv; 224 225 /* discover task */ 226 struct sdmmc_task sc_discover_task; /* card attach/detach task */ 227 struct kmutex sc_discover_task_mtx; 228 229 /* interrupt task */ 230 struct sdmmc_task sc_intr_task; /* card interrupt task */ 231 struct kmutex sc_intr_task_mtx; 232 TAILQ_HEAD(, sdmmc_intr_handler) sc_intrq; /* interrupt handlers */ 233 234 u_int sc_clkmin; /* host min bus clock */ 235 u_int sc_clkmax; /* host max bus clock */ 236 u_int sc_busclk; /* host bus clock */ 237 int sc_buswidth; /* host bus width */ 238 239 callout_t sc_card_detect_ch; /* polling card insert/remove */ 240 }; 241 242 /* 243 * Attach devices at the sdmmc bus. 244 */ 245 struct sdmmc_attach_args { 246 uint16_t manufacturer; 247 uint16_t product; 248 struct sdmmc_function *sf; 249 }; 250 251 struct sdmmc_product { 252 uint16_t pp_vendor; 253 uint16_t pp_product; 254 const char *pp_cisinfo[4]; 255 }; 256 257 #ifndef IPL_SDMMC 258 #define IPL_SDMMC IPL_BIO 259 #endif 260 261 #ifndef splsdmmc 262 #define splsdmmc() splbio() 263 #endif 264 265 #define SDMMC_LOCK(sc) 266 #define SDMMC_UNLOCK(sc) 267 268 #ifdef SDMMC_DEBUG 269 extern int sdmmcdebug; 270 #endif 271 272 void sdmmc_add_task(struct sdmmc_softc *, struct sdmmc_task *); 273 void sdmmc_del_task(struct sdmmc_task *); 274 275 struct sdmmc_function *sdmmc_function_alloc(struct sdmmc_softc *); 276 void sdmmc_function_free(struct sdmmc_function *); 277 int sdmmc_set_bus_power(struct sdmmc_softc *, uint32_t, uint32_t); 278 int sdmmc_mmc_command(struct sdmmc_softc *, struct sdmmc_command *); 279 int sdmmc_app_command(struct sdmmc_softc *, struct sdmmc_function *, 280 struct sdmmc_command *); 281 void sdmmc_go_idle_state(struct sdmmc_softc *); 282 int sdmmc_select_card(struct sdmmc_softc *, struct sdmmc_function *); 283 int sdmmc_set_relative_addr(struct sdmmc_softc *, struct sdmmc_function *); 284 285 void sdmmc_intr_enable(struct sdmmc_function *); 286 void sdmmc_intr_disable(struct sdmmc_function *); 287 void *sdmmc_intr_establish(device_t, int (*)(void *), void *, const char *); 288 void sdmmc_intr_disestablish(void *); 289 void sdmmc_intr_task(void *); 290 291 int sdmmc_decode_csd(struct sdmmc_softc *, sdmmc_response, 292 struct sdmmc_function *); 293 int sdmmc_decode_cid(struct sdmmc_softc *, sdmmc_response, 294 struct sdmmc_function *); 295 void sdmmc_print_cid(struct sdmmc_cid *); 296 #ifdef SDMMC_DUMP_CSD 297 void sdmmc_print_csd(sdmmc_response, struct sdmmc_csd *); 298 #endif 299 void sdmmc_dump_data(const char *, void *, size_t); 300 301 int sdmmc_io_enable(struct sdmmc_softc *); 302 void sdmmc_io_scan(struct sdmmc_softc *); 303 int sdmmc_io_init(struct sdmmc_softc *, struct sdmmc_function *); 304 uint8_t sdmmc_io_read_1(struct sdmmc_function *, int); 305 uint16_t sdmmc_io_read_2(struct sdmmc_function *, int); 306 uint32_t sdmmc_io_read_4(struct sdmmc_function *, int); 307 int sdmmc_io_read_multi_1(struct sdmmc_function *, int, u_char *, int); 308 void sdmmc_io_write_1(struct sdmmc_function *, int, uint8_t); 309 void sdmmc_io_write_2(struct sdmmc_function *, int, uint16_t); 310 void sdmmc_io_write_4(struct sdmmc_function *, int, uint32_t); 311 int sdmmc_io_write_multi_1(struct sdmmc_function *, int, u_char *, int); 312 int sdmmc_io_function_enable(struct sdmmc_function *); 313 void sdmmc_io_function_disable(struct sdmmc_function *); 314 315 int sdmmc_read_cis(struct sdmmc_function *, struct sdmmc_cis *); 316 void sdmmc_print_cis(struct sdmmc_function *); 317 void sdmmc_check_cis_quirks(struct sdmmc_function *); 318 319 int sdmmc_mem_enable(struct sdmmc_softc *); 320 void sdmmc_mem_scan(struct sdmmc_softc *); 321 int sdmmc_mem_init(struct sdmmc_softc *, struct sdmmc_function *); 322 int sdmmc_mem_send_op_cond(struct sdmmc_softc *, uint32_t, uint32_t *); 323 int sdmmc_mem_send_if_cond(struct sdmmc_softc *, uint32_t, uint32_t *); 324 int sdmmc_mem_set_blocklen(struct sdmmc_softc *, struct sdmmc_function *); 325 int sdmmc_mem_send_extcsd(struct sdmmc_softc *sc); 326 int sdmmc_mem_read_block(struct sdmmc_function *, uint32_t, u_char *, 327 size_t); 328 int sdmmc_mem_write_block(struct sdmmc_function *, uint32_t, u_char *, 329 size_t); 330 331 #endif /* _SDMMCVAR_H_ */ 332