xref: /netbsd-src/sys/dev/sdmmc/sdmmcvar.h (revision abb0f93cd77b67f080613360c65701f85e5f5cfe)
1 /*	$NetBSD: sdmmcvar.h,v 1.2 2009/11/28 10:00:24 nonaka Exp $	*/
2 /*	$OpenBSD: sdmmcvar.h,v 1.13 2009/01/09 10:55:22 jsg Exp $	*/
3 
4 /*
5  * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
6  *
7  * Permission to use, copy, modify, and distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 #ifndef	_SDMMCVAR_H_
21 #define	_SDMMCVAR_H_
22 
23 #include <sys/queue.h>
24 #include <sys/mutex.h>
25 
26 #include <machine/bus.h>
27 
28 #include <dev/sdmmc/sdmmcchip.h>
29 #include <dev/sdmmc/sdmmcreg.h>
30 
31 #define	SDMMC_SECTOR_SIZE_SB	9
32 #define	SDMMC_SECTOR_SIZE	(1 << SDMMC_SECTOR_SIZE_SB)	/* =512 */
33 
34 struct sdmmc_csd {
35 	int	csdver;		/* CSD structure format */
36 	u_int	mmcver;		/* MMC version (for CID format) */
37 	int	capacity;	/* total number of sectors */
38 	int	read_bl_len;	/* block length for reads */
39 	int	write_bl_len;	/* block length for writes */
40 	int	r2w_factor;
41 	int	tran_speed;	/* transfer speed (kbit/s) */
42 	/* ... */
43 };
44 
45 struct sdmmc_cid {
46 	int	mid;		/* manufacturer identification number */
47 	int	oid;		/* OEM/product identification number */
48 	char	pnm[8];		/* product name (MMC v1 has the longest) */
49 	int	rev;		/* product revision */
50 	int	psn;		/* product serial number */
51 	int	mdt;		/* manufacturing date */
52 };
53 
54 typedef uint32_t sdmmc_response[4];
55 
56 struct sdmmc_softc;
57 
58 struct sdmmc_task {
59 	void (*func)(void *arg);
60 	void *arg;
61 	int onqueue;
62 	struct sdmmc_softc *sc;
63 	TAILQ_ENTRY(sdmmc_task) next;
64 };
65 
66 #define	sdmmc_init_task(xtask, xfunc, xarg)				\
67 do {									\
68 	(xtask)->func = (xfunc);					\
69 	(xtask)->arg = (xarg);						\
70 	(xtask)->onqueue = 0;						\
71 	(xtask)->sc = NULL;						\
72 } while (/*CONSTCOND*/0)
73 
74 #define sdmmc_task_pending(xtask) ((xtask)->onqueue)
75 
76 struct sdmmc_command {
77 	struct sdmmc_task c_task;	/* task queue entry */
78 	uint16_t	 c_opcode;	/* SD or MMC command index */
79 	uint32_t	 c_arg;		/* SD/MMC command argument */
80 	sdmmc_response	 c_resp;	/* response buffer */
81 	bus_dmamap_t	 c_dmamap;
82 	void		*c_data;	/* buffer to send or read into */
83 	int		 c_datalen;	/* length of data buffer */
84 	int		 c_blklen;	/* block length */
85 	int		 c_flags;	/* see below */
86 #define SCF_ITSDONE	0x0001		/* command is complete */
87 #define SCF_CMD_AC	0x0000
88 #define SCF_CMD_ADTC	0x0010
89 #define SCF_CMD_BC	0x0020
90 #define SCF_CMD_BCR	0x0030
91 #define SCF_CMD_READ	0x0040		/* read command (data expected) */
92 #define SCF_RSP_BSY	0x0100
93 #define SCF_RSP_136	0x0200
94 #define SCF_RSP_CRC	0x0400
95 #define SCF_RSP_IDX	0x0800
96 #define SCF_RSP_PRESENT	0x1000
97 /* response types */
98 #define SCF_RSP_R0	0	/* none */
99 #define SCF_RSP_R1	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
100 #define SCF_RSP_R1B	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY)
101 #define SCF_RSP_R2	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_136)
102 #define SCF_RSP_R3	(SCF_RSP_PRESENT)
103 #define SCF_RSP_R4	(SCF_RSP_PRESENT)
104 #define SCF_RSP_R5	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
105 #define SCF_RSP_R5B	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY)
106 #define SCF_RSP_R6	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
107 #define SCF_RSP_R7	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
108 	int		 c_error;	/* errno value on completion */
109 
110 	/* Host controller owned fields for data xfer in progress */
111 	int c_resid;			/* remaining I/O */
112 	u_char *c_buf;			/* remaining data */
113 };
114 
115 /*
116  * Decoded PC Card 16 based Card Information Structure (CIS),
117  * per card (function 0) and per function (1 and greater).
118  */
119 struct sdmmc_cis {
120 	uint16_t	 manufacturer;
121 #define SDMMC_VENDOR_INVALID	0xffff
122 	uint16_t	 product;
123 #define SDMMC_PRODUCT_INVALID	0xffff
124 	uint8_t		 function;
125 #define SDMMC_FUNCTION_INVALID	0xff
126 	u_char		 cis1_major;
127 	u_char		 cis1_minor;
128 	char		 cis1_info_buf[256];
129 	char		*cis1_info[4];
130 };
131 
132 /*
133  * Structure describing either an SD card I/O function or a SD/MMC
134  * memory card from a "stack of cards" that responded to CMD2.  For a
135  * combo card with one I/O function and one memory card, there will be
136  * two of these structures allocated.  Each card slot has such a list
137  * of sdmmc_function structures.
138  */
139 struct sdmmc_function {
140 	/* common members */
141 	struct sdmmc_softc *sc;		/* card slot softc */
142 	uint16_t rca;			/* relative card address */
143 	int flags;
144 #define SFF_ERROR		0x0001	/* function is poo; ignore it */
145 #define SFF_SDHC		0x0002	/* SD High Capacity card */
146 	SIMPLEQ_ENTRY(sdmmc_function) sf_list;
147 	/* SD card I/O function members */
148 	int number;			/* I/O function number or -1 */
149 	device_t child;			/* function driver */
150 	struct sdmmc_cis cis;		/* decoded CIS */
151 	/* SD/MMC memory card members */
152 	struct sdmmc_csd csd;		/* decoded CSD value */
153 	struct sdmmc_cid cid;		/* decoded CID value */
154 	sdmmc_response raw_cid;		/* temp. storage for decoding */
155 };
156 
157 /*
158  * Structure describing a single SD/MMC/SDIO card slot.
159  */
160 struct sdmmc_softc {
161 	device_t sc_dev;		/* base device */
162 #define SDMMCDEVNAME(sc)	(device_xname(sc->sc_dev))
163 
164 	sdmmc_chipset_tag_t sc_sct;	/* host controller chipset tag */
165 	sdmmc_chipset_handle_t sc_sch;	/* host controller chipset handle */
166 	bus_dma_tag_t sc_dmat;
167 	bus_dmamap_t sc_dmap;
168 #define	SDMMC_MAXNSEGS		16	/* (MAXPHYS / PAGE_SIZE) */
169 
170 	struct kmutex sc_mtx;		/* lock around host controller */
171 	int sc_dying;			/* bus driver is shutting down */
172 
173 	uint32_t sc_flags;
174 #define SMF_INITED		0x0001
175 #define SMF_SD_MODE		0x0002	/* host in SD mode (MMC otherwise) */
176 #define SMF_IO_MODE		0x0004	/* host in I/O mode (SD mode only) */
177 #define SMF_MEM_MODE		0x0008	/* host in memory mode (SD or MMC) */
178 #define SMF_CARD_PRESENT	0x4000	/* card presence noticed */
179 #define SMF_CARD_ATTACHED	0x8000	/* card driver(s) attached */
180 
181 	uint32_t sc_caps;		/* host capability */
182 #define SMC_CAPS_AUTO_STOP	0x0001	/* send CMD12 automagically by host */
183 #define SMC_CAPS_4BIT_MODE	0x0002	/* 4-bits data bus width */
184 #define SMC_CAPS_DMA		0x0004	/* DMA transfer */
185 
186 	/* function */
187 	int sc_function_count;		/* number of I/O functions (SDIO) */
188 	struct sdmmc_function *sc_card;	/* selected card */
189 	struct sdmmc_function *sc_fn0;	/* function 0, the card itself */
190 	SIMPLEQ_HEAD(, sdmmc_function) sf_head; /* list of card functions */
191 
192 	/* task queue */
193 	struct lwp *sc_tskq_lwp;	/* asynchronous tasks */
194 	TAILQ_HEAD(, sdmmc_task) sc_tskq;   /* task thread work queue */
195 	struct kmutex sc_tskq_mtx;
196 	struct kcondvar sc_tskq_cv;
197 
198 	/* discover task */
199 	struct sdmmc_task sc_discover_task; /* card attach/detach task */
200 	struct kmutex sc_discover_task_mtx;
201 
202 	/* interrupt task */
203 	struct sdmmc_task sc_intr_task;	/* card interrupt task */
204 	struct kmutex sc_intr_task_mtx;
205 	TAILQ_HEAD(, sdmmc_intr_handler) sc_intrq; /* interrupt handlers */
206 
207 	u_int sc_clkmin;		/* host min bus clock */
208 	u_int sc_clkmax;		/* host max bus clock */
209 	u_int sc_busclk;		/* host bus clock */
210 	int sc_buswidth;		/* host bus width */
211 };
212 
213 /*
214  * Attach devices at the sdmmc bus.
215  */
216 struct sdmmc_attach_args {
217 	uint16_t manufacturer;
218 	uint16_t product;
219 	struct sdmmc_function *sf;
220 };
221 
222 struct sdmmc_product {
223 	uint16_t	pp_vendor;
224 	uint16_t	pp_product;
225 	const char	*pp_cisinfo[4];
226 };
227 
228 #ifndef	IPL_SDMMC
229 #define IPL_SDMMC	IPL_BIO
230 #endif
231 
232 #ifndef	splsdmmc
233 #define splsdmmc()	splbio()
234 #endif
235 
236 #define	SDMMC_LOCK(sc)
237 #define	SDMMC_UNLOCK(sc)
238 
239 #ifdef SDMMC_DEBUG
240 extern int sdmmcdebug;
241 #endif
242 
243 void	sdmmc_add_task(struct sdmmc_softc *, struct sdmmc_task *);
244 void	sdmmc_del_task(struct sdmmc_task *);
245 
246 struct	sdmmc_function *sdmmc_function_alloc(struct sdmmc_softc *);
247 void	sdmmc_function_free(struct sdmmc_function *);
248 int	sdmmc_set_bus_power(struct sdmmc_softc *, uint32_t, uint32_t);
249 int	sdmmc_mmc_command(struct sdmmc_softc *, struct sdmmc_command *);
250 int	sdmmc_app_command(struct sdmmc_softc *, struct sdmmc_command *);
251 void	sdmmc_go_idle_state(struct sdmmc_softc *);
252 int	sdmmc_select_card(struct sdmmc_softc *, struct sdmmc_function *);
253 int	sdmmc_set_relative_addr(struct sdmmc_softc *,
254 	    struct sdmmc_function *);
255 
256 void	sdmmc_intr_enable(struct sdmmc_function *);
257 void	sdmmc_intr_disable(struct sdmmc_function *);
258 void	*sdmmc_intr_establish(device_t, int (*)(void *), void *, const char *);
259 void	sdmmc_intr_disestablish(void *);
260 void	sdmmc_intr_task(void *);
261 
262 int	sdmmc_decode_csd(struct sdmmc_softc *, sdmmc_response,
263 	    struct sdmmc_function *);
264 int	sdmmc_decode_cid(struct sdmmc_softc *, sdmmc_response,
265 	    struct sdmmc_function *);
266 void	sdmmc_print_cid(struct sdmmc_cid *);
267 
268 int	sdmmc_io_enable(struct sdmmc_softc *);
269 void	sdmmc_io_scan(struct sdmmc_softc *);
270 int	sdmmc_io_init(struct sdmmc_softc *, struct sdmmc_function *);
271 uint8_t sdmmc_io_read_1(struct sdmmc_function *, int);
272 uint16_t sdmmc_io_read_2(struct sdmmc_function *, int);
273 uint32_t sdmmc_io_read_4(struct sdmmc_function *, int);
274 int	sdmmc_io_read_multi_1(struct sdmmc_function *, int, u_char *, int);
275 void	sdmmc_io_write_1(struct sdmmc_function *, int, uint8_t);
276 void	sdmmc_io_write_2(struct sdmmc_function *, int, uint16_t);
277 void	sdmmc_io_write_4(struct sdmmc_function *, int, uint32_t);
278 int	sdmmc_io_write_multi_1(struct sdmmc_function *, int, u_char *, int);
279 int	sdmmc_io_function_enable(struct sdmmc_function *);
280 void	sdmmc_io_function_disable(struct sdmmc_function *);
281 
282 int	sdmmc_read_cis(struct sdmmc_function *, struct sdmmc_cis *);
283 void	sdmmc_print_cis(struct sdmmc_function *);
284 void	sdmmc_check_cis_quirks(struct sdmmc_function *);
285 
286 int	sdmmc_mem_enable(struct sdmmc_softc *);
287 void	sdmmc_mem_scan(struct sdmmc_softc *);
288 int	sdmmc_mem_init(struct sdmmc_softc *, struct sdmmc_function *);
289 int	sdmmc_mem_read_block(struct sdmmc_function *, uint32_t, u_char *,
290 	    size_t);
291 int	sdmmc_mem_write_block(struct sdmmc_function *, uint32_t, u_char *,
292 	    size_t);
293 
294 #endif	/* _SDMMCVAR_H_ */
295