xref: /netbsd-src/sys/dev/sdmmc/sdmmcvar.h (revision 6a493d6bc668897c91594964a732d38505b70cbb)
1 /*	$NetBSD: sdmmcvar.h,v 1.14 2012/07/12 15:59:32 jakllsch Exp $	*/
2 /*	$OpenBSD: sdmmcvar.h,v 1.13 2009/01/09 10:55:22 jsg Exp $	*/
3 
4 /*
5  * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
6  *
7  * Permission to use, copy, modify, and distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 #ifndef	_SDMMCVAR_H_
21 #define	_SDMMCVAR_H_
22 
23 #ifdef _KERNEL_OPT
24 #include "opt_sdmmc.h"
25 #endif
26 
27 #include <sys/queue.h>
28 #include <sys/mutex.h>
29 #include <sys/callout.h>
30 
31 #include <sys/bus.h>
32 
33 #include <dev/sdmmc/sdmmcchip.h>
34 #include <dev/sdmmc/sdmmcreg.h>
35 
36 #define	SDMMC_SECTOR_SIZE_SB	9
37 #define	SDMMC_SECTOR_SIZE	(1 << SDMMC_SECTOR_SIZE_SB)	/* =512 */
38 
39 struct sdmmc_csd {
40 	int	csdver;		/* CSD structure format */
41 	u_int	mmcver;		/* MMC version (for CID format) */
42 	int	capacity;	/* total number of sectors */
43 	int	read_bl_len;	/* block length for reads */
44 	int	write_bl_len;	/* block length for writes */
45 	int	r2w_factor;
46 	int	tran_speed;	/* transfer speed (kbit/s) */
47 	int	ccc;		/* Card Command Class for SD */
48 	/* ... */
49 };
50 
51 struct sdmmc_cid {
52 	int	mid;		/* manufacturer identification number */
53 	int	oid;		/* OEM/product identification number */
54 	char	pnm[8];		/* product name (MMC v1 has the longest) */
55 	int	rev;		/* product revision */
56 	int	psn;		/* product serial number */
57 	int	mdt;		/* manufacturing date */
58 };
59 
60 struct sdmmc_scr {
61 	int	sd_spec;
62 	int	bus_width;
63 };
64 
65 typedef uint32_t sdmmc_response[4];
66 
67 struct sdmmc_softc;
68 
69 struct sdmmc_task {
70 	void (*func)(void *arg);
71 	void *arg;
72 	int onqueue;
73 	struct sdmmc_softc *sc;
74 	TAILQ_ENTRY(sdmmc_task) next;
75 };
76 
77 #define	sdmmc_init_task(xtask, xfunc, xarg)				\
78 do {									\
79 	(xtask)->func = (xfunc);					\
80 	(xtask)->arg = (xarg);						\
81 	(xtask)->onqueue = 0;						\
82 	(xtask)->sc = NULL;						\
83 } while (/*CONSTCOND*/0)
84 
85 #define sdmmc_task_pending(xtask) ((xtask)->onqueue)
86 
87 struct sdmmc_command {
88 	struct sdmmc_task c_task;	/* task queue entry */
89 	uint16_t	 c_opcode;	/* SD or MMC command index */
90 	uint32_t	 c_arg;		/* SD/MMC command argument */
91 	sdmmc_response	 c_resp;	/* response buffer */
92 	bus_dmamap_t	 c_dmamap;
93 	int		 c_dmaseg;	/* DMA segment number */
94 	int		 c_dmaoff;	/* offset in DMA segment */
95 	void		*c_data;	/* buffer to send or read into */
96 	int		 c_datalen;	/* length of data buffer */
97 	int		 c_blklen;	/* block length */
98 	int		 c_flags;	/* see below */
99 #define SCF_ITSDONE	(1U << 0)		/* command is complete */
100 #define SCF_RSP_PRESENT	(1U << 1)
101 #define SCF_RSP_BSY	(1U << 2)
102 #define SCF_RSP_136	(1U << 3)
103 #define SCF_RSP_CRC	(1U << 4)
104 #define SCF_RSP_IDX	(1U << 5)
105 #define SCF_CMD_READ	(1U << 6)	/* read command (data expected) */
106 /* non SPI */
107 #define SCF_CMD_AC	(0U << 8)
108 #define SCF_CMD_ADTC	(1U << 8)
109 #define SCF_CMD_BC	(2U << 8)
110 #define SCF_CMD_BCR	(3U << 8)
111 #define SCF_CMD_MASK	(3U << 8)
112 /* SPI */
113 #define SCF_RSP_SPI_S1	(1U << 10)
114 #define SCF_RSP_SPI_S2	(1U << 11)
115 #define SCF_RSP_SPI_B4	(1U << 12)
116 #define SCF_RSP_SPI_BSY	(1U << 13)
117 /* response types */
118 #define SCF_RSP_R0	0	/* none */
119 #define SCF_RSP_R1	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
120 #define SCF_RSP_R1B	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY)
121 #define SCF_RSP_R2	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_136)
122 #define SCF_RSP_R3	(SCF_RSP_PRESENT)
123 #define SCF_RSP_R4	(SCF_RSP_PRESENT)
124 #define SCF_RSP_R5	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
125 #define SCF_RSP_R5B	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY)
126 #define SCF_RSP_R6	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
127 #define SCF_RSP_R7	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
128 /* SPI */
129 #define SCF_RSP_SPI_R1	(SCF_RSP_SPI_S1)
130 #define SCF_RSP_SPI_R1B	(SCF_RSP_SPI_S1|SCF_RSP_SPI_BSY)
131 #define SCF_RSP_SPI_R2	(SCF_RSP_SPI_S1|SCF_RSP_SPI_S2)
132 #define SCF_RSP_SPI_R3	(SCF_RSP_SPI_S1|SCF_RSP_SPI_B4)
133 #define SCF_RSP_SPI_R4	(SCF_RSP_SPI_S1|SCF_RSP_SPI_B4)
134 #define SCF_RSP_SPI_R5	(SCF_RSP_SPI_S1|SCF_RSP_SPI_S2)
135 #define SCF_RSP_SPI_R7	(SCF_RSP_SPI_S1|SCF_RSP_SPI_B4)
136 	int		 c_error;	/* errno value on completion */
137 
138 	/* Host controller owned fields for data xfer in progress */
139 	int c_resid;			/* remaining I/O */
140 	u_char *c_buf;			/* remaining data */
141 };
142 
143 /*
144  * Decoded PC Card 16 based Card Information Structure (CIS),
145  * per card (function 0) and per function (1 and greater).
146  */
147 struct sdmmc_cis {
148 	uint16_t	 manufacturer;
149 #define SDMMC_VENDOR_INVALID	0xffff
150 	uint16_t	 product;
151 #define SDMMC_PRODUCT_INVALID	0xffff
152 	uint8_t		 function;
153 #define SDMMC_FUNCTION_INVALID	0xff
154 	u_char		 cis1_major;
155 	u_char		 cis1_minor;
156 	char		 cis1_info_buf[256];
157 	char		*cis1_info[4];
158 };
159 
160 /*
161  * Structure describing either an SD card I/O function or a SD/MMC
162  * memory card from a "stack of cards" that responded to CMD2.  For a
163  * combo card with one I/O function and one memory card, there will be
164  * two of these structures allocated.  Each card slot has such a list
165  * of sdmmc_function structures.
166  */
167 struct sdmmc_function {
168 	/* common members */
169 	struct sdmmc_softc *sc;		/* card slot softc */
170 	uint16_t rca;			/* relative card address */
171 	int interface;			/* SD/MMC:0, SDIO:standard interface */
172 	int width;			/* bus width */
173 	int flags;
174 #define SFF_ERROR		0x0001	/* function is poo; ignore it */
175 #define SFF_SDHC		0x0002	/* SD High Capacity card */
176 	SIMPLEQ_ENTRY(sdmmc_function) sf_list;
177 	/* SD card I/O function members */
178 	int number;			/* I/O function number or -1 */
179 	device_t child;			/* function driver */
180 	struct sdmmc_cis cis;		/* decoded CIS */
181 	/* SD/MMC memory card members */
182 	struct sdmmc_csd csd;		/* decoded CSD value */
183 	struct sdmmc_cid cid;		/* decoded CID value */
184 	sdmmc_response raw_cid;		/* temp. storage for decoding */
185 	uint32_t raw_scr[2];
186 	struct sdmmc_scr scr;		/* decoded SCR value */
187 
188 	void *bbuf;			/* bounce buffer */
189 	bus_dmamap_t bbuf_dmap;		/* DMA map for bounce buffer */
190 };
191 
192 /*
193  * Structure describing a single SD/MMC/SDIO card slot.
194  */
195 struct sdmmc_softc {
196 	device_t sc_dev;		/* base device */
197 #define SDMMCDEVNAME(sc)	(device_xname(sc->sc_dev))
198 
199 	sdmmc_chipset_tag_t sc_sct;	/* host controller chipset tag */
200 	sdmmc_spi_chipset_tag_t sc_spi_sct;
201 	sdmmc_chipset_handle_t sc_sch;	/* host controller chipset handle */
202 	bus_dma_tag_t sc_dmat;
203 	bus_dmamap_t sc_dmap;
204 #define	SDMMC_MAXNSEGS		((MAXPHYS / PAGE_SIZE) + 1)
205 
206 	struct kmutex sc_mtx;		/* lock around host controller */
207 	int sc_dying;			/* bus driver is shutting down */
208 
209 	uint32_t sc_flags;
210 #define SMF_INITED		0x0001
211 #define SMF_SD_MODE		0x0002	/* host in SD mode (MMC otherwise) */
212 #define SMF_IO_MODE		0x0004	/* host in I/O mode (SD mode only) */
213 #define SMF_MEM_MODE		0x0008	/* host in memory mode (SD or MMC) */
214 #define SMF_CARD_PRESENT	0x4000	/* card presence noticed */
215 #define SMF_CARD_ATTACHED	0x8000	/* card driver(s) attached */
216 
217 	uint32_t sc_caps;		/* host capability */
218 #define SMC_CAPS_AUTO_STOP	0x0001	/* send CMD12 automagically by host */
219 #define SMC_CAPS_4BIT_MODE	0x0002	/* 4-bits data bus width */
220 #define SMC_CAPS_DMA		0x0004	/* DMA transfer */
221 #define SMC_CAPS_SPI_MODE	0x0008	/* SPI mode */
222 #define SMC_CAPS_POLL_CARD_DET	0x0010	/* Polling card detect */
223 #define SMC_CAPS_SINGLE_ONLY	0x0020	/* only single read/write */
224 #define SMC_CAPS_8BIT_MODE	0x0040	/* 8-bits data bus width */
225 #define SMC_CAPS_MULTI_SEG_DMA	0x0080	/* multiple segment DMA transfer */
226 #define SMC_CAPS_SD_HIGHSPEED	0x0100	/* SD high-speed timing */
227 #define SMC_CAPS_MMC_HIGHSPEED	0x0200	/* MMC high-speed timing */
228 
229 	/* function */
230 	int sc_function_count;		/* number of I/O functions (SDIO) */
231 	struct sdmmc_function *sc_card;	/* selected card */
232 	struct sdmmc_function *sc_fn0;	/* function 0, the card itself */
233 	SIMPLEQ_HEAD(, sdmmc_function) sf_head; /* list of card functions */
234 
235 	/* task queue */
236 	struct lwp *sc_tskq_lwp;	/* asynchronous tasks */
237 	TAILQ_HEAD(, sdmmc_task) sc_tskq;   /* task thread work queue */
238 	struct kmutex sc_tskq_mtx;
239 	struct kcondvar sc_tskq_cv;
240 
241 	/* discover task */
242 	struct sdmmc_task sc_discover_task; /* card attach/detach task */
243 	struct kmutex sc_discover_task_mtx;
244 
245 	/* interrupt task */
246 	struct sdmmc_task sc_intr_task;	/* card interrupt task */
247 	struct kmutex sc_intr_task_mtx;
248 	TAILQ_HEAD(, sdmmc_intr_handler) sc_intrq; /* interrupt handlers */
249 
250 	u_int sc_clkmin;		/* host min bus clock */
251 	u_int sc_clkmax;		/* host max bus clock */
252 	u_int sc_busclk;		/* host bus clock */
253 	int sc_buswidth;		/* host bus width */
254 
255 	callout_t sc_card_detect_ch;	/* polling card insert/remove */
256 };
257 
258 /*
259  * Attach devices at the sdmmc bus.
260  */
261 struct sdmmc_attach_args {
262 	uint16_t manufacturer;
263 	uint16_t product;
264 	int interface;
265 	struct sdmmc_function *sf;
266 };
267 
268 struct sdmmc_product {
269 	uint16_t	pp_vendor;
270 	uint16_t	pp_product;
271 	const char	*pp_cisinfo[4];
272 };
273 
274 #ifndef	IPL_SDMMC
275 #define IPL_SDMMC	IPL_BIO
276 #endif
277 
278 #ifndef	splsdmmc
279 #define splsdmmc()	splbio()
280 #endif
281 
282 #define	SDMMC_LOCK(sc)
283 #define	SDMMC_UNLOCK(sc)
284 
285 #ifdef SDMMC_DEBUG
286 extern int sdmmcdebug;
287 #endif
288 
289 void	sdmmc_add_task(struct sdmmc_softc *, struct sdmmc_task *);
290 void	sdmmc_del_task(struct sdmmc_task *);
291 
292 struct	sdmmc_function *sdmmc_function_alloc(struct sdmmc_softc *);
293 void	sdmmc_function_free(struct sdmmc_function *);
294 int	sdmmc_set_bus_power(struct sdmmc_softc *, uint32_t, uint32_t);
295 int	sdmmc_mmc_command(struct sdmmc_softc *, struct sdmmc_command *);
296 int	sdmmc_app_command(struct sdmmc_softc *, struct sdmmc_function *,
297 	    struct sdmmc_command *);
298 void	sdmmc_go_idle_state(struct sdmmc_softc *);
299 int	sdmmc_select_card(struct sdmmc_softc *, struct sdmmc_function *);
300 int	sdmmc_set_relative_addr(struct sdmmc_softc *, struct sdmmc_function *);
301 
302 void	sdmmc_intr_enable(struct sdmmc_function *);
303 void	sdmmc_intr_disable(struct sdmmc_function *);
304 void	*sdmmc_intr_establish(device_t, int (*)(void *), void *, const char *);
305 void	sdmmc_intr_disestablish(void *);
306 void	sdmmc_intr_task(void *);
307 
308 int	sdmmc_decode_csd(struct sdmmc_softc *, sdmmc_response,
309 	    struct sdmmc_function *);
310 int	sdmmc_decode_cid(struct sdmmc_softc *, sdmmc_response,
311 	    struct sdmmc_function *);
312 void	sdmmc_print_cid(struct sdmmc_cid *);
313 #ifdef SDMMC_DUMP_CSD
314 void	sdmmc_print_csd(sdmmc_response, struct sdmmc_csd *);
315 #endif
316 void	sdmmc_dump_data(const char *, void *, size_t);
317 
318 int	sdmmc_io_enable(struct sdmmc_softc *);
319 void	sdmmc_io_scan(struct sdmmc_softc *);
320 int	sdmmc_io_init(struct sdmmc_softc *, struct sdmmc_function *);
321 uint8_t sdmmc_io_read_1(struct sdmmc_function *, int);
322 uint16_t sdmmc_io_read_2(struct sdmmc_function *, int);
323 uint32_t sdmmc_io_read_4(struct sdmmc_function *, int);
324 int	sdmmc_io_read_multi_1(struct sdmmc_function *, int, u_char *, int);
325 void	sdmmc_io_write_1(struct sdmmc_function *, int, uint8_t);
326 void	sdmmc_io_write_2(struct sdmmc_function *, int, uint16_t);
327 void	sdmmc_io_write_4(struct sdmmc_function *, int, uint32_t);
328 int	sdmmc_io_write_multi_1(struct sdmmc_function *, int, u_char *, int);
329 int	sdmmc_io_function_enable(struct sdmmc_function *);
330 void	sdmmc_io_function_disable(struct sdmmc_function *);
331 
332 int	sdmmc_read_cis(struct sdmmc_function *, struct sdmmc_cis *);
333 void	sdmmc_print_cis(struct sdmmc_function *);
334 void	sdmmc_check_cis_quirks(struct sdmmc_function *);
335 
336 int	sdmmc_mem_enable(struct sdmmc_softc *);
337 void	sdmmc_mem_scan(struct sdmmc_softc *);
338 int	sdmmc_mem_init(struct sdmmc_softc *, struct sdmmc_function *);
339 int	sdmmc_mem_send_op_cond(struct sdmmc_softc *, uint32_t, uint32_t *);
340 int	sdmmc_mem_send_if_cond(struct sdmmc_softc *, uint32_t, uint32_t *);
341 int	sdmmc_mem_set_blocklen(struct sdmmc_softc *, struct sdmmc_function *);
342 int	sdmmc_mem_read_block(struct sdmmc_function *, uint32_t, u_char *,
343 	    size_t);
344 int	sdmmc_mem_write_block(struct sdmmc_function *, uint32_t, u_char *,
345 	    size_t);
346 
347 #endif	/* _SDMMCVAR_H_ */
348