xref: /netbsd-src/sys/dev/sdmmc/sdmmcvar.h (revision 10ad5ffa714ce1a679dcc9dd8159648df2d67b5a)
1 /*	$NetBSD: sdmmcvar.h,v 1.1 2009/04/21 03:00:31 nonaka Exp $	*/
2 /*	$OpenBSD: sdmmcvar.h,v 1.13 2009/01/09 10:55:22 jsg Exp $	*/
3 
4 /*
5  * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
6  *
7  * Permission to use, copy, modify, and distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 #ifndef	_SDMMCVAR_H_
21 #define	_SDMMCVAR_H_
22 
23 #include <sys/queue.h>
24 #include <sys/mutex.h>
25 
26 #include <machine/bus.h>
27 
28 #include <dev/sdmmc/sdmmcchip.h>
29 #include <dev/sdmmc/sdmmcreg.h>
30 
31 struct sdmmc_csd {
32 	int	csdver;		/* CSD structure format */
33 	u_int	mmcver;		/* MMC version (for CID format) */
34 	int	capacity;	/* total number of sectors */
35 	int	sector_size;	/* sector size in bytes */
36 	int	sector_size_sb;	/* sector size in shift bit */
37 	int	read_bl_len;	/* block length for reads */
38 	int	write_bl_len;	/* block length for writes */
39 	int	r2w_factor;
40 	int	tran_speed;	/* transfer speed (kbit/s) */
41 	/* ... */
42 };
43 
44 struct sdmmc_cid {
45 	int	mid;		/* manufacturer identification number */
46 	int	oid;		/* OEM/product identification number */
47 	char	pnm[8];		/* product name (MMC v1 has the longest) */
48 	int	rev;		/* product revision */
49 	int	psn;		/* product serial number */
50 	int	mdt;		/* manufacturing date */
51 };
52 
53 typedef uint32_t sdmmc_response[4];
54 
55 struct sdmmc_softc;
56 
57 struct sdmmc_task {
58 	void (*func)(void *arg);
59 	void *arg;
60 	int onqueue;
61 	struct sdmmc_softc *sc;
62 	TAILQ_ENTRY(sdmmc_task) next;
63 };
64 
65 #define	sdmmc_init_task(xtask, xfunc, xarg)				\
66 do {									\
67 	(xtask)->func = (xfunc);					\
68 	(xtask)->arg = (xarg);						\
69 	(xtask)->onqueue = 0;						\
70 	(xtask)->sc = NULL;						\
71 } while (/*CONSTCOND*/0)
72 
73 #define sdmmc_task_pending(xtask) ((xtask)->onqueue)
74 
75 struct sdmmc_command {
76 	struct sdmmc_task c_task;	/* task queue entry */
77 	uint16_t	 c_opcode;	/* SD or MMC command index */
78 	uint32_t	 c_arg;		/* SD/MMC command argument */
79 	sdmmc_response	 c_resp;	/* response buffer */
80 	bus_dmamap_t	 c_dmamap;
81 	void		*c_data;	/* buffer to send or read into */
82 	int		 c_datalen;	/* length of data buffer */
83 	int		 c_blklen;	/* block length */
84 	int		 c_flags;	/* see below */
85 #define SCF_ITSDONE	0x0001		/* command is complete */
86 #define SCF_CMD_AC	0x0000
87 #define SCF_CMD_ADTC	0x0010
88 #define SCF_CMD_BC	0x0020
89 #define SCF_CMD_BCR	0x0030
90 #define SCF_CMD_READ	0x0040		/* read command (data expected) */
91 #define SCF_RSP_BSY	0x0100
92 #define SCF_RSP_136	0x0200
93 #define SCF_RSP_CRC	0x0400
94 #define SCF_RSP_IDX	0x0800
95 #define SCF_RSP_PRESENT	0x1000
96 /* response types */
97 #define SCF_RSP_R0	0	/* none */
98 #define SCF_RSP_R1	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
99 #define SCF_RSP_R1B	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY)
100 #define SCF_RSP_R2	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_136)
101 #define SCF_RSP_R3	(SCF_RSP_PRESENT)
102 #define SCF_RSP_R4	(SCF_RSP_PRESENT)
103 #define SCF_RSP_R5	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
104 #define SCF_RSP_R5B	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY)
105 #define SCF_RSP_R6	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
106 #define SCF_RSP_R7	(SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
107 	int		 c_error;	/* errno value on completion */
108 
109 	/* Host controller owned fields for data xfer in progress */
110 	int c_resid;			/* remaining I/O */
111 	u_char *c_buf;			/* remaining data */
112 };
113 
114 /*
115  * Decoded PC Card 16 based Card Information Structure (CIS),
116  * per card (function 0) and per function (1 and greater).
117  */
118 struct sdmmc_cis {
119 	uint16_t	 manufacturer;
120 #define SDMMC_VENDOR_INVALID	0xffff
121 	uint16_t	 product;
122 #define SDMMC_PRODUCT_INVALID	0xffff
123 	uint8_t		 function;
124 #define SDMMC_FUNCTION_INVALID	0xff
125 	u_char		 cis1_major;
126 	u_char		 cis1_minor;
127 	char		 cis1_info_buf[256];
128 	char		*cis1_info[4];
129 };
130 
131 /*
132  * Structure describing either an SD card I/O function or a SD/MMC
133  * memory card from a "stack of cards" that responded to CMD2.  For a
134  * combo card with one I/O function and one memory card, there will be
135  * two of these structures allocated.  Each card slot has such a list
136  * of sdmmc_function structures.
137  */
138 struct sdmmc_function {
139 	/* common members */
140 	struct sdmmc_softc *sc;		/* card slot softc */
141 	uint16_t rca;			/* relative card address */
142 	int flags;
143 #define SFF_ERROR		0x0001	/* function is poo; ignore it */
144 #define SFF_SDHC		0x0002	/* SD High Capacity card */
145 	SIMPLEQ_ENTRY(sdmmc_function) sf_list;
146 	/* SD card I/O function members */
147 	int number;			/* I/O function number or -1 */
148 	device_t child;			/* function driver */
149 	struct sdmmc_cis cis;		/* decoded CIS */
150 	/* SD/MMC memory card members */
151 	struct sdmmc_csd csd;		/* decoded CSD value */
152 	struct sdmmc_cid cid;		/* decoded CID value */
153 	sdmmc_response raw_cid;		/* temp. storage for decoding */
154 };
155 
156 /*
157  * Structure describing a single SD/MMC/SDIO card slot.
158  */
159 struct sdmmc_softc {
160 	device_t sc_dev;		/* base device */
161 #define SDMMCDEVNAME(sc)	(device_xname(sc->sc_dev))
162 
163 	sdmmc_chipset_tag_t sc_sct;	/* host controller chipset tag */
164 	sdmmc_chipset_handle_t sc_sch;	/* host controller chipset handle */
165 	bus_dma_tag_t sc_dmat;
166 	bus_dmamap_t sc_dmap;
167 #define	SDMMC_MAXNSEGS		16	/* (MAXPHYS / PAGE_SIZE) */
168 
169 	struct kmutex sc_mtx;		/* lock around host controller */
170 	int sc_dying;			/* bus driver is shutting down */
171 
172 	uint32_t sc_flags;
173 #define SMF_INITED		0x0001
174 #define SMF_SD_MODE		0x0002	/* host in SD mode (MMC otherwise) */
175 #define SMF_IO_MODE		0x0004	/* host in I/O mode (SD mode only) */
176 #define SMF_MEM_MODE		0x0008	/* host in memory mode (SD or MMC) */
177 #define SMF_CARD_PRESENT	0x4000	/* card presence noticed */
178 #define SMF_CARD_ATTACHED	0x8000	/* card driver(s) attached */
179 
180 	uint32_t sc_caps;		/* host capability */
181 #define SMC_CAPS_AUTO_STOP	0x0001	/* send CMD12 automagically by host */
182 #define SMC_CAPS_4BIT_MODE	0x0002	/* 4-bits data bus width */
183 #define SMC_CAPS_DMA		0x0004	/* DMA transfer */
184 
185 	/* function */
186 	int sc_function_count;		/* number of I/O functions (SDIO) */
187 	struct sdmmc_function *sc_card;	/* selected card */
188 	struct sdmmc_function *sc_fn0;	/* function 0, the card itself */
189 	SIMPLEQ_HEAD(, sdmmc_function) sf_head; /* list of card functions */
190 
191 	/* task queue */
192 	struct lwp *sc_tskq_lwp;	/* asynchronous tasks */
193 	TAILQ_HEAD(, sdmmc_task) sc_tskq;   /* task thread work queue */
194 	struct kmutex sc_tskq_mtx;
195 	struct kcondvar sc_tskq_cv;
196 
197 	/* discover task */
198 	struct sdmmc_task sc_discover_task; /* card attach/detach task */
199 	struct kmutex sc_discover_task_mtx;
200 
201 	/* interrupt task */
202 	struct sdmmc_task sc_intr_task;	/* card interrupt task */
203 	struct kmutex sc_intr_task_mtx;
204 	TAILQ_HEAD(, sdmmc_intr_handler) sc_intrq; /* interrupt handlers */
205 
206 	u_int sc_clkmin;		/* host min bus clock */
207 	u_int sc_clkmax;		/* host max bus clock */
208 	u_int sc_busclk;		/* host bus clock */
209 	int sc_buswidth;		/* host bus width */
210 };
211 
212 /*
213  * Attach devices at the sdmmc bus.
214  */
215 struct sdmmc_attach_args {
216 	uint16_t manufacturer;
217 	uint16_t product;
218 	struct sdmmc_function *sf;
219 };
220 
221 struct sdmmc_product {
222 	uint16_t	pp_vendor;
223 	uint16_t	pp_product;
224 	const char	*pp_cisinfo[4];
225 };
226 
227 #ifndef	IPL_SDMMC
228 #define IPL_SDMMC	IPL_BIO
229 #endif
230 
231 #ifndef	splsdmmc
232 #define splsdmmc()	splbio()
233 #endif
234 
235 #define	SDMMC_LOCK(sc)
236 #define	SDMMC_UNLOCK(sc)
237 
238 #ifdef SDMMC_DEBUG
239 extern int sdmmcdebug;
240 #endif
241 
242 void	sdmmc_add_task(struct sdmmc_softc *, struct sdmmc_task *);
243 void	sdmmc_del_task(struct sdmmc_task *);
244 
245 struct	sdmmc_function *sdmmc_function_alloc(struct sdmmc_softc *);
246 void	sdmmc_function_free(struct sdmmc_function *);
247 int	sdmmc_set_bus_power(struct sdmmc_softc *, uint32_t, uint32_t);
248 int	sdmmc_mmc_command(struct sdmmc_softc *, struct sdmmc_command *);
249 int	sdmmc_app_command(struct sdmmc_softc *, struct sdmmc_command *);
250 void	sdmmc_go_idle_state(struct sdmmc_softc *);
251 int	sdmmc_select_card(struct sdmmc_softc *, struct sdmmc_function *);
252 int	sdmmc_set_relative_addr(struct sdmmc_softc *,
253 	    struct sdmmc_function *);
254 
255 void	sdmmc_intr_enable(struct sdmmc_function *);
256 void	sdmmc_intr_disable(struct sdmmc_function *);
257 void	*sdmmc_intr_establish(device_t, int (*)(void *), void *, const char *);
258 void	sdmmc_intr_disestablish(void *);
259 void	sdmmc_intr_task(void *);
260 
261 int	sdmmc_decode_csd(struct sdmmc_softc *, sdmmc_response,
262 	    struct sdmmc_function *);
263 int	sdmmc_decode_cid(struct sdmmc_softc *, sdmmc_response,
264 	    struct sdmmc_function *);
265 void	sdmmc_print_cid(struct sdmmc_cid *);
266 
267 int	sdmmc_io_enable(struct sdmmc_softc *);
268 void	sdmmc_io_scan(struct sdmmc_softc *);
269 int	sdmmc_io_init(struct sdmmc_softc *, struct sdmmc_function *);
270 uint8_t sdmmc_io_read_1(struct sdmmc_function *, int);
271 uint16_t sdmmc_io_read_2(struct sdmmc_function *, int);
272 uint32_t sdmmc_io_read_4(struct sdmmc_function *, int);
273 int	sdmmc_io_read_multi_1(struct sdmmc_function *, int, u_char *, int);
274 void	sdmmc_io_write_1(struct sdmmc_function *, int, uint8_t);
275 void	sdmmc_io_write_2(struct sdmmc_function *, int, uint16_t);
276 void	sdmmc_io_write_4(struct sdmmc_function *, int, uint32_t);
277 int	sdmmc_io_write_multi_1(struct sdmmc_function *, int, u_char *, int);
278 int	sdmmc_io_function_enable(struct sdmmc_function *);
279 void	sdmmc_io_function_disable(struct sdmmc_function *);
280 
281 int	sdmmc_read_cis(struct sdmmc_function *, struct sdmmc_cis *);
282 void	sdmmc_print_cis(struct sdmmc_function *);
283 void	sdmmc_check_cis_quirks(struct sdmmc_function *);
284 
285 int	sdmmc_mem_enable(struct sdmmc_softc *);
286 void	sdmmc_mem_scan(struct sdmmc_softc *);
287 int	sdmmc_mem_init(struct sdmmc_softc *, struct sdmmc_function *);
288 int	sdmmc_mem_read_block(struct sdmmc_function *, uint32_t, u_char *,
289 	    size_t);
290 int	sdmmc_mem_write_block(struct sdmmc_function *, uint32_t, u_char *,
291 	    size_t);
292 
293 #endif	/* _SDMMCVAR_H_ */
294