1 /* $NetBSD: sdmmc_mem.c,v 1.14 2010/11/13 13:52:11 uebayasi Exp $ */ 2 /* $OpenBSD: sdmmc_mem.c,v 1.10 2009/01/09 10:55:22 jsg Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /*- 21 * Copyright (c) 2007-2010 NONAKA Kimihiro <nonaka@netbsd.org> 22 * All rights reserved. 23 * 24 * Redistribution and use in source and binary forms, with or without 25 * modification, are permitted provided that the following conditions 26 * are met: 27 * 1. Redistributions of source code must retain the above copyright 28 * notice, this list of conditions and the following disclaimer. 29 * 2. Redistributions in binary form must reproduce the above copyright 30 * notice, this list of conditions and the following disclaimer in the 31 * documentation and/or other materials provided with the distribution. 32 * 33 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 34 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 35 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 36 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 37 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 38 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 39 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 40 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 41 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 42 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 43 * SUCH DAMAGE. 44 */ 45 46 /* Routines for SD/MMC memory cards. */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: sdmmc_mem.c,v 1.14 2010/11/13 13:52:11 uebayasi Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/kernel.h> 53 #include <sys/malloc.h> 54 #include <sys/systm.h> 55 #include <sys/device.h> 56 57 #include <dev/sdmmc/sdmmcchip.h> 58 #include <dev/sdmmc/sdmmcreg.h> 59 #include <dev/sdmmc/sdmmcvar.h> 60 61 #ifdef SDMMC_DEBUG 62 #define DPRINTF(s) do { printf s; } while (/*CONSTCOND*/0) 63 #else 64 #define DPRINTF(s) do {} while (/*CONSTCOND*/0) 65 #endif 66 67 static int sdmmc_mem_sd_init(struct sdmmc_softc *, struct sdmmc_function *); 68 static int sdmmc_mem_mmc_init(struct sdmmc_softc *, struct sdmmc_function *); 69 static int sdmmc_mem_send_cid(struct sdmmc_softc *, sdmmc_response *); 70 static int sdmmc_mem_send_csd(struct sdmmc_softc *, struct sdmmc_function *, 71 sdmmc_response *); 72 static int sdmmc_mem_send_scr(struct sdmmc_softc *, struct sdmmc_function *, 73 uint32_t scr[2]); 74 static int sdmmc_mem_decode_scr(struct sdmmc_softc *, struct sdmmc_function *); 75 static int sdmmc_mem_send_cxd_data(struct sdmmc_softc *, int, void *, size_t); 76 static int sdmmc_set_bus_width(struct sdmmc_function *, int); 77 static int sdmmc_mem_sd_switch(struct sdmmc_function *, int, int, int, void *); 78 static int sdmmc_mem_mmc_switch(struct sdmmc_function *, uint8_t, uint8_t, 79 uint8_t); 80 static int sdmmc_mem_spi_read_ocr(struct sdmmc_softc *, uint32_t, uint32_t *); 81 static int sdmmc_mem_single_read_block(struct sdmmc_function *, uint32_t, 82 u_char *, size_t); 83 static int sdmmc_mem_single_write_block(struct sdmmc_function *, uint32_t, 84 u_char *, size_t); 85 static int sdmmc_mem_read_block_subr(struct sdmmc_function *, uint32_t, 86 u_char *, size_t); 87 static int sdmmc_mem_write_block_subr(struct sdmmc_function *, uint32_t, 88 u_char *, size_t); 89 90 /* 91 * Initialize SD/MMC memory cards and memory in SDIO "combo" cards. 92 */ 93 int 94 sdmmc_mem_enable(struct sdmmc_softc *sc) 95 { 96 uint32_t host_ocr; 97 uint32_t card_ocr; 98 uint32_t ocr = 0; 99 int error; 100 101 SDMMC_LOCK(sc); 102 103 /* Set host mode to SD "combo" card or SD memory-only. */ 104 SET(sc->sc_flags, SMF_SD_MODE|SMF_MEM_MODE); 105 106 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 107 sdmmc_spi_chip_initialize(sc->sc_spi_sct, sc->sc_sch); 108 109 /* Reset memory (*must* do that before CMD55 or CMD1). */ 110 sdmmc_go_idle_state(sc); 111 112 /* Check SD Ver.2 */ 113 error = sdmmc_mem_send_if_cond(sc, 0x1aa, &card_ocr); 114 if (error == 0 && card_ocr == 0x1aa) 115 SET(ocr, MMC_OCR_HCS); 116 117 /* 118 * Read the SD/MMC memory OCR value by issuing CMD55 followed 119 * by ACMD41 to read the OCR value from memory-only SD cards. 120 * MMC cards will not respond to CMD55 or ACMD41 and this is 121 * how we distinguish them from SD cards. 122 */ 123 mmc_mode: 124 error = sdmmc_mem_send_op_cond(sc, 125 ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) ? ocr : 0, &card_ocr); 126 if (error) { 127 if (ISSET(sc->sc_flags, SMF_SD_MODE) && 128 !ISSET(sc->sc_flags, SMF_IO_MODE)) { 129 /* Not a SD card, switch to MMC mode. */ 130 DPRINTF(("%s: switch to MMC mode\n", SDMMCDEVNAME(sc))); 131 CLR(sc->sc_flags, SMF_SD_MODE); 132 goto mmc_mode; 133 } 134 if (!ISSET(sc->sc_flags, SMF_SD_MODE)) { 135 DPRINTF(("%s: couldn't read memory OCR\n", 136 SDMMCDEVNAME(sc))); 137 goto out; 138 } else { 139 /* Not a "combo" card. */ 140 CLR(sc->sc_flags, SMF_MEM_MODE); 141 error = 0; 142 goto out; 143 } 144 } 145 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 146 /* get card OCR */ 147 error = sdmmc_mem_spi_read_ocr(sc, ocr, &card_ocr); 148 if (error) { 149 DPRINTF(("%s: couldn't read SPI memory OCR\n", 150 SDMMCDEVNAME(sc))); 151 goto out; 152 } 153 } 154 155 /* Set the lowest voltage supported by the card and host. */ 156 host_ocr = sdmmc_chip_host_ocr(sc->sc_sct, sc->sc_sch); 157 error = sdmmc_set_bus_power(sc, host_ocr, card_ocr); 158 if (error) { 159 DPRINTF(("%s: couldn't supply voltage requested by card\n", 160 SDMMCDEVNAME(sc))); 161 goto out; 162 } 163 host_ocr &= card_ocr; 164 host_ocr |= ocr; 165 166 /* Send the new OCR value until all cards are ready. */ 167 error = sdmmc_mem_send_op_cond(sc, host_ocr, NULL); 168 if (error) { 169 DPRINTF(("%s: couldn't send memory OCR\n", SDMMCDEVNAME(sc))); 170 goto out; 171 } 172 173 out: 174 SDMMC_UNLOCK(sc); 175 176 return error; 177 } 178 179 /* 180 * Read the CSD and CID from all cards and assign each card a unique 181 * relative card address (RCA). CMD2 is ignored by SDIO-only cards. 182 */ 183 void 184 sdmmc_mem_scan(struct sdmmc_softc *sc) 185 { 186 sdmmc_response resp; 187 struct sdmmc_function *sf; 188 uint16_t next_rca; 189 int error; 190 int retry; 191 192 SDMMC_LOCK(sc); 193 194 /* 195 * CMD2 is a broadcast command understood by SD cards and MMC 196 * cards. All cards begin to respond to the command, but back 197 * off if another card drives the CMD line to a different level. 198 * Only one card will get its entire response through. That 199 * card remains silent once it has been assigned a RCA. 200 */ 201 for (retry = 0; retry < 100; retry++) { 202 error = sdmmc_mem_send_cid(sc, &resp); 203 if (error) { 204 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) && 205 error == ETIMEDOUT) { 206 /* No more cards there. */ 207 break; 208 } 209 DPRINTF(("%s: couldn't read CID\n", SDMMCDEVNAME(sc))); 210 break; 211 } 212 213 /* In MMC mode, find the next available RCA. */ 214 next_rca = 1; 215 if (!ISSET(sc->sc_flags, SMF_SD_MODE)) { 216 SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) 217 next_rca++; 218 } 219 220 /* Allocate a sdmmc_function structure. */ 221 sf = sdmmc_function_alloc(sc); 222 sf->rca = next_rca; 223 224 /* 225 * Remember the CID returned in the CMD2 response for 226 * later decoding. 227 */ 228 memcpy(sf->raw_cid, resp, sizeof(sf->raw_cid)); 229 230 /* 231 * Silence the card by assigning it a unique RCA, or 232 * querying it for its RCA in the case of SD. 233 */ 234 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 235 if (sdmmc_set_relative_addr(sc, sf) != 0) { 236 aprint_error_dev(sc->sc_dev, 237 "couldn't set mem RCA\n"); 238 sdmmc_function_free(sf); 239 break; 240 } 241 } 242 243 /* 244 * If this is a memory-only card, the card responding 245 * first becomes an alias for SDIO function 0. 246 */ 247 if (sc->sc_fn0 == NULL) 248 sc->sc_fn0 = sf; 249 250 SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf, sf_list); 251 252 /* only one function in SPI mode */ 253 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 254 break; 255 } 256 257 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 258 /* Go to Data Transfer Mode, if possible. */ 259 sdmmc_chip_bus_rod(sc->sc_sct, sc->sc_sch, 0); 260 261 /* 262 * All cards are either inactive or awaiting further commands. 263 * Read the CSDs and decode the raw CID for each card. 264 */ 265 SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) { 266 error = sdmmc_mem_send_csd(sc, sf, &resp); 267 if (error) { 268 SET(sf->flags, SFF_ERROR); 269 continue; 270 } 271 272 if (sdmmc_decode_csd(sc, resp, sf) != 0 || 273 sdmmc_decode_cid(sc, sf->raw_cid, sf) != 0) { 274 SET(sf->flags, SFF_ERROR); 275 continue; 276 } 277 278 #ifdef SDMMC_DEBUG 279 printf("%s: CID: ", SDMMCDEVNAME(sc)); 280 sdmmc_print_cid(&sf->cid); 281 #endif 282 } 283 284 SDMMC_UNLOCK(sc); 285 } 286 287 int 288 sdmmc_decode_csd(struct sdmmc_softc *sc, sdmmc_response resp, 289 struct sdmmc_function *sf) 290 { 291 /* TRAN_SPEED(2:0): transfer rate exponent */ 292 static const int speed_exponent[8] = { 293 100 * 1, /* 100 Kbits/s */ 294 1 * 1000, /* 1 Mbits/s */ 295 10 * 1000, /* 10 Mbits/s */ 296 100 * 1000, /* 100 Mbits/s */ 297 0, 298 0, 299 0, 300 0, 301 }; 302 /* TRAN_SPEED(6:3): time mantissa */ 303 static const int speed_mantissa[16] = { 304 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80, 305 }; 306 struct sdmmc_csd *csd = &sf->csd; 307 int e, m; 308 309 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 310 /* 311 * CSD version 1.0 corresponds to SD system 312 * specification version 1.0 - 1.10. (SanDisk, 3.5.3) 313 */ 314 csd->csdver = SD_CSD_CSDVER(resp); 315 switch (csd->csdver) { 316 case SD_CSD_CSDVER_2_0: 317 DPRINTF(("%s: SD Ver.2.0\n", SDMMCDEVNAME(sc))); 318 SET(sf->flags, SFF_SDHC); 319 csd->capacity = SD_CSD_V2_CAPACITY(resp); 320 csd->read_bl_len = SD_CSD_V2_BL_LEN; 321 csd->ccc = SD_CSD_CCC(resp); 322 break; 323 324 case SD_CSD_CSDVER_1_0: 325 DPRINTF(("%s: SD Ver.1.0\n", SDMMCDEVNAME(sc))); 326 csd->capacity = SD_CSD_CAPACITY(resp); 327 csd->read_bl_len = SD_CSD_READ_BL_LEN(resp); 328 break; 329 330 default: 331 aprint_error_dev(sc->sc_dev, 332 "unknown SD CSD structure version 0x%x\n", 333 csd->csdver); 334 return 1; 335 } 336 337 csd->mmcver = SD_CSD_MMCVER(resp); 338 csd->write_bl_len = SD_CSD_WRITE_BL_LEN(resp); 339 csd->r2w_factor = SD_CSD_R2W_FACTOR(resp); 340 e = SD_CSD_SPEED_EXP(resp); 341 m = SD_CSD_SPEED_MANT(resp); 342 csd->tran_speed = speed_exponent[e] * speed_mantissa[m] / 10; 343 } else { 344 csd->csdver = MMC_CSD_CSDVER(resp); 345 if (csd->csdver != MMC_CSD_CSDVER_1_0 && 346 csd->csdver != MMC_CSD_CSDVER_2_0) { 347 aprint_error_dev(sc->sc_dev, 348 "unknown MMC CSD structure version 0x%x\n", 349 csd->csdver); 350 return 1; 351 } 352 353 csd->mmcver = MMC_CSD_MMCVER(resp); 354 csd->capacity = MMC_CSD_CAPACITY(resp); 355 csd->read_bl_len = MMC_CSD_READ_BL_LEN(resp); 356 csd->write_bl_len = MMC_CSD_WRITE_BL_LEN(resp); 357 csd->r2w_factor = MMC_CSD_R2W_FACTOR(resp); 358 e = MMC_CSD_TRAN_SPEED_EXP(resp); 359 m = MMC_CSD_TRAN_SPEED_MANT(resp); 360 csd->tran_speed = speed_exponent[e] * speed_mantissa[m] / 10; 361 } 362 if ((1 << csd->read_bl_len) > SDMMC_SECTOR_SIZE) 363 csd->capacity *= (1 << csd->read_bl_len) / SDMMC_SECTOR_SIZE; 364 365 #ifdef SDMMC_DUMP_CSD 366 sdmmc_print_csd(resp, csd); 367 #endif 368 369 return 0; 370 } 371 372 int 373 sdmmc_decode_cid(struct sdmmc_softc *sc, sdmmc_response resp, 374 struct sdmmc_function *sf) 375 { 376 struct sdmmc_cid *cid = &sf->cid; 377 378 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 379 cid->mid = SD_CID_MID(resp); 380 cid->oid = SD_CID_OID(resp); 381 SD_CID_PNM_CPY(resp, cid->pnm); 382 cid->rev = SD_CID_REV(resp); 383 cid->psn = SD_CID_PSN(resp); 384 cid->mdt = SD_CID_MDT(resp); 385 } else { 386 switch(sf->csd.mmcver) { 387 case MMC_CSD_MMCVER_1_0: 388 case MMC_CSD_MMCVER_1_4: 389 cid->mid = MMC_CID_MID_V1(resp); 390 MMC_CID_PNM_V1_CPY(resp, cid->pnm); 391 cid->rev = MMC_CID_REV_V1(resp); 392 cid->psn = MMC_CID_PSN_V1(resp); 393 cid->mdt = MMC_CID_MDT_V1(resp); 394 break; 395 case MMC_CSD_MMCVER_2_0: 396 case MMC_CSD_MMCVER_3_1: 397 case MMC_CSD_MMCVER_4_0: 398 cid->mid = MMC_CID_MID_V2(resp); 399 cid->oid = MMC_CID_OID_V2(resp); 400 MMC_CID_PNM_V2_CPY(resp, cid->pnm); 401 cid->psn = MMC_CID_PSN_V2(resp); 402 break; 403 default: 404 aprint_error_dev(sc->sc_dev, "unknown MMC version %d\n", 405 sf->csd.mmcver); 406 return 1; 407 } 408 } 409 return 0; 410 } 411 412 void 413 sdmmc_print_cid(struct sdmmc_cid *cid) 414 { 415 416 printf("mid=0x%02x oid=0x%04x pnm=\"%s\" rev=0x%02x psn=0x%08x" 417 " mdt=%03x\n", cid->mid, cid->oid, cid->pnm, cid->rev, cid->psn, 418 cid->mdt); 419 } 420 421 #ifdef SDMMC_DUMP_CSD 422 void 423 sdmmc_print_csd(sdmmc_response resp, struct sdmmc_csd *csd) 424 { 425 426 printf("csdver = %d\n", csd->csdver); 427 printf("mmcver = %d\n", csd->mmcver); 428 printf("capacity = %08x\n", csd->capacity); 429 printf("read_bl_len = %d\n", csd->read_bl_len); 430 printf("write_cl_len = %d\n", csd->write_bl_len); 431 printf("r2w_factor = %d\n", csd->r2w_factor); 432 printf("tran_speed = %d\n", csd->tran_speed); 433 } 434 #endif 435 436 /* 437 * Initialize a SD/MMC memory card. 438 */ 439 int 440 sdmmc_mem_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 441 { 442 int error = 0; 443 444 SDMMC_LOCK(sc); 445 446 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 447 error = sdmmc_select_card(sc, sf); 448 if (error) 449 goto out; 450 } 451 452 if (!ISSET(sf->flags, SFF_SDHC)) { 453 error = sdmmc_mem_set_blocklen(sc, sf); 454 if (error) 455 goto out; 456 } 457 458 if (ISSET(sc->sc_flags, SMF_SD_MODE)) 459 error = sdmmc_mem_sd_init(sc, sf); 460 else 461 error = sdmmc_mem_mmc_init(sc, sf); 462 463 out: 464 SDMMC_UNLOCK(sc); 465 466 return error; 467 } 468 469 /* 470 * Get or set the card's memory OCR value (SD or MMC). 471 */ 472 int 473 sdmmc_mem_send_op_cond(struct sdmmc_softc *sc, uint32_t ocr, uint32_t *ocrp) 474 { 475 struct sdmmc_command cmd; 476 int error; 477 int retry; 478 479 /* Don't lock */ 480 481 /* 482 * If we change the OCR value, retry the command until the OCR 483 * we receive in response has the "CARD BUSY" bit set, meaning 484 * that all cards are ready for identification. 485 */ 486 for (retry = 0; retry < 100; retry++) { 487 memset(&cmd, 0, sizeof(cmd)); 488 cmd.c_arg = !ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) ? 489 ocr : (ocr & MMC_OCR_HCS); 490 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R3 | SCF_RSP_SPI_R1; 491 492 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 493 cmd.c_opcode = SD_APP_OP_COND; 494 error = sdmmc_app_command(sc, NULL, &cmd); 495 } else { 496 cmd.c_opcode = MMC_SEND_OP_COND; 497 error = sdmmc_mmc_command(sc, &cmd); 498 } 499 if (error) 500 break; 501 502 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 503 if (!ISSET(MMC_SPI_R1(cmd.c_resp), R1_SPI_IDLE)) 504 break; 505 } else { 506 if (ISSET(MMC_R3(cmd.c_resp), MMC_OCR_MEM_READY) || 507 ocr == 0) 508 break; 509 } 510 511 error = ETIMEDOUT; 512 sdmmc_delay(10000); 513 } 514 if (error == 0 && 515 ocrp != NULL && 516 !ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 517 *ocrp = MMC_R3(cmd.c_resp); 518 DPRINTF(("%s: sdmmc_mem_send_op_cond: error=%d, ocr=%#x\n", 519 SDMMCDEVNAME(sc), error, MMC_R3(cmd.c_resp))); 520 return error; 521 } 522 523 int 524 sdmmc_mem_send_if_cond(struct sdmmc_softc *sc, uint32_t ocr, uint32_t *ocrp) 525 { 526 struct sdmmc_command cmd; 527 int error; 528 529 /* Don't lock */ 530 531 memset(&cmd, 0, sizeof(cmd)); 532 cmd.c_arg = ocr; 533 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R7 | SCF_RSP_SPI_R7; 534 cmd.c_opcode = SD_SEND_IF_COND; 535 536 error = sdmmc_mmc_command(sc, &cmd); 537 if (error == 0 && ocrp != NULL) { 538 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 539 *ocrp = MMC_SPI_R7(cmd.c_resp); 540 } else { 541 *ocrp = MMC_R7(cmd.c_resp); 542 } 543 DPRINTF(("%s: sdmmc_mem_send_if_cond: error=%d, ocr=%#x\n", 544 SDMMCDEVNAME(sc), error, *ocrp)); 545 } 546 return error; 547 } 548 549 /* 550 * Set the read block length appropriately for this card, according to 551 * the card CSD register value. 552 */ 553 int 554 sdmmc_mem_set_blocklen(struct sdmmc_softc *sc, struct sdmmc_function *sf) 555 { 556 struct sdmmc_command cmd; 557 int error; 558 559 /* Don't lock */ 560 561 memset(&cmd, 0, sizeof(cmd)); 562 cmd.c_opcode = MMC_SET_BLOCKLEN; 563 cmd.c_arg = SDMMC_SECTOR_SIZE; 564 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R1; 565 566 error = sdmmc_mmc_command(sc, &cmd); 567 568 DPRINTF(("%s: sdmmc_mem_set_blocklen: read_bl_len=%d sector_size=%d\n", 569 SDMMCDEVNAME(sc), 1 << sf->csd.read_bl_len, SDMMC_SECTOR_SIZE)); 570 571 return error; 572 } 573 574 static int 575 sdmmc_mem_sd_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 576 { 577 struct { 578 int v; 579 int freq; 580 } switch_group0_functions [] = { 581 /* Default/SDR12 */ 582 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V | 583 MMC_OCR_3_2V_3_3V | MMC_OCR_3_3V_3_4V, 25000 }, 584 585 /* High-Speed/SDR25 */ 586 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V | 587 MMC_OCR_3_2V_3_3V | MMC_OCR_3_3V_3_4V, 50000 }, 588 589 /* SDR50 */ 590 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V, 100000 }, 591 592 /* SDR104 */ 593 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V, 208000 }, 594 595 /* DDR50 */ 596 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V, 50000 }, 597 }; 598 int host_ocr, support_func, best_func, error, g, i; 599 char status[64]; 600 601 error = sdmmc_mem_send_scr(sc, sf, sf->raw_scr); 602 if (error) { 603 aprint_error_dev(sc->sc_dev, "SD_SEND_SCR send failed.\n"); 604 return error; 605 } 606 error = sdmmc_mem_decode_scr(sc, sf); 607 if (error) 608 return error; 609 610 if (ISSET(sc->sc_caps, SMC_CAPS_4BIT_MODE) && 611 ISSET(sf->scr.bus_width, SCR_SD_BUS_WIDTHS_4BIT)) { 612 error = sdmmc_set_bus_width(sf, 4); 613 if (error) { 614 aprint_error_dev(sc->sc_dev, 615 "can't change bus width (%d bit)\n", 4); 616 return error; 617 } 618 sf->width = 4; 619 } else 620 sf->width = 1; 621 622 if (sf->scr.sd_spec >= SCR_SD_SPEC_VER_1_10 && 623 ISSET(sf->csd.ccc, SD_CSD_CCC_SWITCH)) { 624 error = sdmmc_mem_sd_switch(sf, 0, 1, 0, status); 625 if (error) { 626 aprint_error_dev(sc->sc_dev, 627 "switch func mode 0 failed\n"); 628 return error; 629 } 630 631 host_ocr = sdmmc_chip_host_ocr(sc->sc_sct, sc->sc_sch); 632 support_func = SFUNC_STATUS_GROUP(status, 1); 633 best_func = 0; 634 for (i = 0, g = 1; 635 i < __arraycount(switch_group0_functions); i++, g <<= 1) { 636 if (!(switch_group0_functions[i].v & host_ocr)) 637 continue; 638 if (g & support_func) 639 best_func = i; 640 } 641 if (best_func != 0) { 642 error = 643 sdmmc_mem_sd_switch(sf, 1, 1, best_func, status); 644 if (error) { 645 aprint_error_dev(sc->sc_dev, 646 "switch func mode 1 failed:" 647 " group 1 function %d(0x%2x)\n", 648 best_func, support_func); 649 return error; 650 } 651 sf->csd.tran_speed = 652 switch_group0_functions[best_func].freq; 653 654 /* Wait 400KHz x 8 clock */ 655 delay(1); 656 if (sc->sc_busclk > sf->csd.tran_speed) 657 sc->sc_busclk = sf->csd.tran_speed; 658 659 error = sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, 660 sc->sc_busclk); 661 if (error) { 662 aprint_error_dev(sc->sc_dev, 663 "can't change bus clock\n"); 664 return error; 665 } 666 } else 667 if (sc->sc_busclk > sf->csd.tran_speed) 668 sc->sc_busclk = sf->csd.tran_speed; 669 } 670 671 return 0; 672 } 673 674 static int 675 sdmmc_mem_mmc_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 676 { 677 int width, value, hs_timing, error; 678 char ext_csd[512]; 679 680 if (sf->csd.mmcver >= MMC_CSD_MMCVER_4_0) { 681 error = sdmmc_mem_send_cxd_data(sc, 682 MMC_SEND_EXT_CSD, ext_csd, sizeof(ext_csd)); 683 if (error) { 684 aprint_error_dev(sc->sc_dev, "can't read EXT_CSD\n"); 685 return error; 686 } 687 if (ext_csd[EXT_CSD_STRUCTURE] > EXT_CSD_STRUCTURE_VER_1_2) { 688 aprint_error_dev(sc->sc_dev, 689 "unrecognised future version\n"); 690 return error; 691 } 692 hs_timing = 0; 693 switch (ext_csd[EXT_CSD_CARD_TYPE]) { 694 case EXT_CSD_CARD_TYPE_26M: 695 sf->csd.tran_speed = 26000; /* 26MHz */ 696 break; 697 698 case EXT_CSD_CARD_TYPE_52M | EXT_CSD_CARD_TYPE_26M: 699 sf->csd.tran_speed = 52000; /* 52MHz */ 700 hs_timing = 1; 701 702 error = sdmmc_mem_mmc_switch(sf, EXT_CSD_CMD_SET_NORMAL, 703 EXT_CSD_HS_TIMING, hs_timing); 704 if (error) { 705 aprint_error_dev(sc->sc_dev, 706 "can't change high speed\n"); 707 return error; 708 } 709 break; 710 711 default: 712 aprint_error_dev(sc->sc_dev, 713 "unknwon CARD_TYPE: 0x%x\n", 714 ext_csd[EXT_CSD_CARD_TYPE]); 715 return error; 716 } 717 if (sc->sc_busclk > sf->csd.tran_speed) 718 sc->sc_busclk = sf->csd.tran_speed; 719 error = 720 sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, sc->sc_busclk); 721 if (error) { 722 aprint_error_dev(sc->sc_dev, 723 "can't change bus clock\n"); 724 return error; 725 } 726 if (hs_timing) { 727 error = sdmmc_mem_send_cxd_data(sc, 728 MMC_SEND_EXT_CSD, ext_csd, sizeof(ext_csd)); 729 if (error) { 730 aprint_error_dev(sc->sc_dev, 731 "can't re-read EXT_CSD\n"); 732 return error; 733 } 734 if (ext_csd[EXT_CSD_HS_TIMING] != hs_timing) { 735 aprint_error_dev(sc->sc_dev, 736 "HS_TIMING set failed\n"); 737 return EINVAL; 738 } 739 } 740 741 if (ISSET(sc->sc_caps, SMC_CAPS_8BIT_MODE)) { 742 width = 8; 743 value = EXT_CSD_BUS_WIDTH_8; 744 } else if (ISSET(sc->sc_caps, SMC_CAPS_4BIT_MODE)) { 745 width = 4; 746 value = EXT_CSD_BUS_WIDTH_4; 747 } else { 748 width = 1; 749 value = EXT_CSD_BUS_WIDTH_1; 750 } 751 752 if (width != 1) { 753 error = sdmmc_mem_mmc_switch(sf, EXT_CSD_CMD_SET_NORMAL, 754 EXT_CSD_BUS_WIDTH, value); 755 if (error == 0) 756 error = sdmmc_chip_bus_width(sc->sc_sct, 757 sc->sc_sch, width); 758 else { 759 DPRINTF(("%s: can't change bus width" 760 " (%d bit)\n", SDMMCDEVNAME(sc), width)); 761 return error; 762 } 763 764 /* XXXX: need bus test? (using by CMD14 & CMD19) */ 765 } 766 sf->width = width; 767 } else { 768 if (sc->sc_busclk > sf->csd.tran_speed) 769 sc->sc_busclk = sf->csd.tran_speed; 770 error = 771 sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, sc->sc_busclk); 772 if (error) { 773 aprint_error_dev(sc->sc_dev, 774 "can't change bus clock\n"); 775 return error; 776 } 777 sf->width = 1; 778 } 779 780 return 0; 781 } 782 783 static int 784 sdmmc_mem_send_cid(struct sdmmc_softc *sc, sdmmc_response *resp) 785 { 786 struct sdmmc_command cmd; 787 int error; 788 789 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 790 memset(&cmd, 0, sizeof cmd); 791 cmd.c_opcode = MMC_ALL_SEND_CID; 792 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R2; 793 794 error = sdmmc_mmc_command(sc, &cmd); 795 } else { 796 error = sdmmc_mem_send_cxd_data(sc, MMC_SEND_CID, &cmd.c_resp, 797 sizeof(cmd.c_resp)); 798 } 799 800 #ifdef SDMMC_DEBUG 801 sdmmc_dump_data("CID", cmd.c_resp, sizeof(cmd.c_resp)); 802 #endif 803 if (error == 0 && resp != NULL) 804 memcpy(resp, &cmd.c_resp, sizeof(*resp)); 805 return error; 806 } 807 808 static int 809 sdmmc_mem_send_csd(struct sdmmc_softc *sc, struct sdmmc_function *sf, 810 sdmmc_response *resp) 811 { 812 struct sdmmc_command cmd; 813 int error; 814 815 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 816 memset(&cmd, 0, sizeof cmd); 817 cmd.c_opcode = MMC_SEND_CSD; 818 cmd.c_arg = MMC_ARG_RCA(sf->rca); 819 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R2; 820 821 error = sdmmc_mmc_command(sc, &cmd); 822 } else { 823 error = sdmmc_mem_send_cxd_data(sc, MMC_SEND_CSD, &cmd.c_resp, 824 sizeof(cmd.c_resp)); 825 } 826 827 #ifdef SDMMC_DEBUG 828 sdmmc_dump_data("CSD", cmd.c_resp, sizeof(cmd.c_resp)); 829 #endif 830 if (error == 0 && resp != NULL) 831 memcpy(resp, &cmd.c_resp, sizeof(*resp)); 832 return error; 833 } 834 835 static int 836 sdmmc_mem_send_scr(struct sdmmc_softc *sc, struct sdmmc_function *sf, 837 uint32_t scr[2]) 838 { 839 struct sdmmc_command cmd; 840 bus_dma_segment_t ds[1]; 841 void *ptr = NULL; 842 int datalen = 8; 843 int rseg; 844 int error = 0; 845 846 /* Don't lock */ 847 848 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 849 error = bus_dmamem_alloc(sc->sc_dmat, datalen, PAGE_SIZE, 0, 850 ds, 1, &rseg, BUS_DMA_NOWAIT); 851 if (error) 852 goto out; 853 error = bus_dmamem_map(sc->sc_dmat, ds, 1, datalen, &ptr, 854 BUS_DMA_NOWAIT); 855 if (error) 856 goto dmamem_free; 857 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, ptr, datalen, 858 NULL, BUS_DMA_NOWAIT|BUS_DMA_STREAMING|BUS_DMA_READ); 859 if (error) 860 goto dmamem_unmap; 861 862 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 863 BUS_DMASYNC_PREREAD); 864 } else { 865 ptr = malloc(datalen, M_DEVBUF, M_NOWAIT | M_ZERO); 866 if (ptr == NULL) 867 goto out; 868 } 869 870 memset(&cmd, 0, sizeof(cmd)); 871 cmd.c_data = ptr; 872 cmd.c_datalen = datalen; 873 cmd.c_blklen = datalen; 874 cmd.c_arg = 0; 875 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1 | SCF_RSP_SPI_R1; 876 cmd.c_opcode = SD_APP_SEND_SCR; 877 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 878 cmd.c_dmamap = sc->sc_dmap; 879 880 error = sdmmc_app_command(sc, sf, &cmd); 881 if (error == 0) { 882 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 883 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 884 BUS_DMASYNC_POSTREAD); 885 } 886 memcpy(scr, ptr, datalen); 887 } 888 889 out: 890 if (ptr != NULL) { 891 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 892 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 893 dmamem_unmap: 894 bus_dmamem_unmap(sc->sc_dmat, ptr, datalen); 895 dmamem_free: 896 bus_dmamem_free(sc->sc_dmat, ds, rseg); 897 } else { 898 free(ptr, M_DEVBUF); 899 } 900 } 901 DPRINTF(("%s: sdmem_mem_send_scr: error = %d\n", SDMMCDEVNAME(sc), 902 error)); 903 904 #ifdef SDMMC_DEBUG 905 if (error == 0) 906 sdmmc_dump_data("SCR", scr, 8); 907 #endif 908 return error; 909 } 910 911 static int 912 sdmmc_mem_decode_scr(struct sdmmc_softc *sc, struct sdmmc_function *sf) 913 { 914 sdmmc_response resp; 915 int ver; 916 917 memset(resp, 0, sizeof(resp)); 918 /* 919 * Change the raw-scr received from the DMA stream to resp. 920 */ 921 resp[0] = be32toh(sf->raw_scr[1]); 922 resp[1] = be32toh(sf->raw_scr[0]) >> 8; 923 924 ver = SCR_STRUCTURE(resp); 925 sf->scr.sd_spec = SCR_SD_SPEC(resp); 926 sf->scr.bus_width = SCR_SD_BUS_WIDTHS(resp); 927 928 DPRINTF(("%s: sdmmc_mem_decode_scr: spec=%d, bus width=%d\n", 929 SDMMCDEVNAME(sc), sf->scr.sd_spec, sf->scr.bus_width)); 930 931 if (ver != 0) { 932 DPRINTF(("%s: unknown structure version: %d\n", 933 SDMMCDEVNAME(sc), ver)); 934 return EINVAL; 935 } 936 return 0; 937 } 938 939 static int 940 sdmmc_mem_send_cxd_data(struct sdmmc_softc *sc, int opcode, void *data, 941 size_t datalen) 942 { 943 struct sdmmc_command cmd; 944 bus_dma_segment_t ds[1]; 945 void *ptr = NULL; 946 int rseg; 947 int error = 0; 948 949 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 950 error = bus_dmamem_alloc(sc->sc_dmat, datalen, PAGE_SIZE, 0, ds, 951 1, &rseg, BUS_DMA_NOWAIT); 952 if (error) 953 goto out; 954 error = bus_dmamem_map(sc->sc_dmat, ds, 1, datalen, &ptr, 955 BUS_DMA_NOWAIT); 956 if (error) 957 goto dmamem_free; 958 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, ptr, datalen, 959 NULL, BUS_DMA_NOWAIT|BUS_DMA_STREAMING|BUS_DMA_READ); 960 if (error) 961 goto dmamem_unmap; 962 963 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 964 BUS_DMASYNC_PREREAD); 965 } else { 966 ptr = malloc(datalen, M_DEVBUF, M_NOWAIT | M_ZERO); 967 if (ptr == NULL) 968 goto out; 969 } 970 971 memset(&cmd, 0, sizeof(cmd)); 972 cmd.c_data = ptr; 973 cmd.c_datalen = datalen; 974 cmd.c_blklen = datalen; 975 cmd.c_opcode = opcode; 976 cmd.c_arg = 0; 977 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_SPI_R1; 978 if (opcode == MMC_SEND_EXT_CSD) 979 SET(cmd.c_flags, SCF_RSP_R1); 980 else 981 SET(cmd.c_flags, SCF_RSP_R2); 982 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 983 cmd.c_dmamap = sc->sc_dmap; 984 985 error = sdmmc_mmc_command(sc, &cmd); 986 if (error == 0) { 987 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 988 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 989 BUS_DMASYNC_POSTREAD); 990 } 991 memcpy(data, ptr, datalen); 992 } 993 994 out: 995 if (ptr != NULL) { 996 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 997 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 998 dmamem_unmap: 999 bus_dmamem_unmap(sc->sc_dmat, ptr, datalen); 1000 dmamem_free: 1001 bus_dmamem_free(sc->sc_dmat, ds, rseg); 1002 } else { 1003 free(ptr, M_DEVBUF); 1004 } 1005 } 1006 return error; 1007 } 1008 1009 static int 1010 sdmmc_set_bus_width(struct sdmmc_function *sf, int width) 1011 { 1012 struct sdmmc_softc *sc = sf->sc; 1013 struct sdmmc_command cmd; 1014 int error; 1015 1016 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 1017 return ENODEV; 1018 1019 memset(&cmd, 0, sizeof(cmd)); 1020 cmd.c_opcode = SD_APP_SET_BUS_WIDTH; 1021 cmd.c_flags = SCF_RSP_R1 | SCF_CMD_AC; 1022 1023 switch (width) { 1024 case 1: 1025 cmd.c_arg = SD_ARG_BUS_WIDTH_1; 1026 break; 1027 1028 case 4: 1029 cmd.c_arg = SD_ARG_BUS_WIDTH_4; 1030 break; 1031 1032 default: 1033 return EINVAL; 1034 } 1035 1036 error = sdmmc_app_command(sc, sf, &cmd); 1037 if (error == 0) 1038 error = sdmmc_chip_bus_width(sc->sc_sct, sc->sc_sch, width); 1039 return error; 1040 } 1041 1042 static int 1043 sdmmc_mem_sd_switch(struct sdmmc_function *sf, int mode, int group, 1044 int function, void *status) 1045 { 1046 struct sdmmc_softc *sc = sf->sc; 1047 struct sdmmc_command cmd; 1048 bus_dma_segment_t ds[1]; 1049 void *ptr = NULL; 1050 int gsft, rseg, error = 0; 1051 const int statlen = 64; 1052 1053 if (sf->scr.sd_spec >= SCR_SD_SPEC_VER_1_10 && 1054 !ISSET(sf->csd.ccc, SD_CSD_CCC_SWITCH)) 1055 return EINVAL; 1056 1057 if (group <= 0 || group > 6 || 1058 function < 0 || function > 16) 1059 return EINVAL; 1060 1061 gsft = (group - 1) << 2; 1062 1063 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1064 error = bus_dmamem_alloc(sc->sc_dmat, statlen, PAGE_SIZE, 0, ds, 1065 1, &rseg, BUS_DMA_NOWAIT); 1066 if (error) 1067 goto out; 1068 error = bus_dmamem_map(sc->sc_dmat, ds, 1, statlen, &ptr, 1069 BUS_DMA_NOWAIT); 1070 if (error) 1071 goto dmamem_free; 1072 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, ptr, statlen, 1073 NULL, BUS_DMA_NOWAIT|BUS_DMA_STREAMING|BUS_DMA_READ); 1074 if (error) 1075 goto dmamem_unmap; 1076 1077 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, statlen, 1078 BUS_DMASYNC_PREREAD); 1079 } else { 1080 ptr = malloc(statlen, M_DEVBUF, M_NOWAIT | M_ZERO); 1081 if (ptr == NULL) 1082 goto out; 1083 } 1084 1085 memset(&cmd, 0, sizeof(cmd)); 1086 cmd.c_data = ptr; 1087 cmd.c_datalen = statlen; 1088 cmd.c_blklen = statlen; 1089 cmd.c_opcode = SD_SEND_SWITCH_FUNC; 1090 cmd.c_arg = 1091 (!!mode << 31) | (function << gsft) | (0x00ffffff & ~(0xf << gsft)); 1092 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1 | SCF_RSP_SPI_R1; 1093 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 1094 cmd.c_dmamap = sc->sc_dmap; 1095 1096 error = sdmmc_mmc_command(sc, &cmd); 1097 if (error == 0) { 1098 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1099 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, statlen, 1100 BUS_DMASYNC_POSTREAD); 1101 } 1102 memcpy(status, ptr, statlen); 1103 } 1104 1105 out: 1106 if (ptr != NULL) { 1107 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1108 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1109 dmamem_unmap: 1110 bus_dmamem_unmap(sc->sc_dmat, ptr, statlen); 1111 dmamem_free: 1112 bus_dmamem_free(sc->sc_dmat, ds, rseg); 1113 } else { 1114 free(ptr, M_DEVBUF); 1115 } 1116 } 1117 return error; 1118 } 1119 1120 static int 1121 sdmmc_mem_mmc_switch(struct sdmmc_function *sf, uint8_t set, uint8_t index, 1122 uint8_t value) 1123 { 1124 struct sdmmc_softc *sc = sf->sc; 1125 struct sdmmc_command cmd; 1126 1127 memset(&cmd, 0, sizeof(cmd)); 1128 cmd.c_opcode = MMC_SWITCH; 1129 cmd.c_arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | 1130 (index << 16) | (value << 8) | set; 1131 cmd.c_flags = SCF_RSP_SPI_R1B | SCF_RSP_R1B | SCF_CMD_AC; 1132 1133 return sdmmc_mmc_command(sc, &cmd); 1134 } 1135 1136 /* 1137 * SPI mode function 1138 */ 1139 static int 1140 sdmmc_mem_spi_read_ocr(struct sdmmc_softc *sc, uint32_t hcs, uint32_t *card_ocr) 1141 { 1142 struct sdmmc_command cmd; 1143 int error; 1144 1145 memset(&cmd, 0, sizeof(cmd)); 1146 cmd.c_opcode = MMC_READ_OCR; 1147 cmd.c_arg = hcs ? MMC_OCR_HCS : 0; 1148 cmd.c_flags = SCF_RSP_SPI_R3; 1149 1150 error = sdmmc_mmc_command(sc, &cmd); 1151 if (error == 0 && card_ocr != NULL) 1152 *card_ocr = cmd.c_resp[1]; 1153 DPRINTF(("%s: sdmmc_mem_spi_read_ocr: error=%d, ocr=%#x\n", 1154 SDMMCDEVNAME(sc), error, cmd.c_resp[1])); 1155 return error; 1156 } 1157 1158 /* 1159 * read/write function 1160 */ 1161 /* read */ 1162 static int 1163 sdmmc_mem_single_read_block(struct sdmmc_function *sf, uint32_t blkno, 1164 u_char *data, size_t datalen) 1165 { 1166 struct sdmmc_softc *sc __unused = sf->sc; 1167 int error = 0; 1168 int i; 1169 1170 KASSERT((datalen % SDMMC_SECTOR_SIZE) == 0); 1171 KASSERT(!ISSET(sc->sc_caps, SMC_CAPS_DMA)); 1172 1173 for (i = 0; i < datalen / SDMMC_SECTOR_SIZE; i++) { 1174 error = sdmmc_mem_read_block_subr(sf, blkno + i, 1175 data + i * SDMMC_SECTOR_SIZE, SDMMC_SECTOR_SIZE); 1176 if (error) 1177 break; 1178 } 1179 return error; 1180 } 1181 1182 static int 1183 sdmmc_mem_read_block_subr(struct sdmmc_function *sf, uint32_t blkno, 1184 u_char *data, size_t datalen) 1185 { 1186 struct sdmmc_softc *sc = sf->sc; 1187 struct sdmmc_command cmd; 1188 int error, bbuf, seg, off, len, num; 1189 1190 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1191 error = sdmmc_select_card(sc, sf); 1192 if (error) 1193 goto out; 1194 } 1195 1196 bbuf = 0; 1197 num = 0; 1198 seg = off = len = 0; 1199 retry: 1200 memset(&cmd, 0, sizeof(cmd)); 1201 cmd.c_data = data; 1202 cmd.c_datalen = datalen; 1203 cmd.c_blklen = SDMMC_SECTOR_SIZE; 1204 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1205 MMC_READ_BLOCK_MULTIPLE : MMC_READ_BLOCK_SINGLE; 1206 cmd.c_arg = blkno; 1207 if (!ISSET(sf->flags, SFF_SDHC)) 1208 cmd.c_arg <<= SDMMC_SECTOR_SIZE_SB; 1209 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1 | SCF_RSP_SPI_R1; 1210 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1211 cmd.c_dmamap = sc->sc_dmap; 1212 if (!ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1213 len = sc->sc_dmap->dm_segs[seg].ds_len - off; 1214 len &= ~(SDMMC_SECTOR_SIZE - 1); 1215 cmd.c_datalen = len; 1216 cmd.c_dmaseg = seg; 1217 cmd.c_dmaoff = off; 1218 bbuf = 0; 1219 if (len == 0) { 1220 /* Use bounce buffer */ 1221 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 1222 0, SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREREAD); 1223 cmd.c_datalen = SDMMC_SECTOR_SIZE; 1224 cmd.c_dmamap = sf->bbuf_dmap; 1225 cmd.c_dmaseg = 0; 1226 cmd.c_dmaoff = 0; 1227 bbuf = 1; 1228 len = SDMMC_SECTOR_SIZE; 1229 } 1230 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1231 MMC_READ_BLOCK_MULTIPLE : MMC_READ_BLOCK_SINGLE; 1232 } 1233 } 1234 1235 error = sdmmc_mmc_command(sc, &cmd); 1236 if (error) 1237 goto out; 1238 1239 if (!ISSET(sc->sc_caps, SMC_CAPS_AUTO_STOP)) { 1240 if (cmd.c_opcode == MMC_READ_BLOCK_MULTIPLE) { 1241 memset(&cmd, 0, sizeof cmd); 1242 cmd.c_opcode = MMC_STOP_TRANSMISSION; 1243 cmd.c_arg = MMC_ARG_RCA(sf->rca); 1244 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1B | SCF_RSP_SPI_R1B; 1245 error = sdmmc_mmc_command(sc, &cmd); 1246 if (error) 1247 goto out; 1248 } 1249 } 1250 1251 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1252 do { 1253 memset(&cmd, 0, sizeof(cmd)); 1254 cmd.c_opcode = MMC_SEND_STATUS; 1255 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 1256 cmd.c_arg = MMC_ARG_RCA(sf->rca); 1257 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R2; 1258 error = sdmmc_mmc_command(sc, &cmd); 1259 if (error) 1260 break; 1261 /* XXX time out */ 1262 } while (!ISSET(MMC_R1(cmd.c_resp), MMC_R1_READY_FOR_DATA)); 1263 } 1264 1265 if (ISSET(sc->sc_caps, SMC_CAPS_DMA) && 1266 !ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1267 bus_dma_segment_t *dm_segs = sc->sc_dmap->dm_segs; 1268 1269 if (bbuf) { 1270 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 1271 0, SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTREAD); 1272 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1273 SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTREAD); 1274 memcpy(data, sf->bbuf, SDMMC_SECTOR_SIZE); 1275 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1276 SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREREAD); 1277 } 1278 num += len; 1279 data += len; 1280 datalen -= len; 1281 blkno += (len / SDMMC_SECTOR_SIZE); 1282 1283 while (off + len >= dm_segs[seg].ds_len) { 1284 len -= dm_segs[seg++].ds_len; 1285 off = 0; 1286 } 1287 off += len; 1288 1289 if (seg < sc->sc_dmap->dm_nsegs) 1290 goto retry; 1291 } 1292 1293 out: 1294 return error; 1295 } 1296 1297 int 1298 sdmmc_mem_read_block(struct sdmmc_function *sf, uint32_t blkno, u_char *data, 1299 size_t datalen) 1300 { 1301 struct sdmmc_softc *sc = sf->sc; 1302 int error; 1303 1304 SDMMC_LOCK(sc); 1305 1306 if (ISSET(sc->sc_caps, SMC_CAPS_SINGLE_ONLY)) { 1307 error = sdmmc_mem_single_read_block(sf, blkno, data, datalen); 1308 goto out; 1309 } 1310 1311 if (!ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1312 error = sdmmc_mem_read_block_subr(sf, blkno, data, datalen); 1313 goto out; 1314 } 1315 1316 /* DMA transfer */ 1317 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, data, datalen, NULL, 1318 BUS_DMA_NOWAIT|BUS_DMA_READ); 1319 if (error) 1320 goto out; 1321 1322 #ifdef SDMMC_DEBUG 1323 for (int i = 0; i < sc->sc_dmap->dm_nsegs; i++) { 1324 printf("seg#%d: addr=%#lx, size=%#lx\n", i, 1325 (u_long)sc->sc_dmap->dm_segs[i].ds_addr, 1326 (u_long)sc->sc_dmap->dm_segs[i].ds_len); 1327 } 1328 #endif 1329 1330 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1331 BUS_DMASYNC_PREREAD); 1332 1333 error = sdmmc_mem_read_block_subr(sf, blkno, data, datalen); 1334 if (error) 1335 goto unload; 1336 1337 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1338 BUS_DMASYNC_POSTREAD); 1339 unload: 1340 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1341 1342 out: 1343 SDMMC_UNLOCK(sc); 1344 1345 return error; 1346 } 1347 1348 /* write */ 1349 static int 1350 sdmmc_mem_single_write_block(struct sdmmc_function *sf, uint32_t blkno, 1351 u_char *data, size_t datalen) 1352 { 1353 struct sdmmc_softc *sc __unused = sf->sc; 1354 int error = 0; 1355 int i; 1356 1357 KASSERT((datalen % SDMMC_SECTOR_SIZE) == 0); 1358 KASSERT(!ISSET(sc->sc_caps, SMC_CAPS_DMA)); 1359 1360 for (i = 0; i < datalen / SDMMC_SECTOR_SIZE; i++) { 1361 error = sdmmc_mem_write_block_subr(sf, blkno + i, 1362 data + i * SDMMC_SECTOR_SIZE, SDMMC_SECTOR_SIZE); 1363 if (error) 1364 break; 1365 } 1366 return error; 1367 } 1368 1369 static int 1370 sdmmc_mem_write_block_subr(struct sdmmc_function *sf, uint32_t blkno, 1371 u_char *data, size_t datalen) 1372 { 1373 struct sdmmc_softc *sc = sf->sc; 1374 struct sdmmc_command cmd; 1375 int error, bbuf, seg, off, len, num; 1376 1377 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1378 error = sdmmc_select_card(sc, sf); 1379 if (error) 1380 goto out; 1381 } 1382 1383 bbuf = 0; 1384 num = 0; 1385 seg = off = len = 0; 1386 retry: 1387 memset(&cmd, 0, sizeof(cmd)); 1388 cmd.c_data = data; 1389 cmd.c_datalen = datalen; 1390 cmd.c_blklen = SDMMC_SECTOR_SIZE; 1391 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1392 MMC_WRITE_BLOCK_MULTIPLE : MMC_WRITE_BLOCK_SINGLE; 1393 cmd.c_arg = blkno; 1394 if (!ISSET(sf->flags, SFF_SDHC)) 1395 cmd.c_arg <<= SDMMC_SECTOR_SIZE_SB; 1396 cmd.c_flags = SCF_CMD_ADTC | SCF_RSP_R1; 1397 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1398 cmd.c_dmamap = sc->sc_dmap; 1399 if (!ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1400 len = sc->sc_dmap->dm_segs[seg].ds_len - off; 1401 len &= ~(SDMMC_SECTOR_SIZE - 1); 1402 cmd.c_datalen = len; 1403 cmd.c_dmaseg = seg; 1404 cmd.c_dmaoff = off; 1405 bbuf = 0; 1406 if (len == 0) { 1407 /* Use bounce buffer */ 1408 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1409 SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTWRITE); 1410 memcpy(sf->bbuf, data, SDMMC_SECTOR_SIZE); 1411 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1412 SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREWRITE); 1413 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 0, 1414 SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREWRITE); 1415 cmd.c_datalen = SDMMC_SECTOR_SIZE; 1416 cmd.c_dmamap = sf->bbuf_dmap; 1417 cmd.c_dmaseg = 0; 1418 cmd.c_dmaoff = 0; 1419 bbuf = 1; 1420 len = SDMMC_SECTOR_SIZE; 1421 } 1422 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1423 MMC_WRITE_BLOCK_MULTIPLE : MMC_WRITE_BLOCK_SINGLE; 1424 } 1425 } 1426 1427 error = sdmmc_mmc_command(sc, &cmd); 1428 if (error) 1429 goto out; 1430 1431 if (!ISSET(sc->sc_caps, SMC_CAPS_AUTO_STOP)) { 1432 if (cmd.c_opcode == MMC_WRITE_BLOCK_MULTIPLE) { 1433 memset(&cmd, 0, sizeof(cmd)); 1434 cmd.c_opcode = MMC_STOP_TRANSMISSION; 1435 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1B | SCF_RSP_SPI_R1B; 1436 error = sdmmc_mmc_command(sc, &cmd); 1437 if (error) 1438 goto out; 1439 } 1440 } 1441 1442 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1443 do { 1444 memset(&cmd, 0, sizeof(cmd)); 1445 cmd.c_opcode = MMC_SEND_STATUS; 1446 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 1447 cmd.c_arg = MMC_ARG_RCA(sf->rca); 1448 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R2; 1449 error = sdmmc_mmc_command(sc, &cmd); 1450 if (error) 1451 break; 1452 /* XXX time out */ 1453 } while (!ISSET(MMC_R1(cmd.c_resp), MMC_R1_READY_FOR_DATA)); 1454 } 1455 1456 if (ISSET(sc->sc_caps, SMC_CAPS_DMA) && 1457 !ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1458 bus_dma_segment_t *dm_segs = sc->sc_dmap->dm_segs; 1459 1460 if (bbuf) 1461 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 1462 0, SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTWRITE); 1463 num += len; 1464 data += len; 1465 datalen -= len; 1466 blkno += (len / SDMMC_SECTOR_SIZE); 1467 1468 while (off + len >= dm_segs[seg].ds_len) { 1469 len -= dm_segs[seg++].ds_len; 1470 off = 0; 1471 } 1472 off += len; 1473 1474 if (seg < sc->sc_dmap->dm_nsegs) 1475 goto retry; 1476 } 1477 1478 out: 1479 return error; 1480 } 1481 1482 int 1483 sdmmc_mem_write_block(struct sdmmc_function *sf, uint32_t blkno, u_char *data, 1484 size_t datalen) 1485 { 1486 struct sdmmc_softc *sc = sf->sc; 1487 int error; 1488 1489 SDMMC_LOCK(sc); 1490 1491 if (sdmmc_chip_write_protect(sc->sc_sct, sc->sc_sch)) { 1492 aprint_normal_dev(sc->sc_dev, "write-protected\n"); 1493 error = EIO; 1494 goto out; 1495 } 1496 1497 if (ISSET(sc->sc_caps, SMC_CAPS_SINGLE_ONLY)) { 1498 error = sdmmc_mem_single_write_block(sf, blkno, data, datalen); 1499 goto out; 1500 } 1501 1502 if (!ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1503 error = sdmmc_mem_write_block_subr(sf, blkno, data, datalen); 1504 goto out; 1505 } 1506 1507 /* DMA transfer */ 1508 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, data, datalen, NULL, 1509 BUS_DMA_NOWAIT|BUS_DMA_WRITE); 1510 if (error) 1511 goto out; 1512 1513 #ifdef SDMMC_DEBUG 1514 for (int i = 0; i < sc->sc_dmap->dm_nsegs; i++) { 1515 printf("seg#%d: addr=%#lx, size=%#lx\n", i, 1516 (u_long)sc->sc_dmap->dm_segs[i].ds_addr, 1517 (u_long)sc->sc_dmap->dm_segs[i].ds_len); 1518 } 1519 #endif 1520 1521 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1522 BUS_DMASYNC_PREWRITE); 1523 1524 error = sdmmc_mem_write_block_subr(sf, blkno, data, datalen); 1525 if (error) 1526 goto unload; 1527 1528 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1529 BUS_DMASYNC_POSTWRITE); 1530 unload: 1531 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1532 1533 out: 1534 SDMMC_UNLOCK(sc); 1535 1536 return error; 1537 } 1538