xref: /netbsd-src/sys/dev/sdmmc/sdmmc_io.c (revision 946379e7b37692fc43f68eb0d1c10daa0a7f3b6c)
1 /*	$NetBSD: sdmmc_io.c,v 1.12 2015/10/06 14:32:51 mlelstv Exp $	*/
2 /*	$OpenBSD: sdmmc_io.c,v 1.10 2007/09/17 01:33:33 krw Exp $	*/
3 
4 /*
5  * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
6  *
7  * Permission to use, copy, modify, and distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 /* Routines for SD I/O cards. */
21 
22 #include <sys/cdefs.h>
23 __KERNEL_RCSID(0, "$NetBSD: sdmmc_io.c,v 1.12 2015/10/06 14:32:51 mlelstv Exp $");
24 
25 #ifdef _KERNEL_OPT
26 #include "opt_sdmmc.h"
27 #endif
28 
29 #include <sys/param.h>
30 #include <sys/kernel.h>
31 #include <sys/malloc.h>
32 #include <sys/proc.h>
33 #include <sys/systm.h>
34 
35 #include <dev/sdmmc/sdmmc_ioreg.h>
36 #include <dev/sdmmc/sdmmcchip.h>
37 #include <dev/sdmmc/sdmmcreg.h>
38 #include <dev/sdmmc/sdmmcvar.h>
39 
40 #ifdef SDMMC_DEBUG
41 #define DPRINTF(s)	do { printf s; } while (0)
42 #else
43 #define DPRINTF(s)	do {} while (0)
44 #endif
45 
46 struct sdmmc_intr_handler {
47 	struct sdmmc_softc *ih_softc;
48 	char *ih_name;
49 	int (*ih_fun)(void *);
50 	void *ih_arg;
51 	TAILQ_ENTRY(sdmmc_intr_handler) entry;
52 };
53 
54 static int	sdmmc_io_rw_direct(struct sdmmc_softc *,
55 		    struct sdmmc_function *, int, u_char *, int);
56 static int	sdmmc_io_rw_extended(struct sdmmc_softc *,
57 		    struct sdmmc_function *, int, u_char *, int, int);
58 #if 0
59 static int	sdmmc_io_xchg(struct sdmmc_softc *, struct sdmmc_function *,
60 		    int, u_char *);
61 #endif
62 static void	sdmmc_io_reset(struct sdmmc_softc *);
63 static int	sdmmc_io_send_op_cond(struct sdmmc_softc *, uint32_t,
64 		    uint32_t *);
65 
66 /*
67  * Initialize SD I/O card functions (before memory cards).  The host
68  * system and controller must support card interrupts in order to use
69  * I/O functions.
70  */
71 int
72 sdmmc_io_enable(struct sdmmc_softc *sc)
73 {
74 	uint32_t host_ocr;
75 	uint32_t card_ocr;
76 	int error;
77 
78 	SDMMC_LOCK(sc);
79 
80 	/* Set host mode to SD "combo" card. */
81 	SET(sc->sc_flags, SMF_SD_MODE|SMF_IO_MODE|SMF_MEM_MODE);
82 
83 	/* Reset I/O functions. */
84 	sdmmc_io_reset(sc);
85 
86 	/*
87 	 * Read the I/O OCR value, determine the number of I/O
88 	 * functions and whether memory is also present (a "combo
89 	 * card") by issuing CMD5.  SD memory-only and MMC cards
90 	 * do not respond to CMD5.
91 	 */
92 	error = sdmmc_io_send_op_cond(sc, 0, &card_ocr);
93 	if (error) {
94 		/* No SDIO card; switch to SD memory-only mode. */
95 		CLR(sc->sc_flags, SMF_IO_MODE);
96 		error = 0;
97 		goto out;
98 	}
99 
100 	/* Parse the additional bits in the I/O OCR value. */
101 	if (!ISSET(card_ocr, SD_IO_OCR_MEM_PRESENT)) {
102 		/* SDIO card without memory (not a "combo card"). */
103 		DPRINTF(("%s: no memory present\n", SDMMCDEVNAME(sc)));
104 		CLR(sc->sc_flags, SMF_MEM_MODE);
105 	}
106 	sc->sc_function_count = SD_IO_OCR_NUM_FUNCTIONS(card_ocr);
107 	if (sc->sc_function_count == 0) {
108 		/* Useless SDIO card without any I/O functions. */
109 		DPRINTF(("%s: no I/O functions\n", SDMMCDEVNAME(sc)));
110 		CLR(sc->sc_flags, SMF_IO_MODE);
111 		error = 0;
112 		goto out;
113 	}
114 	card_ocr &= SD_IO_OCR_MASK;
115 
116 	/* Set the lowest voltage supported by the card and host. */
117 	host_ocr = sdmmc_chip_host_ocr(sc->sc_sct, sc->sc_sch);
118 	error = sdmmc_set_bus_power(sc, host_ocr, card_ocr);
119 	if (error) {
120 		aprint_error_dev(sc->sc_dev,
121 		    "couldn't supply voltage requested by card\n");
122 		goto out;
123 	}
124 
125 	/* Reset I/O functions (again). */
126 	sdmmc_io_reset(sc);
127 
128 	/* Send the new OCR value until all cards are ready. */
129 	error = sdmmc_io_send_op_cond(sc, host_ocr, NULL);
130 	if (error) {
131 		aprint_error_dev(sc->sc_dev, "couldn't send I/O OCR\n");
132 		goto out;
133 	}
134 
135 out:
136 	SDMMC_UNLOCK(sc);
137 
138 	return error;
139 }
140 
141 /*
142  * Allocate sdmmc_function structures for SD card I/O function
143  * (including function 0).
144  */
145 void
146 sdmmc_io_scan(struct sdmmc_softc *sc)
147 {
148 	struct sdmmc_function *sf0, *sf;
149 	int error;
150 	int i;
151 
152 	SDMMC_LOCK(sc);
153 
154 	sf0 = sdmmc_function_alloc(sc);
155 	sf0->number = 0;
156 	error = sdmmc_set_relative_addr(sc, sf0);
157 	if (error) {
158 		aprint_error_dev(sc->sc_dev, "couldn't set I/O RCA\n");
159 		SET(sf0->flags, SFF_ERROR);
160 		goto out;
161 	}
162 	sc->sc_fn0 = sf0;
163 	SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf0, sf_list);
164 
165 	/* Go to Data Transfer Mode, if possible. */
166 	sdmmc_chip_bus_rod(sc->sc_sct, sc->sc_sch, 0);
167 
168 	/* Verify that the RCA has been set by selecting the card. */
169 	error = sdmmc_select_card(sc, sf0);
170 	if (error) {
171 		aprint_error_dev(sc->sc_dev, "couldn't select I/O RCA %d\n",
172 		    sf0->rca);
173 		SET(sf0->flags, SFF_ERROR);
174 		goto out;
175 	}
176 
177 	for (i = 1; i <= sc->sc_function_count; i++) {
178 		sf = sdmmc_function_alloc(sc);
179 		sf->number = i;
180 		sf->rca = sf0->rca;
181 		SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf, sf_list);
182 	}
183 
184 out:
185 	SDMMC_UNLOCK(sc);
186 }
187 
188 /*
189  * Initialize SDIO card functions.
190  */
191 int
192 sdmmc_io_init(struct sdmmc_softc *sc, struct sdmmc_function *sf)
193 {
194 	struct sdmmc_function *sf0 = sc->sc_fn0;
195 	int error = 0;
196 	uint8_t reg;
197 
198 	SDMMC_LOCK(sc);
199 
200 	if (sf->number == 0) {
201 		reg = sdmmc_io_read_1(sf, SD_IO_CCCR_CAPABILITY);
202 		if (!(reg & CCCR_CAPS_LSC) || (reg & CCCR_CAPS_4BLS)) {
203 			sdmmc_io_write_1(sf, SD_IO_CCCR_BUS_WIDTH,
204 			    CCCR_BUS_WIDTH_4);
205 			sf->width = 4;
206 		}
207 
208 		error = sdmmc_read_cis(sf, &sf->cis);
209 		if (error) {
210 			aprint_error_dev(sc->sc_dev, "couldn't read CIS\n");
211 			SET(sf->flags, SFF_ERROR);
212 			goto out;
213 		}
214 
215 		sdmmc_check_cis_quirks(sf);
216 
217 #ifdef SDMMC_DEBUG
218 		if (sdmmcdebug)
219 			sdmmc_print_cis(sf);
220 #endif
221 
222 		reg = sdmmc_io_read_1(sf, SD_IO_CCCR_HIGH_SPEED);
223 		if (reg & CCCR_HIGH_SPEED_SHS) {
224 			reg |= CCCR_HIGH_SPEED_EHS;
225 			sdmmc_io_write_1(sf, SD_IO_CCCR_HIGH_SPEED, reg);
226 			sf->csd.tran_speed = 50000;	/* 50MHz */
227 
228 			/* Wait 400KHz x 8 clock */
229 			delay(1);
230 		}
231 		if (sc->sc_busclk > sf->csd.tran_speed)
232 			sc->sc_busclk = sf->csd.tran_speed;
233 		error =
234 		    sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, sc->sc_busclk,
235 			false);
236 		if (error)
237 			aprint_error_dev(sc->sc_dev,
238 			    "can't change bus clock\n");
239 	} else {
240 		reg = sdmmc_io_read_1(sf0, SD_IO_FBR(sf->number) + 0x000);
241 		sf->interface = FBR_STD_FUNC_IF_CODE(reg);
242 		if (sf->interface == 0x0f)
243 			sf->interface =
244 			    sdmmc_io_read_1(sf0, SD_IO_FBR(sf->number) + 0x001);
245 		error = sdmmc_read_cis(sf, &sf->cis);
246 		if (error) {
247 			aprint_error_dev(sc->sc_dev, "couldn't read CIS\n");
248 			SET(sf->flags, SFF_ERROR);
249 			goto out;
250 		}
251 
252 		sdmmc_check_cis_quirks(sf);
253 
254 #ifdef SDMMC_DEBUG
255 		if (sdmmcdebug)
256 			sdmmc_print_cis(sf);
257 #endif
258 	}
259 
260 out:
261 	SDMMC_UNLOCK(sc);
262 
263 	return error;
264 }
265 
266 /*
267  * Indicate whether the function is ready to operate.
268  */
269 static int
270 sdmmc_io_function_ready(struct sdmmc_function *sf)
271 {
272 	struct sdmmc_softc *sc = sf->sc;
273 	struct sdmmc_function *sf0 = sc->sc_fn0;
274 	uint8_t reg;
275 
276 	if (sf->number == 0)
277 		return 1;	/* FN0 is always ready */
278 
279 	SDMMC_LOCK(sc);
280 	reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_IOREADY);
281 	SDMMC_UNLOCK(sc);
282 	return (reg & (1 << sf->number)) != 0;
283 }
284 
285 int
286 sdmmc_io_function_enable(struct sdmmc_function *sf)
287 {
288 	struct sdmmc_softc *sc = sf->sc;
289 	struct sdmmc_function *sf0 = sc->sc_fn0;
290 	uint8_t reg;
291 	int retry;
292 
293 	if (sf->number == 0)
294 		return 0;	/* FN0 is always enabled */
295 
296 	SDMMC_LOCK(sc);
297 	reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_ENABLE);
298 	SET(reg, (1U << sf->number));
299 	sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_ENABLE, reg);
300 	SDMMC_UNLOCK(sc);
301 
302 	retry = 5;
303 	while (!sdmmc_io_function_ready(sf) && retry-- > 0)
304 		kpause("pause", false, hz, NULL);
305 	return (retry >= 0) ? 0 : ETIMEDOUT;
306 }
307 
308 /*
309  * Disable the I/O function.  Return zero if the function was
310  * disabled successfully.
311  */
312 void
313 sdmmc_io_function_disable(struct sdmmc_function *sf)
314 {
315 	struct sdmmc_softc *sc = sf->sc;
316 	struct sdmmc_function *sf0 = sc->sc_fn0;
317 	uint8_t reg;
318 
319 	if (sf->number == 0)
320 		return;		/* FN0 is always enabled */
321 
322 	SDMMC_LOCK(sc);
323 	reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_ENABLE);
324 	CLR(reg, (1U << sf->number));
325 	sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_ENABLE, reg);
326 	SDMMC_UNLOCK(sc);
327 }
328 
329 static int
330 sdmmc_io_rw_direct(struct sdmmc_softc *sc, struct sdmmc_function *sf,
331     int reg, u_char *datap, int arg)
332 {
333 	struct sdmmc_command cmd;
334 	int error;
335 
336 	/* Don't lock */
337 
338 	/* Make sure the card is selected. */
339 	error = sdmmc_select_card(sc, sf);
340 	if (error)
341 		return error;
342 
343 	arg |= ((sf == NULL ? 0 : sf->number) & SD_ARG_CMD52_FUNC_MASK) <<
344 	    SD_ARG_CMD52_FUNC_SHIFT;
345 	arg |= (reg & SD_ARG_CMD52_REG_MASK) <<
346 	    SD_ARG_CMD52_REG_SHIFT;
347 	arg |= (*datap & SD_ARG_CMD52_DATA_MASK) <<
348 	    SD_ARG_CMD52_DATA_SHIFT;
349 
350 	memset(&cmd, 0, sizeof cmd);
351 	cmd.c_opcode = SD_IO_RW_DIRECT;
352 	cmd.c_arg = arg;
353 	cmd.c_flags = SCF_CMD_AC | SCF_RSP_R5;
354 
355 	error = sdmmc_mmc_command(sc, &cmd);
356 	*datap = SD_R5_DATA(cmd.c_resp);
357 
358 	return error;
359 }
360 
361 /*
362  * Useful values of `arg' to pass in are either SD_ARG_CMD53_READ or
363  * SD_ARG_CMD53_WRITE.  SD_ARG_CMD53_INCREMENT may be ORed into `arg'
364  * to access successive register locations instead of accessing the
365  * same register many times.
366  */
367 static int
368 sdmmc_io_rw_extended(struct sdmmc_softc *sc, struct sdmmc_function *sf,
369     int reg, u_char *datap, int datalen, int arg)
370 {
371 	struct sdmmc_command cmd;
372 	int error;
373 
374 	/* Don't lock */
375 
376 #if 0
377 	/* Make sure the card is selected. */
378 	error = sdmmc_select_card(sc, sf);
379 	if (error)
380 		return error;
381 #endif
382 
383 	arg |= (((sf == NULL) ? 0 : sf->number) & SD_ARG_CMD53_FUNC_MASK) <<
384 	    SD_ARG_CMD53_FUNC_SHIFT;
385 	arg |= (reg & SD_ARG_CMD53_REG_MASK) <<
386 	    SD_ARG_CMD53_REG_SHIFT;
387 	arg |= (datalen & SD_ARG_CMD53_LENGTH_MASK) <<
388 	    SD_ARG_CMD53_LENGTH_SHIFT;
389 
390 	memset(&cmd, 0, sizeof cmd);
391 	cmd.c_opcode = SD_IO_RW_EXTENDED;
392 	cmd.c_arg = arg;
393 	cmd.c_flags = SCF_CMD_AC | SCF_RSP_R5;
394 	cmd.c_data = datap;
395 	cmd.c_datalen = datalen;
396 	cmd.c_blklen = MIN(datalen,
397 	    sdmmc_chip_host_maxblklen(sc->sc_sct,sc->sc_sch));
398 	if (!ISSET(arg, SD_ARG_CMD53_WRITE))
399 		cmd.c_flags |= SCF_CMD_READ;
400 
401 	error = sdmmc_mmc_command(sc, &cmd);
402 
403 	return error;
404 }
405 
406 uint8_t
407 sdmmc_io_read_1(struct sdmmc_function *sf, int reg)
408 {
409 	uint8_t data = 0;
410 
411 	/* Don't lock */
412 
413 	(void)sdmmc_io_rw_direct(sf->sc, sf, reg, (u_char *)&data,
414 	    SD_ARG_CMD52_READ);
415 	return data;
416 }
417 
418 void
419 sdmmc_io_write_1(struct sdmmc_function *sf, int reg, uint8_t data)
420 {
421 
422 	/* Don't lock */
423 
424 	(void)sdmmc_io_rw_direct(sf->sc, sf, reg, (u_char *)&data,
425 	    SD_ARG_CMD52_WRITE);
426 }
427 
428 uint16_t
429 sdmmc_io_read_2(struct sdmmc_function *sf, int reg)
430 {
431 	uint16_t data = 0;
432 
433 	/* Don't lock */
434 
435 	(void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 2,
436 	    SD_ARG_CMD53_READ | SD_ARG_CMD53_INCREMENT);
437 	return data;
438 }
439 
440 void
441 sdmmc_io_write_2(struct sdmmc_function *sf, int reg, uint16_t data)
442 {
443 
444 	/* Don't lock */
445 
446 	(void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 2,
447 	    SD_ARG_CMD53_WRITE | SD_ARG_CMD53_INCREMENT);
448 }
449 
450 uint32_t
451 sdmmc_io_read_4(struct sdmmc_function *sf, int reg)
452 {
453 	uint32_t data = 0;
454 
455 	/* Don't lock */
456 
457 	(void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 4,
458 	    SD_ARG_CMD53_READ | SD_ARG_CMD53_INCREMENT);
459 	return data;
460 }
461 
462 void
463 sdmmc_io_write_4(struct sdmmc_function *sf, int reg, uint32_t data)
464 {
465 
466 	/* Don't lock */
467 
468 	(void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 4,
469 	    SD_ARG_CMD53_WRITE | SD_ARG_CMD53_INCREMENT);
470 }
471 
472 
473 int
474 sdmmc_io_read_multi_1(struct sdmmc_function *sf, int reg, u_char *data,
475     int datalen)
476 {
477 	int error;
478 
479 	/* Don't lock */
480 
481 	while (datalen > SD_ARG_CMD53_LENGTH_MAX) {
482 		error = sdmmc_io_rw_extended(sf->sc, sf, reg, data,
483 		    SD_ARG_CMD53_LENGTH_MAX, SD_ARG_CMD53_READ);
484 		if (error)
485 			goto error;
486 		data += SD_ARG_CMD53_LENGTH_MAX;
487 		datalen -= SD_ARG_CMD53_LENGTH_MAX;
488 	}
489 
490 	error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, datalen,
491 	    SD_ARG_CMD53_READ);
492 error:
493 	return error;
494 }
495 
496 int
497 sdmmc_io_write_multi_1(struct sdmmc_function *sf, int reg, u_char *data,
498     int datalen)
499 {
500 	int error;
501 
502 	/* Don't lock */
503 
504 	while (datalen > SD_ARG_CMD53_LENGTH_MAX) {
505 		error = sdmmc_io_rw_extended(sf->sc, sf, reg, data,
506 		    SD_ARG_CMD53_LENGTH_MAX, SD_ARG_CMD53_WRITE);
507 		if (error)
508 			goto error;
509 		data += SD_ARG_CMD53_LENGTH_MAX;
510 		datalen -= SD_ARG_CMD53_LENGTH_MAX;
511 	}
512 
513 	error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, datalen,
514 	    SD_ARG_CMD53_WRITE);
515 error:
516 	return error;
517 }
518 
519 #if 0
520 static int
521 sdmmc_io_xchg(struct sdmmc_softc *sc, struct sdmmc_function *sf,
522     int reg, u_char *datap)
523 {
524 
525 	/* Don't lock */
526 
527 	return sdmmc_io_rw_direct(sc, sf, reg, datap,
528 	    SD_ARG_CMD52_WRITE|SD_ARG_CMD52_EXCHANGE);
529 }
530 #endif
531 
532 /*
533  * Reset the I/O functions of the card.
534  */
535 static void
536 sdmmc_io_reset(struct sdmmc_softc *sc)
537 {
538 
539 	/* Don't lock */
540 #if 0 /* XXX command fails */
541 	(void)sdmmc_io_write(sc, NULL, SD_IO_REG_CCCR_CTL, CCCR_CTL_RES);
542 	sdmmc_delay(100000);
543 #endif
544 }
545 
546 /*
547  * Get or set the card's I/O OCR value (SDIO).
548  */
549 static int
550 sdmmc_io_send_op_cond(struct sdmmc_softc *sc, u_int32_t ocr, u_int32_t *ocrp)
551 {
552 	struct sdmmc_command cmd;
553 	int error;
554 	int retry;
555 
556 	DPRINTF(("sdmmc_io_send_op_cond: ocr = %#x\n", ocr));
557 
558 	/* Don't lock */
559 
560 	/*
561 	 * If we change the OCR value, retry the command until the OCR
562 	 * we receive in response has the "CARD BUSY" bit set, meaning
563 	 * that all cards are ready for identification.
564 	 */
565 	for (retry = 0; retry < 100; retry++) {
566 		memset(&cmd, 0, sizeof cmd);
567 		cmd.c_opcode = SD_IO_SEND_OP_COND;
568 		cmd.c_arg = ocr;
569 		cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R4 | SCF_TOUT_OK;
570 
571 		error = sdmmc_mmc_command(sc, &cmd);
572 		if (error)
573 			break;
574 		if (ISSET(MMC_R4(cmd.c_resp), SD_IO_OCR_MEM_READY) || ocr == 0)
575 			break;
576 
577 		error = ETIMEDOUT;
578 		sdmmc_delay(10000);
579 	}
580 	if (error == 0 && ocrp != NULL)
581 		*ocrp = MMC_R4(cmd.c_resp);
582 
583 	DPRINTF(("sdmmc_io_send_op_cond: error = %d\n", error));
584 
585 	return error;
586 }
587 
588 /*
589  * Card interrupt handling
590  */
591 
592 void
593 sdmmc_intr_enable(struct sdmmc_function *sf)
594 {
595 	struct sdmmc_softc *sc = sf->sc;
596 	struct sdmmc_function *sf0 = sc->sc_fn0;
597 	uint8_t reg;
598 
599 	SDMMC_LOCK(sc);
600 	mutex_enter(&sc->sc_intr_task_mtx);
601 	reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_INTEN);
602 	reg |= 1 << sf->number;
603 	sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_INTEN, reg);
604 	mutex_exit(&sc->sc_intr_task_mtx);
605 	SDMMC_UNLOCK(sc);
606 }
607 
608 void
609 sdmmc_intr_disable(struct sdmmc_function *sf)
610 {
611 	struct sdmmc_softc *sc = sf->sc;
612 	struct sdmmc_function *sf0 = sc->sc_fn0;
613 	uint8_t reg;
614 
615 	SDMMC_LOCK(sc);
616 	mutex_enter(&sc->sc_intr_task_mtx);
617 	reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_INTEN);
618 	reg &= ~(1 << sf->number);
619 	sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_INTEN, reg);
620 	mutex_exit(&sc->sc_intr_task_mtx);
621 	SDMMC_UNLOCK(sc);
622 }
623 
624 /*
625  * Establish a handler for the SDIO card interrupt.  Because the
626  * interrupt may be shared with different SDIO functions, multiple
627  * handlers can be established.
628  */
629 void *
630 sdmmc_intr_establish(device_t dev, int (*fun)(void *), void *arg,
631     const char *name)
632 {
633 	struct sdmmc_softc *sc = device_private(dev);
634 	struct sdmmc_intr_handler *ih;
635 
636 	if (sc->sc_sct->card_enable_intr == NULL)
637 		return NULL;
638 
639 	ih = malloc(sizeof *ih, M_DEVBUF, M_WAITOK|M_CANFAIL|M_ZERO);
640 	if (ih == NULL)
641 		return NULL;
642 
643 	ih->ih_name = malloc(strlen(name) + 1, M_DEVBUF,
644 	    M_WAITOK|M_CANFAIL|M_ZERO);
645 	if (ih->ih_name == NULL) {
646 		free(ih, M_DEVBUF);
647 		return NULL;
648 	}
649 	strlcpy(ih->ih_name, name, strlen(name));
650 	ih->ih_softc = sc;
651 	ih->ih_fun = fun;
652 	ih->ih_arg = arg;
653 
654 	mutex_enter(&sc->sc_mtx);
655 	if (TAILQ_EMPTY(&sc->sc_intrq)) {
656 		sdmmc_intr_enable(sc->sc_fn0);
657 		sdmmc_chip_card_enable_intr(sc->sc_sct, sc->sc_sch, 1);
658 	}
659 	TAILQ_INSERT_TAIL(&sc->sc_intrq, ih, entry);
660 	mutex_exit(&sc->sc_mtx);
661 
662 	return ih;
663 }
664 
665 /*
666  * Disestablish the given handler.
667  */
668 void
669 sdmmc_intr_disestablish(void *cookie)
670 {
671 	struct sdmmc_intr_handler *ih = cookie;
672 	struct sdmmc_softc *sc = ih->ih_softc;
673 
674 	if (sc->sc_sct->card_enable_intr == NULL)
675 		return;
676 
677 	mutex_enter(&sc->sc_mtx);
678 	TAILQ_REMOVE(&sc->sc_intrq, ih, entry);
679 	if (TAILQ_EMPTY(&sc->sc_intrq)) {
680 		sdmmc_chip_card_enable_intr(sc->sc_sct, sc->sc_sch, 0);
681 		sdmmc_intr_disable(sc->sc_fn0);
682 	}
683 	mutex_exit(&sc->sc_mtx);
684 
685 	free(ih->ih_name, M_DEVBUF);
686 	free(ih, M_DEVBUF);
687 }
688 
689 /*
690  * Call established SDIO card interrupt handlers.  The host controller
691  * must call this function from its own interrupt handler to handle an
692  * SDIO interrupt from the card.
693  */
694 void
695 sdmmc_card_intr(device_t dev)
696 {
697 	struct sdmmc_softc *sc = device_private(dev);
698 
699 	if (sc->sc_sct->card_enable_intr == NULL)
700 		return;
701 
702 	mutex_enter(&sc->sc_intr_task_mtx);
703 	if (!sdmmc_task_pending(&sc->sc_intr_task))
704 		sdmmc_add_task(sc, &sc->sc_intr_task);
705 	mutex_exit(&sc->sc_intr_task_mtx);
706 }
707 
708 void
709 sdmmc_intr_task(void *arg)
710 {
711 	struct sdmmc_softc *sc = (struct sdmmc_softc *)arg;
712 	struct sdmmc_intr_handler *ih;
713 
714 	mutex_enter(&sc->sc_mtx);
715 	TAILQ_FOREACH(ih, &sc->sc_intrq, entry) {
716 		/* XXX examine return value and do evcount stuff*/
717 		(void)(*ih->ih_fun)(ih->ih_arg);
718 	}
719 	mutex_exit(&sc->sc_mtx);
720 
721 	sdmmc_chip_card_intr_ack(sc->sc_sct, sc->sc_sch);
722 }
723