1*0d209957Sdyoung /* $NetBSD: sdhcvar.h,v 1.35 2024/05/09 01:33:13 dyoung Exp $ */ 2e0297d1eSnonaka /* $OpenBSD: sdhcvar.h,v 1.3 2007/09/06 08:01:01 jsg Exp $ */ 3e0297d1eSnonaka 4e0297d1eSnonaka /* 5e0297d1eSnonaka * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org> 6e0297d1eSnonaka * 7e0297d1eSnonaka * Permission to use, copy, modify, and distribute this software for any 8e0297d1eSnonaka * purpose with or without fee is hereby granted, provided that the above 9e0297d1eSnonaka * copyright notice and this permission notice appear in all copies. 10e0297d1eSnonaka * 11e0297d1eSnonaka * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12e0297d1eSnonaka * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13e0297d1eSnonaka * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14e0297d1eSnonaka * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15e0297d1eSnonaka * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16e0297d1eSnonaka * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17e0297d1eSnonaka * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18e0297d1eSnonaka */ 19e0297d1eSnonaka 20e0297d1eSnonaka #ifndef _SDHCVAR_H_ 21e0297d1eSnonaka #define _SDHCVAR_H_ 22e0297d1eSnonaka 23e0297d1eSnonaka #include <sys/bus.h> 24e0297d1eSnonaka #include <sys/device.h> 25e0297d1eSnonaka #include <sys/pmf.h> 26e0297d1eSnonaka 27e0297d1eSnonaka struct sdhc_host; 2838429661Sjakllsch struct sdmmc_command; 29e0297d1eSnonaka 30e0297d1eSnonaka struct sdhc_softc { 31e0297d1eSnonaka device_t sc_dev; 32e0297d1eSnonaka 33e0297d1eSnonaka struct sdhc_host **sc_host; 34e0297d1eSnonaka int sc_nhosts; 35e0297d1eSnonaka 36e0297d1eSnonaka bus_dma_tag_t sc_dmat; 37e0297d1eSnonaka 38e0297d1eSnonaka uint32_t sc_flags; 391478a901Sbouyer #define SDHC_FLAG_USE_DMA 0x00000001 401478a901Sbouyer #define SDHC_FLAG_FORCE_DMA 0x00000002 411478a901Sbouyer #define SDHC_FLAG_NO_PWR0 0x00000004 /* Freescale ESDHC */ 421478a901Sbouyer #define SDHC_FLAG_HAVE_DVS 0x00000008 /* Freescale ESDHC */ 431478a901Sbouyer #define SDHC_FLAG_32BIT_ACCESS 0x00000010 /* Freescale ESDHC */ 441478a901Sbouyer #define SDHC_FLAG_ENHANCED 0x00000020 /* Freescale ESDHC */ 451478a901Sbouyer #define SDHC_FLAG_8BIT_MODE 0x00000040 /* MMC 8bit mode is supported */ 461478a901Sbouyer #define SDHC_FLAG_HAVE_CGM 0x00000080 /* Netlogic XLP */ 471478a901Sbouyer #define SDHC_FLAG_NO_LED_ON 0x00000100 /* LED_ON unsupported in HOST_CTL */ 481478a901Sbouyer #define SDHC_FLAG_HOSTCAPS 0x00000200 /* No device provided capabilities */ 491478a901Sbouyer #define SDHC_FLAG_RSP136_CRC 0x00000400 /* Resp 136 with CRC and end-bit */ 501478a901Sbouyer #define SDHC_FLAG_SINGLE_ONLY 0x00000800 /* Single transfer only */ 511478a901Sbouyer #define SDHC_FLAG_WAIT_RESET 0x00001000 /* Wait for soft resets to start */ 521478a901Sbouyer #define SDHC_FLAG_NO_HS_BIT 0x00002000 /* Don't set SDHC_HIGH_SPEED bit */ 531478a901Sbouyer #define SDHC_FLAG_EXTERNAL_DMA 0x00004000 541478a901Sbouyer #define SDHC_FLAG_EXTDMA_DMAEN 0x00008000 /* ext. dma need SDHC_DMA_ENABLE */ 55*0d209957Sdyoung #define SDHC_FLAG_NON_REMOVABLE \ 56*0d209957Sdyoung 0x00010000 /* slot has no card detect, behave 57*0d209957Sdyoung * as if a card is always present 58*0d209957Sdyoung */ 593497e015Sjmcneill #define SDHC_FLAG_NO_CLKBASE 0x00020000 /* ignore clkbase register */ 60e974ccfaSjmcneill #define SDHC_FLAG_SINGLE_POWER_WRITE 0x00040000 613cc75aa7Sjmcneill #define SDHC_FLAG_NO_TIMEOUT 0x00080000 /* ignore timeout interrupts */ 62766b8646Sjmcneill #define SDHC_FLAG_POLL_CARD_DET 0x00100000 /* polling card detect */ 63766b8646Sjmcneill #define SDHC_FLAG_SLOW_SDR50 0x00200000 /* reduce SDR50 speed */ 64766b8646Sjmcneill #define SDHC_FLAG_USDHC 0x00400000 /* Freescale uSDHC */ 65766b8646Sjmcneill #define SDHC_FLAG_NO_AUTO_STOP 0x00800000 /* No auto CMD12 */ 66766b8646Sjmcneill #define SDHC_FLAG_NO_BUSY_INTR 0x01000000 /* No intr when RESP_BUSY */ 67766b8646Sjmcneill #define SDHC_FLAG_STOP_WITH_TC 0x02000000 /* CMD12 can set xfer complete w/o SCF_RSP_BSY */ 68766b8646Sjmcneill #define SDHC_FLAG_BROKEN_ADMA2_ZEROLEN 0x04000000 /* 69af57fdaaShkenken * Broken ADMA2 zero length descriptor 70af57fdaaShkenken * Can't 64K Byte data transfer 71af57fdaaShkenken */ 72766b8646Sjmcneill #define SDHC_FLAG_NO_1_8_V 0x08000000 /* No 1.8V supply */ 73dc859a05Sjmcneill #define SDHC_FLAG_BROKEN_ADMA 0x10000000 /* ADMA engine does not work */ 740c3c3bcfSskrll 75459e142aSmatt uint32_t sc_clkbase; 76a29e7e56Skiyohara int sc_clkmsk; /* Mask for SDCLK */ 770c3c3bcfSskrll uint32_t sc_caps;/* attachment provided capabilities */ 788055da5bSjmcneill uint32_t sc_caps2; 79a29e7e56Skiyohara 80a29e7e56Skiyohara int (*sc_vendor_rod)(struct sdhc_softc *, int); 81a29e7e56Skiyohara int (*sc_vendor_write_protect)(struct sdhc_softc *); 82a29e7e56Skiyohara int (*sc_vendor_card_detect)(struct sdhc_softc *); 8378131770Sjmcneill int (*sc_vendor_bus_width)(struct sdhc_softc *, int); 84f726267fSmatt int (*sc_vendor_bus_clock)(struct sdhc_softc *, int); 8516219c4eSjmcneill int (*sc_vendor_bus_clock_post)(struct sdhc_softc *, int); 863789ad42Sjmcneill int (*sc_vendor_transfer_data_dma)(struct sdhc_softc *, struct sdmmc_command *); 877003a765Snonaka void (*sc_vendor_hw_reset)(struct sdhc_softc *, struct sdhc_host *); 88872a36d5Sjmcneill int (*sc_vendor_signal_voltage)(struct sdhc_softc *, int); 8982e9f296Sjmcneill 9082e9f296Sjmcneill u_int sc_write_delay; /* delay (us) after io write */ 91e0297d1eSnonaka }; 92e0297d1eSnonaka 93e0297d1eSnonaka /* Host controller functions called by the attachment driver. */ 94e0297d1eSnonaka int sdhc_host_found(struct sdhc_softc *, bus_space_tag_t, 95e0297d1eSnonaka bus_space_handle_t, bus_size_t); 96e0297d1eSnonaka int sdhc_intr(void *); 975e095f2dSjakllsch int sdhc_detach(struct sdhc_softc *, int); 98821373d0Snonaka bool sdhc_suspend(device_t, const pmf_qual_t *); 99821373d0Snonaka bool sdhc_resume(device_t, const pmf_qual_t *); 100821373d0Snonaka bool sdhc_shutdown(device_t, int); 101cd42d5bcSjmcneill kmutex_t *sdhc_host_lock(struct sdhc_host *); 1027003a765Snonaka uint8_t sdhc_host_read_1(struct sdhc_host *, int); 1037003a765Snonaka uint16_t sdhc_host_read_2(struct sdhc_host *, int); 1047003a765Snonaka uint32_t sdhc_host_read_4(struct sdhc_host *, int); 1057003a765Snonaka void sdhc_host_write_1(struct sdhc_host *, int, uint8_t); 1067003a765Snonaka void sdhc_host_write_2(struct sdhc_host *, int, uint16_t); 1077003a765Snonaka void sdhc_host_write_4(struct sdhc_host *, int, uint32_t); 108e0297d1eSnonaka 109e0297d1eSnonaka #endif /* _SDHCVAR_H_ */ 110