1 /* $NetBSD: atapi_wdc.c,v 1.69 2004/02/03 20:55:02 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: atapi_wdc.c,v 1.69 2004/02/03 20:55:02 bouyer Exp $"); 34 35 #ifndef WDCDEBUG 36 #define WDCDEBUG 37 #endif /* WDCDEBUG */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/file.h> 43 #include <sys/stat.h> 44 #include <sys/buf.h> 45 #include <sys/malloc.h> 46 #include <sys/device.h> 47 #include <sys/syslog.h> 48 #include <sys/proc.h> 49 #include <sys/dvdio.h> 50 51 #include <machine/intr.h> 52 #include <machine/bus.h> 53 54 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 55 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 56 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 57 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 58 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 59 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 60 61 #include <dev/ata/atareg.h> 62 #include <dev/ata/atavar.h> 63 #include <dev/ic/wdcreg.h> 64 #include <dev/ic/wdcvar.h> 65 66 #include <dev/scsipi/scsi_all.h> /* for SCSI status */ 67 68 #define DEBUG_INTR 0x01 69 #define DEBUG_XFERS 0x02 70 #define DEBUG_STATUS 0x04 71 #define DEBUG_FUNCS 0x08 72 #define DEBUG_PROBE 0x10 73 #ifdef WDCDEBUG 74 int wdcdebug_atapi_mask = 0; 75 #define WDCDEBUG_PRINT(args, level) \ 76 if (wdcdebug_atapi_mask & (level)) \ 77 printf args 78 #else 79 #define WDCDEBUG_PRINT(args, level) 80 #endif 81 82 #define ATAPI_DELAY 10 /* 10 ms, this is used only before sending a cmd */ 83 #define ATAPI_MODE_DELAY 1000 /* 1s, timeout for SET_FEATYRE cmds */ 84 85 static int wdc_atapi_get_params(struct scsipi_channel *, int, 86 struct ataparams *); 87 static void wdc_atapi_probe_device(struct atapibus_softc *, int); 88 static void wdc_atapi_minphys (struct buf *bp); 89 static void wdc_atapi_start(struct wdc_channel *,struct ata_xfer *); 90 static int wdc_atapi_intr(struct wdc_channel *, struct ata_xfer *, int); 91 static void wdc_atapi_kill_xfer(struct wdc_channel *, struct ata_xfer *); 92 static void wdc_atapi_phase_complete(struct ata_xfer *); 93 static void wdc_atapi_done(struct wdc_channel *, struct ata_xfer *); 94 static void wdc_atapi_reset(struct wdc_channel *, struct ata_xfer *); 95 static void wdc_atapi_scsipi_request(struct scsipi_channel *, 96 scsipi_adapter_req_t, void *); 97 static void wdc_atapi_kill_pending(struct scsipi_periph *); 98 static void wdc_atapi_polldsc(void *arg); 99 100 #define MAX_SIZE MAXPHYS 101 102 static const struct scsipi_bustype wdc_atapi_bustype = { 103 SCSIPI_BUSTYPE_ATAPI, 104 atapi_scsipi_cmd, 105 atapi_interpret_sense, 106 atapi_print_addr, 107 wdc_atapi_kill_pending, 108 }; 109 110 void 111 wdc_atapibus_attach(struct atabus_softc *ata_sc) 112 { 113 struct wdc_channel *chp = ata_sc->sc_chan; 114 struct wdc_softc *wdc = chp->ch_wdc; 115 struct scsipi_adapter *adapt = &wdc->sc_atapi_adapter._generic; 116 struct scsipi_channel *chan = &chp->ch_atapi_channel; 117 118 /* 119 * Fill in the scsipi_adapter. 120 */ 121 adapt->adapt_dev = &wdc->sc_dev; 122 adapt->adapt_nchannels = wdc->nchannels; 123 adapt->adapt_request = wdc_atapi_scsipi_request; 124 adapt->adapt_minphys = wdc_atapi_minphys; 125 if (wdc->cap & WDC_CAPABILITY_NOIRQ) 126 adapt->adapt_flags |= SCSIPI_ADAPT_POLL_ONLY; 127 wdc->sc_atapi_adapter.atapi_probe_device = wdc_atapi_probe_device; 128 129 /* 130 * Fill in the scsipi_channel. 131 */ 132 memset(chan, 0, sizeof(*chan)); 133 chan->chan_adapter = adapt; 134 chan->chan_bustype = &wdc_atapi_bustype; 135 chan->chan_channel = chp->ch_channel; 136 chan->chan_flags = SCSIPI_CHAN_OPENINGS; 137 chan->chan_openings = 1; 138 chan->chan_max_periph = 1; 139 chan->chan_ntargets = 2; 140 chan->chan_nluns = 1; 141 142 chp->atapibus = config_found(&ata_sc->sc_dev, chan, atapiprint); 143 } 144 145 static void 146 wdc_atapi_minphys(struct buf *bp) 147 { 148 149 if (bp->b_bcount > MAX_SIZE) 150 bp->b_bcount = MAX_SIZE; 151 minphys(bp); 152 } 153 154 /* 155 * Kill off all pending xfers for a periph. 156 * 157 * Must be called at splbio(). 158 */ 159 static void 160 wdc_atapi_kill_pending(struct scsipi_periph *periph) 161 { 162 struct wdc_softc *wdc = 163 (void *)periph->periph_channel->chan_adapter->adapt_dev; 164 struct wdc_channel *chp = 165 wdc->channels[periph->periph_channel->chan_channel]; 166 167 wdc_kill_pending(chp); 168 } 169 170 static void 171 wdc_atapi_kill_xfer(struct wdc_channel *chp, struct ata_xfer *xfer) 172 { 173 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 174 175 callout_stop(&chp->ch_callout); 176 /* remove this command from xfer queue */ 177 wdc_free_xfer(chp, xfer); 178 sc_xfer->error = XS_DRIVER_STUFFUP; 179 scsipi_done(sc_xfer); 180 } 181 182 static int 183 wdc_atapi_get_params(struct scsipi_channel *chan, int drive, 184 struct ataparams *id) 185 { 186 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev; 187 struct wdc_channel *chp = wdc->channels[chan->chan_channel]; 188 struct wdc_command wdc_c; 189 190 /* if no ATAPI device detected at wdc attach time, skip */ 191 if ((chp->ch_drive[drive].drive_flags & DRIVE_ATAPI) == 0) { 192 WDCDEBUG_PRINT(("wdc_atapi_get_params: drive %d not present\n", 193 drive), DEBUG_PROBE); 194 return -1; 195 } 196 197 memset(&wdc_c, 0, sizeof(struct wdc_command)); 198 wdc_c.r_command = ATAPI_SOFT_RESET; 199 wdc_c.r_st_bmask = 0; 200 wdc_c.r_st_pmask = 0; 201 wdc_c.flags = AT_POLL; 202 wdc_c.timeout = WDC_RESET_WAIT; 203 if (wdc_exec_command(&chp->ch_drive[drive], &wdc_c) != WDC_COMPLETE) { 204 printf("wdc_atapi_get_params: ATAPI_SOFT_RESET failed for" 205 " drive %s:%d:%d: driver failed\n", 206 wdc->sc_dev.dv_xname, chp->ch_channel, drive); 207 panic("wdc_atapi_get_params"); 208 } 209 if (wdc_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 210 WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_SOFT_RESET " 211 "failed for drive %s:%d:%d: error 0x%x\n", 212 wdc->sc_dev.dv_xname, chp->ch_channel, drive, 213 wdc_c.r_error), DEBUG_PROBE); 214 return -1; 215 } 216 chp->ch_drive[drive].state = 0; 217 218 bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_status], 0); 219 220 /* Some ATAPI devices need a bit more time after software reset. */ 221 delay(5000); 222 if (ata_get_params(&chp->ch_drive[drive], AT_WAIT, id) != 0) { 223 WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_IDENTIFY_DEVICE " 224 "failed for drive %s:%d:%d: error 0x%x\n", 225 wdc->sc_dev.dv_xname, chp->ch_channel, drive, 226 wdc_c.r_error), DEBUG_PROBE); 227 return -1; 228 } 229 return 0; 230 } 231 232 static void 233 wdc_atapi_probe_device(struct atapibus_softc *sc, int target) 234 { 235 struct scsipi_channel *chan = sc->sc_channel; 236 struct scsipi_periph *periph; 237 struct ataparams ids; 238 struct ataparams *id = &ids; 239 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev; 240 struct wdc_channel *chp = wdc->channels[chan->chan_channel]; 241 struct ata_drive_datas *drvp = &chp->ch_drive[target]; 242 struct scsipibus_attach_args sa; 243 char serial_number[21], model[41], firmware_revision[9]; 244 245 /* skip if already attached */ 246 if (scsipi_lookup_periph(chan, target, 0) != NULL) 247 return; 248 249 if (wdc_atapi_get_params(chan, target, id) == 0) { 250 #ifdef ATAPI_DEBUG_PROBE 251 printf("%s drive %d: cmdsz 0x%x drqtype 0x%x\n", 252 sc->sc_dev.dv_xname, target, 253 id->atap_config & ATAPI_CFG_CMD_MASK, 254 id->atap_config & ATAPI_CFG_DRQ_MASK); 255 #endif 256 periph = scsipi_alloc_periph(M_NOWAIT); 257 if (periph == NULL) { 258 printf("%s: unable to allocate periph for drive %d\n", 259 sc->sc_dev.dv_xname, target); 260 return; 261 } 262 periph->periph_dev = NULL; 263 periph->periph_channel = chan; 264 periph->periph_switch = &atapi_probe_periphsw; 265 periph->periph_target = target; 266 periph->periph_lun = 0; 267 periph->periph_quirks = PQUIRK_ONLYBIG; 268 269 #ifdef SCSIPI_DEBUG 270 if (SCSIPI_DEBUG_TYPE == SCSIPI_BUSTYPE_ATAPI && 271 SCSIPI_DEBUG_TARGET == target) 272 periph->periph_dbflags |= SCSIPI_DEBUG_FLAGS; 273 #endif 274 periph->periph_type = ATAPI_CFG_TYPE(id->atap_config); 275 if (id->atap_config & ATAPI_CFG_REMOV) 276 periph->periph_flags |= PERIPH_REMOVABLE; 277 if (periph->periph_type == T_SEQUENTIAL) 278 drvp->drive_flags |= DRIVE_ATAPIST; 279 280 sa.sa_periph = periph; 281 sa.sa_inqbuf.type = ATAPI_CFG_TYPE(id->atap_config); 282 sa.sa_inqbuf.removable = id->atap_config & ATAPI_CFG_REMOV ? 283 T_REMOV : T_FIXED; 284 scsipi_strvis(model, 40, id->atap_model, 40); 285 scsipi_strvis(serial_number, 20, id->atap_serial, 20); 286 scsipi_strvis(firmware_revision, 8, id->atap_revision, 8); 287 sa.sa_inqbuf.vendor = model; 288 sa.sa_inqbuf.product = serial_number; 289 sa.sa_inqbuf.revision = firmware_revision; 290 291 /* 292 * Determine the operating mode capabilities of the device. 293 */ 294 if ((id->atap_config & ATAPI_CFG_CMD_MASK) == ATAPI_CFG_CMD_16) 295 periph->periph_cap |= PERIPH_CAP_CMD16; 296 /* XXX This is gross. */ 297 periph->periph_cap |= (id->atap_config & ATAPI_CFG_DRQ_MASK); 298 299 drvp->drv_softc = atapi_probe_device(sc, target, periph, &sa); 300 301 if (drvp->drv_softc) 302 wdc_probe_caps(drvp); 303 else 304 drvp->drive_flags &= ~DRIVE_ATAPI; 305 } else { 306 drvp->drive_flags &= ~DRIVE_ATAPI; 307 } 308 } 309 310 static void 311 wdc_atapi_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 312 void *arg) 313 { 314 struct scsipi_adapter *adapt = chan->chan_adapter; 315 struct scsipi_periph *periph; 316 struct scsipi_xfer *sc_xfer; 317 struct wdc_softc *wdc = (void *)adapt->adapt_dev; 318 struct ata_xfer *xfer; 319 int channel = chan->chan_channel; 320 int drive, s; 321 322 switch (req) { 323 case ADAPTER_REQ_RUN_XFER: 324 sc_xfer = arg; 325 periph = sc_xfer->xs_periph; 326 drive = periph->periph_target; 327 328 WDCDEBUG_PRINT(("wdc_atapi_scsipi_request %s:%d:%d\n", 329 wdc->sc_dev.dv_xname, channel, drive), DEBUG_XFERS); 330 if ((wdc->sc_dev.dv_flags & DVF_ACTIVE) == 0) { 331 sc_xfer->error = XS_DRIVER_STUFFUP; 332 scsipi_done(sc_xfer); 333 return; 334 } 335 336 xfer = wdc_get_xfer(WDC_NOSLEEP); 337 if (xfer == NULL) { 338 sc_xfer->error = XS_RESOURCE_SHORTAGE; 339 scsipi_done(sc_xfer); 340 return; 341 } 342 343 if (sc_xfer->xs_control & XS_CTL_POLL) 344 xfer->c_flags |= C_POLL; 345 if ((wdc->channels[channel]->ch_drive[drive].drive_flags & 346 (DRIVE_DMA | DRIVE_UDMA)) && sc_xfer->datalen > 0) 347 xfer->c_flags |= C_DMA; 348 xfer->c_drive = drive; 349 xfer->c_flags |= C_ATAPI; 350 if (sc_xfer->cmd->opcode == GPCMD_REPORT_KEY || 351 sc_xfer->cmd->opcode == GPCMD_SEND_KEY || 352 sc_xfer->cmd->opcode == GPCMD_READ_DVD_STRUCTURE) { 353 /* 354 * DVD authentication commands must always be done in 355 * PIO mode. 356 */ 357 xfer->c_flags &= ~C_DMA; 358 } 359 /* 360 * DMA can't deal with transfers which are not a multiple of 361 * 2 bytes. It's a bug to request such transfers for ATAPI 362 * but as the request can come from userland, we have to 363 * protect against it. 364 * Also some devices seems to not handle DMA xfers of less than 365 * 4 bytes. 366 */ 367 if (sc_xfer->datalen < 4 || (sc_xfer->datalen & 0x01)) 368 xfer->c_flags &= ~C_DMA; 369 370 xfer->c_cmd = sc_xfer; 371 xfer->c_databuf = sc_xfer->data; 372 xfer->c_bcount = sc_xfer->datalen; 373 xfer->c_start = wdc_atapi_start; 374 xfer->c_intr = wdc_atapi_intr; 375 xfer->c_kill_xfer = wdc_atapi_kill_xfer; 376 xfer->c_dscpoll = 0; 377 s = splbio(); 378 wdc_exec_xfer(wdc->channels[channel], xfer); 379 #ifdef DIAGNOSTIC 380 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 && 381 (sc_xfer->xs_status & XS_STS_DONE) == 0) 382 panic("wdc_atapi_scsipi_request: polled command " 383 "not done"); 384 #endif 385 splx(s); 386 return; 387 388 default: 389 /* Not supported, nothing to do. */ 390 ; 391 } 392 } 393 394 static void 395 wdc_atapi_start(struct wdc_channel *chp, struct ata_xfer *xfer) 396 { 397 struct wdc_softc *wdc = chp->ch_wdc; 398 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 399 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 400 int wait_flags = (sc_xfer->xs_control & XS_CTL_POLL) ? AT_POLL : 0; 401 char *errstring; 402 403 WDCDEBUG_PRINT(("wdc_atapi_start %s:%d:%d, scsi flags 0x%x \n", 404 wdc->sc_dev.dv_xname, chp->ch_channel, drvp->drive, 405 sc_xfer->xs_control), DEBUG_XFERS); 406 if ((xfer->c_flags & C_DMA) && (drvp->n_xfers <= NXFER)) 407 drvp->n_xfers++; 408 /* Do control operations specially. */ 409 if (__predict_false(drvp->state < READY)) { 410 /* If it's not a polled command, we need the kenrel thread */ 411 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0 && 412 (chp->ch_flags & WDCF_TH_RUN) == 0) { 413 chp->ch_queue->queue_freeze++; 414 wakeup(&chp->ch_thread); 415 return; 416 } 417 /* 418 * disable interrupts, all commands here should be quick 419 * enouth to be able to poll, and we don't go here that often 420 */ 421 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, 422 WDCTL_4BIT | WDCTL_IDS); 423 if (wdc->cap & WDC_CAPABILITY_SELECT) 424 wdc->select(chp, xfer->c_drive); 425 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0, 426 WDSD_IBM | (xfer->c_drive << 4)); 427 /* Don't try to set mode if controller can't be adjusted */ 428 if ((wdc->cap & WDC_CAPABILITY_MODE) == 0) 429 goto ready; 430 /* Also don't try if the drive didn't report its mode */ 431 if ((drvp->drive_flags & DRIVE_MODE) == 0) 432 goto ready; 433 errstring = "unbusy"; 434 if (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags)) 435 goto timeout; 436 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 437 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 438 errstring = "piomode"; 439 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags)) 440 goto timeout; 441 if (chp->ch_status & WDCS_ERR) { 442 if (chp->ch_error == WDCE_ABRT) { 443 /* 444 * some ATAPI drives rejects pio settings. 445 * all we can do here is fall back to PIO 0 446 */ 447 drvp->drive_flags &= ~DRIVE_MODE; 448 drvp->drive_flags &= ~(DRIVE_DMA|DRIVE_UDMA); 449 drvp->PIO_mode = 0; 450 drvp->DMA_mode = 0; 451 printf("%s:%d:%d: pio setting rejected, " 452 "falling back to PIO mode 0\n", 453 wdc->sc_dev.dv_xname, 454 chp->ch_channel, xfer->c_drive); 455 wdc->set_modes(chp); 456 goto ready; 457 } 458 goto error; 459 } 460 if (drvp->drive_flags & DRIVE_UDMA) { 461 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 462 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 463 } else if (drvp->drive_flags & DRIVE_DMA) { 464 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 465 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 466 } else { 467 goto ready; 468 } 469 errstring = "dmamode"; 470 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags)) 471 goto timeout; 472 if (chp->ch_status & WDCS_ERR) 473 goto error; 474 ready: 475 drvp->state = READY; 476 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, 477 WDCTL_4BIT); 478 } 479 /* start timeout machinery */ 480 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) 481 callout_reset(&chp->ch_callout, mstohz(sc_xfer->timeout), 482 wdctimeout, chp); 483 484 if (wdc->cap & WDC_CAPABILITY_SELECT) 485 wdc->select(chp, xfer->c_drive); 486 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0, 487 WDSD_IBM | (xfer->c_drive << 4)); 488 switch (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags) < 0) { 489 case WDCWAIT_OK: 490 break; 491 case WDCWAIT_TOUT: 492 printf("wdc_atapi_start: not ready, st = %02x\n", 493 chp->ch_status); 494 sc_xfer->error = XS_TIMEOUT; 495 wdc_atapi_reset(chp, xfer); 496 return; 497 case WDCWAIT_THR: 498 return; 499 } 500 501 /* 502 * Even with WDCS_ERR, the device should accept a command packet 503 * Limit length to what can be stuffed into the cylinder register 504 * (16 bits). Some CD-ROMs seem to interpret '0' as 65536, 505 * but not all devices do that and it's not obvious from the 506 * ATAPI spec that that behaviour should be expected. If more 507 * data is necessary, multiple data transfer phases will be done. 508 */ 509 510 wdccommand(chp, xfer->c_drive, ATAPI_PKT_CMD, 511 xfer->c_bcount <= 0xffff ? xfer->c_bcount : 0xffff, 512 0, 0, 0, 513 (xfer->c_flags & C_DMA) ? ATAPI_PKT_CMD_FTRE_DMA : 0); 514 515 /* 516 * If there is no interrupt for CMD input, busy-wait for it (done in 517 * the interrupt routine. If it is a polled command, call the interrupt 518 * routine until command is done. 519 */ 520 if ((sc_xfer->xs_periph->periph_cap & ATAPI_CFG_DRQ_MASK) != 521 ATAPI_CFG_IRQ_DRQ || (sc_xfer->xs_control & XS_CTL_POLL)) { 522 /* Wait for at last 400ns for status bit to be valid */ 523 DELAY(1); 524 if (chp->ch_flags & WDCF_DMA_WAIT) { 525 wdc_dmawait(chp, xfer, sc_xfer->timeout); 526 chp->ch_flags &= ~WDCF_DMA_WAIT; 527 } 528 wdc_atapi_intr(chp, xfer, 0); 529 } else { 530 chp->ch_flags |= WDCF_IRQ_WAIT; 531 } 532 if (sc_xfer->xs_control & XS_CTL_POLL) { 533 while ((sc_xfer->xs_status & XS_STS_DONE) == 0) { 534 /* Wait for at last 400ns for status bit to be valid */ 535 DELAY(1); 536 wdc_atapi_intr(chp, xfer, 0); 537 } 538 } 539 return; 540 timeout: 541 printf("%s:%d:%d: %s timed out\n", 542 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive, 543 errstring); 544 sc_xfer->error = XS_TIMEOUT; 545 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 546 wdc_atapi_reset(chp, xfer); 547 return; 548 error: 549 printf("%s:%d:%d: %s ", 550 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive, 551 errstring); 552 printf("error (0x%x)\n", chp->ch_error); 553 sc_xfer->error = XS_SHORTSENSE; 554 sc_xfer->sense.atapi_sense = chp->ch_error; 555 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 556 wdc_atapi_reset(chp, xfer); 557 return; 558 } 559 560 static int 561 wdc_atapi_intr(struct wdc_channel *chp, struct ata_xfer *xfer, int irq) 562 { 563 struct wdc_softc *wdc = chp->ch_wdc; 564 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 565 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 566 int len, phase, i, retries=0; 567 int ire; 568 int dma_flags = 0; 569 void *cmd; 570 571 WDCDEBUG_PRINT(("wdc_atapi_intr %s:%d:%d\n", 572 wdc->sc_dev.dv_xname, chp->ch_channel, drvp->drive), 573 DEBUG_INTR); 574 575 /* Is it not a transfer, but a control operation? */ 576 if (drvp->state < READY) { 577 printf("%s:%d:%d: bad state %d in wdc_atapi_intr\n", 578 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive, 579 drvp->state); 580 panic("wdc_atapi_intr: bad state"); 581 } 582 /* 583 * If we missed an interrupt in a PIO transfer, reset and restart. 584 * Don't try to continue transfer, we may have missed cycles. 585 */ 586 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 587 sc_xfer->error = XS_TIMEOUT; 588 wdc_atapi_reset(chp, xfer); 589 return 1; 590 } 591 592 /* Ack interrupt done in wdc_wait_for_unbusy */ 593 if (wdc->cap & WDC_CAPABILITY_SELECT) 594 wdc->select(chp, xfer->c_drive); 595 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0, 596 WDSD_IBM | (xfer->c_drive << 4)); 597 if (wdc_wait_for_unbusy(chp, 598 (irq == 0) ? sc_xfer->timeout : 0, AT_POLL) == WDCWAIT_TOUT) { 599 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 600 return 0; /* IRQ was not for us */ 601 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip=%d\n", 602 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive, 603 xfer->c_bcount, xfer->c_skip); 604 if (xfer->c_flags & C_DMA) { 605 ata_dmaerr(drvp, 606 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 607 } 608 sc_xfer->error = XS_TIMEOUT; 609 wdc_atapi_reset(chp, xfer); 610 return 1; 611 } 612 if (wdc->cap & WDC_CAPABILITY_IRQACK) 613 wdc->irqack(chp); 614 615 /* 616 * If we missed an IRQ and were using DMA, flag it as a DMA error 617 * and reset device. 618 */ 619 if ((xfer->c_flags & C_TIMEOU) && (xfer->c_flags & C_DMA)) { 620 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0); 621 sc_xfer->error = XS_RESET; 622 wdc_atapi_reset(chp, xfer); 623 return (1); 624 } 625 /* 626 * if the request sense command was aborted, report the short sense 627 * previously recorded, else continue normal processing 628 */ 629 630 if (xfer->c_flags & C_DMA) 631 dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN) 632 ? WDC_DMA_READ : 0; 633 again: 634 len = bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_cyl_lo], 0) + 635 256 * bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_cyl_hi], 0); 636 ire = bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_ireason], 0); 637 phase = (ire & (WDCI_CMD | WDCI_IN)) | (chp->ch_status & WDCS_DRQ); 638 WDCDEBUG_PRINT(("wdc_atapi_intr: c_bcount %d len %d st 0x%x err 0x%x " 639 "ire 0x%x :", xfer->c_bcount, 640 len, chp->ch_status, chp->ch_error, ire), DEBUG_INTR); 641 642 switch (phase) { 643 case PHASE_CMDOUT: 644 cmd = sc_xfer->cmd; 645 WDCDEBUG_PRINT(("PHASE_CMDOUT\n"), DEBUG_INTR); 646 /* Init the DMA channel if necessary */ 647 if (xfer->c_flags & C_DMA) { 648 if ((*wdc->dma_init)(wdc->dma_arg, 649 chp->ch_channel, xfer->c_drive, 650 xfer->c_databuf, xfer->c_bcount, dma_flags) != 0) { 651 sc_xfer->error = XS_DRIVER_STUFFUP; 652 break; 653 } 654 } 655 /* send packet command */ 656 /* Commands are 12 or 16 bytes long. It's 32-bit aligned */ 657 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) { 658 if (drvp->drive_flags & DRIVE_CAP32) 659 bus_space_write_multi_4(chp->data32iot, 660 chp->data32ioh, 0, (u_int32_t *)cmd, 661 sc_xfer->cmdlen >> 2); 662 else 663 bus_space_write_multi_2(chp->cmd_iot, 664 chp->cmd_iohs[wd_data], 0, (u_int16_t *)cmd, 665 sc_xfer->cmdlen >> 1); 666 } else { 667 if (drvp->drive_flags & DRIVE_CAP32) 668 bus_space_write_multi_stream_4(chp->data32iot, 669 chp->data32ioh, 0, (u_int32_t *)cmd, 670 sc_xfer->cmdlen >> 2); 671 else 672 bus_space_write_multi_stream_2(chp->cmd_iot, 673 chp->cmd_iohs[wd_data], 0, (u_int16_t *)cmd, 674 sc_xfer->cmdlen >> 1); 675 } 676 /* Start the DMA channel if necessary */ 677 if (xfer->c_flags & C_DMA) { 678 (*wdc->dma_start)(wdc->dma_arg, 679 chp->ch_channel, xfer->c_drive); 680 chp->ch_flags |= WDCF_DMA_WAIT; 681 } 682 683 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 684 chp->ch_flags |= WDCF_IRQ_WAIT; 685 } 686 return 1; 687 688 case PHASE_DATAOUT: 689 /* write data */ 690 WDCDEBUG_PRINT(("PHASE_DATAOUT\n"), DEBUG_INTR); 691 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 || 692 (xfer->c_flags & C_DMA) != 0) { 693 printf("wdc_atapi_intr: bad data phase DATAOUT\n"); 694 if (xfer->c_flags & C_DMA) { 695 ata_dmaerr(drvp, 696 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 697 } 698 sc_xfer->error = XS_TIMEOUT; 699 wdc_atapi_reset(chp, xfer); 700 return 1; 701 } 702 if (xfer->c_bcount < len) { 703 printf("wdc_atapi_intr: warning: write only " 704 "%d of %d requested bytes\n", xfer->c_bcount, len); 705 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) { 706 bus_space_write_multi_2(chp->cmd_iot, 707 chp->cmd_iohs[wd_data], 0, 708 (u_int16_t *)((char *)xfer->c_databuf + 709 xfer->c_skip), 710 xfer->c_bcount >> 1); 711 } else { 712 bus_space_write_multi_stream_2(chp->cmd_iot, 713 chp->cmd_iohs[wd_data], 0, 714 (u_int16_t *)((char *)xfer->c_databuf + 715 xfer->c_skip), 716 xfer->c_bcount >> 1); 717 } 718 for (i = xfer->c_bcount; i < len; i += 2) 719 bus_space_write_2(chp->cmd_iot, 720 chp->cmd_iohs[wd_data], 0, 0); 721 xfer->c_skip += xfer->c_bcount; 722 xfer->c_bcount = 0; 723 } else { 724 if (drvp->drive_flags & DRIVE_CAP32) { 725 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 726 bus_space_write_multi_4(chp->data32iot, 727 chp->data32ioh, 0, 728 (u_int32_t *)((char *)xfer->c_databuf + 729 xfer->c_skip), 730 len >> 2); 731 else 732 bus_space_write_multi_stream_4(chp->data32iot, 733 chp->data32ioh, wd_data, 734 (u_int32_t *)((char *)xfer->c_databuf + 735 xfer->c_skip), 736 len >> 2); 737 738 xfer->c_skip += len & 0xfffffffc; 739 xfer->c_bcount -= len & 0xfffffffc; 740 len = len & 0x03; 741 } 742 if (len > 0) { 743 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 744 bus_space_write_multi_2(chp->cmd_iot, 745 chp->cmd_iohs[wd_data], 0, 746 (u_int16_t *)((char *)xfer->c_databuf + 747 xfer->c_skip), 748 len >> 1); 749 else 750 bus_space_write_multi_stream_2(chp->cmd_iot, 751 chp->cmd_iohs[wd_data], 0, 752 (u_int16_t *)((char *)xfer->c_databuf + 753 xfer->c_skip), 754 len >> 1); 755 xfer->c_skip += len; 756 xfer->c_bcount -= len; 757 } 758 } 759 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 760 chp->ch_flags |= WDCF_IRQ_WAIT; 761 } 762 return 1; 763 764 case PHASE_DATAIN: 765 /* Read data */ 766 WDCDEBUG_PRINT(("PHASE_DATAIN\n"), DEBUG_INTR); 767 if ((sc_xfer->xs_control & XS_CTL_DATA_IN) == 0 || 768 (xfer->c_flags & C_DMA) != 0) { 769 printf("wdc_atapi_intr: bad data phase DATAIN\n"); 770 if (xfer->c_flags & C_DMA) { 771 ata_dmaerr(drvp, 772 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 773 } 774 sc_xfer->error = XS_TIMEOUT; 775 wdc_atapi_reset(chp, xfer); 776 return 1; 777 } 778 if (xfer->c_bcount < len) { 779 printf("wdc_atapi_intr: warning: reading only " 780 "%d of %d bytes\n", xfer->c_bcount, len); 781 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) { 782 bus_space_read_multi_2(chp->cmd_iot, 783 chp->cmd_iohs[wd_data], 0, 784 (u_int16_t *)((char *)xfer->c_databuf + 785 xfer->c_skip), 786 xfer->c_bcount >> 1); 787 } else { 788 bus_space_read_multi_stream_2(chp->cmd_iot, 789 chp->cmd_iohs[wd_data], 0, 790 (u_int16_t *)((char *)xfer->c_databuf + 791 xfer->c_skip), 792 xfer->c_bcount >> 1); 793 } 794 wdcbit_bucket(chp, len - xfer->c_bcount); 795 xfer->c_skip += xfer->c_bcount; 796 xfer->c_bcount = 0; 797 } else { 798 if (drvp->drive_flags & DRIVE_CAP32) { 799 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 800 bus_space_read_multi_4(chp->data32iot, 801 chp->data32ioh, 0, 802 (u_int32_t *)((char *)xfer->c_databuf + 803 xfer->c_skip), 804 len >> 2); 805 else 806 bus_space_read_multi_stream_4(chp->data32iot, 807 chp->data32ioh, wd_data, 808 (u_int32_t *)((char *)xfer->c_databuf + 809 xfer->c_skip), 810 len >> 2); 811 812 xfer->c_skip += len & 0xfffffffc; 813 xfer->c_bcount -= len & 0xfffffffc; 814 len = len & 0x03; 815 } 816 if (len > 0) { 817 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 818 bus_space_read_multi_2(chp->cmd_iot, 819 chp->cmd_iohs[wd_data], 0, 820 (u_int16_t *)((char *)xfer->c_databuf + 821 xfer->c_skip), 822 len >> 1); 823 else 824 bus_space_read_multi_stream_2(chp->cmd_iot, 825 chp->cmd_iohs[wd_data], 0, 826 (u_int16_t *)((char *)xfer->c_databuf + 827 xfer->c_skip), 828 len >> 1); 829 xfer->c_skip += len; 830 xfer->c_bcount -=len; 831 } 832 } 833 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 834 chp->ch_flags |= WDCF_IRQ_WAIT; 835 } 836 return 1; 837 838 case PHASE_ABORTED: 839 case PHASE_COMPLETED: 840 WDCDEBUG_PRINT(("PHASE_COMPLETED\n"), DEBUG_INTR); 841 if (xfer->c_flags & C_DMA) { 842 xfer->c_bcount -= sc_xfer->datalen; 843 } 844 sc_xfer->resid = xfer->c_bcount; 845 wdc_atapi_phase_complete(xfer); 846 return(1); 847 848 default: 849 if (++retries<500) { 850 DELAY(100); 851 chp->ch_status = bus_space_read_1(chp->cmd_iot, 852 chp->cmd_iohs[wd_status], 0); 853 chp->ch_error = bus_space_read_1(chp->cmd_iot, 854 chp->cmd_iohs[wd_error], 0); 855 goto again; 856 } 857 printf("wdc_atapi_intr: unknown phase 0x%x\n", phase); 858 if (chp->ch_status & WDCS_ERR) { 859 sc_xfer->error = XS_SHORTSENSE; 860 sc_xfer->sense.atapi_sense = chp->ch_error; 861 } else { 862 if (xfer->c_flags & C_DMA) { 863 ata_dmaerr(drvp, 864 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 865 } 866 sc_xfer->error = XS_RESET; 867 wdc_atapi_reset(chp, xfer); 868 return (1); 869 } 870 } 871 WDCDEBUG_PRINT(("wdc_atapi_intr: wdc_atapi_done() (end), error 0x%x " 872 "sense 0x%x\n", sc_xfer->error, sc_xfer->sense.atapi_sense), 873 DEBUG_INTR); 874 wdc_atapi_done(chp, xfer); 875 return (1); 876 } 877 878 static void 879 wdc_atapi_phase_complete(struct ata_xfer *xfer) 880 { 881 struct wdc_channel *chp = xfer->c_chp; 882 struct wdc_softc *wdc = chp->ch_wdc; 883 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 884 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 885 886 /* wait for DSC if needed */ 887 if (drvp->drive_flags & DRIVE_ATAPIST) { 888 WDCDEBUG_PRINT(("wdc_atapi_phase_complete(%s:%d:%d) " 889 "polldsc %d\n", wdc->sc_dev.dv_xname, chp->ch_channel, 890 xfer->c_drive, xfer->c_dscpoll), DEBUG_XFERS); 891 #if 1 892 if (cold) 893 panic("wdc_atapi_phase_complete: cold"); 894 #endif 895 if (wdcwait(chp, WDCS_DSC, WDCS_DSC, 10, 896 AT_POLL) == WDCWAIT_TOUT) { 897 /* 10ms not enough, try again in 1 tick */ 898 if (xfer->c_dscpoll++ > 899 mstohz(sc_xfer->timeout)) { 900 printf("%s:%d:%d: wait_for_dsc " 901 "failed\n", 902 wdc->sc_dev.dv_xname, 903 chp->ch_channel, xfer->c_drive); 904 sc_xfer->error = XS_TIMEOUT; 905 wdc_atapi_reset(chp, xfer); 906 return; 907 } else 908 callout_reset(&chp->ch_callout, 1, 909 wdc_atapi_polldsc, xfer); 910 return; 911 } 912 } 913 914 /* 915 * Some drive occasionally set WDCS_ERR with 916 * "ATA illegal length indication" in the error 917 * register. If we read some data the sense is valid 918 * anyway, so don't report the error. 919 */ 920 if (chp->ch_status & WDCS_ERR && 921 ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 || 922 sc_xfer->resid == sc_xfer->datalen)) { 923 /* save the short sense */ 924 sc_xfer->error = XS_SHORTSENSE; 925 sc_xfer->sense.atapi_sense = chp->ch_error; 926 if ((sc_xfer->xs_periph->periph_quirks & 927 PQUIRK_NOSENSE) == 0) { 928 /* ask scsipi to send a REQUEST_SENSE */ 929 sc_xfer->error = XS_BUSY; 930 sc_xfer->status = SCSI_CHECK; 931 } else if (wdc->dma_status & 932 (WDC_DMAST_NOIRQ | WDC_DMAST_ERR)) { 933 ata_dmaerr(drvp, 934 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 935 sc_xfer->error = XS_RESET; 936 wdc_atapi_reset(chp, xfer); 937 return; 938 } 939 } 940 if (xfer->c_bcount != 0) { 941 WDCDEBUG_PRINT(("wdc_atapi_intr: bcount value is " 942 "%d after io\n", xfer->c_bcount), DEBUG_XFERS); 943 } 944 #ifdef DIAGNOSTIC 945 if (xfer->c_bcount < 0) { 946 printf("wdc_atapi_intr warning: bcount value " 947 "is %d after io\n", xfer->c_bcount); 948 } 949 #endif 950 WDCDEBUG_PRINT(("wdc_atapi_phase_complete: wdc_atapi_done(), " 951 "error 0x%x sense 0x%x\n", sc_xfer->error, 952 sc_xfer->sense.atapi_sense), DEBUG_INTR); 953 wdc_atapi_done(chp, xfer); 954 } 955 956 static void 957 wdc_atapi_done(struct wdc_channel *chp, struct ata_xfer *xfer) 958 { 959 struct wdc_softc *wdc = chp->ch_wdc; 960 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 961 962 WDCDEBUG_PRINT(("wdc_atapi_done %s:%d:%d: flags 0x%x\n", 963 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive, 964 (u_int)xfer->c_flags), DEBUG_XFERS); 965 callout_stop(&chp->ch_callout); 966 /* remove this command from xfer queue */ 967 wdc_free_xfer(chp, xfer); 968 969 WDCDEBUG_PRINT(("wdc_atapi_done: scsipi_done\n"), DEBUG_XFERS); 970 scsipi_done(sc_xfer); 971 WDCDEBUG_PRINT(("wdcstart from wdc_atapi_done, flags 0x%x\n", 972 chp->ch_flags), DEBUG_XFERS); 973 wdcstart(chp); 974 } 975 976 static void 977 wdc_atapi_reset(struct wdc_channel *chp, struct ata_xfer *xfer) 978 { 979 struct wdc_softc *wdc = chp->ch_wdc; 980 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 981 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 982 983 wdccommandshort(chp, xfer->c_drive, ATAPI_SOFT_RESET); 984 drvp->state = 0; 985 if (wdc_wait_for_unbusy(chp, WDC_RESET_WAIT, AT_POLL) != 0) { 986 printf("%s:%d:%d: reset failed\n", 987 wdc->sc_dev.dv_xname, chp->ch_channel, 988 xfer->c_drive); 989 sc_xfer->error = XS_SELTIMEOUT; 990 } 991 wdc_atapi_done(chp, xfer); 992 return; 993 } 994 995 static void 996 wdc_atapi_polldsc(void *arg) 997 { 998 999 wdc_atapi_phase_complete(arg); 1000 } 1001