1 /* $NetBSD: atapi_wdc.c,v 1.29 1999/11/04 21:16:53 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 #ifndef WDCDEBUG 37 #define WDCDEBUG 38 #endif /* WDCDEBUG */ 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/file.h> 44 #include <sys/stat.h> 45 #include <sys/buf.h> 46 #include <sys/malloc.h> 47 #include <sys/device.h> 48 #include <sys/syslog.h> 49 #include <sys/proc.h> 50 51 #include <vm/vm.h> 52 53 #include <machine/intr.h> 54 #include <machine/bus.h> 55 56 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 57 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 58 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 59 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 60 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 61 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 62 63 #include <dev/ata/atareg.h> 64 #include <dev/ata/atavar.h> 65 #include <dev/ic/wdcreg.h> 66 #include <dev/ic/wdcvar.h> 67 #include <dev/scsipi/scsipi_all.h> 68 #include <dev/scsipi/scsipiconf.h> 69 #include <dev/scsipi/atapiconf.h> 70 71 #define DEBUG_INTR 0x01 72 #define DEBUG_XFERS 0x02 73 #define DEBUG_STATUS 0x04 74 #define DEBUG_FUNCS 0x08 75 #define DEBUG_PROBE 0x10 76 #ifdef WDCDEBUG 77 int wdcdebug_atapi_mask = 0; 78 #define WDCDEBUG_PRINT(args, level) \ 79 if (wdcdebug_atapi_mask & (level)) \ 80 printf args 81 #else 82 #define WDCDEBUG_PRINT(args, level) 83 #endif 84 85 #define ATAPI_DELAY 10 /* 10 ms, this is used only before sending a cmd */ 86 87 void wdc_atapi_minphys __P((struct buf *bp)); 88 void wdc_atapi_start __P((struct channel_softc *,struct wdc_xfer *)); 89 int wdc_atapi_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 90 void wdc_atapi_kill_xfer __P((struct channel_softc *, struct wdc_xfer *)); 91 int wdc_atapi_ctrl __P((struct channel_softc *, struct wdc_xfer *, int)); 92 void wdc_atapi_done __P((struct channel_softc *, struct wdc_xfer *)); 93 void wdc_atapi_reset __P((struct channel_softc *, struct wdc_xfer *)); 94 int wdc_atapi_send_cmd __P((struct scsipi_xfer *sc_xfer)); 95 96 #define MAX_SIZE MAXPHYS 97 98 void 99 wdc_atapibus_attach(chp) 100 struct channel_softc *chp; 101 { 102 struct wdc_softc *wdc = chp->wdc; 103 int channel = chp->channel; 104 struct ata_atapi_attach aa_link; 105 106 /* 107 * Fill in the adapter. 108 */ 109 wdc->sc_atapi_adapter.scsipi_cmd = wdc_atapi_send_cmd; 110 wdc->sc_atapi_adapter.scsipi_minphys = wdc_atapi_minphys; 111 112 memset(&aa_link, 0, sizeof(struct ata_atapi_attach)); 113 aa_link.aa_type = T_ATAPI; 114 aa_link.aa_channel = channel; 115 aa_link.aa_openings = 1; 116 aa_link.aa_drv_data = chp->ch_drive; /* pass the whole array */ 117 aa_link.aa_bus_private = &wdc->sc_atapi_adapter; 118 chp->atapibus = config_found(&wdc->sc_dev, (void *)&aa_link, 119 atapi_print); 120 } 121 122 void 123 wdc_atapi_minphys (struct buf *bp) 124 { 125 if(bp->b_bcount > MAX_SIZE) 126 bp->b_bcount = MAX_SIZE; 127 minphys(bp); 128 } 129 130 /* 131 * Kill off all pending xfers for a scsipi_link. 132 * 133 * Must be called at splbio(). 134 */ 135 void 136 atapi_kill_pending(sc_link) 137 struct scsipi_link *sc_link; 138 { 139 struct wdc_softc *wdc = (void *)sc_link->adapter_softc; 140 struct channel_softc *chp = 141 wdc->channels[sc_link->scsipi_atapi.channel]; 142 143 wdc_kill_pending(chp); 144 } 145 146 void 147 wdc_atapi_kill_xfer(chp, xfer) 148 struct channel_softc *chp; 149 struct wdc_xfer *xfer; 150 { 151 struct scsipi_xfer *sc_xfer = xfer->cmd; 152 153 untimeout(wdctimeout, chp); 154 /* remove this command from xfer queue */ 155 wdc_free_xfer(chp, xfer); 156 sc_xfer->xs_status |= XS_STS_DONE; 157 sc_xfer->error = XS_DRIVER_STUFFUP; 158 scsipi_done(sc_xfer); 159 } 160 161 int 162 wdc_atapi_get_params(ab_link, drive, flags, id) 163 struct scsipi_link *ab_link; 164 u_int8_t drive; 165 int flags; 166 struct ataparams *id; 167 { 168 struct wdc_softc *wdc = (void*)ab_link->adapter_softc; 169 struct channel_softc *chp = 170 wdc->channels[ab_link->scsipi_atapi.channel]; 171 struct wdc_command wdc_c; 172 173 /* if no ATAPI device detected at wdc attach time, skip */ 174 /* 175 * XXX this will break scsireprobe if this is of any interest for 176 * ATAPI devices one day. 177 */ 178 if ((chp->ch_drive[drive].drive_flags & DRIVE_ATAPI) == 0) { 179 WDCDEBUG_PRINT(("wdc_atapi_get_params: drive %d not present\n", 180 drive), DEBUG_PROBE); 181 return -1; 182 } 183 memset(&wdc_c, 0, sizeof(struct wdc_command)); 184 wdc_c.r_command = ATAPI_SOFT_RESET; 185 wdc_c.r_st_bmask = 0; 186 wdc_c.r_st_pmask = 0; 187 wdc_c.flags = AT_POLL; 188 wdc_c.timeout = WDC_RESET_WAIT; 189 if (wdc_exec_command(&chp->ch_drive[drive], &wdc_c) != WDC_COMPLETE) { 190 printf("wdc_atapi_get_params: ATAPI_SOFT_RESET failed for" 191 " drive %s:%d:%d: driver failed\n", 192 chp->wdc->sc_dev.dv_xname, chp->channel, drive); 193 panic("wdc_atapi_get_params"); 194 } 195 if (wdc_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 196 WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_SOFT_RESET " 197 "failed for drive %s:%d:%d: error 0x%x\n", 198 chp->wdc->sc_dev.dv_xname, chp->channel, drive, 199 wdc_c.r_error), DEBUG_PROBE); 200 return -1; 201 } 202 chp->ch_drive[drive].state = 0; 203 204 bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_status); 205 206 /* Some ATAPI devices need a bit more time after software reset. */ 207 delay(5000); 208 if (ata_get_params(&chp->ch_drive[drive], AT_POLL, id) != 0) { 209 WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_IDENTIFY_DEVICE " 210 "failed for drive %s:%d:%d: error 0x%x\n", 211 chp->wdc->sc_dev.dv_xname, chp->channel, drive, 212 wdc_c.r_error), DEBUG_PROBE); 213 return -1; 214 } 215 return COMPLETE; 216 } 217 218 int 219 wdc_atapi_send_cmd(sc_xfer) 220 struct scsipi_xfer *sc_xfer; 221 { 222 struct wdc_softc *wdc = (void*)sc_xfer->sc_link->adapter_softc; 223 struct wdc_xfer *xfer; 224 int flags = sc_xfer->xs_control; 225 int channel = sc_xfer->sc_link->scsipi_atapi.channel; 226 int drive = sc_xfer->sc_link->scsipi_atapi.drive; 227 int s, ret; 228 229 WDCDEBUG_PRINT(("wdc_atapi_send_cmd %s:%d:%d\n", 230 wdc->sc_dev.dv_xname, channel, drive), DEBUG_XFERS); 231 232 xfer = wdc_get_xfer((flags & XS_CTL_NOSLEEP) ? 233 WDC_NOSLEEP : WDC_CANSLEEP); 234 if (xfer == NULL) { 235 return TRY_AGAIN_LATER; 236 } 237 if (sc_xfer->xs_control & XS_CTL_POLL) 238 xfer->c_flags |= C_POLL; 239 xfer->drive = drive; 240 xfer->c_flags |= C_ATAPI; 241 xfer->cmd = sc_xfer; 242 xfer->databuf = sc_xfer->data; 243 xfer->c_bcount = sc_xfer->datalen; 244 xfer->c_start = wdc_atapi_start; 245 xfer->c_intr = wdc_atapi_intr; 246 xfer->c_kill_xfer = wdc_atapi_kill_xfer; 247 s = splbio(); 248 wdc_exec_xfer(wdc->channels[channel], xfer); 249 #ifdef DIAGNOSTIC 250 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 && 251 (sc_xfer->xs_status & XS_STS_DONE) == 0) 252 panic("wdc_atapi_send_cmd: polled command not done"); 253 #endif 254 ret = (sc_xfer->xs_status & XS_STS_DONE) ? 255 COMPLETE : SUCCESSFULLY_QUEUED; 256 splx(s); 257 return ret; 258 } 259 260 void 261 wdc_atapi_start(chp, xfer) 262 struct channel_softc *chp; 263 struct wdc_xfer *xfer; 264 { 265 struct scsipi_xfer *sc_xfer = xfer->cmd; 266 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 267 268 WDCDEBUG_PRINT(("wdc_atapi_start %s:%d:%d, scsi flags 0x%x \n", 269 chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive, 270 sc_xfer->xs_control), DEBUG_XFERS); 271 /* Adjust C_DMA, it may have changed if we are requesting sense */ 272 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 273 (sc_xfer->datalen > 0 || (xfer->c_flags & C_SENSE))) 274 xfer->c_flags |= C_DMA; 275 else 276 xfer->c_flags &= ~C_DMA; 277 /* start timeout machinery */ 278 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) 279 timeout(wdctimeout, chp, sc_xfer->timeout * hz / 1000); 280 /* Do control operations specially. */ 281 if (drvp->state < READY) { 282 if (drvp->state != PIOMODE) { 283 printf("%s:%d:%d: bad state %d in wdc_atapi_start\n", 284 chp->wdc->sc_dev.dv_xname, chp->channel, 285 xfer->drive, drvp->state); 286 panic("wdc_atapi_start: bad state"); 287 } 288 wdc_atapi_ctrl(chp, xfer, 0); 289 return; 290 } 291 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 292 WDSD_IBM | (xfer->drive << 4)); 293 if (wait_for_unbusy(chp, ATAPI_DELAY) < 0) { 294 printf("wdc_atapi_start: not ready, st = %02x\n", 295 chp->ch_status); 296 sc_xfer->error = XS_TIMEOUT; 297 wdc_atapi_reset(chp, xfer); 298 return; 299 } 300 301 /* 302 * Even with WDCS_ERR, the device should accept a command packet 303 * Limit length to what can be stuffed into the cylinder register 304 * (16 bits). Some CD-ROMs seem to interpret '0' as 65536, 305 * but not all devices do that and it's not obvious from the 306 * ATAPI spec that that behaviour should be expected. If more 307 * data is necessary, multiple data transfer phases will be done. 308 */ 309 310 wdccommand(chp, xfer->drive, ATAPI_PKT_CMD, 311 xfer->c_bcount <= 0xffff ? xfer->c_bcount : 0xffff, 312 0, 0, 0, 313 (xfer->c_flags & C_DMA) ? ATAPI_PKT_CMD_FTRE_DMA : 0); 314 315 /* 316 * If there is no interrupt for CMD input, busy-wait for it (done in 317 * the interrupt routine. If it is a polled command, call the interrupt 318 * routine until command is done. 319 */ 320 if ((sc_xfer->sc_link->scsipi_atapi.cap & ATAPI_CFG_DRQ_MASK) != 321 ATAPI_CFG_IRQ_DRQ || (sc_xfer->xs_control & XS_CTL_POLL)) { 322 /* Wait for at last 400ns for status bit to be valid */ 323 DELAY(1); 324 wdc_atapi_intr(chp, xfer, 0); 325 } else { 326 chp->ch_flags |= WDCF_IRQ_WAIT; 327 } 328 if (sc_xfer->xs_control & XS_CTL_POLL) { 329 while ((sc_xfer->xs_status & XS_STS_DONE) == 0) { 330 /* Wait for at last 400ns for status bit to be valid */ 331 DELAY(1); 332 wdc_atapi_intr(chp, xfer, 0); 333 } 334 } 335 } 336 337 int 338 wdc_atapi_intr(chp, xfer, irq) 339 struct channel_softc *chp; 340 struct wdc_xfer *xfer; 341 int irq; 342 { 343 struct scsipi_xfer *sc_xfer = xfer->cmd; 344 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 345 int len, phase, i, retries=0; 346 int ire, dma_err = 0; 347 int dma_flags = 0; 348 struct scsipi_generic _cmd_reqsense; 349 struct scsipi_sense *cmd_reqsense = 350 (struct scsipi_sense *)&_cmd_reqsense; 351 void *cmd; 352 353 WDCDEBUG_PRINT(("wdc_atapi_intr %s:%d:%d\n", 354 chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive), DEBUG_INTR); 355 356 /* Is it not a transfer, but a control operation? */ 357 if (drvp->state < READY) { 358 printf("%s:%d:%d: bad state %d in wdc_atapi_intr\n", 359 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 360 drvp->state); 361 panic("wdc_atapi_intr: bad state\n"); 362 } 363 /* 364 * If we missed an interrupt in a PIO transfer, reset and restart. 365 * Don't try to continue transfer, we may have missed cycles. 366 */ 367 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 368 sc_xfer->error = XS_TIMEOUT; 369 wdc_atapi_reset(chp, xfer); 370 return 1; 371 } 372 373 /* Ack interrupt done in wait_for_unbusy */ 374 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 375 WDSD_IBM | (xfer->drive << 4)); 376 if (wait_for_unbusy(chp, 377 (irq == 0) ? sc_xfer->timeout : 0) != 0) { 378 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 379 return 0; /* IRQ was not for us */ 380 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip=%d\n", 381 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 382 xfer->c_bcount, xfer->c_skip); 383 if (xfer->c_flags & C_DMA) 384 drvp->n_dmaerrs++; 385 sc_xfer->error = XS_TIMEOUT; 386 wdc_atapi_reset(chp, xfer); 387 return 1; 388 } 389 /* If we missed an IRQ and were using DMA, flag it as a DMA error */ 390 if ((xfer->c_flags & C_TIMEOU) && (xfer->c_flags & C_DMA)) 391 drvp->n_dmaerrs++; 392 /* 393 * if the request sense command was aborted, report the short sense 394 * previously recorded, else continue normal processing 395 */ 396 397 if ((xfer->c_flags & C_SENSE) != 0 && 398 (chp->ch_status & WDCS_ERR) != 0 && 399 (chp->ch_error & WDCE_ABRT) != 0) { 400 WDCDEBUG_PRINT(("wdc_atapi_intr: request_sense aborted, " 401 "calling wdc_atapi_done(), sense 0x%x\n", 402 sc_xfer->sense.atapi_sense), DEBUG_INTR); 403 wdc_atapi_done(chp, xfer); 404 return 1; 405 } 406 407 if (xfer->c_flags & C_DMA) { 408 dma_flags = ((sc_xfer->xs_control & XS_CTL_DATA_IN) || 409 (xfer->c_flags & C_SENSE)) ? WDC_DMA_READ : 0; 410 dma_flags |= sc_xfer->xs_control & XS_CTL_POLL ? 411 WDC_DMA_POLL : 0; 412 } 413 again: 414 len = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_lo) + 415 256 * bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_hi); 416 ire = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_ireason); 417 phase = (ire & (WDCI_CMD | WDCI_IN)) | (chp->ch_status & WDCS_DRQ); 418 WDCDEBUG_PRINT(("wdc_atapi_intr: c_bcount %d len %d st 0x%x err 0x%x " 419 "ire 0x%x :", xfer->c_bcount, 420 len, chp->ch_status, chp->ch_error, ire), DEBUG_INTR); 421 422 switch (phase) { 423 case PHASE_CMDOUT: 424 if (xfer->c_flags & C_SENSE) { 425 memset(cmd_reqsense, 0, sizeof(struct scsipi_generic)); 426 cmd_reqsense->opcode = REQUEST_SENSE; 427 cmd_reqsense->length = xfer->c_bcount; 428 cmd = cmd_reqsense; 429 } else { 430 cmd = sc_xfer->cmd; 431 } 432 WDCDEBUG_PRINT(("PHASE_CMDOUT\n"), DEBUG_INTR); 433 /* Init the DMA channel if necessary */ 434 if (xfer->c_flags & C_DMA) { 435 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 436 chp->channel, xfer->drive, 437 xfer->databuf, xfer->c_bcount, dma_flags) != 0) { 438 sc_xfer->error = XS_DRIVER_STUFFUP; 439 break; 440 } 441 } 442 /* send packet command */ 443 /* Commands are 12 or 16 bytes long. It's 32-bit aligned */ 444 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) { 445 if (drvp->drive_flags & DRIVE_CAP32) { 446 bus_space_write_multi_4(chp->data32iot, 447 chp->data32ioh, 0, 448 (u_int32_t *)cmd, 449 sc_xfer->cmdlen >> 2); 450 } else { 451 bus_space_write_multi_2(chp->cmd_iot, 452 chp->cmd_ioh, wd_data, 453 (u_int16_t *)cmd, 454 sc_xfer->cmdlen >> 1); 455 } 456 } else { 457 if (drvp->drive_flags & DRIVE_CAP32) { 458 bus_space_write_multi_stream_4(chp->data32iot, 459 chp->data32ioh, 0, 460 (u_int32_t *)cmd, 461 sc_xfer->cmdlen >> 2); 462 } else { 463 bus_space_write_multi_stream_2(chp->cmd_iot, 464 chp->cmd_ioh, wd_data, 465 (u_int16_t *)cmd, 466 sc_xfer->cmdlen >> 1); 467 } 468 } 469 /* Start the DMA channel if necessary */ 470 if (xfer->c_flags & C_DMA) { 471 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 472 chp->channel, xfer->drive, dma_flags); 473 } 474 475 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 476 chp->ch_flags |= WDCF_IRQ_WAIT; 477 } 478 return 1; 479 480 case PHASE_DATAOUT: 481 /* write data */ 482 WDCDEBUG_PRINT(("PHASE_DATAOUT\n"), DEBUG_INTR); 483 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 || 484 (xfer->c_flags & C_DMA) != 0) { 485 printf("wdc_atapi_intr: bad data phase DATAOUT\n"); 486 if (xfer->c_flags & C_DMA) { 487 (*chp->wdc->dma_finish)(chp->wdc->dma_arg, 488 chp->channel, xfer->drive, dma_flags); 489 drvp->n_dmaerrs++; 490 } 491 sc_xfer->error = XS_TIMEOUT; 492 wdc_atapi_reset(chp, xfer); 493 return 1; 494 } 495 if (xfer->c_bcount < len) { 496 printf("wdc_atapi_intr: warning: write only " 497 "%d of %d requested bytes\n", xfer->c_bcount, len); 498 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) { 499 bus_space_write_multi_2(chp->cmd_iot, 500 chp->cmd_ioh, wd_data, 501 (u_int16_t *)((char *)xfer->databuf + 502 xfer->c_skip), 503 xfer->c_bcount >> 1); 504 } else { 505 bus_space_write_multi_stream_2(chp->cmd_iot, 506 chp->cmd_ioh, wd_data, 507 (u_int16_t *)((char *)xfer->databuf + 508 xfer->c_skip), 509 xfer->c_bcount >> 1); 510 } 511 for (i = xfer->c_bcount; i < len; i += 2) 512 bus_space_write_2(chp->cmd_iot, chp->cmd_ioh, 513 wd_data, 0); 514 xfer->c_skip += xfer->c_bcount; 515 xfer->c_bcount = 0; 516 } else { 517 if (drvp->drive_flags & DRIVE_CAP32) { 518 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 519 bus_space_write_multi_4(chp->data32iot, 520 chp->data32ioh, 0, 521 (u_int32_t *)((char *)xfer->databuf + 522 xfer->c_skip), 523 len >> 2); 524 else 525 bus_space_write_multi_stream_4(chp->data32iot, 526 chp->data32ioh, wd_data, 527 (u_int32_t *)((char *)xfer->databuf + 528 xfer->c_skip), 529 len >> 2); 530 531 xfer->c_skip += len & 0xfffffffc; 532 xfer->c_bcount -= len & 0xfffffffc; 533 len = len & 0x03; 534 } 535 if (len > 0) { 536 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 537 bus_space_write_multi_2(chp->cmd_iot, 538 chp->cmd_ioh, wd_data, 539 (u_int16_t *)((char *)xfer->databuf + 540 xfer->c_skip), 541 len >> 1); 542 else 543 bus_space_write_multi_stream_2(chp->cmd_iot, 544 chp->cmd_ioh, wd_data, 545 (u_int16_t *)((char *)xfer->databuf + 546 xfer->c_skip), 547 len >> 1); 548 xfer->c_skip += len; 549 xfer->c_bcount -= len; 550 } 551 } 552 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 553 chp->ch_flags |= WDCF_IRQ_WAIT; 554 } 555 return 1; 556 557 case PHASE_DATAIN: 558 /* Read data */ 559 WDCDEBUG_PRINT(("PHASE_DATAIN\n"), DEBUG_INTR); 560 if (((sc_xfer->xs_control & XS_CTL_DATA_IN) == 0 && 561 (xfer->c_flags & C_SENSE) == 0) || 562 (xfer->c_flags & C_DMA) != 0) { 563 printf("wdc_atapi_intr: bad data phase DATAIN\n"); 564 if (xfer->c_flags & C_DMA) { 565 (*chp->wdc->dma_finish)(chp->wdc->dma_arg, 566 chp->channel, xfer->drive, dma_flags); 567 drvp->n_dmaerrs++; 568 } 569 sc_xfer->error = XS_TIMEOUT; 570 wdc_atapi_reset(chp, xfer); 571 return 1; 572 } 573 if (xfer->c_bcount < len) { 574 printf("wdc_atapi_intr: warning: reading only " 575 "%d of %d bytes\n", xfer->c_bcount, len); 576 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) { 577 bus_space_read_multi_2(chp->cmd_iot, 578 chp->cmd_ioh, wd_data, 579 (u_int16_t *)((char *)xfer->databuf + 580 xfer->c_skip), 581 xfer->c_bcount >> 1); 582 } else { 583 bus_space_read_multi_stream_2(chp->cmd_iot, 584 chp->cmd_ioh, wd_data, 585 (u_int16_t *)((char *)xfer->databuf + 586 xfer->c_skip), 587 xfer->c_bcount >> 1); 588 } 589 wdcbit_bucket(chp, len - xfer->c_bcount); 590 xfer->c_skip += xfer->c_bcount; 591 xfer->c_bcount = 0; 592 } else { 593 if (drvp->drive_flags & DRIVE_CAP32) { 594 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 595 bus_space_read_multi_4(chp->data32iot, 596 chp->data32ioh, 0, 597 (u_int32_t *)((char *)xfer->databuf + 598 xfer->c_skip), 599 len >> 2); 600 else 601 bus_space_read_multi_stream_4(chp->data32iot, 602 chp->data32ioh, wd_data, 603 (u_int32_t *)((char *)xfer->databuf + 604 xfer->c_skip), 605 len >> 2); 606 607 xfer->c_skip += len & 0xfffffffc; 608 xfer->c_bcount -= len & 0xfffffffc; 609 len = len & 0x03; 610 } 611 if (len > 0) { 612 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 613 bus_space_read_multi_2(chp->cmd_iot, 614 chp->cmd_ioh, wd_data, 615 (u_int16_t *)((char *)xfer->databuf + 616 xfer->c_skip), 617 len >> 1); 618 else 619 bus_space_read_multi_stream_2(chp->cmd_iot, 620 chp->cmd_ioh, wd_data, 621 (u_int16_t *)((char *)xfer->databuf + 622 xfer->c_skip), 623 len >> 1); 624 xfer->c_skip += len; 625 xfer->c_bcount -=len; 626 } 627 } 628 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 629 chp->ch_flags |= WDCF_IRQ_WAIT; 630 } 631 return 1; 632 633 case PHASE_ABORTED: 634 case PHASE_COMPLETED: 635 WDCDEBUG_PRINT(("PHASE_COMPLETED\n"), DEBUG_INTR); 636 /* turn off DMA channel */ 637 if (xfer->c_flags & C_DMA) { 638 dma_err = (*chp->wdc->dma_finish)(chp->wdc->dma_arg, 639 chp->channel, xfer->drive, dma_flags); 640 if (xfer->c_flags & C_SENSE) 641 xfer->c_bcount -= 642 sizeof(sc_xfer->sense.scsi_sense); 643 else 644 xfer->c_bcount -= sc_xfer->datalen; 645 } 646 if (xfer->c_flags & C_SENSE) { 647 if ((chp->ch_status & WDCS_ERR) || dma_err < 0) { 648 /* 649 * request sense failed ! it's not suppossed 650 * to be possible 651 */ 652 if (dma_err < 0) 653 drvp->n_dmaerrs++; 654 sc_xfer->error = XS_RESET; 655 wdc_atapi_reset(chp, xfer); 656 return (1); 657 } else if (xfer->c_bcount < 658 sizeof(sc_xfer->sense.scsi_sense)) { 659 /* use the sense we just read */ 660 sc_xfer->error = XS_SENSE; 661 } else { 662 /* 663 * command completed, but no data was read. 664 * use the short sense we saved previsouly. 665 */ 666 sc_xfer->error = XS_SHORTSENSE; 667 } 668 } else { 669 sc_xfer->resid = xfer->c_bcount; 670 if (chp->ch_status & WDCS_ERR) { 671 /* save the short sense */ 672 sc_xfer->error = XS_SHORTSENSE; 673 sc_xfer->sense.atapi_sense = chp->ch_error; 674 if ((sc_xfer->sc_link->quirks & 675 ADEV_NOSENSE) == 0) { 676 /* 677 * let the driver issue a 678 * 'request sense' 679 */ 680 xfer->databuf = &sc_xfer->sense; 681 xfer->c_bcount = 682 sizeof(sc_xfer->sense.scsi_sense); 683 xfer->c_skip = 0; 684 xfer->c_flags |= C_SENSE; 685 untimeout(wdctimeout, chp); 686 wdc_atapi_start(chp, xfer); 687 return 1; 688 } 689 } else if (dma_err < 0) { 690 drvp->n_dmaerrs++; 691 sc_xfer->error = XS_RESET; 692 wdc_atapi_reset(chp, xfer); 693 return (1); 694 } 695 } 696 if (xfer->c_bcount != 0) { 697 WDCDEBUG_PRINT(("wdc_atapi_intr: bcount value is " 698 "%d after io\n", xfer->c_bcount), DEBUG_XFERS); 699 } 700 #ifdef DIAGNOSTIC 701 if (xfer->c_bcount < 0) { 702 printf("wdc_atapi_intr warning: bcount value " 703 "is %d after io\n", xfer->c_bcount); 704 } 705 #endif 706 break; 707 708 default: 709 if (++retries<500) { 710 DELAY(100); 711 chp->ch_status = bus_space_read_1(chp->cmd_iot, 712 chp->cmd_ioh, wd_status); 713 chp->ch_error = bus_space_read_1(chp->cmd_iot, 714 chp->cmd_ioh, wd_error); 715 goto again; 716 } 717 printf("wdc_atapi_intr: unknown phase 0x%x\n", phase); 718 if (chp->ch_status & WDCS_ERR) { 719 sc_xfer->error = XS_SHORTSENSE; 720 sc_xfer->sense.atapi_sense = chp->ch_error; 721 } else { 722 sc_xfer->error = XS_RESET; 723 wdc_atapi_reset(chp, xfer); 724 return (1); 725 } 726 } 727 WDCDEBUG_PRINT(("wdc_atapi_intr: wdc_atapi_done() (end), error 0x%x " 728 "sense 0x%x\n", sc_xfer->error, sc_xfer->sense.atapi_sense), 729 DEBUG_INTR); 730 wdc_atapi_done(chp, xfer); 731 return (1); 732 } 733 734 int 735 wdc_atapi_ctrl(chp, xfer, irq) 736 struct channel_softc *chp; 737 struct wdc_xfer *xfer; 738 int irq; 739 { 740 struct scsipi_xfer *sc_xfer = xfer->cmd; 741 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 742 char *errstring = NULL; 743 int delay = (irq == 0) ? ATAPI_DELAY : 0; 744 745 /* Ack interrupt done in wait_for_unbusy */ 746 again: 747 WDCDEBUG_PRINT(("wdc_atapi_ctrl %s:%d:%d state %d\n", 748 chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive, drvp->state), 749 DEBUG_INTR | DEBUG_FUNCS); 750 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 751 WDSD_IBM | (xfer->drive << 4)); 752 switch (drvp->state) { 753 case PIOMODE: 754 piomode: 755 /* Don't try to set mode if controller can't be adjusted */ 756 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 757 goto ready; 758 /* Also don't try if the drive didn't report its mode */ 759 if ((drvp->drive_flags & DRIVE_MODE) == 0) 760 goto ready;; 761 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 762 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 763 drvp->state = PIOMODE_WAIT; 764 break; 765 case PIOMODE_WAIT: 766 errstring = "piomode"; 767 if (wait_for_unbusy(chp, delay)) 768 goto timeout; 769 if (chp->ch_status & WDCS_ERR) { 770 if (drvp->PIO_mode < 3) { 771 drvp->PIO_mode = 3; 772 goto piomode; 773 } else { 774 goto error; 775 } 776 } 777 /* fall through */ 778 779 case DMAMODE: 780 if (drvp->drive_flags & DRIVE_UDMA) { 781 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 782 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 783 } else if (drvp->drive_flags & DRIVE_DMA) { 784 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 785 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 786 } else { 787 goto ready; 788 } 789 drvp->state = DMAMODE_WAIT; 790 break; 791 case DMAMODE_WAIT: 792 errstring = "dmamode"; 793 if (wait_for_unbusy(chp, delay)) 794 goto timeout; 795 if (chp->ch_status & WDCS_ERR) 796 goto error; 797 /* fall through */ 798 799 case READY: 800 ready: 801 drvp->state = READY; 802 xfer->c_intr = wdc_atapi_intr; 803 untimeout(wdctimeout, chp); 804 wdc_atapi_start(chp, xfer); 805 return 1; 806 } 807 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 808 chp->ch_flags |= WDCF_IRQ_WAIT; 809 xfer->c_intr = wdc_atapi_ctrl; 810 } else { 811 goto again; 812 } 813 return 1; 814 815 timeout: 816 if (irq && (xfer->c_flags & C_TIMEOU) == 0) { 817 return 0; /* IRQ was not for us */ 818 } 819 printf("%s:%d:%d: %s timed out\n", 820 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 821 sc_xfer->error = XS_TIMEOUT; 822 wdc_atapi_reset(chp, xfer); 823 return 1; 824 error: 825 printf("%s:%d:%d: %s ", 826 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 827 errstring); 828 printf("error (0x%x)\n", chp->ch_error); 829 sc_xfer->error = XS_SHORTSENSE; 830 sc_xfer->sense.atapi_sense = chp->ch_error; 831 wdc_atapi_reset(chp, xfer); 832 return 1; 833 } 834 835 void 836 wdc_atapi_done(chp, xfer) 837 struct channel_softc *chp; 838 struct wdc_xfer *xfer; 839 { 840 struct scsipi_xfer *sc_xfer = xfer->cmd; 841 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 842 843 WDCDEBUG_PRINT(("wdc_atapi_done %s:%d:%d: flags 0x%x\n", 844 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 845 (u_int)xfer->c_flags), DEBUG_XFERS); 846 untimeout(wdctimeout, chp); 847 /* remove this command from xfer queue */ 848 wdc_free_xfer(chp, xfer); 849 sc_xfer->xs_status |= XS_STS_DONE; 850 if (drvp->n_dmaerrs || 851 (sc_xfer->error != XS_NOERROR && sc_xfer->error != XS_SENSE && 852 sc_xfer->error != XS_SHORTSENSE)) { 853 drvp->n_dmaerrs = 0; 854 wdc_downgrade_mode(drvp); 855 } 856 857 WDCDEBUG_PRINT(("wdc_atapi_done: scsipi_done\n"), DEBUG_XFERS); 858 scsipi_done(sc_xfer); 859 WDCDEBUG_PRINT(("wdcstart from wdc_atapi_done, flags 0x%x\n", 860 chp->ch_flags), DEBUG_XFERS); 861 wdcstart(chp); 862 } 863 864 void 865 wdc_atapi_reset(chp, xfer) 866 struct channel_softc *chp; 867 struct wdc_xfer *xfer; 868 { 869 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 870 struct scsipi_xfer *sc_xfer = xfer->cmd; 871 872 wdccommandshort(chp, xfer->drive, ATAPI_SOFT_RESET); 873 drvp->state = 0; 874 if (wait_for_unbusy(chp, WDC_RESET_WAIT) != 0) { 875 printf("%s:%d:%d: reset failed\n", 876 chp->wdc->sc_dev.dv_xname, chp->channel, 877 xfer->drive); 878 sc_xfer->error = XS_SELTIMEOUT; 879 } 880 wdc_atapi_done(chp, xfer); 881 return; 882 } 883