1 /* $NetBSD: tcx.c,v 1.28 2009/03/18 17:06:50 cegger Exp $ */ 2 3 /* 4 * Copyright (c) 1996,1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Paul Kranenburg. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * color display (TCX) driver. 34 * 35 * Does not handle interrupts, even though they can occur. 36 * 37 * XXX should defer colormap updates to vertical retrace interrupts 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: tcx.c,v 1.28 2009/03/18 17:06:50 cegger Exp $"); 42 43 /* 44 * define for cg8 emulation on S24 (24-bit version of tcx) for the SS5; 45 * it is bypassed on the 8-bit version (onboard framebuffer for SS4) 46 */ 47 #undef TCX_CG8 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/buf.h> 52 #include <sys/device.h> 53 #include <sys/ioctl.h> 54 #include <sys/malloc.h> 55 #include <sys/mman.h> 56 #include <sys/tty.h> 57 #include <sys/conf.h> 58 59 #ifdef DEBUG 60 #include <sys/proc.h> 61 #include <sys/syslog.h> 62 #endif 63 64 #include <sys/bus.h> 65 #include <machine/autoconf.h> 66 67 #include <dev/sun/fbio.h> 68 #include <dev/sun/fbvar.h> 69 #include <dev/sun/btreg.h> 70 #include <dev/sun/btvar.h> 71 72 #include <dev/sbus/sbusvar.h> 73 #include <dev/sbus/tcxreg.h> 74 75 /* per-display variables */ 76 struct tcx_softc { 77 struct device sc_dev; /* base device */ 78 struct sbusdev sc_sd; /* sbus device */ 79 struct fbdevice sc_fb; /* frame buffer device */ 80 bus_space_tag_t sc_bustag; 81 struct openprom_addr sc_physadr[TCX_NREG];/* phys addr of h/w */ 82 83 volatile struct bt_regs *sc_bt; /* Brooktree registers */ 84 volatile struct tcx_thc *sc_thc;/* THC registers */ 85 #ifdef TCX_CG8 86 volatile ulong *sc_cplane; /* framebuffer with control planes */ 87 #endif 88 short sc_8bit; /* true if 8-bit hardware */ 89 short sc_blanked; /* true if blanked */ 90 union bt_cmap sc_cmap; /* Brooktree color map */ 91 }; 92 93 /* 94 * The S24 provides the framebuffer RAM mapped in three ways: 95 * 26 bits per pixel, in 32-bit words; the low-order 24 bits are 96 * blue, green, and red values, and the other two bits select the 97 * display modes, per pixel); 98 * 24 bits per pixel, in 32-bit words; the high-order byte reads as 99 * zero, and is ignored on writes (so the mode bits cannot be altered); 100 * 8 bits per pixel, unpadded; writes to this space do not modify the 101 * other 18 bits. 102 */ 103 #define TCX_CTL_8_MAPPED 0x00000000 /* 8 bits, uses color map */ 104 #define TCX_CTL_24_MAPPED 0x01000000 /* 24 bits, uses color map */ 105 #define TCX_CTL_24_LEVEL 0x03000000 /* 24 bits, ignores color map */ 106 #define TCX_CTL_PIXELMASK 0x00FFFFFF /* mask for index/level */ 107 108 /* autoconfiguration driver */ 109 static void tcxattach(struct device *, struct device *, void *); 110 static int tcxmatch(struct device *, struct cfdata *, void *); 111 static void tcx_unblank(struct device *); 112 113 CFATTACH_DECL(tcx, sizeof(struct tcx_softc), 114 tcxmatch, tcxattach, NULL, NULL); 115 116 extern struct cfdriver tcx_cd; 117 118 dev_type_open(tcxopen); 119 dev_type_close(tcxclose); 120 dev_type_ioctl(tcxioctl); 121 dev_type_mmap(tcxmmap); 122 123 const struct cdevsw tcx_cdevsw = { 124 tcxopen, tcxclose, noread, nowrite, tcxioctl, 125 nostop, notty, nopoll, tcxmmap, nokqfilter, 126 }; 127 128 /* frame buffer generic driver */ 129 static struct fbdriver tcx_fbdriver = { 130 tcx_unblank, tcxopen, tcxclose, tcxioctl, nopoll, tcxmmap, 131 nokqfilter 132 }; 133 134 static void tcx_reset(struct tcx_softc *); 135 static void tcx_loadcmap(struct tcx_softc *, int, int); 136 137 #define OBPNAME "SUNW,tcx" 138 139 #ifdef TCX_CG8 140 /* 141 * For CG8 emulation, we map the 32-bit-deep framebuffer at an offset of 142 * 256K; the cg8 space begins with a mono overlay plane and an overlay 143 * enable plane (128K bytes each, 1 bit per pixel), immediately followed 144 * by the color planes, 32 bits per pixel. We also map just the 32-bit 145 * framebuffer at 0x04000000 (TCX_USER_RAM_COMPAT), for compatibility 146 * with the cg8 driver. 147 */ 148 #define TCX_CG8OVERLAY (256 * 1024) 149 #define TCX_SIZE_DFB32 (1152 * 900 * 4) /* max size of the framebuffer */ 150 #endif 151 152 /* 153 * Match a tcx. 154 */ 155 int 156 tcxmatch(struct device *parent, struct cfdata *cf, void *aux) 157 { 158 struct sbus_attach_args *sa = aux; 159 160 return (strcmp(sa->sa_name, OBPNAME) == 0); 161 } 162 163 /* 164 * Attach a display. 165 */ 166 void 167 tcxattach(struct device *parent, struct device *self, void *args) 168 { 169 struct tcx_softc *sc = device_private(self); 170 struct sbus_attach_args *sa = args; 171 int node, ramsize; 172 volatile struct bt_regs *bt; 173 struct fbdevice *fb = &sc->sc_fb; 174 bus_space_handle_t bh; 175 int isconsole; 176 177 sc->sc_bustag = sa->sa_bustag; 178 node = sa->sa_node; 179 180 fb->fb_driver = &tcx_fbdriver; 181 fb->fb_device = &sc->sc_dev; 182 /* Mask out invalid flags from the user. */ 183 fb->fb_flags = device_cfdata(&sc->sc_dev)->cf_flags & FB_USERMASK; 184 /* 185 * The onboard framebuffer on the SS4 supports only 8-bit mode; 186 * it can be distinguished from the S24 card for the SS5 by the 187 * presence of the "tcx-8-bit" attribute on the SS4 version. 188 */ 189 sc->sc_8bit = node_has_property(node, "tcx-8-bit"); 190 #ifdef TCX_CG8 191 if (sc->sc_8bit) { 192 #endif 193 /* 194 * cg8 emulation is either not compiled in or not supported 195 * on this hardware. Report values for the 8-bit framebuffer 196 * so cg3 emulation works. (If this hardware supports 197 * 24-bit mode, the 24-bit framebuffer will also be available) 198 */ 199 fb->fb_type.fb_depth = 8; 200 fb_setsize_obp(fb, fb->fb_type.fb_depth, 1152, 900, node); 201 202 ramsize = fb->fb_type.fb_height * fb->fb_linebytes; 203 #ifdef TCX_CG8 204 } else { 205 /* 206 * for cg8 emulation, unconditionally report the depth as 207 * 32 bits, but use the height and width reported by the 208 * boot prom. cg8 users want to see the full size of 209 * overlay planes plus color planes included in the 210 * reported framebuffer size. 211 */ 212 fb->fb_type.fb_depth = 32; 213 fb_setsize_obp(fb, fb->fb_type.fb_depth, 1152, 900, node); 214 fb->fb_linebytes = 215 (fb->fb_type.fb_width * fb->fb_type.fb_depth) / 8; 216 ramsize = TCX_CG8OVERLAY + 217 (fb->fb_type.fb_height * fb->fb_linebytes); 218 } 219 #endif 220 fb->fb_type.fb_cmsize = 256; 221 fb->fb_type.fb_size = ramsize; 222 printf(": %s, %d x %d", OBPNAME, 223 fb->fb_type.fb_width, 224 fb->fb_type.fb_height); 225 #ifdef TCX_CG8 226 /* 227 * if cg8 emulation is enabled, say so; but if hardware can't 228 * emulate cg8, explain that instead 229 */ 230 printf( (sc->sc_8bit)? 231 " (8-bit only)" : 232 " (emulating cg8)"); 233 #endif 234 235 /* 236 * XXX - should be set to FBTYPE_TCX. 237 * XXX For CG3 emulation to work in current (96/6) X11 servers, 238 * XXX `fbtype' must point to an "unregocnised" entry. 239 */ 240 #ifdef TCX_CG8 241 if (sc->sc_8bit) { 242 fb->fb_type.fb_type = FBTYPE_RESERVED3; 243 } else { 244 fb->fb_type.fb_type = FBTYPE_MEMCOLOR; 245 } 246 #else 247 fb->fb_type.fb_type = FBTYPE_RESERVED3; 248 #endif 249 250 251 if (sa->sa_nreg != TCX_NREG) { 252 printf("%s: only %d register sets\n", 253 device_xname(self), sa->sa_nreg); 254 return; 255 } 256 memcpy( sc->sc_physadr, sa->sa_reg, 257 sa->sa_nreg * sizeof(struct openprom_addr)); 258 259 /* XXX - fix THC and TEC offsets */ 260 sc->sc_physadr[TCX_REG_TEC].oa_base += 0x1000; 261 sc->sc_physadr[TCX_REG_THC].oa_base += 0x1000; 262 263 /* Map the register banks we care about */ 264 if (sbus_bus_map(sa->sa_bustag, 265 sc->sc_physadr[TCX_REG_THC].oa_space, 266 sc->sc_physadr[TCX_REG_THC].oa_base, 267 sizeof (struct tcx_thc), 268 BUS_SPACE_MAP_LINEAR, &bh) != 0) { 269 printf("tcxattach: cannot map thc registers\n"); 270 return; 271 } 272 sc->sc_thc = (volatile struct tcx_thc *) 273 bus_space_vaddr(sa->sa_bustag, bh); 274 275 if (sbus_bus_map(sa->sa_bustag, 276 sc->sc_physadr[TCX_REG_CMAP].oa_space, 277 sc->sc_physadr[TCX_REG_CMAP].oa_base, 278 sizeof (struct bt_regs), 279 BUS_SPACE_MAP_LINEAR, &bh) != 0) { 280 printf("tcxattach: cannot map bt registers\n"); 281 return; 282 } 283 sc->sc_bt = bt = (volatile struct bt_regs *) 284 bus_space_vaddr(sa->sa_bustag, bh); 285 286 #ifdef TCX_CG8 287 if (!sc->sc_8bit) { 288 if (sbus_bus_map(sa->sa_bustag, 289 sc->sc_physadr[TCX_REG_RDFB32].oa_space, 290 sc->sc_physadr[TCX_REG_RDFB32].oa_base, 291 TCX_SIZE_DFB32, 292 BUS_SPACE_MAP_LINEAR, 293 &bh) != 0) { 294 printf("tcxattach: cannot map control planes\n"); 295 return; 296 } 297 sc->sc_cplane = (volatile ulong *)bh; 298 } 299 #endif 300 301 isconsole = fb_is_console(node); 302 303 printf(", id %d, rev %d, sense %d", 304 (sc->sc_thc->thc_config & THC_CFG_FBID) >> THC_CFG_FBID_SHIFT, 305 (sc->sc_thc->thc_config & THC_CFG_REV) >> THC_CFG_REV_SHIFT, 306 (sc->sc_thc->thc_config & THC_CFG_SENSE) >> THC_CFG_SENSE_SHIFT 307 ); 308 309 /* reset cursor & frame buffer controls */ 310 tcx_reset(sc); 311 312 /* Initialize the default color map. */ 313 bt_initcmap(&sc->sc_cmap, 256); 314 tcx_loadcmap(sc, 0, 256); 315 316 /* enable video */ 317 sc->sc_thc->thc_hcmisc |= THC_MISC_VIDEN; 318 319 if (isconsole) { 320 printf(" (console)\n"); 321 } else 322 printf("\n"); 323 324 sbus_establish(&sc->sc_sd, &sc->sc_dev); 325 fb_attach(&sc->sc_fb, isconsole); 326 } 327 328 #ifdef TCX_CG8 329 /* 330 * keep track of the number of opens, so we can switch to 24-bit mode 331 * when the device is first opened, and return to 8-bit mode on the 332 * last close. (stolen from cgfourteen driver...) There can only be 333 * one TCX per system, so we only need one flag. 334 */ 335 static int tcx_opens = 0; 336 #endif 337 338 int 339 tcxopen(dev_t dev, int flags, int mode, struct lwp *l) 340 { 341 #ifdef TCX_CG8 342 int unit = minor(dev); 343 struct tcx_softc *sc; 344 int i, s, oldopens; 345 volatile ulong *cptr; 346 struct fbdevice *fb; 347 348 sc = device_lookup_private(&tcx_cd, unit); 349 if (!sc) 350 return (ENXIO); 351 if (!sc->sc_8bit) { 352 s = splhigh(); 353 oldopens = tcx_opens++; 354 splx(s); 355 if (oldopens == 0) { 356 /* 357 * rewrite the control planes to select 24-bit mode 358 * and clear the screen 359 */ 360 fb = &sc->sc_fb; 361 i = fb->fb_type.fb_height * fb->fb_type.fb_width; 362 cptr = sc->sc_cplane; 363 while (--i >= 0) 364 *cptr++ = TCX_CTL_24_LEVEL; 365 } 366 } 367 #endif 368 return (0); 369 } 370 371 int 372 tcxclose(dev_t dev, int flags, int mode, struct lwp *l) 373 { 374 struct tcx_softc *sc = device_lookup_private(&tcx_cd, minor(dev)); 375 #ifdef TCX_CG8 376 int i, s, opens; 377 volatile ulong *cptr; 378 struct fbdevice *fb; 379 #endif 380 381 tcx_reset(sc); 382 #ifdef TCX_CG8 383 if (!sc->sc_8bit) { 384 s = splhigh(); 385 opens = --tcx_opens; 386 if (tcx_opens <= 0) 387 opens = tcx_opens = 0; 388 splx(s); 389 if (opens == 0) { 390 /* 391 * rewrite the control planes to select 8-bit mode, 392 * preserving the contents of the screen. 393 * (or we could just bzero the whole thing...) 394 */ 395 fb = &sc->sc_fb; 396 i = fb->fb_type.fb_height * fb->fb_type.fb_width; 397 cptr = sc->sc_cplane; 398 while (--i >= 0) 399 *cptr++ &= TCX_CTL_PIXELMASK; 400 } 401 } 402 #endif 403 return (0); 404 } 405 406 int 407 tcxioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l) 408 { 409 struct tcx_softc *sc = device_lookup_private(&tcx_cd, minor(dev)); 410 int error; 411 412 switch (cmd) { 413 414 case FBIOGTYPE: 415 *(struct fbtype *)data = sc->sc_fb.fb_type; 416 break; 417 418 case FBIOGATTR: 419 #define fba ((struct fbgattr *)data) 420 fba->real_type = sc->sc_fb.fb_type.fb_type; 421 fba->owner = 0; /* XXX ??? */ 422 fba->fbtype = sc->sc_fb.fb_type; 423 fba->sattr.flags = 0; 424 fba->sattr.emu_type = sc->sc_fb.fb_type.fb_type; 425 fba->sattr.dev_specific[0] = -1; 426 fba->emu_types[0] = sc->sc_fb.fb_type.fb_type; 427 fba->emu_types[1] = FBTYPE_SUN3COLOR; 428 fba->emu_types[2] = -1; 429 #undef fba 430 break; 431 432 case FBIOGETCMAP: 433 #define p ((struct fbcmap *)data) 434 return (bt_getcmap(p, &sc->sc_cmap, 256, 1)); 435 436 case FBIOPUTCMAP: 437 /* copy to software map */ 438 #ifdef TCX_CG8 439 if (!sc->sc_8bit) { 440 /* 441 * cg8 has extra bits in high-order byte of the index 442 * that bt_putcmap doesn't recognize 443 */ 444 p->index &= 0xffffff; 445 } 446 #endif 447 error = bt_putcmap(p, &sc->sc_cmap, 256, 1); 448 if (error) 449 return (error); 450 /* now blast them into the chip */ 451 /* XXX should use retrace interrupt */ 452 tcx_loadcmap(sc, p->index, p->count); 453 #undef p 454 break; 455 456 case FBIOGVIDEO: 457 *(int *)data = sc->sc_blanked; 458 break; 459 460 case FBIOSVIDEO: 461 if (*(int *)data) 462 tcx_unblank(&sc->sc_dev); 463 else if (!sc->sc_blanked) { 464 sc->sc_blanked = 1; 465 sc->sc_thc->thc_hcmisc &= ~THC_MISC_VIDEN; 466 /* Put monitor in `power-saving mode' */ 467 sc->sc_thc->thc_hcmisc |= THC_MISC_VSYNC_DISABLE; 468 sc->sc_thc->thc_hcmisc |= THC_MISC_HSYNC_DISABLE; 469 } 470 break; 471 472 default: 473 #ifdef DEBUG 474 log(LOG_NOTICE, "tcxioctl(0x%lx) (%s[%d])\n", cmd, 475 l->l_proc->p_comm, l->l_proc->p_pid); 476 #endif 477 return (ENOTTY); 478 } 479 return (0); 480 } 481 482 /* 483 * Clean up hardware state (e.g., after bootup or after X crashes). 484 */ 485 static void 486 tcx_reset(struct tcx_softc *sc) 487 { 488 volatile struct bt_regs *bt; 489 490 /* Enable cursor in Brooktree DAC. */ 491 bt = sc->sc_bt; 492 bt->bt_addr = 0x06 << 24; 493 bt->bt_ctrl |= 0x03 << 24; 494 } 495 496 /* 497 * Load a subset of the current (new) colormap into the color DAC. 498 */ 499 static void 500 tcx_loadcmap(struct tcx_softc *sc, int start, int ncolors) 501 { 502 volatile struct bt_regs *bt; 503 u_int *ip, i; 504 int count; 505 506 ip = &sc->sc_cmap.cm_chip[BT_D4M3(start)]; /* start/4 * 3 */ 507 count = BT_D4M3(start + ncolors - 1) - BT_D4M3(start) + 3; 508 bt = sc->sc_bt; 509 bt->bt_addr = BT_D4M4(start) << 24; 510 while (--count >= 0) { 511 i = *ip++; 512 /* hardware that makes one want to pound boards with hammers */ 513 bt->bt_cmap = i; 514 bt->bt_cmap = i << 8; 515 bt->bt_cmap = i << 16; 516 bt->bt_cmap = i << 24; 517 } 518 } 519 520 static void 521 tcx_unblank(struct device *dev) 522 { 523 struct tcx_softc *sc = device_private(dev); 524 525 if (sc->sc_blanked) { 526 sc->sc_blanked = 0; 527 sc->sc_thc->thc_hcmisc &= ~THC_MISC_VSYNC_DISABLE; 528 sc->sc_thc->thc_hcmisc &= ~THC_MISC_HSYNC_DISABLE; 529 sc->sc_thc->thc_hcmisc |= THC_MISC_VIDEN; 530 } 531 } 532 533 /* 534 * Base addresses at which users can mmap() the various pieces of a tcx. 535 */ 536 #define TCX_USER_RAM 0x00000000 537 #define TCX_USER_RAM24 0x01000000 538 #define TCX_USER_RAM_COMPAT 0x04000000 /* cg3 emulation */ 539 #define TCX_USER_STIP 0x10000000 540 #define TCX_USER_BLIT 0x20000000 541 #define TCX_USER_RDFB32 0x28000000 542 #define TCX_USER_RSTIP 0x30000000 543 #define TCX_USER_RBLIT 0x38000000 544 #define TCX_USER_TEC 0x70001000 545 #define TCX_USER_BTREGS 0x70002000 546 #define TCX_USER_THC 0x70004000 547 #define TCX_USER_DHC 0x70008000 548 #define TCX_USER_ALT 0x7000a000 549 #define TCX_USER_UART 0x7000c000 550 #define TCX_USER_VRT 0x7000e000 551 #define TCX_USER_ROM 0x70010000 552 553 struct mmo { 554 u_int mo_uaddr; /* user (virtual) address */ 555 u_int mo_size; /* size, or 0 for video ram size */ 556 u_int mo_bank; /* register bank number */ 557 }; 558 559 /* 560 * Return the address that would map the given device at the given 561 * offset, allowing for the given protection, or return -1 for error. 562 * 563 * XXX needs testing against `demanding' applications (e.g., aviator) 564 */ 565 paddr_t 566 tcxmmap(dev_t dev, off_t off, int prot) 567 { 568 struct tcx_softc *sc = device_lookup_private(&tcx_cd, minor(dev)); 569 struct openprom_addr *rr = sc->sc_physadr; 570 struct mmo *mo, *mo_end; 571 u_int u, sz; 572 static struct mmo mmo[] = { 573 { TCX_USER_RAM, 0, TCX_REG_DFB8 }, 574 { TCX_USER_RAM24, 0, TCX_REG_DFB24 }, 575 { TCX_USER_RAM_COMPAT, 0, TCX_REG_DFB8 }, 576 577 { TCX_USER_STIP, 1, TCX_REG_STIP }, 578 { TCX_USER_BLIT, 1, TCX_REG_BLIT }, 579 { TCX_USER_RDFB32, 0, TCX_REG_RDFB32 }, 580 { TCX_USER_RSTIP, 1, TCX_REG_RSTIP }, 581 { TCX_USER_RBLIT, 1, TCX_REG_RBLIT }, 582 { TCX_USER_TEC, 1, TCX_REG_TEC }, 583 { TCX_USER_BTREGS, 8192 /* XXX */, TCX_REG_CMAP }, 584 { TCX_USER_THC, sizeof(struct tcx_thc), TCX_REG_THC }, 585 { TCX_USER_DHC, 1, TCX_REG_DHC }, 586 { TCX_USER_ALT, 1, TCX_REG_ALT }, 587 { TCX_USER_ROM, 65536, TCX_REG_ROM }, 588 }; 589 #define NMMO (sizeof mmo / sizeof *mmo) 590 #ifdef TCX_CG8 591 /* 592 * alternate mapping for CG8 emulation: 593 * map part of the 8-bit-deep framebuffer into the cg8 overlay 594 * space, just so there's something there, and map the 32-bit-deep 595 * framebuffer where cg8 users expect to find it. 596 */ 597 static struct mmo mmo_cg8[] = { 598 { TCX_USER_RAM, TCX_CG8OVERLAY, TCX_REG_DFB8 }, 599 { TCX_CG8OVERLAY, TCX_SIZE_DFB32, TCX_REG_DFB24 }, 600 { TCX_USER_RAM_COMPAT, TCX_SIZE_DFB32, TCX_REG_DFB24 } 601 }; 602 #define NMMO_CG8 (sizeof mmo_cg8 / sizeof *mmo_cg8) 603 #endif 604 605 if (off & PGOFSET) 606 panic("tcxmmap"); 607 608 /* 609 * Entries with size 0 map video RAM (i.e., the size in fb data). 610 * Entries that map 32-bit deep regions are adjusted for their 611 * depth (fb_size gives the size of the 8-bit-deep region). 612 * 613 * Since we work in pages, the fact that the map offset table's 614 * sizes are sometimes bizarre (e.g., 1) is effectively ignored: 615 * one byte is as good as one page. 616 */ 617 #ifdef TCX_CG8 618 if (sc->sc_8bit) { 619 mo = mmo; 620 mo_end = &mmo[NMMO]; 621 } else { 622 mo = mmo_cg8; 623 mo_end = &mmo_cg8[NMMO_CG8]; 624 } 625 #else 626 mo = mmo; 627 mo_end = &mmo[NMMO]; 628 #endif 629 for (; mo < mo_end; mo++) { 630 if ((u_int)off < mo->mo_uaddr) 631 continue; 632 u = off - mo->mo_uaddr; 633 sz = mo->mo_size; 634 if (sz == 0) { 635 sz = sc->sc_fb.fb_type.fb_size; 636 /* 637 * check for the 32-bit-deep regions and adjust 638 * accordingly 639 */ 640 if (mo->mo_uaddr == TCX_USER_RAM24 || 641 mo->mo_uaddr == TCX_USER_RDFB32) { 642 if (sc->sc_8bit) { 643 /* 644 * not present on 8-bit hardware 645 */ 646 continue; 647 } 648 sz *= 4; 649 } 650 } 651 if (u < sz) { 652 return (bus_space_mmap(sc->sc_bustag, 653 BUS_ADDR(rr[mo->mo_bank].oa_space, 654 rr[mo->mo_bank].oa_base), 655 u, 656 prot, 657 BUS_SPACE_MAP_LINEAR)); 658 } 659 } 660 return (-1); 661 } 662