1 /* $NetBSD: qec.c,v 1.39 2008/04/28 20:23:57 martin Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Paul Kranenburg. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: qec.c,v 1.39 2008/04/28 20:23:57 martin Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/errno.h> 39 #include <sys/device.h> 40 #include <sys/malloc.h> 41 42 #include <sys/bus.h> 43 #include <sys/intr.h> 44 #include <machine/autoconf.h> 45 46 #include <dev/sbus/sbusvar.h> 47 #include <dev/sbus/qecreg.h> 48 #include <dev/sbus/qecvar.h> 49 50 static int qecprint(void *, const char *); 51 static int qecmatch(struct device *, struct cfdata *, void *); 52 static void qecattach(struct device *, struct device *, void *); 53 void qec_init(struct qec_softc *); 54 55 static int qec_bus_map( 56 bus_space_tag_t, 57 bus_addr_t, /*coded slot+offset*/ 58 bus_size_t, /*size*/ 59 int, /*flags*/ 60 vaddr_t, /*preferred virtual address */ 61 bus_space_handle_t *); 62 static void *qec_intr_establish( 63 bus_space_tag_t, 64 int, /*bus interrupt priority*/ 65 int, /*`device class' interrupt level*/ 66 int (*)(void *), /*handler*/ 67 void *, /*arg*/ 68 void (*)(void)); /*optional fast trap handler*/ 69 70 CFATTACH_DECL(qec, sizeof(struct qec_softc), 71 qecmatch, qecattach, NULL, NULL); 72 73 int 74 qecprint(aux, busname) 75 void *aux; 76 const char *busname; 77 { 78 struct sbus_attach_args *sa = aux; 79 bus_space_tag_t t = sa->sa_bustag; 80 struct qec_softc *sc = t->cookie; 81 82 sa->sa_bustag = sc->sc_bustag; /* XXX */ 83 sbus_print(aux, busname); /* XXX */ 84 sa->sa_bustag = t; /* XXX */ 85 return (UNCONF); 86 } 87 88 int 89 qecmatch(parent, cf, aux) 90 struct device *parent; 91 struct cfdata *cf; 92 void *aux; 93 { 94 struct sbus_attach_args *sa = aux; 95 96 return (strcmp(cf->cf_name, sa->sa_name) == 0); 97 } 98 99 /* 100 * Attach all the sub-devices we can find 101 */ 102 void 103 qecattach(parent, self, aux) 104 struct device *parent, *self; 105 void *aux; 106 { 107 struct sbus_attach_args *sa = aux; 108 struct qec_softc *sc = (void *)self; 109 int node; 110 int sbusburst; 111 bus_space_tag_t sbt; 112 bus_space_handle_t bh; 113 int error; 114 115 sc->sc_bustag = sa->sa_bustag; 116 sc->sc_dmatag = sa->sa_dmatag; 117 node = sa->sa_node; 118 119 if (sa->sa_nreg < 2) { 120 printf("%s: only %d register sets\n", 121 device_xname(self), sa->sa_nreg); 122 return; 123 } 124 125 if (sbus_bus_map(sa->sa_bustag, 126 sa->sa_reg[0].oa_space, 127 sa->sa_reg[0].oa_base, 128 sa->sa_reg[0].oa_size, 129 0, &sc->sc_regs) != 0) { 130 aprint_error_dev(self, "attach: cannot map registers\n"); 131 return; 132 } 133 134 /* 135 * This device's "register space 1" is just a buffer where the 136 * Lance ring-buffers can be stored. Note the buffer's location 137 * and size, so the child driver can pick them up. 138 */ 139 if (sbus_bus_map(sa->sa_bustag, 140 sa->sa_reg[1].oa_space, 141 sa->sa_reg[1].oa_base, 142 sa->sa_reg[1].oa_size, 143 BUS_SPACE_MAP_LINEAR, &bh) != 0) { 144 aprint_error_dev(self, "attach: cannot map registers\n"); 145 return; 146 } 147 sc->sc_buffer = (void *)bus_space_vaddr(sa->sa_bustag, bh); 148 sc->sc_bufsiz = (bus_size_t)sa->sa_reg[1].oa_size; 149 150 /* Get number of on-board channels */ 151 sc->sc_nchannels = prom_getpropint(node, "#channels", -1); 152 if (sc->sc_nchannels == -1) { 153 printf(": no channels\n"); 154 return; 155 } 156 157 /* 158 * Get transfer burst size from PROM 159 */ 160 sbusburst = ((struct sbus_softc *)parent)->sc_burst; 161 if (sbusburst == 0) 162 sbusburst = SBUS_BURST_32 - 1; /* 1->16 */ 163 164 sc->sc_burst = prom_getpropint(node, "burst-sizes", -1); 165 if (sc->sc_burst == -1) 166 /* take SBus burst sizes */ 167 sc->sc_burst = sbusburst; 168 169 /* Clamp at parent's burst sizes */ 170 sc->sc_burst &= sbusburst; 171 172 sbus_establish(&sc->sc_sd, &sc->sc_dev); 173 174 /* Allocate a bus tag */ 175 sbt = bus_space_tag_alloc(sc->sc_bustag, sc); 176 if (sbt == NULL) { 177 aprint_error_dev(self, "attach: out of memory\n"); 178 return; 179 } 180 181 sbt->sparc_bus_map = qec_bus_map; 182 sbt->sparc_intr_establish = qec_intr_establish; 183 184 /* 185 * Collect address translations from the OBP. 186 */ 187 error = prom_getprop(node, "ranges", sizeof(struct openprom_range), 188 &sbt->nranges, &sbt->ranges); 189 switch (error) { 190 case 0: 191 break; 192 case ENOENT: 193 default: 194 panic("%s: error getting ranges property", device_xname(self)); 195 } 196 197 /* 198 * Save interrupt information for use in our qec_intr_establish() 199 * function below. Apparently, the intr level for the quad 200 * ethernet board (qe) is stored in the QEC node rather than 201 * separately in each of the QE nodes. 202 * 203 * XXX - qe.c should call bus_intr_establish() with `level = 0'.. 204 * XXX - maybe we should have our own attach args for all that. 205 */ 206 sc->sc_intr = sa->sa_intr; 207 208 printf(": %dK memory\n", sc->sc_bufsiz / 1024); 209 210 qec_init(sc); 211 212 /* search through children */ 213 for (node = firstchild(node); node; node = nextsibling(node)) { 214 struct sbus_attach_args sax; 215 sbus_setup_attach_args((struct sbus_softc *)parent, 216 sbt, sc->sc_dmatag, node, &sax); 217 (void)config_found(&sc->sc_dev, (void *)&sax, qecprint); 218 sbus_destroy_attach_args(&sax); 219 } 220 } 221 222 int 223 qec_bus_map(t, ba, size, flags, va, hp) 224 bus_space_tag_t t; 225 bus_addr_t ba; 226 bus_size_t size; 227 int flags; 228 vaddr_t va; /* Ignored */ 229 bus_space_handle_t *hp; 230 { 231 int error; 232 233 if ((error = bus_space_translate_address_generic( 234 t->ranges, t->nranges, &ba)) != 0) 235 return (error); 236 237 return (bus_space_map(t->parent, ba, size, flags, hp)); 238 } 239 240 void * 241 qec_intr_establish(t, pri, level, handler, arg, fastvec) 242 bus_space_tag_t t; 243 int pri; 244 int level; 245 int (*handler)(void *); 246 void *arg; 247 void (*fastvec)(void); /* ignored */ 248 { 249 struct qec_softc *sc = t->cookie; 250 251 if (pri == 0) { 252 /* 253 * qe.c calls bus_intr_establish() with `pri == 0' 254 * XXX - see also comment in qec_attach(). 255 */ 256 if (sc->sc_intr == NULL) { 257 printf("%s: warning: no interrupts\n", 258 device_xname(&sc->sc_dev)); 259 return (NULL); 260 } 261 pri = sc->sc_intr->oi_pri; 262 } 263 264 return (bus_intr_establish(t->parent, pri, level, handler, arg)); 265 } 266 267 void 268 qec_init(sc) 269 struct qec_softc *sc; 270 { 271 bus_space_tag_t t = sc->sc_bustag; 272 bus_space_handle_t qr = sc->sc_regs; 273 u_int32_t v, burst = 0, psize; 274 int i; 275 276 /* First, reset the controller */ 277 bus_space_write_4(t, qr, QEC_QRI_CTRL, QEC_CTRL_RESET); 278 for (i = 0; i < 1000; i++) { 279 DELAY(100); 280 v = bus_space_read_4(t, qr, QEC_QRI_CTRL); 281 if ((v & QEC_CTRL_RESET) == 0) 282 break; 283 } 284 285 /* 286 * Cut available buffer size into receive and transmit buffers. 287 * XXX - should probably be done in be & qe driver... 288 */ 289 v = sc->sc_msize = sc->sc_bufsiz / sc->sc_nchannels; 290 bus_space_write_4(t, qr, QEC_QRI_MSIZE, v); 291 292 v = sc->sc_rsize = sc->sc_bufsiz / (sc->sc_nchannels * 2); 293 bus_space_write_4(t, qr, QEC_QRI_RSIZE, v); 294 bus_space_write_4(t, qr, QEC_QRI_TSIZE, v); 295 296 psize = sc->sc_nchannels == 1 ? QEC_PSIZE_2048 : 0; 297 bus_space_write_4(t, qr, QEC_QRI_PSIZE, psize); 298 299 if (sc->sc_burst & SBUS_BURST_64) 300 burst = QEC_CTRL_B64; 301 else if (sc->sc_burst & SBUS_BURST_32) 302 burst = QEC_CTRL_B32; 303 else 304 burst = QEC_CTRL_B16; 305 306 v = bus_space_read_4(t, qr, QEC_QRI_CTRL); 307 v = (v & QEC_CTRL_MODEMASK) | burst; 308 bus_space_write_4(t, qr, QEC_QRI_CTRL, v); 309 } 310 311 /* 312 * Common routine to initialize the QEC packet ring buffer. 313 * Called from be & qe drivers. 314 */ 315 void 316 qec_meminit(qr, pktbufsz) 317 struct qec_ring *qr; 318 unsigned int pktbufsz; 319 { 320 bus_addr_t txbufdma, rxbufdma; 321 bus_addr_t dma; 322 void *p; 323 unsigned int ntbuf, nrbuf, i; 324 325 p = qr->rb_membase; 326 dma = qr->rb_dmabase; 327 328 ntbuf = qr->rb_ntbuf; 329 nrbuf = qr->rb_nrbuf; 330 331 /* 332 * Allocate transmit descriptors 333 */ 334 qr->rb_txd = (struct qec_xd *)p; 335 qr->rb_txddma = dma; 336 p = (char *)p + QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 337 dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 338 339 /* 340 * Allocate receive descriptors 341 */ 342 qr->rb_rxd = (struct qec_xd *)p; 343 qr->rb_rxddma = dma; 344 p = (char *)p + QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 345 dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 346 347 348 /* 349 * Allocate transmit buffers 350 */ 351 qr->rb_txbuf = p; 352 txbufdma = dma; 353 p = (char *)p + ntbuf * pktbufsz; 354 dma += ntbuf * pktbufsz; 355 356 /* 357 * Allocate receive buffers 358 */ 359 qr->rb_rxbuf = p; 360 rxbufdma = dma; 361 p = (char *)p + nrbuf * pktbufsz; 362 dma += nrbuf * pktbufsz; 363 364 /* 365 * Initialize transmit buffer descriptors 366 */ 367 for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) { 368 qr->rb_txd[i].xd_addr = (u_int32_t) 369 (txbufdma + (i % ntbuf) * pktbufsz); 370 qr->rb_txd[i].xd_flags = 0; 371 } 372 373 /* 374 * Initialize receive buffer descriptors 375 */ 376 for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) { 377 qr->rb_rxd[i].xd_addr = (u_int32_t) 378 (rxbufdma + (i % nrbuf) * pktbufsz); 379 qr->rb_rxd[i].xd_flags = (i < nrbuf) 380 ? QEC_XD_OWN | (pktbufsz & QEC_XD_LENGTH) 381 : 0; 382 } 383 384 qr->rb_tdhead = qr->rb_tdtail = 0; 385 qr->rb_td_nbusy = 0; 386 qr->rb_rdtail = 0; 387 } 388