xref: /netbsd-src/sys/dev/sbus/qec.c (revision 274254cdae52594c1aa480a736aef78313d15c9c)
1 /*	$NetBSD: qec.c,v 1.41 2009/03/14 21:04:23 dsl Exp $ */
2 
3 /*-
4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Paul Kranenburg.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: qec.c,v 1.41 2009/03/14 21:04:23 dsl Exp $");
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/errno.h>
39 #include <sys/device.h>
40 #include <sys/malloc.h>
41 
42 #include <sys/bus.h>
43 #include <sys/intr.h>
44 #include <machine/autoconf.h>
45 
46 #include <dev/sbus/sbusvar.h>
47 #include <dev/sbus/qecreg.h>
48 #include <dev/sbus/qecvar.h>
49 
50 static int	qecprint(void *, const char *);
51 static int	qecmatch(struct device *, struct cfdata *, void *);
52 static void	qecattach(struct device *, struct device *, void *);
53 void		qec_init(struct qec_softc *);
54 
55 static int qec_bus_map(
56 		bus_space_tag_t,
57 		bus_addr_t,		/*coded slot+offset*/
58 		bus_size_t,		/*size*/
59 		int,			/*flags*/
60 		vaddr_t,		/*preferred virtual address */
61 		bus_space_handle_t *);
62 static void *qec_intr_establish(
63 		bus_space_tag_t,
64 		int,			/*bus interrupt priority*/
65 		int,			/*`device class' interrupt level*/
66 		int (*)(void *),	/*handler*/
67 		void *,			/*arg*/
68 		void (*)(void));	/*optional fast trap handler*/
69 
70 CFATTACH_DECL(qec, sizeof(struct qec_softc),
71     qecmatch, qecattach, NULL, NULL);
72 
73 int
74 qecprint(void *aux, const char *busname)
75 {
76 	struct sbus_attach_args *sa = aux;
77 	bus_space_tag_t t = sa->sa_bustag;
78 	struct qec_softc *sc = t->cookie;
79 
80 	sa->sa_bustag = sc->sc_bustag;	/* XXX */
81 	sbus_print(aux, busname);	/* XXX */
82 	sa->sa_bustag = t;		/* XXX */
83 	return (UNCONF);
84 }
85 
86 int
87 qecmatch(struct device *parent, struct cfdata *cf, void *aux)
88 {
89 	struct sbus_attach_args *sa = aux;
90 
91 	return (strcmp(cf->cf_name, sa->sa_name) == 0);
92 }
93 
94 /*
95  * Attach all the sub-devices we can find
96  */
97 void
98 qecattach(struct device *parent, struct device *self, void *aux)
99 {
100 	struct sbus_attach_args *sa = aux;
101 	struct qec_softc *sc = (void *)self;
102 	int node;
103 	int sbusburst;
104 	bus_space_tag_t sbt;
105 	bus_space_handle_t bh;
106 	int error;
107 
108 	sc->sc_bustag = sa->sa_bustag;
109 	sc->sc_dmatag = sa->sa_dmatag;
110 	node = sa->sa_node;
111 
112 	if (sa->sa_nreg < 2) {
113 		printf("%s: only %d register sets\n",
114 			device_xname(self), sa->sa_nreg);
115 		return;
116 	}
117 
118 	if (sbus_bus_map(sa->sa_bustag,
119 			 sa->sa_reg[0].oa_space,
120 			 sa->sa_reg[0].oa_base,
121 			 sa->sa_reg[0].oa_size,
122 			 0, &sc->sc_regs) != 0) {
123 		aprint_error_dev(self, "attach: cannot map registers\n");
124 		return;
125 	}
126 
127 	/*
128 	 * This device's "register space 1" is just a buffer where the
129 	 * Lance ring-buffers can be stored. Note the buffer's location
130 	 * and size, so the child driver can pick them up.
131 	 */
132 	if (sbus_bus_map(sa->sa_bustag,
133 			 sa->sa_reg[1].oa_space,
134 			 sa->sa_reg[1].oa_base,
135 			 sa->sa_reg[1].oa_size,
136 			 BUS_SPACE_MAP_LINEAR, &bh) != 0) {
137 		aprint_error_dev(self, "attach: cannot map registers\n");
138 		return;
139 	}
140 	sc->sc_buffer = (void *)bus_space_vaddr(sa->sa_bustag, bh);
141 	sc->sc_bufsiz = (bus_size_t)sa->sa_reg[1].oa_size;
142 
143 	/* Get number of on-board channels */
144 	sc->sc_nchannels = prom_getpropint(node, "#channels", -1);
145 	if (sc->sc_nchannels == -1) {
146 		printf(": no channels\n");
147 		return;
148 	}
149 
150 	/*
151 	 * Get transfer burst size from PROM
152 	 */
153 	sbusburst = ((struct sbus_softc *)parent)->sc_burst;
154 	if (sbusburst == 0)
155 		sbusburst = SBUS_BURST_32 - 1; /* 1->16 */
156 
157 	sc->sc_burst = prom_getpropint(node, "burst-sizes", -1);
158 	if (sc->sc_burst == -1)
159 		/* take SBus burst sizes */
160 		sc->sc_burst = sbusburst;
161 
162 	/* Clamp at parent's burst sizes */
163 	sc->sc_burst &= sbusburst;
164 
165 	sbus_establish(&sc->sc_sd, &sc->sc_dev);
166 
167 	/* Allocate a bus tag */
168 	sbt = bus_space_tag_alloc(sc->sc_bustag, sc);
169 	if (sbt == NULL) {
170 		aprint_error_dev(self, "attach: out of memory\n");
171 		return;
172 	}
173 
174 	sbt->sparc_bus_map = qec_bus_map;
175 	sbt->sparc_intr_establish = qec_intr_establish;
176 
177 	/*
178 	 * Collect address translations from the OBP.
179 	 */
180 	error = prom_getprop(node, "ranges", sizeof(struct openprom_range),
181 			 &sbt->nranges, &sbt->ranges);
182 	switch (error) {
183 	case 0:
184 		break;
185 	case ENOENT:
186 	default:
187 		panic("%s: error getting ranges property", device_xname(self));
188 	}
189 
190 	/*
191 	 * Save interrupt information for use in our qec_intr_establish()
192 	 * function below. Apparently, the intr level for the quad
193 	 * ethernet board (qe) is stored in the QEC node rather than
194 	 * separately in each of the QE nodes.
195 	 *
196 	 * XXX - qe.c should call bus_intr_establish() with `level = 0'..
197 	 * XXX - maybe we should have our own attach args for all that.
198 	 */
199 	sc->sc_intr = sa->sa_intr;
200 
201 	printf(": %dK memory\n", sc->sc_bufsiz / 1024);
202 
203 	qec_init(sc);
204 
205 	/* search through children */
206 	for (node = firstchild(node); node; node = nextsibling(node)) {
207 		struct sbus_attach_args sax;
208 		sbus_setup_attach_args((struct sbus_softc *)parent,
209 				       sbt, sc->sc_dmatag, node, &sax);
210 		(void)config_found(&sc->sc_dev, (void *)&sax, qecprint);
211 		sbus_destroy_attach_args(&sax);
212 	}
213 }
214 
215 int
216 qec_bus_map(bus_space_tag_t t, bus_addr_t ba, bus_size_t size, int flags, vaddr_t va, bus_space_handle_t *hp)
217 	/* va:	 Ignored */
218 {
219 	int error;
220 
221 	if ((error = bus_space_translate_address_generic(
222 				t->ranges, t->nranges, &ba)) != 0)
223 		return (error);
224 
225 	return (bus_space_map(t->parent, ba, size, flags, hp));
226 }
227 
228 void *
229 qec_intr_establish(t, pri, level, handler, arg, fastvec)
230 	bus_space_tag_t t;
231 	int pri;
232 	int level;
233 	int (*handler)(void *);
234 	void *arg;
235 	void (*fastvec)(void);	/* ignored */
236 {
237 	struct qec_softc *sc = t->cookie;
238 
239 	if (pri == 0) {
240 		/*
241 		 * qe.c calls bus_intr_establish() with `pri == 0'
242 		 * XXX - see also comment in qec_attach().
243 		 */
244 		if (sc->sc_intr == NULL) {
245 			printf("%s: warning: no interrupts\n",
246 				device_xname(&sc->sc_dev));
247 			return (NULL);
248 		}
249 		pri = sc->sc_intr->oi_pri;
250 	}
251 
252 	return (bus_intr_establish(t->parent, pri, level, handler, arg));
253 }
254 
255 void
256 qec_init(struct qec_softc *sc)
257 {
258 	bus_space_tag_t t = sc->sc_bustag;
259 	bus_space_handle_t qr = sc->sc_regs;
260 	u_int32_t v, burst = 0, psize;
261 	int i;
262 
263 	/* First, reset the controller */
264 	bus_space_write_4(t, qr, QEC_QRI_CTRL, QEC_CTRL_RESET);
265 	for (i = 0; i < 1000; i++) {
266 		DELAY(100);
267 		v = bus_space_read_4(t, qr, QEC_QRI_CTRL);
268 		if ((v & QEC_CTRL_RESET) == 0)
269 			break;
270 	}
271 
272 	/*
273 	 * Cut available buffer size into receive and transmit buffers.
274 	 * XXX - should probably be done in be & qe driver...
275 	 */
276 	v = sc->sc_msize = sc->sc_bufsiz / sc->sc_nchannels;
277 	bus_space_write_4(t, qr, QEC_QRI_MSIZE, v);
278 
279 	v = sc->sc_rsize = sc->sc_bufsiz / (sc->sc_nchannels * 2);
280 	bus_space_write_4(t, qr, QEC_QRI_RSIZE, v);
281 	bus_space_write_4(t, qr, QEC_QRI_TSIZE, v);
282 
283 	psize = sc->sc_nchannels == 1 ? QEC_PSIZE_2048 : 0;
284 	bus_space_write_4(t, qr, QEC_QRI_PSIZE, psize);
285 
286 	if (sc->sc_burst & SBUS_BURST_64)
287 		burst = QEC_CTRL_B64;
288 	else if (sc->sc_burst & SBUS_BURST_32)
289 		burst = QEC_CTRL_B32;
290 	else
291 		burst = QEC_CTRL_B16;
292 
293 	v = bus_space_read_4(t, qr, QEC_QRI_CTRL);
294 	v = (v & QEC_CTRL_MODEMASK) | burst;
295 	bus_space_write_4(t, qr, QEC_QRI_CTRL, v);
296 }
297 
298 /*
299  * Common routine to initialize the QEC packet ring buffer.
300  * Called from be & qe drivers.
301  */
302 void
303 qec_meminit(struct qec_ring *qr, unsigned int pktbufsz)
304 {
305 	bus_addr_t txbufdma, rxbufdma;
306 	bus_addr_t dma;
307 	void *p;
308 	unsigned int ntbuf, nrbuf, i;
309 
310 	p = qr->rb_membase;
311 	dma = qr->rb_dmabase;
312 
313 	ntbuf = qr->rb_ntbuf;
314 	nrbuf = qr->rb_nrbuf;
315 
316 	/*
317 	 * Allocate transmit descriptors
318 	 */
319 	qr->rb_txd = (struct qec_xd *)p;
320 	qr->rb_txddma = dma;
321 	p = (char *)p + QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
322 	dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
323 
324 	/*
325 	 * Allocate receive descriptors
326 	 */
327 	qr->rb_rxd = (struct qec_xd *)p;
328 	qr->rb_rxddma = dma;
329 	p = (char *)p + QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
330 	dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
331 
332 
333 	/*
334 	 * Allocate transmit buffers
335 	 */
336 	qr->rb_txbuf = p;
337 	txbufdma = dma;
338 	p = (char *)p + ntbuf * pktbufsz;
339 	dma += ntbuf * pktbufsz;
340 
341 	/*
342 	 * Allocate receive buffers
343 	 */
344 	qr->rb_rxbuf = p;
345 	rxbufdma = dma;
346 	p = (char *)p + nrbuf * pktbufsz;
347 	dma += nrbuf * pktbufsz;
348 
349 	/*
350 	 * Initialize transmit buffer descriptors
351 	 */
352 	for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) {
353 		qr->rb_txd[i].xd_addr = (u_int32_t)
354 			(txbufdma + (i % ntbuf) * pktbufsz);
355 		qr->rb_txd[i].xd_flags = 0;
356 	}
357 
358 	/*
359 	 * Initialize receive buffer descriptors
360 	 */
361 	for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) {
362 		qr->rb_rxd[i].xd_addr = (u_int32_t)
363 			(rxbufdma + (i % nrbuf) * pktbufsz);
364 		qr->rb_rxd[i].xd_flags = (i < nrbuf)
365 			? QEC_XD_OWN | (pktbufsz & QEC_XD_LENGTH)
366 			: 0;
367 	}
368 
369 	qr->rb_tdhead = qr->rb_tdtail = 0;
370 	qr->rb_td_nbusy = 0;
371 	qr->rb_rdtail = 0;
372 }
373