1 /* $NetBSD: p9100.c,v 1.60 2013/11/19 10:49:00 macallan Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2005, 2006 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * color display (p9100) driver. 34 * 35 * Does not handle interrupts, even though they can occur. 36 * 37 * XXX should defer colormap updates to vertical retrace interrupts 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: p9100.c,v 1.60 2013/11/19 10:49:00 macallan Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/buf.h> 46 #include <sys/device.h> 47 #include <sys/ioctl.h> 48 #include <sys/malloc.h> 49 #include <sys/mman.h> 50 #include <sys/tty.h> 51 #include <sys/conf.h> 52 53 #include <sys/bus.h> 54 #include <machine/autoconf.h> 55 56 #include <dev/sun/fbio.h> 57 #include <dev/sun/fbvar.h> 58 #include <dev/sun/btreg.h> 59 #include <dev/sun/btvar.h> 60 61 #include <dev/sbus/p9100reg.h> 62 63 #include <dev/sbus/sbusvar.h> 64 65 #include <dev/wscons/wsdisplayvar.h> 66 #include <dev/wscons/wsconsio.h> 67 #include <dev/wsfont/wsfont.h> 68 #include <dev/rasops/rasops.h> 69 70 #include <dev/wscons/wsdisplay_vconsvar.h> 71 #include <dev/wscons/wsdisplay_glyphcachevar.h> 72 73 #include "opt_wsemul.h" 74 #include "rasops_glue.h" 75 #include "opt_pnozz.h" 76 77 #include "ioconf.h" 78 79 #include "tctrl.h" 80 #if NTCTRL > 0 81 #include <machine/tctrl.h> 82 #include <sparc/dev/tctrlvar.h> /*XXX*/ 83 #endif 84 85 #ifdef PNOZZ_DEBUG 86 #define DPRINTF aprint_normal 87 #else 88 #define DPRINTF while (0) aprint_normal 89 #endif 90 91 struct pnozz_cursor { 92 short pc_enable; /* cursor is enabled */ 93 struct fbcurpos pc_pos; /* position */ 94 struct fbcurpos pc_hot; /* hot-spot */ 95 struct fbcurpos pc_size; /* size of mask & image fields */ 96 uint32_t pc_bits[0x100]; /* space for mask & image bits */ 97 unsigned char red[3], green[3]; 98 unsigned char blue[3]; /* cursor palette */ 99 }; 100 101 /* per-display variables */ 102 struct p9100_softc { 103 device_t sc_dev; /* base device */ 104 struct fbdevice sc_fb; /* frame buffer device */ 105 106 bus_space_tag_t sc_bustag; 107 108 bus_addr_t sc_ctl_paddr; /* phys address description */ 109 bus_size_t sc_ctl_psize; /* for device mmap() */ 110 bus_space_handle_t sc_ctl_memh; /* bus space handle */ 111 112 bus_addr_t sc_fb_paddr; /* phys address description */ 113 bus_size_t sc_fb_psize; /* for device mmap() */ 114 #ifdef PNOZZ_USE_LATCH 115 bus_space_handle_t sc_fb_memh; /* bus space handle */ 116 #endif 117 uint32_t sc_mono_width; /* for setup_mono */ 118 119 uint32_t sc_width; 120 uint32_t sc_height; /* panel width / height */ 121 uint32_t sc_stride; 122 uint32_t sc_depth; 123 int sc_depthshift; /* blitter works on bytes not pixels */ 124 125 union bt_cmap sc_cmap; /* Brooktree color map */ 126 127 struct pnozz_cursor sc_cursor; 128 129 int sc_mode; 130 int sc_video, sc_powerstate; 131 uint32_t sc_bg; 132 volatile uint32_t sc_last_offset; 133 struct vcons_data vd; 134 uint8_t sc_dac_power; 135 glyphcache sc_gc; 136 }; 137 138 139 static struct vcons_screen p9100_console_screen; 140 141 extern const u_char rasops_cmap[768]; 142 143 struct wsscreen_descr p9100_defscreendesc = { 144 "default", 145 0, 0, 146 NULL, 147 8, 16, 148 WSSCREEN_WSCOLORS, 149 }; 150 151 const struct wsscreen_descr *_p9100_scrlist[] = { 152 &p9100_defscreendesc, 153 /* XXX other formats, graphics screen? */ 154 }; 155 156 struct wsscreen_list p9100_screenlist = { 157 sizeof(_p9100_scrlist) / sizeof(struct wsscreen_descr *), 158 _p9100_scrlist 159 }; 160 161 /* autoconfiguration driver */ 162 static int p9100_sbus_match(device_t, cfdata_t, void *); 163 static void p9100_sbus_attach(device_t, device_t, void *); 164 165 static void p9100unblank(device_t); 166 167 CFATTACH_DECL_NEW(pnozz, sizeof(struct p9100_softc), 168 p9100_sbus_match, p9100_sbus_attach, NULL, NULL); 169 170 static dev_type_open(p9100open); 171 static dev_type_close(p9100close); 172 static dev_type_ioctl(p9100ioctl); 173 static dev_type_mmap(p9100mmap); 174 175 const struct cdevsw pnozz_cdevsw = { 176 p9100open, nullclose, noread, nowrite, p9100ioctl, 177 nostop, notty, nopoll, p9100mmap, nokqfilter, 178 }; 179 180 /* frame buffer generic driver */ 181 static struct fbdriver p9100fbdriver = { 182 p9100unblank, p9100open, p9100close, p9100ioctl, nopoll, 183 p9100mmap, nokqfilter 184 }; 185 186 static void p9100loadcmap(struct p9100_softc *, int, int); 187 static void p9100_set_video(struct p9100_softc *, int); 188 static int p9100_get_video(struct p9100_softc *); 189 static uint32_t p9100_ctl_read_4(struct p9100_softc *, bus_size_t); 190 static void p9100_ctl_write_4(struct p9100_softc *, bus_size_t, uint32_t); 191 static uint8_t p9100_ramdac_read(struct p9100_softc *, bus_size_t); 192 static void p9100_ramdac_write(struct p9100_softc *, bus_size_t, uint8_t); 193 194 static uint8_t p9100_ramdac_read_ctl(struct p9100_softc *, int); 195 static void p9100_ramdac_write_ctl(struct p9100_softc *, int, uint8_t); 196 197 static void p9100_init_engine(struct p9100_softc *); 198 static int p9100_set_depth(struct p9100_softc *, int); 199 200 #if NWSDISPLAY > 0 201 static void p9100_sync(struct p9100_softc *); 202 static void p9100_bitblt(void *, int, int, int, int, int, int, int); 203 static void p9100_rectfill(void *, int, int, int, int, uint32_t); 204 static void p9100_clearscreen(struct p9100_softc *); 205 206 static void p9100_setup_mono(struct p9100_softc *, int, int, int, int, 207 uint32_t, uint32_t); 208 static void p9100_feed_line(struct p9100_softc *, int, uint8_t *); 209 static void p9100_set_color_reg(struct p9100_softc *, int, int32_t); 210 211 static void p9100_copycols(void *, int, int, int, int); 212 static void p9100_erasecols(void *, int, int, int, long); 213 static void p9100_copyrows(void *, int, int, int); 214 static void p9100_eraserows(void *, int, int, long); 215 /*static int p9100_mapchar(void *, int, u_int *);*/ 216 static void p9100_putchar(void *, int, int, u_int, long); 217 static void p9100_putchar_aa(void *, int, int, u_int, long); 218 static void p9100_cursor(void *, int, int, int); 219 220 static int p9100_putcmap(struct p9100_softc *, struct wsdisplay_cmap *); 221 static int p9100_getcmap(struct p9100_softc *, struct wsdisplay_cmap *); 222 static int p9100_ioctl(void *, void *, u_long, void *, int, struct lwp *); 223 static paddr_t p9100_mmap(void *, void *, off_t, int); 224 225 /*static int p9100_load_font(void *, void *, struct wsdisplay_font *);*/ 226 227 static void p9100_init_screen(void *, struct vcons_screen *, int, 228 long *); 229 #endif 230 231 static void p9100_init_cursor(struct p9100_softc *); 232 233 static void p9100_set_fbcursor(struct p9100_softc *); 234 static void p9100_setcursorcmap(struct p9100_softc *); 235 static void p9100_loadcursor(struct p9100_softc *); 236 237 #if 0 238 static int p9100_intr(void *); 239 #endif 240 241 /* power management stuff */ 242 static bool p9100_suspend(device_t, const pmf_qual_t *); 243 static bool p9100_resume(device_t, const pmf_qual_t *); 244 245 #if NTCTRL > 0 246 static void p9100_set_extvga(void *, int); 247 #endif 248 249 #if NWSDISPLAY > 0 250 struct wsdisplay_accessops p9100_accessops = { 251 p9100_ioctl, 252 p9100_mmap, 253 NULL, /* vcons_alloc_screen */ 254 NULL, /* vcons_free_screen */ 255 NULL, /* vcons_show_screen */ 256 NULL, /* load_font */ 257 NULL, /* polls */ 258 NULL, /* scroll */ 259 }; 260 #endif 261 262 #ifdef PNOZZ_USE_LATCH 263 #define PNOZZ_LATCH(sc, off) if(sc->sc_last_offset != (off & 0xffffff80)) { \ 264 (void)bus_space_read_4(sc->sc_bustag, sc->sc_fb_memh, off); \ 265 sc->sc_last_offset = off & 0xffffff80; } 266 #else 267 #define PNOZZ_LATCH(a, b) 268 #endif 269 270 /* 271 * Match a p9100. 272 */ 273 static int 274 p9100_sbus_match(device_t parent, cfdata_t cf, void *aux) 275 { 276 struct sbus_attach_args *sa = aux; 277 278 if (strcmp("p9100", sa->sa_name) == 0) 279 return 100; 280 return 0; 281 } 282 283 284 /* 285 * Attach a display. We need to notice if it is the console, too. 286 */ 287 static void 288 p9100_sbus_attach(device_t parent, device_t self, void *args) 289 { 290 struct p9100_softc *sc = device_private(self); 291 struct sbus_attach_args *sa = args; 292 struct fbdevice *fb = &sc->sc_fb; 293 int isconsole; 294 int node = sa->sa_node; 295 int i, j; 296 uint8_t ver, cmap[768]; 297 298 #if NWSDISPLAY > 0 299 struct wsemuldisplaydev_attach_args aa; 300 struct rasops_info *ri; 301 unsigned long defattr; 302 #endif 303 304 sc->sc_last_offset = 0xffffffff; 305 sc->sc_dev = self; 306 307 /* 308 * When the ROM has mapped in a p9100 display, the address 309 * maps only the video RAM, so in any case we have to map the 310 * registers ourselves. 311 */ 312 313 if (sa->sa_npromvaddrs != 0) 314 fb->fb_pixels = (void *)sa->sa_promvaddrs[0]; 315 316 /* Remember cookies for p9100_mmap() */ 317 sc->sc_bustag = sa->sa_bustag; 318 319 sc->sc_ctl_paddr = sbus_bus_addr(sa->sa_bustag, 320 sa->sa_reg[0].oa_space, sa->sa_reg[0].oa_base); 321 sc->sc_ctl_psize = 0x8000;/*(bus_size_t)sa->sa_reg[0].oa_size;*/ 322 323 sc->sc_fb_paddr = sbus_bus_addr(sa->sa_bustag, 324 sa->sa_reg[2].oa_space, sa->sa_reg[2].oa_base); 325 sc->sc_fb_psize = (bus_size_t)sa->sa_reg[2].oa_size; 326 327 if (sbus_bus_map(sc->sc_bustag, 328 sa->sa_reg[0].oa_space, 329 sa->sa_reg[0].oa_base, 330 /* 331 * XXX for some reason the SBus resources don't cover 332 * all registers, so we just map what we need 333 */ 334 0x8000, 335 0, &sc->sc_ctl_memh) != 0) { 336 printf("%s: cannot map control registers\n", 337 device_xname(self)); 338 return; 339 } 340 341 /* 342 * we need to map the framebuffer even though we never write to it, 343 * thanks to some weirdness in the SPARCbook's SBus glue for the 344 * P9100 - all register accesses need to be 'latched in' whenever we 345 * go to another 0x80 aligned 'page' by reading the framebuffer at the 346 * same offset 347 * XXX apparently the latter isn't true - my SP3GX works fine without 348 */ 349 #ifdef PNOZZ_USE_LATCH 350 if (fb->fb_pixels == NULL) { 351 if (sbus_bus_map(sc->sc_bustag, 352 sa->sa_reg[2].oa_space, 353 sa->sa_reg[2].oa_base, 354 sc->sc_fb_psize, 355 BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_LARGE, 356 &sc->sc_fb_memh) != 0) { 357 printf("%s: cannot map framebuffer\n", 358 device_xname(self)); 359 return; 360 } 361 fb->fb_pixels = (char *)sc->sc_fb_memh; 362 } else { 363 sc->sc_fb_memh = (bus_space_handle_t) fb->fb_pixels; 364 } 365 #endif 366 sc->sc_width = prom_getpropint(node, "width", 800); 367 sc->sc_height = prom_getpropint(node, "height", 600); 368 sc->sc_depth = prom_getpropint(node, "depth", 8) >> 3; 369 370 sc->sc_stride = prom_getpropint(node, "linebytes", 371 sc->sc_width * sc->sc_depth); 372 373 fb->fb_driver = &p9100fbdriver; 374 fb->fb_device = sc->sc_dev; 375 fb->fb_flags = device_cfdata(sc->sc_dev)->cf_flags & FB_USERMASK; 376 #ifdef PNOZZ_EMUL_CG3 377 fb->fb_type.fb_type = FBTYPE_SUN3COLOR; 378 #else 379 fb->fb_type.fb_type = FBTYPE_P9100; 380 #endif 381 fb->fb_pixels = NULL; 382 383 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 384 385 isconsole = fb_is_console(node); 386 #if 0 387 if (!isconsole) { 388 aprint_normal("\n"); 389 aprint_error_dev(self, "fatal error: PROM didn't configure device\n"); 390 return; 391 } 392 #endif 393 394 fb->fb_type.fb_depth = 8; 395 sc->sc_depth = 1; 396 sc->sc_depthshift = 0; 397 398 /* check the RAMDAC */ 399 ver = p9100_ramdac_read_ctl(sc, DAC_VERSION); 400 401 p9100_init_engine(sc); 402 p9100_set_depth(sc, 8); 403 404 fb_setsize_obp(fb, fb->fb_type.fb_depth, sc->sc_width, sc->sc_height, 405 node); 406 407 #if 0 408 bus_intr_establish(sc->sc_bustag, sa->sa_pri, IPL_BIO, 409 p9100_intr, sc); 410 #endif 411 412 fb->fb_type.fb_cmsize = prom_getpropint(node, "cmsize", 256); 413 if ((1 << fb->fb_type.fb_depth) != fb->fb_type.fb_cmsize) 414 printf(", %d entry colormap", fb->fb_type.fb_cmsize); 415 416 /* make sure we are not blanked */ 417 if (isconsole) 418 p9100_set_video(sc, 1); 419 420 /* register with power management */ 421 sc->sc_video = 1; 422 sc->sc_powerstate = PWR_RESUME; 423 if (!pmf_device_register(self, p9100_suspend, p9100_resume)) { 424 panic("%s: could not register with PMF", 425 device_xname(sc->sc_dev)); 426 } 427 428 if (isconsole) { 429 printf(" (console)\n"); 430 #ifdef RASTERCONSOLE 431 /*p9100loadcmap(sc, 255, 1);*/ 432 fbrcons_init(fb); 433 #endif 434 } else 435 printf("\n"); 436 437 #if NWSDISPLAY > 0 438 wsfont_init(); 439 440 #ifdef PNOZZ_DEBUG 441 /* make the glyph cache visible */ 442 sc->sc_height -= 100; 443 #endif 444 445 sc->sc_gc.gc_bitblt = p9100_bitblt; 446 sc->sc_gc.gc_blitcookie = sc; 447 sc->sc_gc.gc_rop = ROP_SRC; 448 449 vcons_init(&sc->vd, sc, &p9100_defscreendesc, &p9100_accessops); 450 sc->vd.init_screen = p9100_init_screen; 451 452 vcons_init_screen(&sc->vd, &p9100_console_screen, 1, &defattr); 453 p9100_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 454 455 /* Initialize the default color map. */ 456 rasops_get_cmap(&p9100_console_screen.scr_ri, cmap, 768); 457 458 j = 0; 459 for (i = 0; i < 256; i++) { 460 sc->sc_cmap.cm_map[i][0] = cmap[j]; 461 j++; 462 sc->sc_cmap.cm_map[i][1] = cmap[j]; 463 j++; 464 sc->sc_cmap.cm_map[i][2] = cmap[j]; 465 j++; 466 } 467 p9100loadcmap(sc, 0, 256); 468 469 sc->sc_bg = (defattr >> 16) & 0xff; 470 p9100_clearscreen(sc); 471 472 ri = &p9100_console_screen.scr_ri; 473 474 p9100_defscreendesc.nrows = ri->ri_rows; 475 p9100_defscreendesc.ncols = ri->ri_cols; 476 p9100_defscreendesc.textops = &ri->ri_ops; 477 p9100_defscreendesc.capabilities = ri->ri_caps; 478 479 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 480 (0x200000 / sc->sc_stride) - sc->sc_height - 5, 481 sc->sc_width, 482 ri->ri_font->fontwidth, 483 ri->ri_font->fontheight, 484 defattr); 485 486 if(isconsole) { 487 wsdisplay_cnattach(&p9100_defscreendesc, ri, 0, 0, defattr); 488 vcons_replay_msgbuf(&p9100_console_screen); 489 } 490 491 aa.console = isconsole; 492 aa.scrdata = &p9100_screenlist; 493 aa.accessops = &p9100_accessops; 494 aa.accesscookie = &sc->vd; 495 496 config_found(self, &aa, wsemuldisplaydevprint); 497 #endif 498 fb->fb_type.fb_size = fb->fb_type.fb_height * fb->fb_linebytes; 499 printf("%s: rev %d / %x, %dx%d, depth %d mem %x\n", 500 device_xname(self), 501 (i & 7), ver, fb->fb_type.fb_width, fb->fb_type.fb_height, 502 fb->fb_type.fb_depth, (unsigned int)sc->sc_fb_psize); 503 /* cursor sprite handling */ 504 p9100_init_cursor(sc); 505 506 /* attach the fb */ 507 fb_attach(fb, isconsole); 508 509 #if NTCTRL > 0 510 /* register callback for external monitor status change */ 511 tadpole_register_callback(p9100_set_extvga, sc); 512 #endif 513 } 514 515 int 516 p9100open(dev_t dev, int flags, int mode, struct lwp *l) 517 { 518 int unit = minor(dev); 519 520 if (device_lookup(&pnozz_cd, unit) == NULL) 521 return (ENXIO); 522 return (0); 523 } 524 525 int 526 p9100close(dev_t dev, int flags, int mode, struct lwp *l) 527 { 528 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 529 530 #if NWSDISPLAY > 0 531 p9100_init_engine(sc); 532 p9100_set_depth(sc, 8); 533 p9100loadcmap(sc, 0, 256); 534 p9100_clearscreen(sc); 535 glyphcache_wipe(&sc->sc_gc); 536 vcons_redraw_screen(sc->vd.active); 537 #endif 538 return 0; 539 } 540 541 int 542 p9100ioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l) 543 { 544 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 545 struct fbgattr *fba; 546 int error, v; 547 548 switch (cmd) { 549 550 case FBIOGTYPE: 551 *(struct fbtype *)data = sc->sc_fb.fb_type; 552 break; 553 554 case FBIOGATTR: 555 fba = (struct fbgattr *)data; 556 fba->real_type = sc->sc_fb.fb_type.fb_type; 557 fba->owner = 0; /* XXX ??? */ 558 fba->fbtype = sc->sc_fb.fb_type; 559 fba->sattr.flags = 0; 560 fba->sattr.emu_type = sc->sc_fb.fb_type.fb_type; 561 fba->sattr.dev_specific[0] = -1; 562 fba->emu_types[0] = sc->sc_fb.fb_type.fb_type; 563 fba->emu_types[1] = -1; 564 break; 565 566 case FBIOGETCMAP: 567 #define p ((struct fbcmap *)data) 568 return (bt_getcmap(p, &sc->sc_cmap, 256, 1)); 569 570 case FBIOPUTCMAP: 571 /* copy to software map */ 572 error = bt_putcmap(p, &sc->sc_cmap, 256, 1); 573 if (error) 574 return (error); 575 /* now blast them into the chip */ 576 /* XXX should use retrace interrupt */ 577 p9100loadcmap(sc, p->index, p->count); 578 #undef p 579 break; 580 581 case FBIOGVIDEO: 582 *(int *)data = p9100_get_video(sc); 583 break; 584 585 case FBIOSVIDEO: 586 p9100_set_video(sc, *(int *)data); 587 break; 588 589 /* these are for both FBIOSCURSOR and FBIOGCURSOR */ 590 #define p ((struct fbcursor *)data) 591 #define pc (&sc->sc_cursor) 592 593 case FBIOGCURSOR: 594 p->set = FB_CUR_SETALL; /* close enough, anyway */ 595 p->enable = pc->pc_enable; 596 p->pos = pc->pc_pos; 597 p->hot = pc->pc_hot; 598 p->size = pc->pc_size; 599 600 if (p->image != NULL) { 601 error = copyout(pc->pc_bits, p->image, 0x200); 602 if (error) 603 return error; 604 error = copyout(&pc->pc_bits[0x80], p->mask, 0x200); 605 if (error) 606 return error; 607 } 608 609 p->cmap.index = 0; 610 p->cmap.count = 3; 611 if (p->cmap.red != NULL) { 612 copyout(pc->red, p->cmap.red, 3); 613 copyout(pc->green, p->cmap.green, 3); 614 copyout(pc->blue, p->cmap.blue, 3); 615 } 616 break; 617 618 case FBIOSCURSOR: 619 { 620 int count; 621 uint32_t image[0x80], mask[0x80]; 622 uint8_t red[3], green[3], blue[3]; 623 624 v = p->set; 625 if (v & FB_CUR_SETCMAP) { 626 error = copyin(p->cmap.red, red, 3); 627 error |= copyin(p->cmap.green, green, 3); 628 error |= copyin(p->cmap.blue, blue, 3); 629 if (error) 630 return error; 631 } 632 if (v & FB_CUR_SETSHAPE) { 633 if (p->size.x > 64 || p->size.y > 64) 634 return EINVAL; 635 memset(&mask, 0, 0x200); 636 memset(&image, 0, 0x200); 637 count = p->size.y * 8; 638 error = copyin(p->image, image, count); 639 if (error) 640 return error; 641 error = copyin(p->mask, mask, count); 642 if (error) 643 return error; 644 } 645 646 /* parameters are OK; do it */ 647 if (v & (FB_CUR_SETCUR | FB_CUR_SETPOS | FB_CUR_SETHOT)) { 648 if (v & FB_CUR_SETCUR) 649 pc->pc_enable = p->enable; 650 if (v & FB_CUR_SETPOS) 651 pc->pc_pos = p->pos; 652 if (v & FB_CUR_SETHOT) 653 pc->pc_hot = p->hot; 654 p9100_set_fbcursor(sc); 655 } 656 657 if (v & FB_CUR_SETCMAP) { 658 memcpy(pc->red, red, 3); 659 memcpy(pc->green, green, 3); 660 memcpy(pc->blue, blue, 3); 661 p9100_setcursorcmap(sc); 662 } 663 664 if (v & FB_CUR_SETSHAPE) { 665 memcpy(pc->pc_bits, image, 0x200); 666 memcpy(&pc->pc_bits[0x80], mask, 0x200); 667 p9100_loadcursor(sc); 668 } 669 } 670 break; 671 672 #undef p 673 #undef cc 674 675 case FBIOGCURPOS: 676 *(struct fbcurpos *)data = sc->sc_cursor.pc_pos; 677 break; 678 679 case FBIOSCURPOS: 680 sc->sc_cursor.pc_pos = *(struct fbcurpos *)data; 681 p9100_set_fbcursor(sc); 682 break; 683 684 case FBIOGCURMAX: 685 /* max cursor size is 64x64 */ 686 ((struct fbcurpos *)data)->x = 64; 687 ((struct fbcurpos *)data)->y = 64; 688 break; 689 690 default: 691 return (ENOTTY); 692 } 693 return (0); 694 } 695 696 static uint32_t 697 p9100_ctl_read_4(struct p9100_softc *sc, bus_size_t off) 698 { 699 700 PNOZZ_LATCH(sc, off); 701 return bus_space_read_4(sc->sc_bustag, sc->sc_ctl_memh, off); 702 } 703 704 static void 705 p9100_ctl_write_4(struct p9100_softc *sc, bus_size_t off, uint32_t v) 706 { 707 708 PNOZZ_LATCH(sc, off); 709 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, off, v); 710 } 711 712 /* initialize the drawing engine */ 713 static void 714 p9100_init_engine(struct p9100_softc *sc) 715 { 716 /* reset clipping rectangles */ 717 uint32_t rmax = ((sc->sc_width & 0x3fff) << 16) | 718 (sc->sc_height & 0x3fff); 719 720 sc->sc_last_offset = 0xffffffff; 721 722 p9100_ctl_write_4(sc, WINDOW_OFFSET, 0); 723 p9100_ctl_write_4(sc, WINDOW_MIN, 0); 724 p9100_ctl_write_4(sc, WINDOW_MAX, rmax); 725 p9100_ctl_write_4(sc, BYTE_CLIP_MIN, 0); 726 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, 0x3fff3fff); 727 p9100_ctl_write_4(sc, DRAW_MODE, 0); 728 p9100_ctl_write_4(sc, PLANE_MASK, 0xffffffff); 729 p9100_ctl_write_4(sc, PATTERN0, 0xffffffff); 730 p9100_ctl_write_4(sc, PATTERN1, 0xffffffff); 731 p9100_ctl_write_4(sc, PATTERN2, 0xffffffff); 732 p9100_ctl_write_4(sc, PATTERN3, 0xffffffff); 733 734 } 735 736 /* we only need these in the wsdisplay case */ 737 #if NWSDISPLAY > 0 738 739 /* wait until the engine is idle */ 740 static void 741 p9100_sync(struct p9100_softc *sc) 742 { 743 while((p9100_ctl_read_4(sc, ENGINE_STATUS) & 744 (ENGINE_BUSY | BLITTER_BUSY)) != 0); 745 } 746 747 static void 748 p9100_set_color_reg(struct p9100_softc *sc, int reg, int32_t col) 749 { 750 uint32_t out; 751 752 switch(sc->sc_depth) 753 { 754 case 1: /* 8 bit */ 755 out = (col << 8) | col; 756 out |= out << 16; 757 break; 758 case 2: /* 16 bit */ 759 out = col | (col << 16); 760 break; 761 default: 762 out = col; 763 } 764 p9100_ctl_write_4(sc, reg, out); 765 } 766 767 /* screen-to-screen blit */ 768 static void 769 p9100_bitblt(void *cookie, int xs, int ys, int xd, int yd, int wi, 770 int he, int rop) 771 { 772 struct p9100_softc *sc = cookie; 773 uint32_t src, dst, srcw, dstw; 774 775 sc->sc_last_offset = 0xffffffff; 776 777 src = ((xs & 0x3fff) << 16) | (ys & 0x3fff); 778 dst = ((xd & 0x3fff) << 16) | (yd & 0x3fff); 779 srcw = (((xs + wi - 1) & 0x3fff) << 16) | ((ys + he - 1) & 0x3fff); 780 dstw = (((xd + wi - 1) & 0x3fff) << 16) | ((yd + he - 1) & 0x3fff); 781 782 p9100_sync(sc); 783 784 p9100_ctl_write_4(sc, RASTER_OP, rop); 785 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, 0x3fff3fff); 786 787 p9100_ctl_write_4(sc, ABS_XY0, src << sc->sc_depthshift); 788 p9100_ctl_write_4(sc, ABS_XY1, srcw << sc->sc_depthshift); 789 p9100_ctl_write_4(sc, ABS_XY2, dst << sc->sc_depthshift); 790 p9100_ctl_write_4(sc, ABS_XY3, dstw << sc->sc_depthshift); 791 792 (void)p9100_ctl_read_4(sc, COMMAND_BLIT); 793 } 794 795 /* solid rectangle fill */ 796 static void 797 p9100_rectfill(void *cookie, int xs, int ys, int wi, int he, uint32_t col) 798 { 799 struct p9100_softc *sc = cookie; 800 uint32_t src, srcw; 801 802 sc->sc_last_offset = 0xffffffff; 803 804 src = ((xs & 0x3fff) << 16) | (ys & 0x3fff); 805 srcw = (((xs + wi) & 0x3fff) << 16) | ((ys + he) & 0x3fff); 806 p9100_sync(sc); 807 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, 0x3fff3fff); 808 p9100_set_color_reg(sc, FOREGROUND_COLOR, col); 809 p9100_set_color_reg(sc, BACKGROUND_COLOR, col); 810 p9100_ctl_write_4(sc, RASTER_OP, ROP_PAT); 811 p9100_ctl_write_4(sc, COORD_INDEX, 0); 812 p9100_ctl_write_4(sc, RECT_RTW_XY, src); 813 p9100_ctl_write_4(sc, RECT_RTW_XY, srcw); 814 (void)p9100_ctl_read_4(sc, COMMAND_QUAD); 815 } 816 817 /* setup for mono->colour expansion */ 818 static void 819 p9100_setup_mono(struct p9100_softc *sc, int x, int y, int wi, int he, 820 uint32_t fg, uint32_t bg) 821 { 822 823 sc->sc_last_offset = 0xffffffff; 824 825 p9100_sync(sc); 826 /* 827 * this doesn't make any sense to me either, but for some reason the 828 * chip applies the foreground colour to 0 pixels 829 */ 830 831 p9100_set_color_reg(sc,FOREGROUND_COLOR,bg); 832 p9100_set_color_reg(sc,BACKGROUND_COLOR,fg); 833 834 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, 0x3fff3fff); 835 p9100_ctl_write_4(sc, RASTER_OP, ROP_SRC); 836 p9100_ctl_write_4(sc, ABS_X0, x); 837 p9100_ctl_write_4(sc, ABS_XY1, (x << 16) | (y & 0xFFFFL)); 838 p9100_ctl_write_4(sc, ABS_X2, (x + wi)); 839 p9100_ctl_write_4(sc, ABS_Y3, he); 840 /* now feed the data into the chip */ 841 sc->sc_mono_width = wi; 842 } 843 844 /* write monochrome data to the screen through the blitter */ 845 static void 846 p9100_feed_line(struct p9100_softc *sc, int count, uint8_t *data) 847 { 848 int i; 849 uint32_t latch = 0, bork; 850 int shift = 24; 851 int to_go = sc->sc_mono_width; 852 853 PNOZZ_LATCH(sc, PIXEL_1); 854 855 for (i = 0; i < count; i++) { 856 bork = data[i]; 857 latch |= (bork << shift); 858 if (shift == 0) { 859 /* check how many bits are significant */ 860 if (to_go > 31) { 861 bus_space_write_4(sc->sc_bustag, 862 sc->sc_ctl_memh, 863 (PIXEL_1 + (31 << 2)), latch); 864 to_go -= 32; 865 } else 866 { 867 bus_space_write_4(sc->sc_bustag, 868 sc->sc_ctl_memh, 869 (PIXEL_1 + ((to_go - 1) << 2)), latch); 870 to_go = 0; 871 } 872 latch = 0; 873 shift = 24; 874 } else 875 shift -= 8; 876 } 877 if (shift != 24) 878 p9100_ctl_write_4(sc, (PIXEL_1 + ((to_go - 1) << 2)), latch); 879 } 880 881 static void 882 p9100_clearscreen(struct p9100_softc *sc) 883 { 884 885 p9100_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, sc->sc_bg); 886 } 887 #endif /* NWSDISPLAY > 0 */ 888 889 static uint8_t 890 p9100_ramdac_read(struct p9100_softc *sc, bus_size_t off) 891 { 892 893 (void)p9100_ctl_read_4(sc, PWRUP_CNFG); 894 return ((bus_space_read_4(sc->sc_bustag, 895 sc->sc_ctl_memh, off) >> 16) & 0xff); 896 } 897 898 static void 899 p9100_ramdac_write(struct p9100_softc *sc, bus_size_t off, uint8_t v) 900 { 901 902 (void)p9100_ctl_read_4(sc, PWRUP_CNFG); 903 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, off, 904 ((uint32_t)v) << 16); 905 } 906 907 static uint8_t 908 p9100_ramdac_read_ctl(struct p9100_softc *sc, int off) 909 { 910 p9100_ramdac_write(sc, DAC_INDX_LO, off & 0xff); 911 p9100_ramdac_write(sc, DAC_INDX_HI, (off & 0xff00) >> 8); 912 return p9100_ramdac_read(sc, DAC_INDX_DATA); 913 } 914 915 static void 916 p9100_ramdac_write_ctl(struct p9100_softc *sc, int off, uint8_t val) 917 { 918 p9100_ramdac_write(sc, DAC_INDX_LO, off & 0xff); 919 p9100_ramdac_write(sc, DAC_INDX_HI, (off & 0xff00) >> 8); 920 p9100_ramdac_write(sc, DAC_INDX_DATA, val); 921 } 922 923 /* 924 * Undo the effect of an FBIOSVIDEO that turns the video off. 925 */ 926 static void 927 p9100unblank(device_t dev) 928 { 929 struct p9100_softc *sc = device_private(dev); 930 931 p9100_set_video(sc, 1); 932 933 /* 934 * Check if we're in terminal mode. If not force the console screen 935 * to front so we can see ddb, panic messages and so on 936 */ 937 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) { 938 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 939 if (sc->vd.active != &p9100_console_screen) { 940 SCREEN_INVISIBLE(sc->vd.active); 941 sc->vd.active = &p9100_console_screen; 942 SCREEN_VISIBLE(&p9100_console_screen); 943 } 944 p9100_init_engine(sc); 945 p9100_set_depth(sc, 8); 946 vcons_redraw_screen(&p9100_console_screen); 947 } 948 } 949 950 static void 951 p9100_set_video(struct p9100_softc *sc, int enable) 952 { 953 uint32_t v = p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1); 954 955 if (enable) 956 v |= VIDEO_ENABLED; 957 else 958 v &= ~VIDEO_ENABLED; 959 p9100_ctl_write_4(sc, SCRN_RPNT_CTL_1, v); 960 #if NTCTRL > 0 961 /* Turn On/Off the TFT if we know how. 962 */ 963 tadpole_set_video(enable); 964 #endif 965 } 966 967 static int 968 p9100_get_video(struct p9100_softc *sc) 969 { 970 return (p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1) & VIDEO_ENABLED) != 0; 971 } 972 973 static bool 974 p9100_suspend(device_t dev, const pmf_qual_t *qual) 975 { 976 struct p9100_softc *sc = device_private(dev); 977 978 if (sc->sc_powerstate == PWR_SUSPEND) 979 return TRUE; 980 981 sc->sc_video = p9100_get_video(sc); 982 sc->sc_dac_power = p9100_ramdac_read_ctl(sc, DAC_POWER_MGT); 983 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 984 DAC_POWER_SCLK_DISABLE | 985 DAC_POWER_DDOT_DISABLE | 986 DAC_POWER_SYNC_DISABLE | 987 DAC_POWER_ICLK_DISABLE | 988 DAC_POWER_IPWR_DISABLE); 989 p9100_set_video(sc, 0); 990 sc->sc_powerstate = PWR_SUSPEND; 991 return TRUE; 992 } 993 994 static bool 995 p9100_resume(device_t dev, const pmf_qual_t *qual) 996 { 997 struct p9100_softc *sc = device_private(dev); 998 999 if (sc->sc_powerstate == PWR_RESUME) 1000 return TRUE; 1001 1002 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, sc->sc_dac_power); 1003 p9100_set_video(sc, sc->sc_video); 1004 1005 sc->sc_powerstate = PWR_RESUME; 1006 return TRUE; 1007 } 1008 1009 /* 1010 * Load a subset of the current (new) colormap into the IBM RAMDAC. 1011 */ 1012 static void 1013 p9100loadcmap(struct p9100_softc *sc, int start, int ncolors) 1014 { 1015 int i; 1016 sc->sc_last_offset = 0xffffffff; 1017 1018 p9100_ramdac_write(sc, DAC_CMAP_WRIDX, start); 1019 1020 for (i=0;i<ncolors;i++) { 1021 p9100_ramdac_write(sc, DAC_CMAP_DATA, 1022 sc->sc_cmap.cm_map[i + start][0]); 1023 p9100_ramdac_write(sc, DAC_CMAP_DATA, 1024 sc->sc_cmap.cm_map[i + start][1]); 1025 p9100_ramdac_write(sc, DAC_CMAP_DATA, 1026 sc->sc_cmap.cm_map[i + start][2]); 1027 } 1028 } 1029 1030 /* 1031 * Return the address that would map the given device at the given 1032 * offset, allowing for the given protection, or return -1 for error. 1033 */ 1034 static paddr_t 1035 p9100mmap(dev_t dev, off_t off, int prot) 1036 { 1037 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 1038 1039 if (off & PGOFSET) 1040 panic("p9100mmap"); 1041 if (off < 0) 1042 return (-1); 1043 1044 #ifdef PNOZZ_EMUL_CG3 1045 #define CG3_MMAP_OFFSET 0x04000000 1046 /* Make Xsun think we are a CG3 (SUN3COLOR) 1047 */ 1048 if (off >= CG3_MMAP_OFFSET && off < CG3_MMAP_OFFSET + sc->sc_fb_psize) { 1049 off -= CG3_MMAP_OFFSET; 1050 return (bus_space_mmap(sc->sc_bustag, 1051 sc->sc_fb_paddr, 1052 off, 1053 prot, 1054 BUS_SPACE_MAP_LINEAR)); 1055 } 1056 #endif 1057 1058 if (off >= sc->sc_fb_psize + sc->sc_ctl_psize/* + sc->sc_cmd_psize*/) 1059 return (-1); 1060 1061 if (off < sc->sc_fb_psize) { 1062 return (bus_space_mmap(sc->sc_bustag, 1063 sc->sc_fb_paddr, 1064 off, 1065 prot, 1066 BUS_SPACE_MAP_LINEAR)); 1067 } 1068 1069 off -= sc->sc_fb_psize; 1070 if (off < sc->sc_ctl_psize) { 1071 return (bus_space_mmap(sc->sc_bustag, 1072 sc->sc_ctl_paddr, 1073 off, 1074 prot, 1075 BUS_SPACE_MAP_LINEAR)); 1076 } 1077 1078 return EINVAL; 1079 } 1080 1081 /* wscons stuff */ 1082 #if NWSDISPLAY > 0 1083 1084 static void 1085 p9100_cursor(void *cookie, int on, int row, int col) 1086 { 1087 struct rasops_info *ri = cookie; 1088 struct vcons_screen *scr = ri->ri_hw; 1089 struct p9100_softc *sc = scr->scr_cookie; 1090 int x, y, wi,he; 1091 1092 wi = ri->ri_font->fontwidth; 1093 he = ri->ri_font->fontheight; 1094 1095 if (ri->ri_flg & RI_CURSOR) { 1096 x = ri->ri_ccol * wi + ri->ri_xorigin; 1097 y = ri->ri_crow * he + ri->ri_yorigin; 1098 p9100_bitblt(sc, x, y, x, y, wi, he, ROP_SRC ^ 0xff); 1099 ri->ri_flg &= ~RI_CURSOR; 1100 } 1101 1102 ri->ri_crow = row; 1103 ri->ri_ccol = col; 1104 1105 if (on) 1106 { 1107 x = ri->ri_ccol * wi + ri->ri_xorigin; 1108 y = ri->ri_crow * he + ri->ri_yorigin; 1109 p9100_bitblt(sc, x, y, x, y, wi, he, ROP_SRC ^ 0xff); 1110 ri->ri_flg |= RI_CURSOR; 1111 } 1112 } 1113 1114 #if 0 1115 static int 1116 p9100_mapchar(void *cookie, int uni, u_int *index) 1117 { 1118 return 0; 1119 } 1120 #endif 1121 1122 static void 1123 p9100_putchar(void *cookie, int row, int col, u_int c, long attr) 1124 { 1125 struct rasops_info *ri = cookie; 1126 struct wsdisplay_font *font = PICK_FONT(ri, c); 1127 struct vcons_screen *scr = ri->ri_hw; 1128 struct p9100_softc *sc = scr->scr_cookie; 1129 1130 int fg, bg, i; 1131 uint8_t *data; 1132 int x, y, wi, he; 1133 1134 wi = font->fontwidth; 1135 he = font->fontheight; 1136 1137 if (!CHAR_IN_FONT(c, font)) 1138 return; 1139 1140 bg = (u_char)ri->ri_devcmap[(attr >> 16) & 0xff]; 1141 fg = (u_char)ri->ri_devcmap[(attr >> 24) & 0xff]; 1142 x = ri->ri_xorigin + col * wi; 1143 y = ri->ri_yorigin + row * he; 1144 1145 if (c == 0x20) { 1146 p9100_rectfill(sc, x, y, wi, he, bg); 1147 } else { 1148 data = WSFONT_GLYPH(c, font); 1149 1150 p9100_setup_mono(sc, x, y, wi, 1, fg, bg); 1151 for (i = 0; i < he; i++) { 1152 p9100_feed_line(sc, font->stride, 1153 data); 1154 data += font->stride; 1155 } 1156 } 1157 } 1158 1159 static void 1160 p9100_putchar_aa(void *cookie, int row, int col, u_int c, long attr) 1161 { 1162 struct rasops_info *ri = cookie; 1163 struct wsdisplay_font *font = PICK_FONT(ri, c); 1164 struct vcons_screen *scr = ri->ri_hw; 1165 struct p9100_softc *sc = scr->scr_cookie; 1166 uint32_t bg, latch = 0, bg8, fg8, pixel; 1167 int i, j, x, y, wi, he, r, g, b, aval, rwi; 1168 int r1, g1, b1, r0, g0, b0, fgo, bgo; 1169 uint8_t *data8; 1170 int rv; 1171 1172 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) 1173 return; 1174 1175 if (!CHAR_IN_FONT(c, font)) 1176 return; 1177 1178 wi = font->fontwidth; 1179 rwi = (wi + 3) & ~3; 1180 he = font->fontheight; 1181 1182 bg = ri->ri_devcmap[(attr >> 16) & 0xf]; 1183 x = ri->ri_xorigin + col * wi; 1184 y = ri->ri_yorigin + row * he; 1185 1186 if (c == 0x20) { 1187 p9100_rectfill(sc, x, y, wi, he, bg); 1188 return; 1189 } 1190 1191 rv = glyphcache_try(&sc->sc_gc, c, x, y, attr); 1192 if (rv == GC_OK) 1193 return; 1194 1195 data8 = WSFONT_GLYPH(c, font); 1196 1197 p9100_sync(sc); 1198 1199 p9100_ctl_write_4(sc, RASTER_OP, ROP_SRC); 1200 p9100_ctl_write_4(sc, ABS_X0, x); 1201 p9100_ctl_write_4(sc, ABS_XY1, (x << 16) | (y & 0xFFFFL)); 1202 p9100_ctl_write_4(sc, ABS_X2, (x + rwi)); 1203 p9100_ctl_write_4(sc, ABS_Y3, 1); 1204 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, ((x + wi - 1) << 16) | 0x3fff); 1205 1206 /* 1207 * we need the RGB colours here, so get offsets into rasops_cmap 1208 */ 1209 fgo = ((attr >> 24) & 0xf) * 3; 1210 bgo = ((attr >> 16) & 0xf) * 3; 1211 1212 r0 = rasops_cmap[bgo]; 1213 r1 = rasops_cmap[fgo]; 1214 g0 = rasops_cmap[bgo + 1]; 1215 g1 = rasops_cmap[fgo + 1]; 1216 b0 = rasops_cmap[bgo + 2]; 1217 b1 = rasops_cmap[fgo + 2]; 1218 #define R3G3B2(r, g, b) ((r & 0xe0) | ((g >> 3) & 0x1c) | (b >> 6)) 1219 bg8 = R3G3B2(r0, g0, b0); 1220 fg8 = R3G3B2(r1, g1, b1); 1221 1222 //r128fb_wait(sc, 16); 1223 1224 for (i = 0; i < he; i++) { 1225 for (j = 0; j < wi; j++) { 1226 aval = *data8; 1227 if (aval == 0) { 1228 pixel = bg8; 1229 } else if (aval == 255) { 1230 pixel = fg8; 1231 } else { 1232 r = aval * r1 + (255 - aval) * r0; 1233 g = aval * g1 + (255 - aval) * g0; 1234 b = aval * b1 + (255 - aval) * b0; 1235 pixel = ((r & 0xe000) >> 8) | 1236 ((g & 0xe000) >> 11) | 1237 ((b & 0xc000) >> 14); 1238 } 1239 latch = (latch << 8) | pixel; 1240 /* write in 32bit chunks */ 1241 if ((j & 3) == 3) { 1242 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, 1243 COMMAND_PIXEL8, latch); 1244 latch = 0; 1245 } 1246 data8++; 1247 } 1248 /* if we have pixels left in latch write them out */ 1249 if ((j & 3) != 0) { 1250 latch = latch << ((4 - (j & 3)) << 3); 1251 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, 1252 COMMAND_PIXEL8, latch); 1253 } 1254 } 1255 if (rv == GC_ADD) { 1256 glyphcache_add(&sc->sc_gc, c, x, y); 1257 } 1258 } 1259 1260 /* 1261 * wsdisplay_accessops 1262 */ 1263 1264 int 1265 p9100_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, 1266 struct lwp *l) 1267 { 1268 struct vcons_data *vd = v; 1269 struct p9100_softc *sc = vd->cookie; 1270 struct wsdisplay_fbinfo *wdf; 1271 struct vcons_screen *ms = vd->active; 1272 1273 switch (cmd) { 1274 case WSDISPLAYIO_GTYPE: 1275 *(u_int *)data = WSDISPLAY_TYPE_SB_P9100; 1276 return 0; 1277 1278 case FBIOGVIDEO: 1279 case WSDISPLAYIO_GVIDEO: 1280 *(int *)data = p9100_get_video(sc); 1281 return 0; 1282 1283 case WSDISPLAYIO_SVIDEO: 1284 case FBIOSVIDEO: 1285 p9100_set_video(sc, *(int *)data); 1286 return 0; 1287 1288 case WSDISPLAYIO_GINFO: 1289 wdf = (void *)data; 1290 wdf->height = ms->scr_ri.ri_height; 1291 wdf->width = ms->scr_ri.ri_width; 1292 wdf->depth = ms->scr_ri.ri_depth; 1293 wdf->cmsize = 256; 1294 return 0; 1295 1296 case WSDISPLAYIO_GETCMAP: 1297 return p9100_getcmap(sc, (struct wsdisplay_cmap *)data); 1298 1299 case WSDISPLAYIO_PUTCMAP: 1300 return p9100_putcmap(sc, (struct wsdisplay_cmap *)data); 1301 1302 case WSDISPLAYIO_SMODE: 1303 { 1304 int new_mode = *(int*)data; 1305 if (new_mode != sc->sc_mode) 1306 { 1307 sc->sc_mode = new_mode; 1308 if (new_mode == WSDISPLAYIO_MODE_EMUL) 1309 { 1310 p9100_init_engine(sc); 1311 p9100_set_depth(sc, 8); 1312 p9100loadcmap(sc, 0, 256); 1313 p9100_clearscreen(sc); 1314 glyphcache_wipe(&sc->sc_gc); 1315 vcons_redraw_screen(ms); 1316 } 1317 } 1318 } 1319 } 1320 return EPASSTHROUGH; 1321 } 1322 1323 static paddr_t 1324 p9100_mmap(void *v, void *vs, off_t offset, int prot) 1325 { 1326 struct vcons_data *vd = v; 1327 struct p9100_softc *sc = vd->cookie; 1328 paddr_t pa; 1329 1330 /* 'regular' framebuffer mmap()ing */ 1331 if (offset < sc->sc_fb_psize) { 1332 pa = bus_space_mmap(sc->sc_bustag, sc->sc_fb_paddr + offset, 0, 1333 prot, BUS_SPACE_MAP_LINEAR); 1334 return pa; 1335 } 1336 1337 if ((offset >= sc->sc_fb_paddr) && (offset < (sc->sc_fb_paddr + 1338 sc->sc_fb_psize))) { 1339 pa = bus_space_mmap(sc->sc_bustag, offset, 0, prot, 1340 BUS_SPACE_MAP_LINEAR); 1341 return pa; 1342 } 1343 1344 if ((offset >= sc->sc_ctl_paddr) && (offset < (sc->sc_ctl_paddr + 1345 sc->sc_ctl_psize))) { 1346 pa = bus_space_mmap(sc->sc_bustag, offset, 0, prot, 1347 BUS_SPACE_MAP_LINEAR); 1348 return pa; 1349 } 1350 1351 return -1; 1352 } 1353 1354 static void 1355 p9100_init_screen(void *cookie, struct vcons_screen *scr, 1356 int existing, long *defattr) 1357 { 1358 struct p9100_softc *sc = cookie; 1359 struct rasops_info *ri = &scr->scr_ri; 1360 1361 ri->ri_depth = sc->sc_depth << 3; 1362 ri->ri_width = sc->sc_width; 1363 ri->ri_height = sc->sc_height; 1364 ri->ri_stride = sc->sc_stride; 1365 ri->ri_flg = RI_CENTER | RI_FULLCLEAR; 1366 if (ri->ri_depth == 8) 1367 ri->ri_flg |= RI_8BIT_IS_RGB | RI_ENABLE_ALPHA; 1368 1369 #ifdef PNOZZ_USE_LATCH 1370 ri->ri_bits = bus_space_vaddr(sc->sc_bustag, sc->sc_fb_memh); 1371 DPRINTF("addr: %08lx\n",(ulong)ri->ri_bits); 1372 #endif 1373 1374 rasops_init(ri, 0, 0); 1375 ri->ri_caps = WSSCREEN_WSCOLORS; 1376 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 1377 sc->sc_width / ri->ri_font->fontwidth); 1378 1379 /* enable acceleration */ 1380 ri->ri_ops.cursor = p9100_cursor; 1381 ri->ri_ops.copyrows = p9100_copyrows; 1382 ri->ri_ops.eraserows = p9100_eraserows; 1383 ri->ri_ops.copycols = p9100_copycols; 1384 ri->ri_ops.erasecols = p9100_erasecols; 1385 if (FONT_IS_ALPHA(ri->ri_font)) { 1386 ri->ri_ops.putchar = p9100_putchar_aa; 1387 } else 1388 ri->ri_ops.putchar = p9100_putchar; 1389 } 1390 1391 static int 1392 p9100_putcmap(struct p9100_softc *sc, struct wsdisplay_cmap *cm) 1393 { 1394 u_int index = cm->index; 1395 u_int count = cm->count; 1396 int i, error; 1397 u_char rbuf[256], gbuf[256], bbuf[256]; 1398 u_char *r, *g, *b; 1399 1400 if (cm->index >= 256 || cm->count > 256 || 1401 (cm->index + cm->count) > 256) 1402 return EINVAL; 1403 error = copyin(cm->red, &rbuf[index], count); 1404 if (error) 1405 return error; 1406 error = copyin(cm->green, &gbuf[index], count); 1407 if (error) 1408 return error; 1409 error = copyin(cm->blue, &bbuf[index], count); 1410 if (error) 1411 return error; 1412 1413 r = &rbuf[index]; 1414 g = &gbuf[index]; 1415 b = &bbuf[index]; 1416 1417 for (i = 0; i < count; i++) { 1418 sc->sc_cmap.cm_map[index][0] = *r; 1419 sc->sc_cmap.cm_map[index][1] = *g; 1420 sc->sc_cmap.cm_map[index][2] = *b; 1421 index++; 1422 r++, g++, b++; 1423 } 1424 p9100loadcmap(sc, 0, 256); 1425 return 0; 1426 } 1427 1428 static int 1429 p9100_getcmap(struct p9100_softc *sc, struct wsdisplay_cmap *cm) 1430 { 1431 u_int index = cm->index; 1432 u_int count = cm->count; 1433 int error, i; 1434 uint8_t red[256], green[256], blue[256]; 1435 1436 if (index >= 255 || count > 256 || index + count > 256) 1437 return EINVAL; 1438 1439 i = index; 1440 while (i < (index + count)) { 1441 red[i] = sc->sc_cmap.cm_map[i][0]; 1442 green[i] = sc->sc_cmap.cm_map[i][1]; 1443 blue[i] = sc->sc_cmap.cm_map[i][2]; 1444 i++; 1445 } 1446 error = copyout(&red[index], cm->red, count); 1447 if (error) 1448 return error; 1449 error = copyout(&green[index], cm->green, count); 1450 if (error) 1451 return error; 1452 error = copyout(&blue[index], cm->blue, count); 1453 if (error) 1454 return error; 1455 1456 return 0; 1457 } 1458 1459 static void 1460 p9100_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1461 { 1462 struct rasops_info *ri = cookie; 1463 struct vcons_screen *scr = ri->ri_hw; 1464 int32_t xs, xd, y, width, height; 1465 1466 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1467 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1468 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1469 width = ri->ri_font->fontwidth * ncols; 1470 height = ri->ri_font->fontheight; 1471 p9100_bitblt(scr->scr_cookie, xs, y, xd, y, width, height, ROP_SRC); 1472 } 1473 1474 static void 1475 p9100_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1476 { 1477 struct rasops_info *ri = cookie; 1478 struct vcons_screen *scr = ri->ri_hw; 1479 int32_t x, y, width, height, bg; 1480 1481 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1482 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1483 width = ri->ri_font->fontwidth * ncols; 1484 height = ri->ri_font->fontheight; 1485 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1486 p9100_rectfill(scr->scr_cookie, x, y, width, height, bg); 1487 } 1488 1489 static void 1490 p9100_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1491 { 1492 struct rasops_info *ri = cookie; 1493 struct vcons_screen *scr = ri->ri_hw; 1494 int32_t x, ys, yd, width, height; 1495 1496 x = ri->ri_xorigin; 1497 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1498 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1499 width = ri->ri_emuwidth; 1500 height = ri->ri_font->fontheight * nrows; 1501 p9100_bitblt(scr->scr_cookie, x, ys, x, yd, width, height, ROP_SRC); 1502 } 1503 1504 static void 1505 p9100_eraserows(void *cookie, int row, int nrows, long fillattr) 1506 { 1507 struct rasops_info *ri = cookie; 1508 struct vcons_screen *scr = ri->ri_hw; 1509 int32_t x, y, width, height, bg; 1510 1511 if ((row == 0) && (nrows == ri->ri_rows)) { 1512 x = y = 0; 1513 width = ri->ri_width; 1514 height = ri->ri_height; 1515 } else { 1516 x = ri->ri_xorigin; 1517 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1518 width = ri->ri_emuwidth; 1519 height = ri->ri_font->fontheight * nrows; 1520 } 1521 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1522 p9100_rectfill(scr->scr_cookie, x, y, width, height, bg); 1523 } 1524 1525 #if 0 1526 static int 1527 p9100_load_font(void *v, void *cookie, struct wsdisplay_font *data) 1528 { 1529 1530 return 0; 1531 } 1532 #endif 1533 1534 #endif /* NWSDISPLAY > 0 */ 1535 1536 #if 0 1537 static int 1538 p9100_intr(void *arg) 1539 { 1540 /*p9100_softc *sc=arg;*/ 1541 DPRINTF("."); 1542 return 1; 1543 } 1544 #endif 1545 1546 static void 1547 p9100_init_cursor(struct p9100_softc *sc) 1548 { 1549 1550 memset(&sc->sc_cursor, 0, sizeof(struct pnozz_cursor)); 1551 sc->sc_cursor.pc_size.x = 64; 1552 sc->sc_cursor.pc_size.y = 64; 1553 1554 } 1555 1556 static void 1557 p9100_set_fbcursor(struct p9100_softc *sc) 1558 { 1559 #ifdef PNOZZ_PARANOID 1560 int s; 1561 1562 s = splhigh(); /* just in case... */ 1563 #endif 1564 sc->sc_last_offset = 0xffffffff; 1565 1566 /* set position and hotspot */ 1567 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1568 p9100_ramdac_write(sc, DAC_INDX_HI, 0); 1569 p9100_ramdac_write(sc, DAC_INDX_LO, DAC_CURSOR_CTL); 1570 if (sc->sc_cursor.pc_enable) { 1571 p9100_ramdac_write(sc, DAC_INDX_DATA, DAC_CURSOR_X11 | 1572 DAC_CURSOR_64); 1573 } else 1574 p9100_ramdac_write(sc, DAC_INDX_DATA, DAC_CURSOR_OFF); 1575 /* next two registers - x low, high, y low, high */ 1576 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_pos.x & 0xff); 1577 p9100_ramdac_write(sc, DAC_INDX_DATA, (sc->sc_cursor.pc_pos.x >> 8) & 1578 0xff); 1579 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_pos.y & 0xff); 1580 p9100_ramdac_write(sc, DAC_INDX_DATA, (sc->sc_cursor.pc_pos.y >> 8) & 1581 0xff); 1582 /* hotspot */ 1583 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_hot.x & 0xff); 1584 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_hot.y & 0xff); 1585 1586 #ifdef PNOZZ_PARANOID 1587 splx(s); 1588 #endif 1589 1590 } 1591 1592 static void 1593 p9100_setcursorcmap(struct p9100_softc *sc) 1594 { 1595 int i; 1596 1597 #ifdef PNOZZ_PARANOID 1598 int s; 1599 s = splhigh(); /* just in case... */ 1600 #endif 1601 sc->sc_last_offset = 0xffffffff; 1602 1603 /* set cursor colours */ 1604 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1605 p9100_ramdac_write(sc, DAC_INDX_HI, 0); 1606 p9100_ramdac_write(sc, DAC_INDX_LO, DAC_CURSOR_COL_1); 1607 1608 for (i = 0; i < 3; i++) { 1609 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.red[i]); 1610 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.green[i]); 1611 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.blue[i]); 1612 } 1613 1614 #ifdef PNOZZ_PARANOID 1615 splx(s); 1616 #endif 1617 } 1618 1619 static void 1620 p9100_loadcursor(struct p9100_softc *sc) 1621 { 1622 uint32_t *image, *mask; 1623 uint32_t bit, bbit, im, ma; 1624 int i, j, k; 1625 uint8_t latch1, latch2; 1626 1627 #ifdef PNOZZ_PARANOID 1628 int s; 1629 s = splhigh(); /* just in case... */ 1630 #endif 1631 sc->sc_last_offset = 0xffffffff; 1632 1633 /* set cursor shape */ 1634 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1635 p9100_ramdac_write(sc, DAC_INDX_HI, 1); 1636 p9100_ramdac_write(sc, DAC_INDX_LO, 0); 1637 1638 image = sc->sc_cursor.pc_bits; 1639 mask = &sc->sc_cursor.pc_bits[0x80]; 1640 1641 for (i = 0; i < 0x80; i++) { 1642 bit = 0x80000000; 1643 im = image[i]; 1644 ma = mask[i]; 1645 for (k = 0; k < 4; k++) { 1646 bbit = 0x1; 1647 latch1 = 0; 1648 for (j = 0; j < 4; j++) { 1649 if (im & bit) 1650 latch1 |= bbit; 1651 bbit <<= 1; 1652 if (ma & bit) 1653 latch1 |= bbit; 1654 bbit <<= 1; 1655 bit >>= 1; 1656 } 1657 bbit = 0x1; 1658 latch2 = 0; 1659 for (j = 0; j < 4; j++) { 1660 if (im & bit) 1661 latch2 |= bbit; 1662 bbit <<= 1; 1663 if (ma & bit) 1664 latch2 |= bbit; 1665 bbit <<= 1; 1666 bit >>= 1; 1667 } 1668 p9100_ramdac_write(sc, DAC_INDX_DATA, latch1); 1669 p9100_ramdac_write(sc, DAC_INDX_DATA, latch2); 1670 } 1671 } 1672 #ifdef PNOZZ_DEBUG_CURSOR 1673 printf("image:\n"); 1674 for (i=0;i<0x80;i+=2) 1675 printf("%08x %08x\n", image[i], image[i+1]); 1676 printf("mask:\n"); 1677 for (i=0;i<0x80;i+=2) 1678 printf("%08x %08x\n", mask[i], mask[i+1]); 1679 #endif 1680 #ifdef PNOZZ_PARANOID 1681 splx(s); 1682 #endif 1683 } 1684 1685 #if NTCTRL > 0 1686 static void 1687 p9100_set_extvga(void *cookie, int status) 1688 { 1689 struct p9100_softc *sc = cookie; 1690 #ifdef PNOZZ_PARANOID 1691 int s; 1692 1693 s = splhigh(); 1694 #endif 1695 1696 #ifdef PNOZZ_DEBUG 1697 printf("%s: external VGA %s\n", device_xname(sc->sc_dev), 1698 status ? "on" : "off"); 1699 #endif 1700 1701 sc->sc_last_offset = 0xffffffff; 1702 1703 if (status) { 1704 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 1705 p9100_ramdac_read_ctl(sc, DAC_POWER_MGT) & 1706 ~DAC_POWER_IPWR_DISABLE); 1707 } else { 1708 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 1709 p9100_ramdac_read_ctl(sc, DAC_POWER_MGT) | 1710 DAC_POWER_IPWR_DISABLE); 1711 } 1712 #ifdef PNOZZ_PARANOID 1713 splx(s); 1714 #endif 1715 } 1716 #endif /* NTCTRL > 0 */ 1717 1718 static int 1719 upper_bit(uint32_t b) 1720 { 1721 uint32_t mask=0x80000000; 1722 int cnt = 31; 1723 if (b == 0) 1724 return -1; 1725 while ((mask != 0) && ((b & mask) == 0)) { 1726 mask = mask >> 1; 1727 cnt--; 1728 } 1729 return cnt; 1730 } 1731 1732 static int 1733 p9100_set_depth(struct p9100_softc *sc, int depth) 1734 { 1735 int new_sls; 1736 uint32_t bits, scr, memctl, mem; 1737 int s0, s1, s2, s3, ps, crtcline; 1738 uint8_t pf, mc3, es; 1739 1740 switch (depth) { 1741 case 8: 1742 sc->sc_depthshift = 0; 1743 ps = 2; 1744 pf = 3; 1745 mc3 = 0; 1746 es = 0; /* no swapping */ 1747 memctl = 3; 1748 break; 1749 case 16: 1750 sc->sc_depthshift = 1; 1751 ps = 3; 1752 pf = 4; 1753 mc3 = 0; 1754 es = 2; /* swap bytes in 16bit words */ 1755 memctl = 2; 1756 break; 1757 case 24: 1758 /* boo */ 1759 printf("We don't DO 24bit pixels dammit!\n"); 1760 return 0; 1761 case 32: 1762 sc->sc_depthshift = 2; 1763 ps = 5; 1764 pf = 6; 1765 mc3 = 0; 1766 es = 6; /* swap both half-words and bytes */ 1767 memctl = 1; /* 0 */ 1768 break; 1769 default: 1770 aprint_error("%s: bogus colour depth (%d)\n", 1771 __func__, depth); 1772 return FALSE; 1773 } 1774 /* 1775 * this could be done a lot shorter and faster but then nobody would 1776 * understand what the hell we're doing here without getting a major 1777 * headache. Scanline size is encoded as 4 shift values, 3 of them 3 bits 1778 * wide, 16 << n for n>0, one 2 bits, 512 << n for n>0. n==0 means 0 1779 */ 1780 new_sls = sc->sc_width << sc->sc_depthshift; 1781 sc->sc_stride = new_sls; 1782 bits = new_sls; 1783 s3 = upper_bit(bits); 1784 if (s3 > 9) { 1785 bits &= ~(1 << s3); 1786 s3 -= 9; 1787 } else 1788 s3 = 0; 1789 s2 = upper_bit(bits); 1790 if (s2 > 0) { 1791 bits &= ~(1 << s2); 1792 s2 -= 4; 1793 } else 1794 s2 = 0; 1795 s1 = upper_bit(bits); 1796 if (s1 > 0) { 1797 bits &= ~(1 << s1); 1798 s1 -= 4; 1799 } else 1800 s1 = 0; 1801 s0 = upper_bit(bits); 1802 if (s0 > 0) { 1803 bits &= ~(1 << s0); 1804 s0 -= 4; 1805 } else 1806 s0 = 0; 1807 1808 1809 DPRINTF("sls: %x sh: %d %d %d %d leftover: %x\n", new_sls, s0, s1, 1810 s2, s3, bits); 1811 1812 /* 1813 * now let's put these values into the System Config Register. No need to 1814 * read it here since we (hopefully) just saved the content 1815 */ 1816 scr = p9100_ctl_read_4(sc, SYS_CONF); 1817 scr = (s0 << SHIFT_0) | (s1 << SHIFT_1) | (s2 << SHIFT_2) | 1818 (s3 << SHIFT_3) | (ps << PIXEL_SHIFT) | (es << SWAP_SHIFT); 1819 1820 DPRINTF("new scr: %x DAC %x %x\n", scr, pf, mc3); 1821 1822 mem = p9100_ctl_read_4(sc, VID_MEM_CONFIG); 1823 1824 DPRINTF("old memctl: %08x\n", mem); 1825 1826 /* set shift and crtc clock */ 1827 mem &= ~(0x0000fc00); 1828 mem |= (memctl << 10) | (memctl << 13); 1829 p9100_ctl_write_4(sc, VID_MEM_CONFIG, mem); 1830 1831 DPRINTF("new memctl: %08x\n", mem); 1832 1833 /* whack the engine... */ 1834 p9100_ctl_write_4(sc, SYS_CONF, scr); 1835 1836 /* ok, whack the DAC */ 1837 p9100_ramdac_write_ctl(sc, DAC_MISC_1, 0x11); 1838 p9100_ramdac_write_ctl(sc, DAC_MISC_2, 0x45); 1839 p9100_ramdac_write_ctl(sc, DAC_MISC_3, mc3); 1840 /* 1841 * despite the 3GX manual saying otherwise we don't need to mess with 1842 * any clock dividers here 1843 */ 1844 p9100_ramdac_write_ctl(sc, DAC_MISC_CLK, 1); 1845 p9100_ramdac_write_ctl(sc, 3, 0); 1846 p9100_ramdac_write_ctl(sc, 4, 0); 1847 1848 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 0); 1849 p9100_ramdac_write_ctl(sc, DAC_OPERATION, 0); 1850 p9100_ramdac_write_ctl(sc, DAC_PALETTE_CTRL, 0); 1851 1852 p9100_ramdac_write_ctl(sc, DAC_PIXEL_FMT, pf); 1853 1854 /* TODO: distinguish between 15 and 16 bit */ 1855 p9100_ramdac_write_ctl(sc, DAC_8BIT_CTRL, 0); 1856 /* direct colour, linear, 565 */ 1857 p9100_ramdac_write_ctl(sc, DAC_16BIT_CTRL, 0xc6); 1858 /* direct colour */ 1859 p9100_ramdac_write_ctl(sc, DAC_32BIT_CTRL, 3); 1860 1861 /* From the 3GX manual. Needs magic number reduction */ 1862 p9100_ramdac_write_ctl(sc, 0x10, 2); 1863 p9100_ramdac_write_ctl(sc, 0x11, 0); 1864 p9100_ramdac_write_ctl(sc, 0x14, 5); 1865 p9100_ramdac_write_ctl(sc, 0x08, 1); 1866 p9100_ramdac_write_ctl(sc, 0x15, 5); 1867 p9100_ramdac_write_ctl(sc, 0x16, 0x63); 1868 1869 /* whack the CRTC */ 1870 /* we always transfer 64bit in one go */ 1871 crtcline = sc->sc_stride >> 3; 1872 1873 DPRINTF("crtcline: %d\n", crtcline); 1874 1875 p9100_ctl_write_4(sc, VID_HTOTAL, (24 << sc->sc_depthshift) + crtcline); 1876 p9100_ctl_write_4(sc, VID_HSRE, 8 << sc->sc_depthshift); 1877 p9100_ctl_write_4(sc, VID_HBRE, 18 << sc->sc_depthshift); 1878 p9100_ctl_write_4(sc, VID_HBFE, (18 << sc->sc_depthshift) + crtcline); 1879 1880 #ifdef PNOZZ_DEBUG 1881 { 1882 uint32_t sscr; 1883 sscr = p9100_ctl_read_4(sc, SYS_CONF); 1884 printf("scr: %x\n", sscr); 1885 } 1886 #endif 1887 return TRUE; 1888 } 1889