xref: /netbsd-src/sys/dev/sbus/isp_sbus.c (revision 10ad5ffa714ce1a679dcc9dd8159648df2d67b5a)
1 /* $NetBSD: isp_sbus.c,v 1.77 2009/06/25 23:44:02 mjacob Exp $ */
2 /*
3  * SBus specific probe and attach routines for Qlogic ISP SCSI adapters.
4  *
5  * Copyright (C) 1997, 1998, 1999 National Aeronautics & Space Administration
6  * All rights reserved.
7  *
8  * Additional Copyright (C) 2000-2007 by Matthew Jacob
9  * All rights reserved.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. The name of the author may not be used to endorse or promote products
20  *    derived from this software without specific prior written permission
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  *
33  */
34 
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: isp_sbus.c,v 1.77 2009/06/25 23:44:02 mjacob Exp $");
37 
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/device.h>
41 #include <sys/kernel.h>
42 #include <sys/malloc.h>
43 #include <sys/queue.h>
44 #include <dev/ic/isp_netbsd.h>
45 #include <sys/intr.h>
46 #include <machine/autoconf.h>
47 #include <dev/sbus/sbusvar.h>
48 #include <sys/reboot.h>
49 
50 static void isp_sbus_reset0(ispsoftc_t *);
51 static void isp_sbus_reset1(ispsoftc_t *);
52 static int isp_sbus_intr(void *);
53 static int
54 isp_sbus_rd_isr(ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *);
55 static uint32_t isp_sbus_rd_reg(ispsoftc_t *, int);
56 static void isp_sbus_wr_reg (ispsoftc_t *, int, uint32_t);
57 static int isp_sbus_mbxdma(ispsoftc_t *);
58 static int isp_sbus_dmasetup(ispsoftc_t *, XS_T *, void *);
59 static void isp_sbus_dmateardown(ispsoftc_t *, XS_T *, uint32_t);
60 
61 #ifndef	ISP_DISABLE_FW
62 #include <dev/microcode/isp/asm_sbus.h>
63 #else
64 #define	ISP_1000_RISC_CODE	NULL
65 #endif
66 
67 static const struct ispmdvec mdvec = {
68 	isp_sbus_rd_isr,
69 	isp_sbus_rd_reg,
70 	isp_sbus_wr_reg,
71 	isp_sbus_mbxdma,
72 	isp_sbus_dmasetup,
73 	isp_sbus_dmateardown,
74 	isp_sbus_reset0,
75 	isp_sbus_reset1,
76 	NULL,
77 	ISP_1000_RISC_CODE,
78 	0,
79 	0
80 };
81 
82 struct isp_sbussoftc {
83 	ispsoftc_t	sbus_isp;
84 	struct sbusdev	sbus_sd;
85 	sdparam		sbus_dev;
86 	struct scsipi_channel sbus_chan;
87 	bus_space_tag_t	sbus_bustag;
88 	bus_space_handle_t sbus_reg;
89 	int		sbus_node;
90 	int		sbus_pri;
91 	struct ispmdvec	sbus_mdvec;
92 	bus_dmamap_t	*sbus_dmamap;
93 	int16_t		sbus_poff[_NREG_BLKS];
94 };
95 
96 
97 static int isp_match(device_t, cfdata_t, void *);
98 static void isp_sbus_attach(device_t, device_t, void *);
99 CFATTACH_DECL(isp_sbus, sizeof (struct isp_sbussoftc),
100     isp_match, isp_sbus_attach, NULL, NULL);
101 
102 static int
103 isp_match(device_t parent, cfdata_t cf, void *aux)
104 {
105 	int rv;
106 	struct sbus_attach_args *sa = aux;
107 
108 	rv = (strcmp(cf->cf_name, sa->sa_name) == 0 ||
109 		strcmp("PTI,ptisp", sa->sa_name) == 0 ||
110 		strcmp("ptisp", sa->sa_name) == 0 ||
111 		strcmp("SUNW,isp", sa->sa_name) == 0 ||
112 		strcmp("QLGC,isp", sa->sa_name) == 0);
113 
114 	return (rv);
115 }
116 
117 
118 static void
119 isp_sbus_attach(device_t parent, device_t self, void *aux)
120 {
121 	int freq, ispburst, sbusburst;
122 	struct sbus_attach_args *sa = aux;
123 	struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) self;
124 	struct sbus_softc *sbsc = device_private(parent);
125 	ispsoftc_t *isp = &sbc->sbus_isp;
126 
127 	printf(" for %s\n", sa->sa_name);
128 
129 	isp->isp_nchan = isp->isp_osinfo.adapter.adapt_nchannels = 1;
130 
131 	sbc->sbus_bustag = sa->sa_bustag;
132 	if (sa->sa_nintr != 0)
133 		sbc->sbus_pri = sa->sa_pri;
134 	sbc->sbus_mdvec = mdvec;
135 
136 	if (sa->sa_npromvaddrs) {
137 		sbus_promaddr_to_handle(sa->sa_bustag,
138 			sa->sa_promvaddrs[0], &sbc->sbus_reg);
139 	} else {
140 		if (sbus_bus_map(sa->sa_bustag,	sa->sa_slot, sa->sa_offset,
141 			sa->sa_size, 0, &sbc->sbus_reg) != 0) {
142 			aprint_error_dev(self, "cannot map registers\n");
143 			return;
144 		}
145 	}
146 	sbc->sbus_node = sa->sa_node;
147 
148 	freq = prom_getpropint(sa->sa_node, "clock-frequency", 0);
149 	if (freq) {
150 		/*
151 		 * Convert from HZ to MHz, rounding up.
152 		 */
153 		freq = (freq + 500000)/1000000;
154 	}
155 	sbc->sbus_mdvec.dv_clock = freq;
156 
157 	/*
158 	 * Now figure out what the proper burst sizes, etc., to use.
159 	 * Unfortunately, there is no ddi_dma_burstsizes here which
160 	 * walks up the tree finding the limiting burst size node (if
161 	 * any).
162 	 */
163 	sbusburst = sbsc->sc_burst;
164 	if (sbusburst == 0)
165 		sbusburst = SBUS_BURST_32 - 1;
166 	ispburst = prom_getpropint(sa->sa_node, "burst-sizes", -1);
167 	if (ispburst == -1) {
168 		ispburst = sbusburst;
169 	}
170 	ispburst &= sbusburst;
171 	ispburst &= ~(1 << 7);
172 	ispburst &= ~(1 << 6);
173 	sbc->sbus_mdvec.dv_conf1 =  0;
174 	if (ispburst & (1 << 5)) {
175 		sbc->sbus_mdvec.dv_conf1 = BIU_SBUS_CONF1_FIFO_32;
176 	} else if (ispburst & (1 << 4)) {
177 		sbc->sbus_mdvec.dv_conf1 = BIU_SBUS_CONF1_FIFO_16;
178 	} else if (ispburst & (1 << 3)) {
179 		sbc->sbus_mdvec.dv_conf1 =
180 		    BIU_SBUS_CONF1_BURST8 | BIU_SBUS_CONF1_FIFO_8;
181 	}
182 	if (sbc->sbus_mdvec.dv_conf1) {
183 		sbc->sbus_mdvec.dv_conf1 |= BIU_BURST_ENABLE;
184 	}
185 
186 	isp->isp_mdvec = &sbc->sbus_mdvec;
187 	isp->isp_bustype = ISP_BT_SBUS;
188 	isp->isp_type = ISP_HA_SCSI_UNKNOWN;
189 	isp->isp_param = &sbc->sbus_dev;
190 	isp->isp_dmatag = sa->sa_dmatag;
191 	ISP_MEMZERO(isp->isp_param, sizeof (sdparam));
192 	isp->isp_osinfo.chan = &sbc->sbus_chan;
193 
194 	sbc->sbus_poff[BIU_BLOCK >> _BLK_REG_SHFT] = BIU_REGS_OFF;
195 	sbc->sbus_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = SBUS_MBOX_REGS_OFF;
196 	sbc->sbus_poff[SXP_BLOCK >> _BLK_REG_SHFT] = SBUS_SXP_REGS_OFF;
197 	sbc->sbus_poff[RISC_BLOCK >> _BLK_REG_SHFT] = SBUS_RISC_REGS_OFF;
198 	sbc->sbus_poff[DMA_BLOCK >> _BLK_REG_SHFT] = DMA_REGS_OFF;
199 
200 	/* Establish interrupt channel */
201 	bus_intr_establish(sbc->sbus_bustag, sbc->sbus_pri, IPL_BIO,
202 	    isp_sbus_intr, sbc);
203 	sbus_establish(&sbc->sbus_sd, &sbc->sbus_isp.isp_osinfo.dev);
204 
205 	/*
206 	 * Set up logging levels.
207 	 */
208 #ifdef	ISP_LOGDEFAULT
209 	isp->isp_dblev = ISP_LOGDEFAULT;
210 #else
211 	isp->isp_dblev = ISP_LOGWARN|ISP_LOGERR;
212 	if (bootverbose)
213 		isp->isp_dblev |= ISP_LOGCONFIG|ISP_LOGINFO;
214 #ifdef	SCSIDEBUG
215 	isp->isp_dblev |= ISP_LOGDEBUG1|ISP_LOGDEBUG2;
216 #endif
217 #ifdef	DEBUG
218 	isp->isp_dblev |= ISP_LOGDEBUG0;
219 #endif
220 #endif
221 
222 	isp->isp_confopts = device_cfdata(self)->cf_flags;
223 	SDPARAM(isp, 0)->role = ISP_DEFAULT_ROLES;
224 
225 	/*
226 	 * There's no tool on sparc to set NVRAM for ISPs, so ignore it.
227 	 */
228 	isp->isp_confopts |= ISP_CFG_NONVRAM;
229 
230 	/*
231 	 * Mark things if we're a PTI SBus adapter.
232 	 */
233 	if (strcmp("PTI,ptisp", sa->sa_name) == 0 ||
234 	    strcmp("ptisp", sa->sa_name) == 0) {
235 		SDPARAM(isp, 0)->isp_ptisp = 1;
236 	}
237 	ISP_LOCK(isp);
238 	isp_reset(isp, 1);
239 	if (isp->isp_state != ISP_RESETSTATE) {
240 		ISP_UNLOCK(isp);
241 		return;
242 	}
243 	ISP_ENABLE_INTS(isp);
244 	isp_init(isp);
245 	if (isp->isp_state != ISP_INITSTATE) {
246 		isp_uninit(isp);
247 		ISP_UNLOCK(isp);
248 		return;
249 	}
250 
251 	/*
252 	 * do generic attach.
253 	 */
254 	ISP_UNLOCK(isp);
255 	isp_attach(isp);
256 }
257 
258 
259 static void
260 isp_sbus_reset0(ispsoftc_t *isp)
261 {
262 	ISP_DISABLE_INTS(isp);
263 }
264 
265 static void
266 isp_sbus_reset1(ispsoftc_t *isp)
267 {
268 	ISP_ENABLE_INTS(isp);
269 }
270 
271 static int
272 isp_sbus_intr(void *arg)
273 {
274 	uint32_t isr;
275 	uint16_t sema, mbox;
276 	ispsoftc_t *isp = arg;
277 
278 	if (ISP_READ_ISR(isp, &isr, &sema, &mbox) == 0) {
279 		isp->isp_intbogus++;
280 		return (0);
281 	} else {
282 		struct isp_sbussoftc *sbc = arg;
283 		sbc->sbus_isp.isp_osinfo.onintstack = 1;
284 		isp_intr(isp, isr, sema, mbox);
285 		sbc->sbus_isp.isp_osinfo.onintstack = 0;
286 		return (1);
287 	}
288 }
289 
290 #define	IspVirt2Off(a, x)	\
291 	(((struct isp_sbussoftc *)a)->sbus_poff[((x) & _BLK_REG_MASK) >> \
292 	_BLK_REG_SHFT] + ((x) & 0xff))
293 
294 #define	BXR2(sbc, off)		\
295 	bus_space_read_2(sbc->sbus_bustag, sbc->sbus_reg, off)
296 
297 static int
298 isp_sbus_rd_isr(ispsoftc_t *isp, uint32_t *isrp,
299     uint16_t *semap, uint16_t *mbp)
300 {
301 	struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
302 	uint32_t isr;
303 	uint16_t sema;
304 
305 	isr = BXR2(sbc, IspVirt2Off(isp, BIU_ISR));
306 	sema = BXR2(sbc, IspVirt2Off(isp, BIU_SEMA));
307 	isp_prt(isp, ISP_LOGDEBUG3, "ISR 0x%x SEMA 0x%x", isr, sema);
308 	isr &= INT_PENDING_MASK(isp);
309 	sema &= BIU_SEMA_LOCK;
310 	if (isr == 0 && sema == 0) {
311 		return (0);
312 	}
313 	*isrp = isr;
314 	if ((*semap = sema) != 0) {
315 		*mbp = BXR2(sbc, IspVirt2Off(isp, OUTMAILBOX0));
316 	}
317 	return (1);
318 }
319 
320 static uint32_t
321 isp_sbus_rd_reg(ispsoftc_t *isp, int regoff)
322 {
323 	struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
324 	int offset = sbc->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT];
325 	offset += (regoff & 0xff);
326 	return (bus_space_read_2(sbc->sbus_bustag, sbc->sbus_reg, offset));
327 }
328 
329 static void
330 isp_sbus_wr_reg(ispsoftc_t *isp, int regoff, uint32_t val)
331 {
332 	struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
333 	int offset = sbc->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT];
334 	offset += (regoff & 0xff);
335 	bus_space_write_2(sbc->sbus_bustag, sbc->sbus_reg, offset, val);
336 }
337 
338 static int
339 isp_sbus_mbxdma(ispsoftc_t *isp)
340 {
341 	struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
342 	bus_dma_segment_t reqseg, rspseg;
343 	int reqrs, rsprs, i, progress;
344 	size_t n;
345 	bus_size_t len;
346 
347 	if (isp->isp_rquest_dma)
348 		return (0);
349 
350 	n = isp->isp_maxcmds * sizeof (XS_T *);
351 	isp->isp_xflist = (XS_T **) malloc(n, M_DEVBUF, M_WAITOK);
352 	if (isp->isp_xflist == NULL) {
353 		isp_prt(isp, ISP_LOGERR, "cannot alloc xflist array");
354 		return (1);
355 	}
356 	ISP_MEMZERO(isp->isp_xflist, n);
357 	n = sizeof (bus_dmamap_t) * isp->isp_maxcmds;
358 	sbc->sbus_dmamap = (bus_dmamap_t *) malloc(n, M_DEVBUF, M_WAITOK);
359 	if (sbc->sbus_dmamap == NULL) {
360 		free(isp->isp_xflist, M_DEVBUF);
361 		isp->isp_xflist = NULL;
362 		isp_prt(isp, ISP_LOGERR, "cannot alloc dmamap array");
363 		return (1);
364 	}
365 	for (i = 0; i < isp->isp_maxcmds; i++) {
366 		/* Allocate a DMA handle */
367 		if (bus_dmamap_create(isp->isp_dmatag, MAXPHYS, 1, MAXPHYS,
368 		    1 << 24, BUS_DMA_NOWAIT, &sbc->sbus_dmamap[i]) != 0) {
369 			isp_prt(isp, ISP_LOGERR, "cmd DMA maps create error");
370 			break;
371 		}
372 	}
373 	if (i < isp->isp_maxcmds) {
374 		while (--i >= 0) {
375 			bus_dmamap_destroy(isp->isp_dmatag,
376 			    sbc->sbus_dmamap[i]);
377 		}
378 		free(isp->isp_xflist, M_DEVBUF);
379 		free(sbc->sbus_dmamap, M_DEVBUF);
380 		isp->isp_xflist = NULL;
381 		sbc->sbus_dmamap = NULL;
382 		return (1);
383 	}
384 
385 	/*
386 	 * Allocate and map the request and response queues
387 	 */
388 	progress = 0;
389 	len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
390 	if (bus_dmamem_alloc(isp->isp_dmatag, len, 0, 0, &reqseg, 1, &reqrs,
391 	    BUS_DMA_NOWAIT)) {
392 		goto dmafail;
393 	}
394 	progress++;
395 	if (bus_dmamem_map(isp->isp_dmatag, &reqseg, reqrs, len,
396 	    (void *)&isp->isp_rquest, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) {
397 		goto dmafail;
398 	}
399 	progress++;
400 	if (bus_dmamap_create(isp->isp_dmatag, len, 1, len, 1 << 24,
401 	    BUS_DMA_NOWAIT, &isp->isp_rqdmap) != 0) {
402 		goto dmafail;
403 	}
404 	progress++;
405 	if (bus_dmamap_load(isp->isp_dmatag, isp->isp_rqdmap,
406 	    isp->isp_rquest, len, NULL, BUS_DMA_NOWAIT) != 0) {
407 		goto dmafail;
408 	}
409 	progress++;
410 	isp->isp_rquest_dma = isp->isp_rqdmap->dm_segs[0].ds_addr;
411 
412 	len = ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
413 	if (bus_dmamem_alloc(isp->isp_dmatag, len, 0, 0, &rspseg, 1, &rsprs,
414 	    BUS_DMA_NOWAIT)) {
415 		goto dmafail;
416 	}
417 	progress++;
418 	if (bus_dmamem_map(isp->isp_dmatag, &rspseg, rsprs, len,
419 	    (void *)&isp->isp_result, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) {
420 		goto dmafail;
421 	}
422 	progress++;
423 	if (bus_dmamap_create(isp->isp_dmatag, len, 1, len, 1 << 24,
424 	    BUS_DMA_NOWAIT, &isp->isp_rsdmap) != 0) {
425 		goto dmafail;
426 	}
427 	progress++;
428 	if (bus_dmamap_load(isp->isp_dmatag, isp->isp_rsdmap,
429 	    isp->isp_result, len, NULL, BUS_DMA_NOWAIT) != 0) {
430 		goto dmafail;
431 	}
432 	isp->isp_result_dma = isp->isp_rsdmap->dm_segs[0].ds_addr;
433 
434 	return (0);
435 
436 dmafail:
437 	isp_prt(isp, ISP_LOGERR, "Mailbox DMA Setup Failure");
438 
439 	if (progress >= 8) {
440 		bus_dmamap_unload(isp->isp_dmatag, isp->isp_rsdmap);
441 	}
442 	if (progress >= 7) {
443 		bus_dmamap_destroy(isp->isp_dmatag, isp->isp_rsdmap);
444 	}
445 	if (progress >= 6) {
446 		bus_dmamem_unmap(isp->isp_dmatag,
447 		    isp->isp_result, ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp)));
448 	}
449 	if (progress >= 5) {
450 		bus_dmamem_free(isp->isp_dmatag, &rspseg, rsprs);
451 	}
452 
453 	if (progress >= 4) {
454 		bus_dmamap_unload(isp->isp_dmatag, isp->isp_rqdmap);
455 	}
456 	if (progress >= 3) {
457 		bus_dmamap_destroy(isp->isp_dmatag, isp->isp_rqdmap);
458 	}
459 	if (progress >= 2) {
460 		bus_dmamem_unmap(isp->isp_dmatag,
461 		    isp->isp_rquest, ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp)));
462 	}
463 	if (progress >= 1) {
464 		bus_dmamem_free(isp->isp_dmatag, &reqseg, reqrs);
465 	}
466 
467 	for (i = 0; i < isp->isp_maxcmds; i++) {
468 		bus_dmamap_destroy(isp->isp_dmatag, sbc->sbus_dmamap[i]);
469 	}
470 	free(sbc->sbus_dmamap, M_DEVBUF);
471 	free(isp->isp_xflist, M_DEVBUF);
472 	isp->isp_xflist = NULL;
473 	sbc->sbus_dmamap = NULL;
474 	return (1);
475 }
476 
477 /*
478  * Map a DMA request.
479  * We're guaranteed that rq->req_handle is a value from 1 to isp->isp_maxcmds.
480  */
481 
482 static int
483 isp_sbus_dmasetup(struct ispsoftc *isp, struct scsipi_xfer *xs, void *arg)
484 {
485 	struct isp_sbussoftc *sbc = (struct isp_sbussoftc *)isp;
486 	ispreq_t *rq = arg;
487 	bus_dmamap_t dmap;
488 	bus_dma_segment_t *dm_segs;
489 	uint32_t nsegs;
490 	isp_ddir_t ddir;
491 
492 	dmap = sbc->sbus_dmamap[isp_handle_index(rq->req_handle)];
493 	if (xs->datalen == 0) {
494 		ddir = ISP_NOXFR;
495 		nsegs = 0;
496 		dm_segs = NULL;
497 	 } else {
498 		int error;
499 		uint32_t flag, flg2;
500 
501 		if (xs->xs_control & XS_CTL_DATA_IN) {
502 			flg2 = BUS_DMASYNC_PREREAD;
503 			flag = BUS_DMA_READ;
504 			ddir = ISP_FROM_DEVICE;
505 		} else {
506 			flg2 = BUS_DMASYNC_PREWRITE;
507 			flag = BUS_DMA_WRITE;
508 			ddir = ISP_TO_DEVICE;
509 		}
510 		error = bus_dmamap_load(isp->isp_dmatag, dmap, xs->data, xs->datalen,
511 		    NULL, ((xs->xs_control & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK) | BUS_DMA_STREAMING | flag);
512 		if (error) {
513 			isp_prt(isp, ISP_LOGWARN, "unable to load DMA (%d)", error);
514 			XS_SETERR(xs, HBA_BOTCH);
515 			if (error == EAGAIN || error == ENOMEM) {
516 				return (CMD_EAGAIN);
517 			} else {
518 				return (CMD_COMPLETE);
519 			}
520 		}
521 		dm_segs = dmap->dm_segs;
522 		nsegs = dmap->dm_nsegs;
523 		bus_dmamap_sync(isp->isp_dmatag, dmap, 0, dmap->dm_mapsize, flg2);
524 	}
525 
526 	if (isp_send_cmd(isp, rq, dm_segs, nsegs, xs->datalen, ddir) != CMD_QUEUED) {
527 		return (CMD_EAGAIN);
528 	} else {
529 		return (CMD_QUEUED);
530 	}
531 }
532 
533 static void
534 isp_sbus_dmateardown(ispsoftc_t *isp, XS_T *xs, uint32_t handle)
535 {
536 	struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
537 	bus_dmamap_t dmap;
538 
539 	dmap = sbc->sbus_dmamap[isp_handle_index(handle)];
540 
541 	if (dmap->dm_nsegs == 0) {
542 		panic("%s: DMA map not already allocated", device_xname(&isp->isp_osinfo.dev));
543 		/* NOTREACHED */
544 	}
545 	bus_dmamap_sync(isp->isp_dmatag, dmap, 0,
546 	    xs->datalen, (xs->xs_control & XS_CTL_DATA_IN)?
547 	    BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
548 	bus_dmamap_unload(isp->isp_dmatag, dmap);
549 }
550