1 /* $NetBSD: if_le.c,v 1.17 2001/05/30 11:46:35 mrg Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum; Jason R. Thorpe of the Numerical Aerospace 9 * Simulation Facility, NASA Ames Research Center; Paul Kranenburg. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #include "opt_inet.h" 41 #include "bpfilter.h" 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/mbuf.h> 46 #include <sys/syslog.h> 47 #include <sys/socket.h> 48 #include <sys/device.h> 49 #include <sys/malloc.h> 50 51 #include <net/if.h> 52 #include <net/if_ether.h> 53 #include <net/if_media.h> 54 55 #include <machine/bus.h> 56 #include <machine/intr.h> 57 #include <machine/autoconf.h> 58 59 #include <dev/sbus/sbusvar.h> 60 #include <dev/sbus/lebuffervar.h> /*XXX*/ 61 62 #include <dev/ic/lancereg.h> 63 #include <dev/ic/lancevar.h> 64 #include <dev/ic/am7990reg.h> 65 #include <dev/ic/am7990var.h> 66 67 /* 68 * LANCE registers. 69 */ 70 #define LEREG1_RDP 0 /* Register Data port */ 71 #define LEREG1_RAP 2 /* Register Address port */ 72 73 struct le_softc { 74 struct am7990_softc sc_am7990; /* glue to MI code */ 75 struct sbusdev sc_sd; /* sbus device */ 76 bus_space_tag_t sc_bustag; 77 bus_dma_tag_t sc_dmatag; 78 bus_dmamap_t sc_dmamap; 79 bus_space_handle_t sc_reg; 80 }; 81 82 #define MEMSIZE 0x4000 /* LANCE memory size */ 83 84 int lematch_sbus __P((struct device *, struct cfdata *, void *)); 85 void leattach_sbus __P((struct device *, struct device *, void *)); 86 87 /* 88 * Media types supported. 89 */ 90 static int lemedia[] = { 91 IFM_ETHER|IFM_10_5, 92 }; 93 #define NLEMEDIA (sizeof(lemedia) / sizeof(lemedia[0])) 94 95 struct cfattach le_sbus_ca = { 96 sizeof(struct le_softc), lematch_sbus, leattach_sbus 97 }; 98 99 extern struct cfdriver le_cd; 100 101 #if defined(_KERNEL_OPT) 102 #include "opt_ddb.h" 103 #endif 104 105 #ifdef DDB 106 #define integrate 107 #define hide 108 #else 109 #define integrate static __inline 110 #define hide static 111 #endif 112 113 static void lewrcsr __P((struct lance_softc *, u_int16_t, u_int16_t)); 114 static u_int16_t lerdcsr __P((struct lance_softc *, u_int16_t)); 115 116 static void 117 lewrcsr(sc, port, val) 118 struct lance_softc *sc; 119 u_int16_t port, val; 120 { 121 struct le_softc *lesc = (struct le_softc *)sc; 122 123 bus_space_write_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RAP, port); 124 bus_space_write_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RDP, val); 125 126 #if defined(SUN4M) 127 /* 128 * We need to flush the Sbus->Mbus write buffers. This can most 129 * easily be accomplished by reading back the register that we 130 * just wrote (thanks to Chris Torek for this solution). 131 */ 132 if (CPU_ISSUN4M) { 133 volatile u_int16_t discard; 134 discard = bus_space_read_2(lesc->sc_bustag, lesc->sc_reg, 135 LEREG1_RDP); 136 } 137 #endif 138 } 139 140 static u_int16_t 141 lerdcsr(sc, port) 142 struct lance_softc *sc; 143 u_int16_t port; 144 { 145 struct le_softc *lesc = (struct le_softc *)sc; 146 147 bus_space_write_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RAP, port); 148 return (bus_space_read_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RDP)); 149 } 150 151 152 int 153 lematch_sbus(parent, cf, aux) 154 struct device *parent; 155 struct cfdata *cf; 156 void *aux; 157 { 158 struct sbus_attach_args *sa = aux; 159 160 return (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0); 161 } 162 163 void 164 leattach_sbus(parent, self, aux) 165 struct device *parent, *self; 166 void *aux; 167 { 168 struct sbus_attach_args *sa = aux; 169 struct le_softc *lesc = (struct le_softc *)self; 170 struct lance_softc *sc = &lesc->sc_am7990.lsc; 171 bus_dma_tag_t dmatag; 172 struct sbusdev *sd; 173 /* XXX the following declarations should be elsewhere */ 174 extern void myetheraddr __P((u_char *)); 175 176 177 lesc->sc_bustag = sa->sa_bustag; 178 lesc->sc_dmatag = dmatag = sa->sa_dmatag; 179 180 if (sbus_bus_map(sa->sa_bustag, 181 sa->sa_slot, 182 sa->sa_offset, 183 sa->sa_size, 184 BUS_SPACE_MAP_LINEAR, 185 0, &lesc->sc_reg) != 0) { 186 printf("%s @ sbus: cannot map registers\n", self->dv_xname); 187 return; 188 } 189 190 /* 191 * Look for an "unallocated" lebuffer and pair it with 192 * this `le' device on the assumption that we're on 193 * a pre-historic ROM that doesn't establish le<=>lebuffer 194 * parent-child relationships. 195 */ 196 for (sd = ((struct sbus_softc *)parent)->sc_sbdev; sd != NULL; 197 sd = sd->sd_bchain) { 198 199 struct lebuf_softc *lebuf = (struct lebuf_softc *)sd->sd_dev; 200 201 if (strncmp("lebuffer", sd->sd_dev->dv_xname, 8) != 0) 202 continue; 203 204 if (lebuf->attached != 0) 205 continue; 206 207 sc->sc_mem = lebuf->sc_buffer; 208 sc->sc_memsize = lebuf->sc_bufsiz; 209 sc->sc_addr = 0; /* Lance view is offset by buffer location */ 210 lebuf->attached = 1; 211 212 /* That old black magic... */ 213 sc->sc_conf3 = getpropint(sa->sa_node, 214 "busmaster-regval", 215 LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON); 216 break; 217 } 218 219 lesc->sc_sd.sd_reset = (void *)lance_reset; 220 sbus_establish(&lesc->sc_sd, &sc->sc_dev); 221 222 if (sc->sc_mem == 0) { 223 bus_dma_segment_t seg; 224 int rseg, error; 225 226 #ifndef BUS_DMA_24BIT 227 /* XXX - This flag is not defined on all archs */ 228 #define BUS_DMA_24BIT 0 229 #endif 230 /* Get a DMA handle */ 231 if ((error = bus_dmamap_create(dmatag, MEMSIZE, 1, MEMSIZE, 0, 232 BUS_DMA_NOWAIT|BUS_DMA_24BIT, 233 &lesc->sc_dmamap)) != 0) { 234 printf("%s: DMA map create error %d\n", 235 self->dv_xname, error); 236 return; 237 } 238 239 /* Allocate DMA buffer */ 240 if ((error = bus_dmamem_alloc(dmatag, MEMSIZE, 0, 0, 241 &seg, 1, &rseg, 242 BUS_DMA_NOWAIT|BUS_DMA_24BIT)) != 0){ 243 printf("%s: DMA buffer allocation error %d\n", 244 self->dv_xname, error); 245 return; 246 } 247 248 /* Map DMA buffer into kernel space */ 249 if ((error = bus_dmamem_map(dmatag, &seg, rseg, MEMSIZE, 250 (caddr_t *)&sc->sc_mem, 251 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 252 printf("%s: DMA buffer map error %d\n", 253 self->dv_xname, error); 254 bus_dmamem_free(lesc->sc_dmatag, &seg, rseg); 255 return; 256 } 257 258 /* Load DMA buffer */ 259 if ((error = bus_dmamap_load(dmatag, lesc->sc_dmamap, sc->sc_mem, 260 MEMSIZE, NULL, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 261 printf("%s: DMA buffer map load error %d\n", 262 self->dv_xname, error); 263 bus_dmamem_free(dmatag, &seg, rseg); 264 bus_dmamem_unmap(dmatag, sc->sc_mem, MEMSIZE); 265 return; 266 } 267 268 sc->sc_addr = lesc->sc_dmamap->dm_segs[0].ds_addr & 0xffffff; 269 sc->sc_memsize = MEMSIZE; 270 sc->sc_conf3 = LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON; 271 } 272 273 myetheraddr(sc->sc_enaddr); 274 275 sc->sc_supmedia = lemedia; 276 sc->sc_nsupmedia = NLEMEDIA; 277 sc->sc_defaultmedia = lemedia[0]; 278 279 sc->sc_copytodesc = lance_copytobuf_contig; 280 sc->sc_copyfromdesc = lance_copyfrombuf_contig; 281 sc->sc_copytobuf = lance_copytobuf_contig; 282 sc->sc_copyfrombuf = lance_copyfrombuf_contig; 283 sc->sc_zerobuf = lance_zerobuf_contig; 284 285 sc->sc_rdcsr = lerdcsr; 286 sc->sc_wrcsr = lewrcsr; 287 288 am7990_config(&lesc->sc_am7990); 289 290 /* Establish interrupt handler */ 291 if (sa->sa_nintr != 0) 292 (void)bus_intr_establish(lesc->sc_bustag, sa->sa_pri, 293 IPL_NET, 0, am7990_intr, sc); 294 } 295