1 /* $NetBSD: uda.c,v 1.32 2000/01/24 02:40:30 matt Exp $ */ 2 /* 3 * Copyright (c) 1996 Ludd, University of Lule}, Sweden. 4 * Copyright (c) 1988 Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Chris Torek. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * @(#)uda.c 7.32 (Berkeley) 2/13/91 39 */ 40 41 /* 42 * UDA50 disk device driver 43 */ 44 45 #include <sys/param.h> 46 #include <sys/kernel.h> 47 #include <sys/systm.h> 48 #include <sys/device.h> 49 #include <sys/buf.h> 50 #include <sys/malloc.h> 51 52 #include <machine/bus.h> 53 #include <machine/sid.h> 54 55 #include <dev/qbus/ubavar.h> 56 57 #include <dev/mscp/mscp.h> 58 #include <dev/mscp/mscpreg.h> 59 #include <dev/mscp/mscpvar.h> 60 61 #include "ioconf.h" 62 63 /* 64 * Software status, per controller. 65 */ 66 struct uda_softc { 67 struct device sc_dev; /* Autoconfig info */ 68 struct uba_unit sc_unit; /* Struct common for UBA to communicate */ 69 struct buf_queue sc_bufq; /* bufs awaiting for resources */ 70 struct mscp_pack *sc_uuda; /* Unibus address of uda struct */ 71 struct mscp_pack sc_uda; /* Struct for uda communication */ 72 bus_dma_tag_t sc_dmat; 73 bus_space_tag_t sc_iot; 74 bus_space_handle_t sc_iph; 75 bus_space_handle_t sc_sah; 76 bus_dmamap_t sc_cmap;/* Control structures */ 77 struct mscp *sc_mscp; /* Keep pointer to active mscp */ 78 struct mscp_softc *sc_softc; /* MSCP info (per mscpvar.h) */ 79 int sc_wticks; /* watchdog timer ticks */ 80 int sc_inq; 81 }; 82 83 static int udamatch __P((struct device *, struct cfdata *, void *)); 84 static void udaattach __P((struct device *, struct device *, void *)); 85 static void udareset __P((int)); 86 static void mtcreset __P((int)); 87 static void reset __P((struct uda_softc *)); 88 static void intr __P((void *)); 89 int udaready __P((struct uba_unit *)); 90 void udactlrdone __P((struct device *)); 91 int udaprint __P((void *, const char *)); 92 void udasaerror __P((struct device *, int)); 93 void udago __P((struct device *, struct mscp_xi *)); 94 95 struct cfattach mtc_ca = { 96 sizeof(struct uda_softc), udamatch, udaattach 97 }; 98 99 struct cfattach uda_ca = { 100 sizeof(struct uda_softc), udamatch, udaattach 101 }; 102 103 /* 104 * More driver definitions, for generic MSCP code. 105 */ 106 struct mscp_ctlr uda_mscp_ctlr = { 107 udactlrdone, 108 udago, 109 udasaerror, 110 }; 111 112 /* 113 * Miscellaneous private variables. 114 */ 115 static int ivec_no; 116 117 int 118 udaprint(aux, name) 119 void *aux; 120 const char *name; 121 { 122 if (name) 123 printf("%s: mscpbus", name); 124 return UNCONF; 125 } 126 127 /* 128 * Poke at a supposed UDA50 to see if it is there. 129 */ 130 int 131 udamatch(parent, cf, aux) 132 struct device *parent; 133 struct cfdata *cf; 134 void *aux; 135 { 136 struct uba_attach_args *ua = aux; 137 struct mscp_softc mi; /* Nice hack */ 138 struct uba_softc *ubasc; 139 int tries; 140 141 /* Get an interrupt vector. */ 142 ubasc = (void *)parent; 143 ivec_no = ubasc->uh_lastiv - 4; 144 145 mi.mi_iot = ua->ua_iot; 146 mi.mi_iph = ua->ua_ioh; 147 mi.mi_sah = ua->ua_ioh + 2; 148 mi.mi_swh = ua->ua_ioh + 2; 149 150 /* 151 * Initialise the controller (partially). The UDA50 programmer's 152 * manual states that if initialisation fails, it should be retried 153 * at least once, but after a second failure the port should be 154 * considered `down'; it also mentions that the controller should 155 * initialise within ten seconds. Or so I hear; I have not seen 156 * this manual myself. 157 */ 158 tries = 0; 159 again: 160 161 bus_space_write_2(mi.mi_iot, mi.mi_iph, 0, 0); /* Start init */ 162 if (mscp_waitstep(&mi, MP_STEP1, MP_STEP1) == 0) 163 return 0; /* Nothing here... */ 164 165 bus_space_write_2(mi.mi_iot, mi.mi_sah, 0, 166 MP_ERR | (NCMDL2 << 11) | (NRSPL2 << 8) | MP_IE | (ivec_no >> 2)); 167 168 if (mscp_waitstep(&mi, MP_STEP2, MP_STEP2) == 0) { 169 printf("udaprobe: init step2 no change. sa=%x\n", 170 bus_space_read_2(mi.mi_iot, mi.mi_sah, 0)); 171 goto bad; 172 } 173 174 /* should have interrupted by now */ 175 if (strcmp(cf->cf_driver->cd_name, mtc_cd.cd_name)) { 176 ua->ua_reset = udareset; 177 } else { 178 ua->ua_reset = mtcreset; 179 } 180 181 return 1; 182 bad: 183 if (++tries < 2) 184 goto again; 185 return 0; 186 } 187 188 void 189 udaattach(parent, self, aux) 190 struct device *parent, *self; 191 void *aux; 192 { 193 struct uda_softc *sc = (void *)self; 194 struct uba_attach_args *ua = aux; 195 struct uba_softc *uh = (void *)parent; 196 struct mscp_attach_args ma; 197 int ctlr, error, rseg; 198 bus_dma_segment_t seg; 199 200 printf("\n"); 201 202 uh->uh_lastiv -= 4; /* remove dynamic interrupt vector */ 203 204 uba_intr_establish(ua->ua_icookie, ua->ua_cvec, intr, sc); 205 206 sc->sc_iot = ua->ua_iot; 207 sc->sc_iph = ua->ua_ioh; 208 sc->sc_sah = ua->ua_ioh + 2; 209 sc->sc_dmat = ua->ua_dmat; 210 ctlr = sc->sc_dev.dv_unit; 211 BUFQ_INIT(&sc->sc_bufq); 212 213 /* 214 * Fill in the uba_unit struct, so we can communicate with the uba. 215 */ 216 sc->sc_unit.uu_softc = sc; /* Backpointer to softc */ 217 sc->sc_unit.uu_ready = udaready;/* go routine called from adapter */ 218 sc->sc_unit.uu_keepbdp = vax_cputype == VAX_750 ? 1 : 0; 219 220 /* 221 * Map the communication area and command and 222 * response packets into Unibus space. 223 */ 224 if ((error = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct mscp_pack), 225 NBPG, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { 226 printf("Alloc ctrl area %d\n", error); 227 return; 228 } 229 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 230 sizeof(struct mscp_pack), (caddr_t *) &sc->sc_uda, 231 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 232 printf("Map ctrl area %d\n", error); 233 err: bus_dmamem_free(sc->sc_dmat, &seg, rseg); 234 return; 235 } 236 if ((error = bus_dmamap_create(sc->sc_dmat, sizeof(struct mscp_pack), 237 1, sizeof(struct mscp_pack), 0, BUS_DMA_NOWAIT, &sc->sc_cmap))) { 238 printf("Create DMA map %d\n", error); 239 err2: bus_dmamem_unmap(sc->sc_dmat, (caddr_t)&sc->sc_uda, 240 sizeof(struct mscp_pack)); 241 goto err; 242 } 243 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cmap, 244 &sc->sc_uda, sizeof(struct mscp_pack), 0, BUS_DMA_NOWAIT))) { 245 printf("Load ctrl map %d\n", error); 246 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cmap); 247 goto err2; 248 } 249 250 bzero(&sc->sc_uda, sizeof (struct mscp_pack)); 251 252 /* 253 * The only thing that differ UDA's and Tape ctlr's is 254 * their vcid. Beacuse there are no way to determine which 255 * ctlr type it is, we check what is generated and later 256 * set the correct vcid. 257 */ 258 ma.ma_type = (strcmp(self->dv_cfdata->cf_driver->cd_name, 259 mtc_cd.cd_name) ? MSCPBUS_DISK : MSCPBUS_TAPE); 260 261 ma.ma_mc = &uda_mscp_ctlr; 262 ma.ma_type |= MSCPBUS_UDA; 263 ma.ma_uda = &sc->sc_uda; 264 ma.ma_softc = &sc->sc_softc; 265 ma.ma_iot = sc->sc_iot; 266 ma.ma_iph = sc->sc_iph; 267 ma.ma_sah = sc->sc_sah; 268 ma.ma_swh = sc->sc_sah; 269 ma.ma_dmat = sc->sc_dmat; 270 ma.ma_dmam = sc->sc_cmap; 271 ma.ma_ivec = ivec_no; 272 ma.ma_ctlrnr = (ua->ua_iaddr == 0172150 ? 0 : 1); /* XXX */ 273 ma.ma_adapnr = uh->uh_nr; 274 config_found(&sc->sc_dev, &ma, udaprint); 275 } 276 277 /* 278 * Start a transfer if there are free resources available, otherwise 279 * let it go in udaready, forget it for now. 280 * Called from mscp routines. 281 */ 282 void 283 udago(usc, mxi) 284 struct device *usc; 285 struct mscp_xi *mxi; 286 { 287 struct uda_softc *sc = (void *)usc; 288 struct uba_unit *uu; 289 struct buf *bp = mxi->mxi_bp; 290 int err; 291 292 /* 293 * If we already have transfers queued, don't try to load 294 * the map again. 295 */ 296 if (sc->sc_inq == 0) { 297 err = bus_dmamap_load(sc->sc_dmat, mxi->mxi_dmam, 298 bp->b_un.b_addr, 299 bp->b_bcount, bp->b_proc, BUS_DMA_NOWAIT); 300 if (err == 0) { 301 mscp_dgo(sc->sc_softc, mxi); 302 return; 303 } 304 } 305 uu = malloc(sizeof(struct uba_unit), M_DEVBUF, M_NOWAIT); 306 if (uu == 0) 307 panic("udago: no mem"); 308 uu->uu_ready = udaready; 309 uu->uu_softc = sc; 310 uu->uu_ref = mxi; 311 uba_enqueue(uu); 312 sc->sc_inq++; 313 } 314 315 /* 316 * Called if we have been blocked for resources, and resources 317 * have been freed again. Return 1 if we could start all 318 * transfers again, 0 if we still are waiting. 319 * Called from uba resource free routines. 320 */ 321 int 322 udaready(uu) 323 struct uba_unit *uu; 324 { 325 struct uda_softc *sc = uu->uu_softc; 326 struct mscp_xi *mxi = uu->uu_ref; 327 struct buf *bp = mxi->mxi_bp; 328 int err; 329 330 err = bus_dmamap_load(sc->sc_dmat, mxi->mxi_dmam, bp->b_un.b_addr, 331 bp->b_bcount, bp->b_proc, BUS_DMA_NOWAIT); 332 if (err) 333 return 0; 334 mscp_dgo(sc->sc_softc, mxi); 335 sc->sc_inq--; 336 free(uu, M_DEVBUF); 337 return 1; 338 } 339 340 static struct saerr { 341 int code; /* error code (including UDA_ERR) */ 342 char *desc; /* what it means: Efoo => foo error */ 343 } saerr[] = { 344 { 0100001, "Eunibus packet read" }, 345 { 0100002, "Eunibus packet write" }, 346 { 0100003, "EUDA ROM and RAM parity" }, 347 { 0100004, "EUDA RAM parity" }, 348 { 0100005, "EUDA ROM parity" }, 349 { 0100006, "Eunibus ring read" }, 350 { 0100007, "Eunibus ring write" }, 351 { 0100010, " unibus interrupt master failure" }, 352 { 0100011, "Ehost access timeout" }, 353 { 0100012, " host exceeded command limit" }, 354 { 0100013, " unibus bus master failure" }, 355 { 0100014, " DM XFC fatal error" }, 356 { 0100015, " hardware timeout of instruction loop" }, 357 { 0100016, " invalid virtual circuit id" }, 358 { 0100017, "Eunibus interrupt write" }, 359 { 0104000, "Efatal sequence" }, 360 { 0104040, " D proc ALU" }, 361 { 0104041, "ED proc control ROM parity" }, 362 { 0105102, "ED proc w/no BD#2 or RAM parity" }, 363 { 0105105, "ED proc RAM buffer" }, 364 { 0105152, "ED proc SDI" }, 365 { 0105153, "ED proc write mode wrap serdes" }, 366 { 0105154, "ED proc read mode serdes, RSGEN & ECC" }, 367 { 0106040, "EU proc ALU" }, 368 { 0106041, "EU proc control reg" }, 369 { 0106042, " U proc DFAIL/cntl ROM parity/BD #1 test CNT" }, 370 { 0106047, " U proc const PROM err w/D proc running SDI test" }, 371 { 0106055, " unexpected trap" }, 372 { 0106071, "EU proc const PROM" }, 373 { 0106072, "EU proc control ROM parity" }, 374 { 0106200, "Estep 1 data" }, 375 { 0107103, "EU proc RAM parity" }, 376 { 0107107, "EU proc RAM buffer" }, 377 { 0107115, " test count wrong (BD 12)" }, 378 { 0112300, "Estep 2" }, 379 { 0122240, "ENPR" }, 380 { 0122300, "Estep 3" }, 381 { 0142300, "Estep 4" }, 382 { 0, " unknown error code" } 383 }; 384 385 /* 386 * If the error bit was set in the controller status register, gripe, 387 * then (optionally) reset the controller and requeue pending transfers. 388 */ 389 void 390 udasaerror(usc, doreset) 391 struct device *usc; 392 int doreset; 393 { 394 struct uda_softc *sc = (void *)usc; 395 register int code = bus_space_read_2(sc->sc_iot, sc->sc_sah, 0); 396 register struct saerr *e; 397 398 if ((code & MP_ERR) == 0) 399 return; 400 for (e = saerr; e->code; e++) 401 if (e->code == code) 402 break; 403 printf("%s: controller error, sa=0%o (%s%s)\n", 404 sc->sc_dev.dv_xname, code, e->desc + 1, 405 *e->desc == 'E' ? " error" : ""); 406 #if 0 /* XXX we just avoid panic when autoconfig non-existent KFQSA devices */ 407 if (doreset) { 408 mscp_requeue(sc->sc_softc); 409 /* (void) udainit(sc); XXX */ 410 } 411 #endif 412 } 413 414 /* 415 * Interrupt routine. Depending on the state of the controller, 416 * continue initialisation, or acknowledge command and response 417 * interrupts, and process responses. 418 */ 419 static void 420 intr(arg) 421 void *arg; 422 { 423 struct uda_softc *sc = arg; 424 struct uba_softc *uh; 425 struct mscp_pack *ud; 426 427 sc->sc_wticks = 0; /* reset interrupt watchdog */ 428 429 /* ctlr fatal error */ 430 if (bus_space_read_2(sc->sc_iot, sc->sc_sah, 0) & MP_ERR) { 431 udasaerror(&sc->sc_dev, 1); 432 return; 433 } 434 ud = &sc->sc_uda; 435 /* 436 * Handle buffer purge requests. 437 * XXX - should be done in bus_dma_sync(). 438 */ 439 uh = (void *)sc->sc_dev.dv_parent; 440 if (ud->mp_ca.ca_bdp) { 441 if (uh->uh_ubapurge) 442 (*uh->uh_ubapurge)(uh, ud->mp_ca.ca_bdp); 443 ud->mp_ca.ca_bdp = 0; 444 /* signal purge complete */ 445 bus_space_write_2(sc->sc_iot, sc->sc_sah, 0, 0); 446 } 447 448 mscp_intr(sc->sc_softc); 449 } 450 451 /* 452 * A Unibus reset has occurred on UBA uban. Reinitialise the controller(s) 453 * on that Unibus, and requeue outstanding I/O. 454 */ 455 void 456 udareset(ctlr) 457 int ctlr; 458 { 459 reset(uda_cd.cd_devs[ctlr]); 460 } 461 462 void 463 mtcreset(ctlr) 464 int ctlr; 465 { 466 reset(mtc_cd.cd_devs[ctlr]); 467 } 468 469 static void 470 reset(sc) 471 struct uda_softc *sc; 472 { 473 printf(" %s", sc->sc_dev.dv_xname); 474 475 /* 476 * Our BDP (if any) is gone; our command (if any) is 477 * flushed; the device is no longer mapped; and the 478 * UDA50 is not yet initialised. 479 */ 480 if (sc->sc_unit.uu_bdp) { 481 /* printf("<%d>", UBAI_BDP(sc->sc_unit.uu_bdp)); */ 482 sc->sc_unit.uu_bdp = 0; 483 } 484 485 /* reset queues and requeue pending transfers */ 486 mscp_requeue(sc->sc_softc); 487 488 /* 489 * If it fails to initialise we will notice later and 490 * try again (and again...). Do not call udastart() 491 * here; it will be done after the controller finishes 492 * initialisation. 493 */ 494 /* XXX if (udainit(sc)) */ 495 printf(" (hung)"); 496 } 497 498 void 499 udactlrdone(usc) 500 struct device *usc; 501 { 502 struct uda_softc *sc = (void *)usc; 503 504 uba_done((struct uba_softc *)sc->sc_dev.dv_parent); 505 } 506