1 /* $NetBSD: uda.c,v 1.41 2001/06/10 18:41:27 ragge Exp $ */ 2 /* 3 * Copyright (c) 1996 Ludd, University of Lule}, Sweden. 4 * Copyright (c) 1988 Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Chris Torek. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * @(#)uda.c 7.32 (Berkeley) 2/13/91 39 */ 40 41 /* 42 * UDA50 disk device driver 43 */ 44 45 #include <sys/param.h> 46 #include <sys/kernel.h> 47 #include <sys/systm.h> 48 #include <sys/device.h> 49 #include <sys/buf.h> 50 #include <sys/malloc.h> 51 52 #include <machine/bus.h> 53 #include <machine/sid.h> 54 55 #include <dev/qbus/ubavar.h> 56 57 #include <dev/mscp/mscp.h> 58 #include <dev/mscp/mscpreg.h> 59 #include <dev/mscp/mscpvar.h> 60 61 #include "ioconf.h" 62 63 /* 64 * Software status, per controller. 65 */ 66 struct uda_softc { 67 struct device sc_dev; /* Autoconfig info */ 68 struct evcnt sc_intrcnt; /* Interrupt counting */ 69 struct uba_unit sc_unit; /* Struct common for UBA to communicate */ 70 struct ubinfo sc_ui; 71 bus_dma_tag_t sc_dmat; 72 bus_space_tag_t sc_iot; 73 bus_space_handle_t sc_iph; 74 bus_space_handle_t sc_sah; 75 struct mscp_softc *sc_softc; /* MSCP info (per mscpvar.h) */ 76 int sc_inq; 77 }; 78 79 static int udamatch(struct device *, struct cfdata *, void *); 80 static void udaattach(struct device *, struct device *, void *); 81 static void udareset(struct device *); 82 static void udaintr(void *); 83 static int udaready(struct uba_unit *); 84 static void udactlrdone(struct device *); 85 static int udaprint(void *, const char *); 86 static void udasaerror(struct device *, int); 87 static void udago(struct device *, struct mscp_xi *); 88 89 struct cfattach mtc_ca = { 90 sizeof(struct uda_softc), udamatch, udaattach 91 }; 92 93 struct cfattach uda_ca = { 94 sizeof(struct uda_softc), udamatch, udaattach 95 }; 96 97 /* 98 * More driver definitions, for generic MSCP code. 99 */ 100 struct mscp_ctlr uda_mscp_ctlr = { 101 udactlrdone, 102 udago, 103 udasaerror, 104 }; 105 106 int 107 udaprint(void *aux, const char *name) 108 { 109 if (name) 110 printf("%s: mscpbus", name); 111 return UNCONF; 112 } 113 114 /* 115 * Poke at a supposed UDA50 to see if it is there. 116 */ 117 int 118 udamatch(struct device *parent, struct cfdata *cf, void *aux) 119 { 120 struct uba_attach_args *ua = aux; 121 struct mscp_softc mi; /* Nice hack */ 122 struct uba_softc *ubasc; 123 int tries; 124 125 /* Get an interrupt vector. */ 126 ubasc = (void *)parent; 127 128 mi.mi_iot = ua->ua_iot; 129 mi.mi_iph = ua->ua_ioh; 130 mi.mi_sah = ua->ua_ioh + 2; 131 mi.mi_swh = ua->ua_ioh + 2; 132 133 /* 134 * Initialise the controller (partially). The UDA50 programmer's 135 * manual states that if initialisation fails, it should be retried 136 * at least once, but after a second failure the port should be 137 * considered `down'; it also mentions that the controller should 138 * initialise within ten seconds. Or so I hear; I have not seen 139 * this manual myself. 140 */ 141 tries = 0; 142 again: 143 144 bus_space_write_2(mi.mi_iot, mi.mi_iph, 0, 0); /* Start init */ 145 if (mscp_waitstep(&mi, MP_STEP1, MP_STEP1) == 0) 146 return 0; /* Nothing here... */ 147 148 bus_space_write_2(mi.mi_iot, mi.mi_sah, 0, 149 MP_ERR | (NCMDL2 << 11) | (NRSPL2 << 8) | MP_IE | 150 ((ubasc->uh_lastiv - 4) >> 2)); 151 152 if (mscp_waitstep(&mi, MP_STEP2, MP_STEP2) == 0) { 153 printf("udaprobe: init step2 no change. sa=%x\n", 154 bus_space_read_2(mi.mi_iot, mi.mi_sah, 0)); 155 goto bad; 156 } 157 158 /* should have interrupted by now */ 159 return 1; 160 bad: 161 if (++tries < 2) 162 goto again; 163 return 0; 164 } 165 166 void 167 udaattach(struct device *parent, struct device *self, void *aux) 168 { 169 struct uda_softc *sc = (void *)self; 170 struct uba_attach_args *ua = aux; 171 struct uba_softc *uh = (void *)parent; 172 struct mscp_attach_args ma; 173 int error; 174 175 printf("\n"); 176 177 uh->uh_lastiv -= 4; /* remove dynamic interrupt vector */ 178 179 uba_intr_establish(ua->ua_icookie, ua->ua_cvec, 180 udaintr, sc, &sc->sc_intrcnt); 181 uba_reset_establish(udareset, &sc->sc_dev); 182 evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt, 183 sc->sc_dev.dv_xname, "intr"); 184 185 sc->sc_iot = ua->ua_iot; 186 sc->sc_iph = ua->ua_ioh; 187 sc->sc_sah = ua->ua_ioh + 2; 188 sc->sc_dmat = ua->ua_dmat; 189 190 /* 191 * Fill in the uba_unit struct, so we can communicate with the uba. 192 */ 193 sc->sc_unit.uu_softc = sc; /* Backpointer to softc */ 194 sc->sc_unit.uu_ready = udaready;/* go routine called from adapter */ 195 sc->sc_unit.uu_keepbdp = vax_cputype == VAX_750 ? 1 : 0; 196 197 /* 198 * Map the communication area and command and 199 * response packets into Unibus space. 200 */ 201 sc->sc_ui.ui_size = sizeof(struct mscp_pack); 202 if ((error = ubmemalloc((void *)parent, &sc->sc_ui, UBA_CANTWAIT))) 203 return printf("ubmemalloc failed: %d\n", error); 204 205 bzero(sc->sc_ui.ui_vaddr, sizeof (struct mscp_pack)); 206 207 /* 208 * The only thing that differ UDA's and Tape ctlr's is 209 * their vcid. Beacuse there are no way to determine which 210 * ctlr type it is, we check what is generated and later 211 * set the correct vcid. 212 */ 213 ma.ma_type = (strcmp(self->dv_cfdata->cf_driver->cd_name, "mtc") ? 214 MSCPBUS_DISK : MSCPBUS_TAPE); 215 216 ma.ma_mc = &uda_mscp_ctlr; 217 ma.ma_type |= MSCPBUS_UDA; 218 ma.ma_uda = (struct mscp_pack *)sc->sc_ui.ui_vaddr; 219 ma.ma_softc = &sc->sc_softc; 220 ma.ma_iot = sc->sc_iot; 221 ma.ma_iph = sc->sc_iph; 222 ma.ma_sah = sc->sc_sah; 223 ma.ma_swh = sc->sc_sah; 224 ma.ma_dmat = sc->sc_dmat; 225 ma.ma_dmam = sc->sc_ui.ui_dmam; 226 ma.ma_ivec = uh->uh_lastiv; 227 ma.ma_ctlrnr = (ua->ua_iaddr == 0172150 ? 0 : 1); /* XXX */ 228 ma.ma_adapnr = uh->uh_nr; 229 config_found(&sc->sc_dev, &ma, udaprint); 230 } 231 232 /* 233 * Start a transfer if there are free resources available, otherwise 234 * let it go in udaready, forget it for now. 235 * Called from mscp routines. 236 */ 237 void 238 udago(struct device *usc, struct mscp_xi *mxi) 239 { 240 struct uda_softc *sc = (void *)usc; 241 struct uba_unit *uu; 242 struct buf *bp = mxi->mxi_bp; 243 int err; 244 245 /* 246 * If we already have transfers queued, don't try to load 247 * the map again. 248 */ 249 if (sc->sc_inq == 0) { 250 err = bus_dmamap_load(sc->sc_dmat, mxi->mxi_dmam, 251 bp->b_data, bp->b_bcount, 252 (bp->b_flags & B_PHYS ? bp->b_proc : 0), BUS_DMA_NOWAIT); 253 if (err == 0) { 254 mscp_dgo(sc->sc_softc, mxi); 255 return; 256 } 257 } 258 uu = malloc(sizeof(struct uba_unit), M_DEVBUF, M_NOWAIT); 259 if (uu == 0) 260 panic("udago: no mem"); 261 uu->uu_ready = udaready; 262 uu->uu_softc = sc; 263 uu->uu_ref = mxi; 264 uba_enqueue(uu); 265 sc->sc_inq++; 266 } 267 268 /* 269 * Called if we have been blocked for resources, and resources 270 * have been freed again. Return 1 if we could start all 271 * transfers again, 0 if we still are waiting. 272 * Called from uba resource free routines. 273 */ 274 int 275 udaready(struct uba_unit *uu) 276 { 277 struct uda_softc *sc = uu->uu_softc; 278 struct mscp_xi *mxi = uu->uu_ref; 279 struct buf *bp = mxi->mxi_bp; 280 int err; 281 282 err = bus_dmamap_load(sc->sc_dmat, mxi->mxi_dmam, bp->b_data, 283 bp->b_bcount, bp->b_proc, BUS_DMA_NOWAIT); 284 if (err) 285 return 0; 286 mscp_dgo(sc->sc_softc, mxi); 287 sc->sc_inq--; 288 free(uu, M_DEVBUF); 289 return 1; 290 } 291 292 static struct saerr { 293 int code; /* error code (including UDA_ERR) */ 294 char *desc; /* what it means: Efoo => foo error */ 295 } saerr[] = { 296 { 0100001, "Eunibus packet read" }, 297 { 0100002, "Eunibus packet write" }, 298 { 0100003, "EUDA ROM and RAM parity" }, 299 { 0100004, "EUDA RAM parity" }, 300 { 0100005, "EUDA ROM parity" }, 301 { 0100006, "Eunibus ring read" }, 302 { 0100007, "Eunibus ring write" }, 303 { 0100010, " unibus interrupt master failure" }, 304 { 0100011, "Ehost access timeout" }, 305 { 0100012, " host exceeded command limit" }, 306 { 0100013, " unibus bus master failure" }, 307 { 0100014, " DM XFC fatal error" }, 308 { 0100015, " hardware timeout of instruction loop" }, 309 { 0100016, " invalid virtual circuit id" }, 310 { 0100017, "Eunibus interrupt write" }, 311 { 0104000, "Efatal sequence" }, 312 { 0104040, " D proc ALU" }, 313 { 0104041, "ED proc control ROM parity" }, 314 { 0105102, "ED proc w/no BD#2 or RAM parity" }, 315 { 0105105, "ED proc RAM buffer" }, 316 { 0105152, "ED proc SDI" }, 317 { 0105153, "ED proc write mode wrap serdes" }, 318 { 0105154, "ED proc read mode serdes, RSGEN & ECC" }, 319 { 0106040, "EU proc ALU" }, 320 { 0106041, "EU proc control reg" }, 321 { 0106042, " U proc DFAIL/cntl ROM parity/BD #1 test CNT" }, 322 { 0106047, " U proc const PROM err w/D proc running SDI test" }, 323 { 0106055, " unexpected trap" }, 324 { 0106071, "EU proc const PROM" }, 325 { 0106072, "EU proc control ROM parity" }, 326 { 0106200, "Estep 1 data" }, 327 { 0107103, "EU proc RAM parity" }, 328 { 0107107, "EU proc RAM buffer" }, 329 { 0107115, " test count wrong (BD 12)" }, 330 { 0112300, "Estep 2" }, 331 { 0122240, "ENPR" }, 332 { 0122300, "Estep 3" }, 333 { 0142300, "Estep 4" }, 334 { 0, " unknown error code" } 335 }; 336 337 /* 338 * If the error bit was set in the controller status register, gripe, 339 * then (optionally) reset the controller and requeue pending transfers. 340 */ 341 void 342 udasaerror(struct device *usc, int doreset) 343 { 344 struct uda_softc *sc = (void *)usc; 345 int code = bus_space_read_2(sc->sc_iot, sc->sc_sah, 0); 346 struct saerr *e; 347 348 if ((code & MP_ERR) == 0) 349 return; 350 for (e = saerr; e->code; e++) 351 if (e->code == code) 352 break; 353 printf("%s: controller error, sa=0%o (%s%s)\n", 354 sc->sc_dev.dv_xname, code, e->desc + 1, 355 *e->desc == 'E' ? " error" : ""); 356 #if 0 /* XXX we just avoid panic when autoconfig non-existent KFQSA devices */ 357 if (doreset) { 358 mscp_requeue(sc->sc_softc); 359 /* (void) udainit(sc); XXX */ 360 } 361 #endif 362 } 363 364 /* 365 * Interrupt routine. Depending on the state of the controller, 366 * continue initialisation, or acknowledge command and response 367 * interrupts, and process responses. 368 */ 369 static void 370 udaintr(void *arg) 371 { 372 struct uda_softc *sc = arg; 373 struct uba_softc *uh; 374 375 /* ctlr fatal error */ 376 if (bus_space_read_2(sc->sc_iot, sc->sc_sah, 0) & MP_ERR) { 377 udasaerror(&sc->sc_dev, 1); 378 return; 379 } 380 /* 381 * Handle buffer purge requests. 382 * XXX - should be done in bus_dma_sync(). 383 */ 384 uh = (void *)sc->sc_dev.dv_parent; 385 #ifdef notyet 386 if (ud->mp_ca.ca_bdp) { 387 if (uh->uh_ubapurge) 388 (*uh->uh_ubapurge)(uh, ud->mp_ca.ca_bdp); 389 /* signal purge complete */ 390 bus_space_write_2(sc->sc_iot, sc->sc_sah, 0, 0); 391 } 392 #endif 393 394 mscp_intr(sc->sc_softc); 395 } 396 397 /* 398 * A Unibus reset has occurred on UBA uban. Reinitialise the controller(s) 399 * on that Unibus, and requeue outstanding I/O. 400 */ 401 static void 402 udareset(struct device *dev) 403 { 404 struct uda_softc *sc = (void *)dev; 405 /* 406 * Our BDP (if any) is gone; our command (if any) is 407 * flushed; the device is no longer mapped; and the 408 * UDA50 is not yet initialised. 409 */ 410 if (sc->sc_unit.uu_bdp) { 411 /* printf("<%d>", UBAI_BDP(sc->sc_unit.uu_bdp)); */ 412 sc->sc_unit.uu_bdp = 0; 413 } 414 415 /* reset queues and requeue pending transfers */ 416 mscp_requeue(sc->sc_softc); 417 418 /* 419 * If it fails to initialise we will notice later and 420 * try again (and again...). Do not call udastart() 421 * here; it will be done after the controller finishes 422 * initialisation. 423 */ 424 /* XXX if (udainit(sc)) */ 425 printf(" (hung)"); 426 } 427 428 void 429 udactlrdone(struct device *usc) 430 { 431 struct uda_softc *sc = (void *)usc; 432 int s; 433 434 s = spluba(); 435 uba_done((struct uba_softc *)sc->sc_dev.dv_parent); 436 splx(s); 437 } 438