xref: /netbsd-src/sys/dev/qbus/if_qt.c (revision ce2c90c7c172d95d2402a5b3d96d8f8e6d138a21)
1 /*	$NetBSD: if_qt.c,v 1.10 2006/09/07 02:40:33 dogcow Exp $	*/
2 /*
3  * Copyright (c) 1992 Steven M. Schultz
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. The name of the author may not be used to endorse or promote products
15  *    derived from this software without specific prior written permission
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  *
28  *	@(#)if_qt.c     1.2 (2.11BSD) 2/20/93
29  */
30 /*
31  *
32  * Modification History
33  * 23-Feb-92 -- sms
34  *	Rewrite the buffer handling so that fewer than the maximum number of
35  *	buffers may be used (32 receive and 12 transmit buffers consume 66+kb
36  *	of main system memory in addition to the internal structures in the
37  *	networking code).  A freelist of available buffers is maintained now.
38  *	When I/O operations complete the associated buffer is placed on the
39  *	freelist (a single linked list for simplicity) and when an I/O is
40  *	started a buffer is pulled off the list.
41  *
42  * 20-Feb-92 -- sms
43  *	It works!  Darned board couldn't handle "short" rings - those rings
44  *	where only half the entries were made available to the board (the
45  *	ring descriptors were the full size, merely half the entries were
46  * 	flagged as belonging always to the driver).  Grrrr.  Would have thought
47  *	the board could skip over those entries reserved by the driver.
48  *	Now to find a way not to have to allocated 32+12 times 1.5kb worth of
49  *	buffers...
50  *
51  * 03-Feb-92 -- sms
52  *	Released but still not working.  The driver now responds to arp and
53  *	ping requests.  The board is apparently not returning ring descriptors
54  *	to the driver so eventually we run out of buffers.  Back to the
55  *	drawing board.
56  *
57  * 28-Dec-92 -- sms
58  *	Still not released.  Hiatus in finding free time and thin-netting
59  *	the systems (many thanks Terry!).
60  *	Added logic to dynamically allocate a vector and initialize it.
61  *
62  * 23-Oct-92 -- sms
63  *	The INIT block must (apparently) be quadword aligned [no thanks to
64  *	the manual for not mentioning that fact].  The necessary alignment
65  *	is achieved by allocating the INIT block from main memory ('malloc'
66  *	guarantees click alignment) and mapping it as needed (which is _very_
67  *	infrequently).  A check for quadword alignment of the ring descriptors
68  *	was added - at present the descriptors are properly aligned, if this
69  *	should change then something will have to be done (like do it "right").
70  *	Darned alignment restrictions!
71  *
72  *	A couple of typos were corrected (missing parentheses, reversed
73  *	arguments to printf calls, etc).
74  *
75  * 13-Oct-92 -- sms@wlv.iipo.gtegsc.com
76  *	Created based on the DELQA-PLUS addendum to DELQA User's Guide.
77  *	This driver ('qt') is selected at system configuration time.  If the
78  *	board *	is not a DELQA-YM an error message will be printed and the
79  *	interface will not be attached.
80  */
81 
82 #include <sys/cdefs.h>
83 __KERNEL_RCSID(0, "$NetBSD: if_qt.c,v 1.10 2006/09/07 02:40:33 dogcow Exp $");
84 
85 #include "opt_inet.h"
86 #include "bpfilter.h"
87 
88 #include <sys/param.h>
89 #include <sys/systm.h>
90 #include <sys/mbuf.h>
91 #include <sys/protosw.h>
92 #include <sys/socket.h>
93 #include <sys/ioctl.h>
94 #include <sys/errno.h>
95 #include <sys/syslog.h>
96 #include <sys/time.h>
97 #include <sys/kernel.h>
98 
99 #include <net/if.h>
100 #include <net/if_ether.h>
101 #include <net/netisr.h>
102 #include <net/route.h>
103 
104 #ifdef INET
105 #include <sys/domain.h>
106 #include <netinet/in.h>
107 #include <netinet/in_systm.h>
108 #include <netinet/in_var.h>
109 #include <netinet/ip.h>
110 #endif
111 
112 #if NBPFILTER > 0
113 #include <net/bpf.h>
114 #include <net/bpfdesc.h>
115 #endif
116 
117 
118 #include <machine/bus.h>
119 
120 #include <dev/qbus/ubavar.h>
121 #include <dev/qbus/if_uba.h>
122 #include <dev/qbus/if_qtreg.h>
123 
124 #define NRCV	QT_MAX_RCV	/* Receive descriptors (must be == 32) */
125 #define NXMT	QT_MAX_XMT	/* Transmit descriptors	(must be == 12) */
126 #if	NRCV != 32 || NXMT != 12
127 	hardware requires these sizes.
128 #endif
129 
130 /*
131  * Control data structures, must be in DMA-friendly memory.
132  */
133 struct	qt_cdata {
134 	struct	qt_init qc_init;	/* Init block			*/
135 	struct	qt_rring qc_r[NRCV];	/* Receive descriptor ring	*/
136 	struct	qt_tring qc_t[NXMT];	/* Transmit descriptor ring	*/
137 };
138 
139 struct	qt_softc {
140 	struct	device sc_dev;		/* Configuration common part */
141 	struct	ethercom is_ec;		/* common part - must be first  */
142 	struct	evcnt sc_intrcnt;	/* Interrupt counting */
143 #define	is_if	is_ec.ec_if		/* network-visible interface	*/
144 	u_int8_t is_addr[ETHER_ADDR_LEN]; /* hardware Ethernet address	*/
145 	bus_space_tag_t	sc_iot;
146 	bus_addr_t	sc_ioh;
147 
148 	struct	ubinfo	sc_ui;		/* control block address desc	*/
149 	struct	qt_cdata *sc_ib;	/* virt address of ctrl block	*/
150 	struct	qt_cdata *sc_pib;	/* phys address of ctrl block	*/
151 
152 	struct	ifubinfo sc_ifuba;	/* UNIBUS resources */
153 	struct	ifrw sc_ifr[NRCV];	/* UNIBUS receive buffer maps */
154 	struct	ifxmt sc_ifw[NXMT];	/* UNIBUS receive buffer maps */
155 
156 	int	rindex;			/* Receive Completed Index	*/
157 	int	nxtrcv;			/* Next Receive Index		*/
158 	int	nrcv;			/* Number of Receives active	*/
159 
160 	int	xnext;			/* Next descriptor to transmit	*/
161 	int	xlast;			/* Last descriptor transmitted	*/
162 	int	nxmit;			/* # packets in send queue	*/
163 
164 	short	vector;			/* Interrupt vector assigned	*/
165 };
166 
167 static	int qtmatch(struct device *, struct cfdata *, void *);
168 static	void qtattach(struct device *, struct device *, void *);
169 static	void qtintr(void *);
170 static	int qtinit(struct ifnet *);
171 static	int qtioctl(struct ifnet *, u_long, caddr_t);
172 static	int qtturbo(struct qt_softc *);
173 static	void qtstart(struct ifnet *ifp);
174 static	void qtstop(struct ifnet *ifp, int disable);
175 static	void qtsrr(struct qt_softc *, int);
176 static	void qtrint(struct qt_softc *sc);
177 static	void qttint(struct qt_softc *sc);
178 
179 /* static	void qtrestart(struct qt_softc *sc); */
180 
181 CFATTACH_DECL(qt, sizeof(struct qt_softc),
182     qtmatch, qtattach, NULL, NULL);
183 
184 /*
185  * Maximum packet size needs to include 4 bytes for the CRC
186  * on received packets.
187 */
188 #define MAXPACKETSIZE (ETHERMTU + sizeof (struct ether_header) + 4)
189 #define	MINPACKETSIZE 64
190 
191 #define QT_WCSR(csr, val) \
192 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, csr, val)
193 #define QT_RCSR(csr) \
194 	bus_space_read_2(sc->sc_iot, sc->sc_ioh, csr)
195 
196 
197 #define loint(x)	((int)(x) & 0xffff)
198 #define hiint(x)	(((int)(x) >> 16) & 0x3f)
199 #define	XNAME		sc->sc_dev.dv_xname
200 
201 /*
202  * Check if this card is a turbo delqa.
203  */
204 int
205 qtmatch(struct device *parent, struct cfdata *cf, void *aux)
206 {
207 	struct	qt_softc ssc;
208 	struct	qt_softc *sc = &ssc;
209 	struct	uba_attach_args *ua = aux;
210 	struct	uba_softc *ubasc = (struct uba_softc *)parent;
211 	struct	qt_init *qi;
212 	struct ubinfo ui;
213 
214 	sc->sc_iot = ua->ua_iot;
215 	sc->sc_ioh = ua->ua_ioh;
216 	if (qtturbo(sc) == 0)
217 		return 0; /* Not a turbo card */
218 
219 	/* Force the card to interrupt */
220 	ui.ui_size = sizeof(struct qt_init);
221 	if (ubmemalloc((void *)parent, &ui, 0))
222 		return 0; /* Failed */
223 	qi = (struct qt_init *)ui.ui_vaddr;
224 	memset(qi, 0, sizeof(struct qt_init));
225 	qi->vector = ubasc->uh_lastiv - 4;
226 	qi->options = INIT_OPTIONS_INT;
227 
228 	QT_WCSR(CSR_IBAL, loint(ui.ui_baddr));
229 	QT_WCSR(CSR_IBAH, hiint(ui.ui_baddr));
230 	QT_WCSR(CSR_SRQR, 2);
231 	delay(100000); /* Wait some time for interrupt */
232 	QT_WCSR(CSR_SRQR, 3); /* Stop card */
233 
234 	ubmemfree((void *)parent, &ui);
235 
236 	return 10;
237 }
238 
239 
240 /*
241  * Interface exists.  More accurately, something exists at the CSR (see
242  * sys/sys_net.c) -- there's no guarantee it's a DELQA-YM.
243  *
244  * The ring descriptors are initialized, the buffers allocated using first the
245  * DMA region allocated at network load time and then later main memory.  The
246  * INIT block is filled in and the device is poked/probed to see if it really
247  * is a DELQA-YM.  If the device is not a -YM then a message is printed and
248  * the 'if_attach' call is skipped.  For a -YM the START command is issued,
249  * but the device is not marked as running|up - that happens at interrupt level
250  * when the device interrupts to say it has started.
251 */
252 
253 void
254 qtattach(struct device *parent, struct device *self, void *aux)
255 	{
256 	struct	uba_softc *ubasc = (struct uba_softc *)parent;
257 	register struct qt_softc *sc = device_private(self);
258 	register struct ifnet *ifp = &sc->is_if;
259 	struct uba_attach_args *ua = aux;
260 
261 	uba_intr_establish(ua->ua_icookie, ua->ua_cvec, qtintr, sc,
262 	    &sc->sc_intrcnt);
263 	evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
264 	    sc->sc_dev.dv_xname, "intr");
265 
266 	sc->sc_iot = ua->ua_iot;
267 	sc->sc_ioh = ua->ua_ioh;
268 	ubasc->uh_lastiv -= 4;
269 	sc->vector = ubasc->uh_lastiv;
270 
271 /*
272  * Now allocate the buffers and initialize the buffers.  This should _never_
273  * fail because main memory is allocated after the DMA pool is used up.
274 */
275 
276 	sc->is_addr[0] = QT_RCSR(0);
277 	sc->is_addr[1] = QT_RCSR(2);
278 	sc->is_addr[2] = QT_RCSR(4);
279 	sc->is_addr[3] = QT_RCSR(6);
280 	sc->is_addr[4] = QT_RCSR(8);
281 	sc->is_addr[5] = QT_RCSR(10);
282 
283 	strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
284 	ifp->if_softc = sc;
285 	ifp->if_flags = IFF_BROADCAST|IFF_MULTICAST;
286 	ifp->if_ioctl = qtioctl;
287 	ifp->if_start = qtstart;
288 	ifp->if_init = qtinit;
289 	ifp->if_stop = qtstop;
290 	IFQ_SET_READY(&ifp->if_snd);
291 
292 	printf("\n%s: delqa-plus in Turbo mode, hardware address %s\n",
293 	    XNAME, ether_sprintf(sc->is_addr));
294 	if_attach(ifp);
295 	ether_ifattach(ifp, sc->is_addr);
296 	}
297 
298 int
299 qtturbo(sc)
300 	register struct qt_softc *sc;
301 	{
302 	register int i;
303 
304 /*
305  * Issue the software reset.  Delay 150us.  The board should now be in
306  * DELQA-Normal mode.  Set ITB and DEQTA select.  If both bits do not
307  * stay turned on then the board is not a DELQA-YM.
308 */
309 	QT_WCSR(CSR_ARQR, ARQR_SR);
310 	QT_WCSR(CSR_ARQR, 0);
311 	delay(150L);
312 
313 	QT_WCSR(CSR_SRR, 0x8001);	/* MS | ITB */
314 	i = QT_RCSR(CSR_SRR);
315 	QT_WCSR(CSR_SRR, 0x8000);	/* Turn off ITB, set DELQA select */
316 	if	(i != 0x8001)
317 		{
318 		printf("qt !-YM\n");
319 		return(0);
320 		}
321 /*
322  * Board is a DELQA-YM.  Send the commands to enable Turbo mode.  Delay
323  * 1 second, testing the SRR register every millisecond to see if the
324  * board has shifted to Turbo mode.
325 */
326 	QT_WCSR(CSR_XCR0, 0x0baf);
327 	QT_WCSR(CSR_XCR1, 0xff00);
328 	for	(i = 0; i < 1000; i++)
329 		{
330 		if	((QT_RCSR(CSR_SRR) & SRR_RESP) == 1)
331 			break;
332 		delay(1000L);
333 		}
334 	if	(i >= 1000)
335 		{
336 		printf("qt !Turbo\n");
337 		return(0);
338 		}
339 	return(1);
340 	}
341 
342 int
343 qtinit(struct ifnet *ifp)
344 	{
345 	register struct qt_softc *sc = ifp->if_softc;
346 	register struct qt_init *iniblk;
347 	struct ifrw *ifrw;
348 	struct ifxmt *ifxp;
349 	struct	qt_rring *rp;
350 	struct	qt_tring *tp;
351 	register int i, error;
352 
353 	if (ifp->if_flags & IFF_RUNNING) {
354 		/* Cancel any pending I/O. */
355 		qtstop(ifp, 0);
356 	}
357 
358 	if (sc->sc_ib == NULL) {
359 		if (if_ubaminit(&sc->sc_ifuba,
360 		    (void *)device_parent(&sc->sc_dev),
361 		    MCLBYTES, sc->sc_ifr, NRCV, sc->sc_ifw, NXMT)) {
362 			printf("%s: can't initialize\n", XNAME);
363 			ifp->if_flags &= ~IFF_UP;
364 			return 0;
365 		}
366 		sc->sc_ui.ui_size = sizeof(struct qt_cdata);
367 		if ((error = ubmemalloc((void *)device_parent(&sc->sc_dev),
368 		    &sc->sc_ui, 0))) {
369 			printf(": failed ubmemalloc(), error = %d\n", error);
370 			return error;
371 		}
372 		sc->sc_ib = (struct qt_cdata *)sc->sc_ui.ui_vaddr;
373 		sc->sc_pib = (struct qt_cdata *)sc->sc_ui.ui_baddr;
374 
375 /*
376  * Fill in most of the INIT block: vector, options (interrupt enable), ring
377  * locations.  The physical address is copied from the ROMs as part of the
378  * -YM testing proceedure.  The CSR is saved here rather than in qtinit()
379  * because the qtturbo() routine needs it.
380  *
381  * The INIT block must be quadword aligned.  Using malloc() guarantees click
382  * (64 byte) alignment.  Since the only time the INIT block is referenced is
383  * at 'startup' or 'reset' time there is really no time penalty (and a modest
384  * D space savings) involved.
385 */
386 		memset(sc->sc_ib, 0, sizeof(struct qt_cdata));
387 		iniblk = &sc->sc_ib->qc_init;
388 
389 		iniblk->vector = sc->vector;
390 		memcpy(iniblk->paddr, sc->is_addr, 6);
391 
392 		iniblk->options = INIT_OPTIONS_INT;
393 		iniblk->rx_lo = loint(&sc->sc_pib->qc_r);
394 		iniblk->rx_hi = hiint(&sc->sc_pib->qc_r);
395 		iniblk->tx_lo = loint(&sc->sc_pib->qc_t);
396 		iniblk->tx_hi = hiint(&sc->sc_pib->qc_t);
397 	}
398 	iniblk = &sc->sc_ib->qc_init;
399 	iniblk->mode = ifp->if_flags & IFF_PROMISC ? INIT_MODE_PRO : 0;
400 
401 
402 /*
403  * Now initialize the receive ring descriptors.  Because this routine can be
404  * called with outstanding I/O operations we check the ring descriptors for
405  * a non-zero 'rhost0' (or 'thost0') word and place those buffers back on
406  * the free list.
407 */
408 	for (i = 0; i < NRCV; i++) {
409 		rp = &sc->sc_ib->qc_r[i];
410 		ifrw = &sc->sc_ifr[i];
411 		rp->rmd1 = MCLBYTES;
412 		rp->rmd4 = loint(ifrw->ifrw_info);
413 		rp->rmd5 = hiint(ifrw->ifrw_info);
414 		rp->rmd3 = 0;			/* clear RMD3_OWN */
415 		}
416 	for (i = 0; i < NXMT; i++) {
417 		tp = &sc->sc_ib->qc_t[i];
418 		ifxp = &sc->sc_ifw[i];
419 		tp->tmd4 = loint(ifxp->ifw_info);
420 		tp->tmd5 = hiint(ifxp->ifw_info);
421 		tp->tmd3 = TMD3_OWN;
422 		}
423 
424 	sc->xnext = sc->xlast = sc->nxmit = 0;
425 	sc->rindex = 0;
426 	sc->nxtrcv = 0;
427 	sc->nrcv = 0;
428 
429 /*
430  * Now we tell the device the address of the INIT block.  The device
431  * _must_ be in the Turbo mode at this time.  The "START" command is
432  * then issued to the device.  A 1 second timeout is then started.
433  * When the interrupt occurs the IFF_UP|IFF_RUNNING state is entered and
434  * full operations will proceed.  If the timeout expires without an interrupt
435  * being received an error is printed, the flags cleared and the device left
436  * marked down.
437 */
438 	QT_WCSR(CSR_IBAL, loint(&sc->sc_pib->qc_init));
439 	QT_WCSR(CSR_IBAH, hiint(&sc->sc_pib->qc_init));
440 	QT_WCSR(CSR_SRQR, 2);
441 
442 	sc->is_if.if_flags |= IFF_RUNNING;
443 	return 0;
444 	}
445 
446 /*
447  * Start output on interface.
448  */
449 
450 void
451 qtstart(struct ifnet *ifp)
452 	{
453 	int	len, nxmit;
454 	register struct qt_softc *sc = ifp->if_softc;
455 	register struct qt_tring *rp;
456 	struct	mbuf *m = NULL;
457 
458 	for (nxmit = sc->nxmit; nxmit < NXMT; nxmit++) {
459 		IF_DEQUEUE(&sc->is_if.if_snd, m);
460 		if	(m == 0)
461 			break;
462 
463 		rp = &sc->sc_ib->qc_t[sc->xnext];
464 		if ((rp->tmd3 & TMD3_OWN) == 0)
465 			panic("qtstart");
466 
467 #if NBPFILTER > 0
468 		if (ifp->if_bpf)
469 			bpf_mtap(ifp->if_bpf, m);
470 #endif
471 
472 		len = if_ubaput(&sc->sc_ifuba, &sc->sc_ifw[sc->xnext], m);
473 		if (len < MINPACKETSIZE)
474 			len = MINPACKETSIZE;
475 		rp->tmd3 = len & TMD3_BCT;	/* set length,clear ownership */
476 		QT_WCSR(CSR_ARQR, ARQR_TRQ);	/* tell device it has buffer */
477 
478 		if	(++sc->xnext >= NXMT)
479 			sc->xnext = 0;
480 	}
481 	if (sc->nxmit != nxmit)
482 		sc->nxmit = nxmit;
483 	/* XXX - set OACTIVE */
484 }
485 
486 /*
487  * General interrupt service routine.  Receive, transmit, device start
488  * interrupts and timeouts come here.  Check for hard device errors and print a
489  * message if any errors are found.  If we are waiting for the device to
490  * START then check if the device is now running.
491 */
492 
493 void
494 qtintr(void *arg)
495 	{
496 	struct qt_softc *sc = arg;
497 	struct ifnet *ifp = &sc->is_if;
498 	short status;
499 
500 
501 	status = QT_RCSR(CSR_SRR);
502 	if	(status < 0)
503 		/* should we reset the device after a bunch of these errs? */
504 		qtsrr(sc, status);
505 	if ((ifp->if_flags & IFF_UP) == 0)
506 		return; /* Unwanted interrupt */
507 	qtrint(sc);
508 	qttint(sc);
509 	qtstart(&sc->is_ec.ec_if);
510 	}
511 
512 /*
513  * Transmit interrupt service.  Only called if there are outstanding transmit
514  * requests which could have completed.  The DELQA-YM doesn't provide the
515  * status bits telling the kind (receive, transmit) of interrupt.
516 */
517 
518 #define BBLMIS (TMD2_BBL|TMD2_MIS)
519 
520 void
521 qttint(struct qt_softc *sc)
522 	{
523 	register struct qt_tring *rp;
524 
525 	while (sc->nxmit > 0)
526 		{
527 		rp = &sc->sc_ib->qc_t[sc->xlast];
528 		if ((rp->tmd3 & TMD3_OWN) == 0)
529 			break;
530 		sc->is_if.if_opackets++;
531 /*
532  * Collisions don't count as output errors, but babbling and missing packets
533  * do count as output errors.
534 */
535 		if	(rp->tmd2 & TMD2_CER)
536 			sc->is_if.if_collisions++;
537 		if	((rp->tmd0 & TMD0_ERR1) ||
538 			 ((rp->tmd2 & TMD2_ERR2) && (rp->tmd2 & BBLMIS)))
539 			{
540 #ifdef QTDEBUG
541 			char buf[100];
542 			bitmask_snprintf(rp->tmd2, TMD2_BITS, buf, 100);
543 			printf("%s: tmd2 %s\n", XNAME, buf);
544 #endif
545 			sc->is_if.if_oerrors++;
546 			}
547 		if_ubaend(&sc->sc_ifuba, &sc->sc_ifw[sc->xlast]);
548 		if	(++sc->xlast >= NXMT)
549 			sc->xlast = 0;
550 		sc->nxmit--;
551 		}
552 	}
553 
554 /*
555  * Receive interrupt service.  Pull packet off the interface and put into
556  * a mbuf chain for processing later.
557 */
558 
559 void
560 qtrint(struct qt_softc *sc)
561 	{
562 	register struct qt_rring *rp;
563 	struct ifnet *ifp = &sc->is_ec.ec_if;
564 	struct mbuf *m;
565 	int	len;
566 
567 	while	(sc->sc_ib->qc_r[(int)sc->rindex].rmd3 & RMD3_OWN)
568 		{
569 		rp = &sc->sc_ib->qc_r[(int)sc->rindex];
570 		if     ((rp->rmd0 & (RMD0_STP|RMD0_ENP)) != (RMD0_STP|RMD0_ENP))
571 			{
572 			printf("%s: chained packet\n", XNAME);
573 			sc->is_if.if_ierrors++;
574 			goto rnext;
575 			}
576 		len = (rp->rmd1 & RMD1_MCNT) - 4;	/* -4 for CRC */
577 		sc->is_if.if_ipackets++;
578 
579 		if	((rp->rmd0 & RMD0_ERR3) || (rp->rmd2 & RMD2_ERR4))
580 			{
581 #ifdef QTDEBUG
582 			char buf[100];
583 			bitmask_snprintf(rp->rmd0, RMD0_BITS, buf, 100);
584 			printf("%s: rmd0 %s\n", XNAME, buf);
585 			bitmask_snprintf(rp->rmd2, RMD2_BITS, buf, 100);
586 			printf("%s: rmd2 %s\n", XNAME, buf);
587 #endif
588 			sc->is_if.if_ierrors++;
589 			goto rnext;
590 			}
591 		m = if_ubaget(&sc->sc_ifuba, &sc->sc_ifr[(int)sc->rindex],
592 		    ifp, len);
593 		if (m == 0) {
594 			sc->is_if.if_ierrors++;
595 			goto rnext;
596 		}
597 #if NBPFILTER > 0
598 		if (ifp->if_bpf)
599 			bpf_mtap(ifp->if_bpf, m);
600 #endif
601 		(*ifp->if_input)(ifp, m);
602 rnext:
603 		--sc->nrcv;
604 		rp->rmd3 = 0;
605 		rp->rmd1 = MCLBYTES;
606 		if	(++sc->rindex >= NRCV)
607 			sc->rindex = 0;
608 		}
609 	QT_WCSR(CSR_ARQR, ARQR_RRQ);	/* tell device it has buffer */
610 	}
611 
612 int
613 qtioctl(ifp, cmd, data)
614 	register struct ifnet *ifp;
615 	u_long	cmd;
616 	caddr_t	data;
617 	{
618 	int s, error;
619 
620 	s = splnet();
621 
622 	error = ether_ioctl(ifp, cmd, data);
623 	if (error == ENETRESET) {
624 		if (ifp->if_flags & IFF_RUNNING)
625 			error = qtinit(ifp);
626 		else
627 			error = 0;
628 	}
629 	splx(s);
630 	return (error);
631 }
632 
633 void
634 qtsrr(sc, srrbits)
635 	struct qt_softc *sc;
636 	int	srrbits;
637 	{
638 	char buf[100];
639 	bitmask_snprintf(srrbits, SRR_BITS, buf, sizeof buf);
640 	printf("%s: srr=%s\n", sc->sc_dev.dv_xname, buf);
641 	}
642 
643 /*
644  * Stop activity on the interface.
645  * Lose outstanding transmit requests. XXX - not good for multicast.
646  */
647 void
648 qtstop(struct ifnet *ifp, int disable)
649 {
650 	struct qt_softc *sc = ifp->if_softc;
651 	int i;
652 
653 	QT_WCSR(CSR_SRQR, 3);
654 	for (i = 0; i < 100; i++)
655 		if ((QT_RCSR(CSR_SRR) & SRR_RESP) == 3)
656 			break;
657 	if (QT_RCSR(CSR_SRR) & SRR_FES)
658 		qtsrr(sc, QT_RCSR(CSR_SRR));
659 	/* Forget already queued transmit requests */
660 	while (sc->nxmit > 0) {
661 		if_ubaend(&sc->sc_ifuba, &sc->sc_ifw[sc->xlast]);
662 		if (++sc->xlast >= NXMT)
663 			sc->xlast = 0;
664 		sc->nxmit--;
665 	}
666 	/* Handle late received packets */
667 	qtrint(sc);
668 	ifp->if_flags &= ~IFF_RUNNING;
669 }
670 
671 #ifdef notyet
672 /*
673  * Reset the device.  This moves it from DELQA-T mode to DELQA-Normal mode.
674  * After the reset put the device back in -T mode.  Then call qtinit() to
675  * reinitialize the ring structures and issue the 'timeout' for the "device
676  * started interrupt".
677 */
678 
679 void
680 qtreset(sc)
681 	register struct qt_softc *sc;
682 	{
683 
684 	qtturbo(sc);
685 	qtinit(&sc->is_ec.ec_if);
686 	}
687 #endif
688