1 /* $NetBSD: if_eireg.h,v 1.1 2001/03/19 23:58:12 bjh21 Exp $ */ 2 3 /* 4 * 2000 Ben Harris 5 * 6 * This file is in the public domain. 7 */ 8 9 /* 10 * if_eireg.h - register definitions etc for the Acorn Ether1 card 11 */ 12 13 #ifndef _IF_EIREG_H_ 14 #define _IF_EIREG_H_ 15 16 /* 17 * My understanding of this card is as follows. Note that this is 18 * mostly derived from reading other people's code, so it may be 19 * hideously inaccurate. 20 * 21 * The card has three address spaces. The ROM is mapped into the 22 * bottom n (16?) bytes of SYNC address space, and contains the 23 * expansion card ID information and the Ethernet address. There is a 24 * (write only?) set of registers at the start of the FAST address 25 * space. One of these performs miscellaneous control functions, and 26 * the other acts as a page selector for the board memory. The board 27 * has 64k of RAM, and 4k pages of this can be mapped at offset 0x2000 28 * in the FAST space by writing the page number to the page register. 29 * The 82586 has access to the whole of this memory and (I believe) 30 * sees it as the top 64k of its address space. 31 */ 32 33 /* Registers in the board's control space */ 34 #define EI_PAGE 0 35 #define EI_CONTROL 1 36 #define EI_CTL_RESET 0x01 37 #define EI_CTL_LOOP 0x02 38 #define EI_CTL_ATTN 0x04 39 #define EI_CTL_CLI 0x08 40 41 /* Offset of base of memory in bus_addr_t units */ 42 #define EI_MEMOFF 0x2000 43 44 /* 45 * All addresses within board RAM are in bytes of actual RAM. RAM is 46 * 16 bis wide, and can only be accessed by word transfers 47 * (bus_space_xxx_2). 48 */ 49 #define EI_MEMSIZE 0x10000 50 #define EI_MEMBASE (0x1000000 - EI_MEMSIZE) 51 #define EI_PAGESIZE 0x1000 52 #define EI_NPAGES (EI_MEMSIZE / EI_PAGESIZE) 53 #define ei_atop(a) (((a) % EI_MEMSIZE) / EI_PAGESIZE) 54 #define ei_atopo(a) ((a) % EI_PAGESIZE) 55 56 #define EI_SCP_ADDR IE_SCP_ADDR % EI_MEMSIZE 57 58 #define EI_ROMSIZE 16 59 #define EI_ROM_HWREV 8 60 #define EI_ROM_EADDR 9 61 62 #endif 63