1*95e1ffb1Schristos /* $NetBSD: if_eireg.h,v 1.4 2005/12/11 12:23:28 christos Exp $ */ 266261e4fSbjh21 366261e4fSbjh21 /* 466261e4fSbjh21 * 2000 Ben Harris 566261e4fSbjh21 * 666261e4fSbjh21 * This file is in the public domain. 766261e4fSbjh21 */ 866261e4fSbjh21 966261e4fSbjh21 /* 1066261e4fSbjh21 * if_eireg.h - register definitions etc for the Acorn Ether1 card 1166261e4fSbjh21 */ 1266261e4fSbjh21 1366261e4fSbjh21 #ifndef _IF_EIREG_H_ 1466261e4fSbjh21 #define _IF_EIREG_H_ 1566261e4fSbjh21 1666261e4fSbjh21 /* 1766261e4fSbjh21 * The card has three address spaces. The ROM is mapped into the 1853fbe7acSbjh21 * bottom 32 bytes of SYNC address space, and contains the 1966261e4fSbjh21 * expansion card ID information and the Ethernet address. There is a 2053fbe7acSbjh21 * pair of write-only registers at the start of the FAST address 2166261e4fSbjh21 * space. One of these performs miscellaneous control functions, and 2266261e4fSbjh21 * the other acts as a page selector for the board memory. The board 2366261e4fSbjh21 * has 64k of RAM, and 4k pages of this can be mapped at offset 0x2000 2466261e4fSbjh21 * in the FAST space by writing the page number to the page register. 2566261e4fSbjh21 * The 82586 has access to the whole of this memory and (I believe) 2666261e4fSbjh21 * sees it as the top 64k of its address space. 2766261e4fSbjh21 */ 2866261e4fSbjh21 2966261e4fSbjh21 /* Registers in the board's control space */ 3066261e4fSbjh21 #define EI_PAGE 0 3166261e4fSbjh21 #define EI_CONTROL 1 3253fbe7acSbjh21 #define EI_CTL_RST 0x01 /* Reset */ 3353fbe7acSbjh21 #define EI_CTL_LB 0x02 /* Loop-back */ 3453fbe7acSbjh21 #define EI_CTL_CA 0x04 /* Channel Attention */ 3553fbe7acSbjh21 #define EI_CTL_CLI 0x08 /* Clear Interrupt */ 3666261e4fSbjh21 3766261e4fSbjh21 /* Offset of base of memory in bus_addr_t units */ 3866261e4fSbjh21 #define EI_MEMOFF 0x2000 3966261e4fSbjh21 4066261e4fSbjh21 /* 4166261e4fSbjh21 * All addresses within board RAM are in bytes of actual RAM. RAM is 4253fbe7acSbjh21 * 16 bits wide, and can only be accessed by word transfers 4366261e4fSbjh21 * (bus_space_xxx_2). 4466261e4fSbjh21 */ 4566261e4fSbjh21 #define EI_MEMSIZE 0x10000 4666261e4fSbjh21 #define EI_MEMBASE (0x1000000 - EI_MEMSIZE) 4766261e4fSbjh21 #define EI_PAGESIZE 0x1000 4866261e4fSbjh21 #define EI_NPAGES (EI_MEMSIZE / EI_PAGESIZE) 4966261e4fSbjh21 #define ei_atop(a) (((a) % EI_MEMSIZE) / EI_PAGESIZE) 5066261e4fSbjh21 #define ei_atopo(a) ((a) % EI_PAGESIZE) 5166261e4fSbjh21 5266261e4fSbjh21 #define EI_SCP_ADDR IE_SCP_ADDR % EI_MEMSIZE 5366261e4fSbjh21 5453fbe7acSbjh21 /* 559bc855a9Ssimonb * The ROM on the Ether1 is a bit oddly wired, in that the interrupt line 569bc855a9Ssimonb * is wired up as the high-order address line, so as to allow the interrupt 579bc855a9Ssimonb * status bit the first byte to reflect the actual interrupt status. 5853fbe7acSbjh21 */ 5953fbe7acSbjh21 6053fbe7acSbjh21 #define EI_ROMSIZE 0x20 6153fbe7acSbjh21 /* First eight bytes are standard extended podule ID. */ 6253fbe7acSbjh21 #define EI_ROM_HWREV 0x08 6353fbe7acSbjh21 #define EI_ROM_EADDR 0x09 6453fbe7acSbjh21 #define EI_ROM_CRC 0x1c 6566261e4fSbjh21 6666261e4fSbjh21 #endif 67