xref: /netbsd-src/sys/dev/pci/yds.c (revision 796c32c94f6e154afc9de0f63da35c91bb739b45)
1 /*	$NetBSD: yds.c,v 1.59 2017/06/25 16:07:48 christos Exp $	*/
2 
3 /*
4  * Copyright (c) 2000, 2001 Kazuki Sakamoto and Minoura Makoto.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 /*
29  * Yamaha YMF724[B-F]/740[B-C]/744/754
30  *
31  * Documentation links:
32  * - ftp://ftp.alsa-project.org/pub/manuals/yamaha/
33  * - ftp://ftp.alsa-project.org/pub/manuals/yamaha/pci/
34  *
35  * TODO:
36  * - FM synth volume (difficult: mixed before ac97)
37  * - Digital in/out (SPDIF) support
38  * - Effect??
39  */
40 
41 #include <sys/cdefs.h>
42 __KERNEL_RCSID(0, "$NetBSD: yds.c,v 1.59 2017/06/25 16:07:48 christos Exp $");
43 
44 #include "mpu.h"
45 
46 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/kernel.h>
49 #include <sys/fcntl.h>
50 #include <sys/kmem.h>
51 #include <sys/device.h>
52 #include <sys/proc.h>
53 
54 #include <dev/pci/pcidevs.h>
55 #include <dev/pci/pcireg.h>
56 #include <dev/pci/pcivar.h>
57 
58 #include <sys/audioio.h>
59 #include <dev/audio_if.h>
60 #include <dev/mulaw.h>
61 #include <dev/auconv.h>
62 #include <dev/ic/ac97reg.h>
63 #include <dev/ic/ac97var.h>
64 #include <dev/ic/mpuvar.h>
65 
66 #include <sys/bus.h>
67 #include <sys/intr.h>
68 
69 #include <dev/microcode/yds/yds_hwmcode.h>
70 #include <dev/pci/ydsreg.h>
71 #include <dev/pci/ydsvar.h>
72 
73 /* Debug */
74 #undef YDS_USE_REC_SLOT
75 #define YDS_USE_P44
76 
77 #ifdef AUDIO_DEBUG
78 # define DPRINTF(x)	if (ydsdebug) printf x
79 # define DPRINTFN(n,x)	if (ydsdebug>(n)) printf x
80 int	ydsdebug = 0;
81 #else
82 # define DPRINTF(x)
83 # define DPRINTFN(n,x)
84 #endif
85 #ifdef YDS_USE_REC_SLOT
86 # define YDS_INPUT_SLOT 0	/* REC slot = ADC + loopbacks */
87 #else
88 # define YDS_INPUT_SLOT 1	/* ADC slot */
89 #endif
90 
91 static int	yds_match(device_t, cfdata_t, void *);
92 static void	yds_attach(device_t, device_t, void *);
93 static int	yds_intr(void *);
94 
95 #define DMAADDR(p)	((p)->map->dm_segs[0].ds_addr)
96 #define KERNADDR(p)	((void *)((p)->addr))
97 
98 static int	yds_allocmem(struct yds_softc *, size_t, size_t,
99 			     struct yds_dma *);
100 static int	yds_freemem(struct yds_softc *, struct yds_dma *);
101 
102 #ifndef AUDIO_DEBUG
103 #define YWRITE1(sc, r, x) bus_space_write_1((sc)->memt, (sc)->memh, (r), (x))
104 #define YWRITE2(sc, r, x) bus_space_write_2((sc)->memt, (sc)->memh, (r), (x))
105 #define YWRITE4(sc, r, x) bus_space_write_4((sc)->memt, (sc)->memh, (r), (x))
106 #define YREAD1(sc, r)	bus_space_read_1((sc)->memt, (sc)->memh, (r))
107 #define YREAD2(sc, r)	bus_space_read_2((sc)->memt, (sc)->memh, (r))
108 #define YREAD4(sc, r)	bus_space_read_4((sc)->memt, (sc)->memh, (r))
109 #else
110 static uint16_t YREAD2(struct yds_softc *sc, bus_size_t r)
111 {
112 	DPRINTFN(5, (" YREAD2(0x%lX)\n", (unsigned long)r));
113 	return bus_space_read_2(sc->memt, sc->memh, r);
114 }
115 
116 static uint32_t YREAD4(struct yds_softc *sc, bus_size_t r)
117 {
118 	DPRINTFN(5, (" YREAD4(0x%lX)\n", (unsigned long)r));
119 	return bus_space_read_4(sc->memt, sc->memh, r);
120 }
121 
122 #ifdef notdef
123 static void YWRITE1(struct yds_softc *sc, bus_size_t r, uint8_t x)
124 {
125 	DPRINTFN(5, (" YWRITE1(0x%lX,0x%lX)\n", (unsigned long)r,
126 		     (unsigned long)x));
127 	bus_space_write_1(sc->memt, sc->memh, r, x);
128 }
129 #endif
130 
131 static void YWRITE2(struct yds_softc *sc, bus_size_t r, uint16_t x)
132 {
133 	DPRINTFN(5, (" YWRITE2(0x%lX,0x%lX)\n", (unsigned long)r,
134 		     (unsigned long)x));
135 	bus_space_write_2(sc->memt, sc->memh, r, x);
136 }
137 
138 static void YWRITE4(struct yds_softc *sc, bus_size_t r, uint32_t x)
139 {
140 	DPRINTFN(5, (" YWRITE4(0x%lX,0x%lX)\n", (unsigned long)r,
141 		     (unsigned long)x));
142 	bus_space_write_4(sc->memt, sc->memh, r, x);
143 }
144 #endif
145 
146 #define	YWRITEREGION4(sc, r, x, c)	\
147 	bus_space_write_region_4((sc)->memt, (sc)->memh, (r), (x), (c) / 4)
148 
149 CFATTACH_DECL_NEW(yds, sizeof(struct yds_softc),
150     yds_match, yds_attach, NULL, NULL);
151 
152 static int	yds_open(void *, int);
153 static void	yds_close(void *);
154 static int	yds_query_encoding(void *, struct audio_encoding *);
155 static int	yds_set_params(void *, int, int, audio_params_t *,
156 			       audio_params_t *, stream_filter_list_t *,
157 			       stream_filter_list_t *);
158 static int	yds_round_blocksize(void *, int, int, const audio_params_t *);
159 static int	yds_trigger_output(void *, void *, void *, int,
160 				   void (*)(void *), void *,
161 				   const audio_params_t *);
162 static int	yds_trigger_input(void *, void *, void *, int,
163 				  void (*)(void *), void *,
164 				  const audio_params_t *);
165 static int	yds_halt_output(void *);
166 static int	yds_halt_input(void *);
167 static int	yds_getdev(void *, struct audio_device *);
168 static int	yds_mixer_set_port(void *, mixer_ctrl_t *);
169 static int	yds_mixer_get_port(void *, mixer_ctrl_t *);
170 static void *	yds_malloc(void *, int, size_t);
171 static void	yds_free(void *, void *, size_t);
172 static size_t	yds_round_buffersize(void *, int, size_t);
173 static paddr_t	yds_mappage(void *, void *, off_t, int);
174 static int	yds_get_props(void *);
175 static int	yds_query_devinfo(void *, mixer_devinfo_t *);
176 static void	yds_get_locks(void *, kmutex_t **, kmutex_t **);
177 
178 static int	yds_attach_codec(void *, struct ac97_codec_if *);
179 static int	yds_read_codec(void *, uint8_t, uint16_t *);
180 static int	yds_write_codec(void *, uint8_t, uint16_t);
181 static int	yds_reset_codec(void *);
182 
183 static u_int	yds_get_dstype(int);
184 static int	yds_download_mcode(struct yds_softc *);
185 static int	yds_allocate_slots(struct yds_softc *);
186 static void	yds_configure_legacy(device_t);
187 static void	yds_enable_dsp(struct yds_softc *);
188 static int	yds_disable_dsp(struct yds_softc *);
189 static int	yds_ready_codec(struct yds_codec_softc *);
190 static int	yds_halt(struct yds_softc *);
191 static uint32_t yds_get_lpfq(u_int);
192 static uint32_t yds_get_lpfk(u_int);
193 static struct yds_dma *yds_find_dma(struct yds_softc *, void *);
194 
195 static int	yds_init(struct yds_softc *);
196 
197 #ifdef AUDIO_DEBUG
198 static void	yds_dump_play_slot(struct yds_softc *, int);
199 #define	YDS_DUMP_PLAY_SLOT(n, sc, bank) \
200 	if (ydsdebug > (n)) yds_dump_play_slot(sc, bank)
201 #else
202 #define	YDS_DUMP_PLAY_SLOT(n, sc, bank)
203 #endif /* AUDIO_DEBUG */
204 
205 static const struct audio_hw_if yds_hw_if = {
206 	.open		  = yds_open,
207 	.close		  = yds_close,
208 	.drain		  = NULL,
209 	.query_encoding	  = yds_query_encoding,
210 	.set_params	  = yds_set_params,
211 	.round_blocksize  = yds_round_blocksize,
212 	.commit_settings  = NULL,
213 	.init_output	  = NULL,
214 	.init_input	  = NULL,
215 	.start_output	  = NULL,
216 	.start_input	  = NULL,
217 	.halt_output	  = yds_halt_output,
218 	.halt_input	  = yds_halt_input,
219 	.speaker_ctl	  = NULL,
220 	.getdev		  = yds_getdev,
221 	.setfd		  = NULL,
222 	.set_port	  = yds_mixer_set_port,
223 	.get_port	  = yds_mixer_get_port,
224 	.query_devinfo	  = yds_query_devinfo,
225 	.allocm		  = yds_malloc,
226 	.freem		  = yds_free,
227 	.round_buffersize = yds_round_buffersize,
228 	.mappage	  = yds_mappage,
229 	.get_props	  = yds_get_props,
230 	.trigger_output	  = yds_trigger_output,
231 	.trigger_input	  = yds_trigger_input,
232 	.dev_ioctl	  = NULL,
233 	.get_locks	  = yds_get_locks,
234 };
235 
236 static const struct audio_device yds_device = {
237 	.name    = "Yamaha DS-1",
238 	.version = "",
239 	.config  = "yds"
240 };
241 
242 static const struct {
243 	uint	id;
244 	u_int	flags;
245 #define YDS_CAP_MCODE_1			0x0001
246 #define YDS_CAP_MCODE_1E		0x0002
247 #define YDS_CAP_LEGACY_SELECTABLE	0x0004
248 #define YDS_CAP_LEGACY_FLEXIBLE		0x0008
249 #define YDS_CAP_HAS_P44			0x0010
250 } yds_chip_capabliity_list[] = {
251 	{ PCI_PRODUCT_YAMAHA_YMF724,
252 	  YDS_CAP_MCODE_1|YDS_CAP_LEGACY_SELECTABLE },
253 	/* 740[C] has only 32 slots.  But anyway we use only 2 */
254 	{ PCI_PRODUCT_YAMAHA_YMF740,
255 	  YDS_CAP_MCODE_1|YDS_CAP_LEGACY_SELECTABLE },	/* XXX NOT TESTED */
256 	{ PCI_PRODUCT_YAMAHA_YMF740C,
257 	  YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_SELECTABLE },
258 	{ PCI_PRODUCT_YAMAHA_YMF724F,
259 	  YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_SELECTABLE },
260 	{ PCI_PRODUCT_YAMAHA_YMF744B,
261 	  YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_FLEXIBLE },
262 	{ PCI_PRODUCT_YAMAHA_YMF754,
263 	  YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_FLEXIBLE|YDS_CAP_HAS_P44 },
264 	{ 0, 0 }
265 };
266 #ifdef AUDIO_DEBUG
267 #define YDS_CAP_BITS	"\020\005P44\004LEGFLEX\003LEGSEL\002MCODE1E\001MCODE1"
268 #endif
269 
270 static const struct audio_format yds_formats[] = {
271 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
272 	 1, AUFMT_MONAURAL, 0, {4000, 48000}},
273 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
274 	 2, AUFMT_STEREO, 0, {4000, 48000}},
275 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
276 	 1, AUFMT_MONAURAL, 0, {4000, 48000}},
277 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
278 	 2, AUFMT_STEREO, 0, {4000, 48000}},
279 };
280 #define	YDS_NFORMATS	(sizeof(yds_formats) / sizeof(struct audio_format))
281 
282 #ifdef AUDIO_DEBUG
283 static void
284 yds_dump_play_slot(struct yds_softc *sc, int bank)
285 {
286 	int i, j;
287 	uint32_t *p;
288 	uint32_t num;
289 	bus_addr_t pa;
290 
291 	for (i = 0; i < N_PLAY_SLOTS; i++) {
292 		printf("pbankp[%d] = %p,", i*2, sc->pbankp[i*2]);
293 		printf("pbankp[%d] = %p\n", i*2+1, sc->pbankp[i*2+1]);
294 	}
295 
296 	pa = DMAADDR(&sc->sc_ctrldata) + sc->pbankoff;
297 	p = sc->ptbl;
298 	printf("ptbl + 0: %d\n", *p++);
299 	for (i = 0; i < N_PLAY_SLOTS; i++) {
300 		printf("ptbl + %d: %#x, should be %#" PRIxPADDR "\n",
301 		       i+1, *p,
302 		       pa + i * sizeof(struct play_slot_ctrl_bank) *
303 				N_PLAY_SLOT_CTRL_BANK);
304 		p++;
305 	}
306 
307 	num = le32toh(*(uint32_t*)sc->ptbl);
308 	printf("numofplay = %d\n", num);
309 
310 	for (i = 0; i < num; i++) {
311 		p = (uint32_t *)sc->pbankp[i*2];
312 
313 		printf("  pbankp[%d], bank 0 : %p\n", i*2, p);
314 		for (j = 0;
315 		     j < sizeof(struct play_slot_ctrl_bank) / sizeof(uint32_t);
316 		     j++) {
317 			printf("    0x%02x: 0x%08x\n",
318 			       (unsigned)(j * sizeof(uint32_t)),
319 			       (unsigned)*p++);
320 		}
321 
322 		p = (uint32_t *)sc->pbankp[i*2 + 1];
323 		printf("  pbankp[%d], bank 1 : %p\n", i*2 + 1, p);
324 		for (j = 0;
325 		     j < sizeof(struct play_slot_ctrl_bank) / sizeof(uint32_t);
326 		     j++) {
327 			printf("    0x%02x: 0x%08x\n",
328 			       (unsigned)(j * sizeof(uint32_t)),
329 			       (unsigned)*p++);
330 		}
331 	}
332 }
333 #endif /* AUDIO_DEBUG */
334 
335 static u_int
336 yds_get_dstype(int id)
337 {
338 	int i;
339 
340 	for (i = 0; yds_chip_capabliity_list[i].id; i++) {
341 		if (PCI_PRODUCT(id) == yds_chip_capabliity_list[i].id)
342 			return yds_chip_capabliity_list[i].flags;
343 	}
344 
345 	return -1;
346 }
347 
348 static int
349 yds_download_mcode(struct yds_softc *sc)
350 {
351 	static struct {
352 		const uint32_t *mcode;
353 		size_t size;
354 	} ctrls[] = {
355 		{yds_ds1_ctrl_mcode, sizeof(yds_ds1_ctrl_mcode)},
356 		{yds_ds1e_ctrl_mcode, sizeof(yds_ds1e_ctrl_mcode)},
357 	};
358 	u_int ctrl;
359 	const uint32_t *p;
360 	size_t size;
361 	int dstype;
362 
363 	if (sc->sc_flags & YDS_CAP_MCODE_1)
364 		dstype = YDS_DS_1;
365 	else if (sc->sc_flags & YDS_CAP_MCODE_1E)
366 		dstype = YDS_DS_1E;
367 	else
368 		return 1;	/* unknown */
369 
370 	if (yds_disable_dsp(sc))
371 		return 1;
372 
373 	/* Software reset */
374 	YWRITE4(sc, YDS_MODE, YDS_MODE_RESET);
375 	YWRITE4(sc, YDS_MODE, 0);
376 
377 	YWRITE4(sc, YDS_MAPOF_REC, 0);
378 	YWRITE4(sc, YDS_MAPOF_EFFECT, 0);
379 	YWRITE4(sc, YDS_PLAY_CTRLBASE, 0);
380 	YWRITE4(sc, YDS_REC_CTRLBASE, 0);
381 	YWRITE4(sc, YDS_EFFECT_CTRLBASE, 0);
382 	YWRITE4(sc, YDS_WORK_BASE, 0);
383 
384 	ctrl = YREAD2(sc, YDS_GLOBAL_CONTROL);
385 	YWRITE2(sc, YDS_GLOBAL_CONTROL, ctrl & ~0x0007);
386 
387 	/* Download DSP microcode. */
388 	p = yds_dsp_mcode;
389 	size = sizeof(yds_dsp_mcode);
390 	YWRITEREGION4(sc, YDS_DSP_INSTRAM, p, size);
391 
392 	/* Download CONTROL microcode. */
393 	p = ctrls[dstype].mcode;
394 	size = ctrls[dstype].size;
395 	YWRITEREGION4(sc, YDS_CTRL_INSTRAM, p, size);
396 
397 	yds_enable_dsp(sc);
398 	delay(10 * 1000);		/* nessesary on my 724F (??) */
399 
400 	return 0;
401 }
402 
403 static int
404 yds_allocate_slots(struct yds_softc *sc)
405 {
406 	size_t pcs, rcs, ecs, ws, memsize;
407 	void *mp;
408 	uint32_t da;		/* DMA address */
409 	char *va;		/* KVA */
410 	off_t cb;
411 	int i;
412 	struct yds_dma *p;
413 
414 	/* Alloc DSP Control Data */
415 	pcs = YREAD4(sc, YDS_PLAY_CTRLSIZE) * sizeof(uint32_t);
416 	rcs = YREAD4(sc, YDS_REC_CTRLSIZE) * sizeof(uint32_t);
417 	ecs = YREAD4(sc, YDS_EFFECT_CTRLSIZE) * sizeof(uint32_t);
418 	ws = WORK_SIZE;
419 	YWRITE4(sc, YDS_WORK_SIZE, ws / sizeof(uint32_t));
420 
421 	DPRINTF(("play control size : %d\n", (unsigned int)pcs));
422 	DPRINTF(("rec control size : %d\n", (unsigned int)rcs));
423 	DPRINTF(("eff control size : %d\n", (unsigned int)ecs));
424 #ifndef AUDIO_DEBUG
425 	__USE(ecs);
426 #endif
427 	DPRINTF(("work size : %d\n", (unsigned int)ws));
428 #ifdef DIAGNOSTIC
429 	if (pcs != sizeof(struct play_slot_ctrl_bank)) {
430 		aprint_error_dev(sc->sc_dev, "invalid play slot ctrldata %d != %d\n",
431 		       (unsigned int)pcs,
432 		       (unsigned int)sizeof(struct play_slot_ctrl_bank));
433 	if (rcs != sizeof(struct rec_slot_ctrl_bank))
434 		aprint_error_dev(sc->sc_dev, "invalid rec slot ctrldata %d != %d\n",
435 		       (unsigned int)rcs,
436 		       (unsigned int)sizeof(struct rec_slot_ctrl_bank));
437 	}
438 #endif
439 
440 	memsize = N_PLAY_SLOTS*N_PLAY_SLOT_CTRL_BANK*pcs +
441 		  N_REC_SLOT_CTRL*N_REC_SLOT_CTRL_BANK*rcs + ws;
442 	memsize += (N_PLAY_SLOTS+1)*sizeof(uint32_t);
443 
444 	p = &sc->sc_ctrldata;
445 	if (KERNADDR(p) == NULL) {
446 		i = yds_allocmem(sc, memsize, 16, p);
447 		if (i) {
448 			aprint_error_dev(sc->sc_dev, "couldn't alloc/map DSP DMA buffer, reason %d\n", i);
449 			return 1;
450 		}
451 	}
452 	mp = KERNADDR(p);
453 	da = DMAADDR(p);
454 
455 	DPRINTF(("mp:%p, DMA addr:%#" PRIxPADDR "\n",
456 		 mp, sc->sc_ctrldata.map->dm_segs[0].ds_addr));
457 
458 	memset(mp, 0, memsize);
459 
460 	/* Work space */
461 	cb = 0;
462 	va = (uint8_t *)mp;
463 	YWRITE4(sc, YDS_WORK_BASE, da + cb);
464 	cb += ws;
465 
466 	/* Play control data table */
467 	sc->ptbl = (uint32_t *)(va + cb);
468 	sc->ptbloff = cb;
469 	YWRITE4(sc, YDS_PLAY_CTRLBASE, da + cb);
470 	cb += (N_PLAY_SLOT_CTRL + 1) * sizeof(uint32_t);
471 
472 	/* Record slot control data */
473 	sc->rbank = (struct rec_slot_ctrl_bank *)(va + cb);
474 	YWRITE4(sc, YDS_REC_CTRLBASE, da + cb);
475 	sc->rbankoff = cb;
476 	cb += N_REC_SLOT_CTRL * N_REC_SLOT_CTRL_BANK * rcs;
477 
478 #if 0
479 	/* Effect slot control data -- unused */
480 	YWRITE4(sc, YDS_EFFECT_CTRLBASE, da + cb);
481 	cb += N_EFFECT_SLOT_CTRL * N_EFFECT_SLOT_CTRL_BANK * ecs;
482 #endif
483 
484 	/* Play slot control data */
485 	sc->pbankoff = cb;
486 	for (i=0; i < N_PLAY_SLOT_CTRL; i++) {
487 		sc->pbankp[i*2] = (struct play_slot_ctrl_bank *)(va + cb);
488 		*(sc->ptbl + i+1) = htole32(da + cb);
489 		cb += pcs;
490 
491 		sc->pbankp[i*2+1] = (struct play_slot_ctrl_bank *)(va + cb);
492 		cb += pcs;
493 	}
494 	/* Sync play control data table */
495 	bus_dmamap_sync(sc->sc_dmatag, p->map,
496 			sc->ptbloff, (N_PLAY_SLOT_CTRL+1) * sizeof(uint32_t),
497 			BUS_DMASYNC_PREWRITE);
498 
499 	return 0;
500 }
501 
502 static void
503 yds_enable_dsp(struct yds_softc *sc)
504 {
505 
506 	YWRITE4(sc, YDS_CONFIG, YDS_DSP_SETUP);
507 }
508 
509 static int
510 yds_disable_dsp(struct yds_softc *sc)
511 {
512 	int to;
513 	uint32_t data;
514 
515 	data = YREAD4(sc, YDS_CONFIG);
516 	if (data)
517 		YWRITE4(sc, YDS_CONFIG, YDS_DSP_DISABLE);
518 
519 	for (to = 0; to < YDS_WORK_TIMEOUT; to++) {
520 		if ((YREAD4(sc, YDS_STATUS) & YDS_STAT_WORK) == 0)
521 			return 0;
522 		delay(1);
523 	}
524 
525 	return 1;
526 }
527 
528 static int
529 yds_match(device_t parent, cfdata_t match, void *aux)
530 {
531 	struct pci_attach_args *pa;
532 
533 	pa = (struct pci_attach_args *)aux;
534 	switch (PCI_VENDOR(pa->pa_id)) {
535 	case PCI_VENDOR_YAMAHA:
536 		switch (PCI_PRODUCT(pa->pa_id)) {
537 		case PCI_PRODUCT_YAMAHA_YMF724:
538 		case PCI_PRODUCT_YAMAHA_YMF740:
539 		case PCI_PRODUCT_YAMAHA_YMF740C:
540 		case PCI_PRODUCT_YAMAHA_YMF724F:
541 		case PCI_PRODUCT_YAMAHA_YMF744B:
542 		case PCI_PRODUCT_YAMAHA_YMF754:
543 			return 1;
544 		}
545 		break;
546 	}
547 
548 	return 0;
549 }
550 
551 /*
552  * This routine is called after all the ISA devices are configured,
553  * to avoid conflict.
554  */
555 static void
556 yds_configure_legacy(device_t self)
557 #define FLEXIBLE	(sc->sc_flags & YDS_CAP_LEGACY_FLEXIBLE)
558 #define SELECTABLE	(sc->sc_flags & YDS_CAP_LEGACY_SELECTABLE)
559 {
560 	static const bus_addr_t opl_addrs[] = {0x388, 0x398, 0x3A0, 0x3A8};
561 	static const bus_addr_t mpu_addrs[] = {0x330, 0x300, 0x332, 0x334};
562 	struct yds_softc *sc;
563 	pcireg_t reg;
564 	device_t dev;
565 	int i;
566 
567 	sc = device_private(self);
568 	if (!FLEXIBLE && !SELECTABLE)
569 		return;
570 
571 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY);
572 	reg &= ~0x8133c03f;	/* these bits are out of interest */
573 	reg |= ((YDS_PCI_EX_LEGACY_IMOD) |
574 		(YDS_PCI_LEGACY_FMEN |
575 		 YDS_PCI_LEGACY_MEN /*| YDS_PCI_LEGACY_MIEN*/));
576 	reg |= YDS_PCI_EX_LEGACY_SMOD_DISABLE;
577 	if (FLEXIBLE) {
578 		pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY, reg);
579 		delay(100*1000);
580 	}
581 
582 	/* Look for OPL */
583 	dev = 0;
584 	for (i = 0; i < sizeof(opl_addrs) / sizeof(bus_addr_t); i++) {
585 		if (SELECTABLE) {
586 			pci_conf_write(sc->sc_pc, sc->sc_pcitag,
587 				       YDS_PCI_LEGACY, reg | (i << (0+16)));
588 			delay(100*1000);	/* wait 100ms */
589 		} else
590 			pci_conf_write(sc->sc_pc, sc->sc_pcitag,
591 				       YDS_PCI_FM_BA, opl_addrs[i]);
592 		if (bus_space_map(sc->sc_opl_iot,
593 				  opl_addrs[i], 4, 0, &sc->sc_opl_ioh) == 0) {
594 			struct audio_attach_args aa;
595 
596 			aa.type = AUDIODEV_TYPE_OPL;
597 			aa.hwif = aa.hdl = NULL;
598 			dev = config_found(self, &aa, audioprint);
599 			if (dev == 0)
600 				bus_space_unmap(sc->sc_opl_iot,
601 						sc->sc_opl_ioh, 4);
602 			else {
603 				if (SELECTABLE)
604 					reg |= (i << (0+16));
605 				break;
606 			}
607 		}
608 	}
609 	if (dev == 0) {
610 		reg &= ~YDS_PCI_LEGACY_FMEN;
611 		pci_conf_write(sc->sc_pc, sc->sc_pcitag,
612 			       YDS_PCI_LEGACY, reg);
613 	} else {
614 		/* Max. volume */
615 		YWRITE4(sc, YDS_LEGACY_OUT_VOLUME, 0x3fff3fff);
616 		YWRITE4(sc, YDS_LEGACY_REC_VOLUME, 0x3fff3fff);
617 	}
618 
619 	/* Look for MPU */
620 	dev = NULL;
621 	for (i = 0; i < sizeof(mpu_addrs) / sizeof(bus_addr_t); i++) {
622 		if (SELECTABLE)
623 			pci_conf_write(sc->sc_pc, sc->sc_pcitag,
624 				       YDS_PCI_LEGACY, reg | (i << (4+16)));
625 		else
626 			pci_conf_write(sc->sc_pc, sc->sc_pcitag,
627 				       YDS_PCI_MPU_BA, mpu_addrs[i]);
628 		if (bus_space_map(sc->sc_mpu_iot,
629 				  mpu_addrs[i], 2, 0, &sc->sc_mpu_ioh) == 0) {
630 			struct audio_attach_args aa;
631 
632 			aa.type = AUDIODEV_TYPE_MPU;
633 			aa.hwif = aa.hdl = NULL;
634 			dev = config_found(self, &aa, audioprint);
635 			if (dev == 0)
636 				bus_space_unmap(sc->sc_mpu_iot,
637 						sc->sc_mpu_ioh, 2);
638 			else {
639 				if (SELECTABLE)
640 					reg |= (i << (4+16));
641 				break;
642 			}
643 		}
644 	}
645 	if (dev == 0) {
646 		reg &= ~(YDS_PCI_LEGACY_MEN | YDS_PCI_LEGACY_MIEN);
647 		pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY, reg);
648 	}
649 	sc->sc_mpu = dev;
650 }
651 #undef FLEXIBLE
652 #undef SELECTABLE
653 
654 static int
655 yds_init(struct yds_softc *sc)
656 {
657 	uint32_t reg;
658 
659 	DPRINTF(("yds_init()\n"));
660 
661 	/* Download microcode */
662 	if (yds_download_mcode(sc)) {
663 		aprint_error_dev(sc->sc_dev, "download microcode failed\n");
664 		return 1;
665 	}
666 
667 	/* Allocate DMA buffers */
668 	if (yds_allocate_slots(sc)) {
669 		aprint_error_dev(sc->sc_dev, "could not allocate slots\n");
670 		return 1;
671 	}
672 
673 	/* Warm reset */
674 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL);
675 	pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL,
676 		reg | YDS_DSCTRL_WRST);
677 	delay(50000);
678 
679 	return 0;
680 }
681 
682 static bool
683 yds_suspend(device_t dv, const pmf_qual_t *qual)
684 {
685 	struct yds_softc *sc = device_private(dv);
686 	pci_chipset_tag_t pc = sc->sc_pc;
687 	pcitag_t tag = sc->sc_pcitag;
688 
689 	mutex_enter(&sc->sc_lock);
690 	mutex_spin_enter(&sc->sc_intr_lock);
691 	sc->sc_enabled = 0;
692 	sc->sc_dsctrl = pci_conf_read(pc, tag, YDS_PCI_DSCTRL);
693 	sc->sc_legacy = pci_conf_read(pc, tag, YDS_PCI_LEGACY);
694 	sc->sc_ba[0] = pci_conf_read(pc, tag, YDS_PCI_FM_BA);
695 	sc->sc_ba[1] = pci_conf_read(pc, tag, YDS_PCI_MPU_BA);
696 	mutex_spin_exit(&sc->sc_intr_lock);
697 	mutex_exit(&sc->sc_lock);
698 
699 	return true;
700 }
701 
702 static bool
703 yds_resume(device_t dv, const pmf_qual_t *qual)
704 {
705 	struct yds_softc *sc = device_private(dv);
706 	pci_chipset_tag_t pc = sc->sc_pc;
707 	pcitag_t tag = sc->sc_pcitag;
708 	pcireg_t reg;
709 
710 	/* Disable legacy mode */
711 	mutex_enter(&sc->sc_lock);
712 	mutex_spin_enter(&sc->sc_intr_lock);
713 	reg = pci_conf_read(pc, tag, YDS_PCI_LEGACY);
714 	pci_conf_write(pc, tag, YDS_PCI_LEGACY, reg & YDS_PCI_LEGACY_LAD);
715 
716 	/* Enable the device. */
717 	reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
718 	reg |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
719 		PCI_COMMAND_MASTER_ENABLE);
720 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, reg);
721 	reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
722 	mutex_spin_exit(&sc->sc_intr_lock);
723 	if (yds_init(sc)) {
724 		aprint_error_dev(dv, "reinitialize failed\n");
725 		mutex_exit(&sc->sc_lock);
726 		return false;
727 	}
728 
729 	pci_conf_write(pc, tag, YDS_PCI_DSCTRL, sc->sc_dsctrl);
730 	sc->sc_enabled = 1;
731 	mutex_spin_exit(&sc->sc_intr_lock);
732 	sc->sc_codec[0].codec_if->vtbl->restore_ports(sc->sc_codec[0].codec_if);
733 	mutex_exit(&sc->sc_lock);
734 
735 	return true;
736 }
737 
738 static void
739 yds_attach(device_t parent, device_t self, void *aux)
740 {
741 	struct yds_softc *sc;
742 	struct pci_attach_args *pa;
743 	pci_chipset_tag_t pc;
744 	char const *intrstr;
745 	pci_intr_handle_t ih;
746 	pcireg_t reg;
747 	struct yds_codec_softc *codec;
748 	int i, r, to;
749 	int revision;
750 	int ac97_id2;
751 	char intrbuf[PCI_INTRSTR_LEN];
752 
753 	sc = device_private(self);
754 	sc->sc_dev = self;
755 	pa = (struct pci_attach_args *)aux;
756 	pc = pa->pa_pc;
757 	revision = PCI_REVISION(pa->pa_class);
758 
759 	pci_aprint_devinfo(pa, NULL);
760 
761 	/* Map register to memory */
762 	if (pci_mapreg_map(pa, YDS_PCI_MBA, PCI_MAPREG_TYPE_MEM, 0,
763 			   &sc->memt, &sc->memh, NULL, NULL)) {
764 		aprint_error_dev(self, "can't map memory space\n");
765 		return;
766 	}
767 
768 	/* Map and establish the interrupt. */
769 	if (pci_intr_map(pa, &ih)) {
770 		aprint_error_dev(self, "couldn't map interrupt\n");
771 		return;
772 	}
773 
774 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_AUDIO); /* XXX IPL_NONE? */
775 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO);
776 
777 	intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
778 	sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, yds_intr, sc);
779 	if (sc->sc_ih == NULL) {
780 		aprint_error_dev(self, "couldn't establish interrupt");
781 		if (intrstr != NULL)
782 			aprint_error(" at %s", intrstr);
783 		aprint_error("\n");
784 		mutex_destroy(&sc->sc_lock);
785 		mutex_destroy(&sc->sc_intr_lock);
786 		return;
787 	}
788 	aprint_normal_dev(self, "interrupting at %s\n", intrstr);
789 
790 	sc->sc_enabled = 0;
791 	sc->sc_dmatag = pa->pa_dmat;
792 	sc->sc_pc = pc;
793 	sc->sc_pcitag = pa->pa_tag;
794 	sc->sc_id = pa->pa_id;
795 	sc->sc_revision = revision;
796 	sc->sc_flags = yds_get_dstype(sc->sc_id);
797 #ifdef AUDIO_DEBUG
798 	if (ydsdebug) {
799 		char bits[80];
800 
801 		snprintb(bits, sizeof(bits), YDS_CAP_BITS, sc->sc_flags);
802 		printf("%s: chip has %s\n", device_xname(self), bits);
803 	}
804 #endif
805 
806 	/* Disable legacy mode */
807 	reg = pci_conf_read(pc, pa->pa_tag, YDS_PCI_LEGACY);
808 	pci_conf_write(pc, pa->pa_tag, YDS_PCI_LEGACY,
809 		       reg & YDS_PCI_LEGACY_LAD);
810 
811 	/* Enable the device. */
812 	reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
813 	reg |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
814 		PCI_COMMAND_MASTER_ENABLE);
815 	pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
816 	reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
817 
818 	/* Mute all volumes */
819 	for (i = 0x80; i < 0xc0; i += 2)
820 		YWRITE2(sc, i, 0);
821 
822 	/* Initialize the device */
823 	if (yds_init(sc)) {
824 		aprint_error_dev(self, "initialize failed\n");
825 		mutex_destroy(&sc->sc_lock);
826 		mutex_destroy(&sc->sc_intr_lock);
827 		return;
828 	}
829 
830 	/*
831 	 * Detect primary/secondary AC97
832 	 *	YMF754 Hardware Specification Rev 1.01 page 24
833 	 */
834 	reg = pci_conf_read(pc, pa->pa_tag, YDS_PCI_DSCTRL);
835 	pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg & ~YDS_DSCTRL_CRST);
836 	delay(400000);		/* Needed for 740C. */
837 
838 	/* Primary */
839 	for (to = 0; to < AC97_TIMEOUT; to++) {
840 		if ((YREAD2(sc, AC97_STAT_ADDR1) & AC97_BUSY) == 0)
841 			break;
842 		delay(1);
843 	}
844 	if (to == AC97_TIMEOUT) {
845 		aprint_error_dev(self, "no AC97 available\n");
846 		mutex_destroy(&sc->sc_lock);
847 		mutex_destroy(&sc->sc_intr_lock);
848 		return;
849 	}
850 
851 	/* Secondary */
852 	/* Secondary AC97 is used for 4ch audio. Currently unused. */
853 	ac97_id2 = -1;
854 	if ((YREAD2(sc, YDS_ACTIVITY) & YDS_ACTIVITY_DOCKA) == 0)
855 		goto detected;
856 #if 0				/* reset secondary... */
857 	YWRITE2(sc, YDS_GPIO_OCTRL,
858 		YREAD2(sc, YDS_GPIO_OCTRL) & ~YDS_GPIO_GPO2);
859 	YWRITE2(sc, YDS_GPIO_FUNCE,
860 		(YREAD2(sc, YDS_GPIO_FUNCE)&(~YDS_GPIO_GPC2))|YDS_GPIO_GPE2);
861 #endif
862 	for (to = 0; to < AC97_TIMEOUT; to++) {
863 		if ((YREAD2(sc, AC97_STAT_ADDR2) & AC97_BUSY) == 0)
864 			break;
865 		delay(1);
866 	}
867 	if (to < AC97_TIMEOUT) {
868 		/* detect id */
869 		for (ac97_id2 = 1; ac97_id2 < 4; ac97_id2++) {
870 			YWRITE2(sc, AC97_CMD_ADDR,
871 				AC97_CMD_READ | AC97_ID(ac97_id2) | 0x28);
872 
873 			for (to = 0; to < AC97_TIMEOUT; to++) {
874 				if ((YREAD2(sc, AC97_STAT_ADDR2) & AC97_BUSY)
875 				    == 0)
876 					goto detected;
877 				delay(1);
878 			}
879 		}
880 		if (ac97_id2 == 4)
881 			ac97_id2 = -1;
882 detected:
883 		;
884 	}
885 
886 	pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg | YDS_DSCTRL_CRST);
887 	delay (20);
888 	pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg & ~YDS_DSCTRL_CRST);
889 	delay (400000);
890 	for (to = 0; to < AC97_TIMEOUT; to++) {
891 		if ((YREAD2(sc, AC97_STAT_ADDR1) & AC97_BUSY) == 0)
892 			break;
893 		delay(1);
894 	}
895 
896 	/*
897 	 * Attach ac97 codec
898 	 */
899 	for (i = 0; i < 2; i++) {
900 		static struct {
901 			int data;
902 			int addr;
903 		} statregs[] = {
904 			{AC97_STAT_DATA1, AC97_STAT_ADDR1},
905 			{AC97_STAT_DATA2, AC97_STAT_ADDR2},
906 		};
907 
908 		if (i == 1 && ac97_id2 == -1)
909 			break;		/* secondary ac97 not available */
910 
911 		codec = &sc->sc_codec[i];
912 		codec->sc = sc;
913 		codec->id = i == 1 ? ac97_id2 : 0;
914 		codec->status_data = statregs[i].data;
915 		codec->status_addr = statregs[i].addr;
916 		codec->host_if.arg = codec;
917 		codec->host_if.attach = yds_attach_codec;
918 		codec->host_if.read = yds_read_codec;
919 		codec->host_if.write = yds_write_codec;
920 		codec->host_if.reset = yds_reset_codec;
921 
922 		r = ac97_attach(&codec->host_if, self, &sc->sc_lock);
923 		if (r != 0) {
924 			aprint_error_dev(self,
925 			    "can't attach codec (error 0x%X)\n", r);
926 			mutex_destroy(&sc->sc_lock);
927 			mutex_destroy(&sc->sc_intr_lock);
928 			return;
929 		}
930 	}
931 
932 	if (0 != auconv_create_encodings(yds_formats, YDS_NFORMATS,
933 	    &sc->sc_encodings)) {
934 		mutex_destroy(&sc->sc_lock);
935 		mutex_destroy(&sc->sc_intr_lock);
936 		return;
937 	}
938 
939 	audio_attach_mi(&yds_hw_if, sc, self);
940 
941 	sc->sc_legacy_iot = pa->pa_iot;
942 	config_defer(self, yds_configure_legacy);
943 
944 	if (!pmf_device_register(self, yds_suspend, yds_resume))
945 		aprint_error_dev(self, "couldn't establish power handler\n");
946 
947 	mutex_spin_enter(&sc->sc_intr_lock);
948 	sc->sc_enabled = 1;
949 	mutex_spin_exit(&sc->sc_intr_lock);
950 }
951 
952 static int
953 yds_attach_codec(void *sc_, struct ac97_codec_if *codec_if)
954 {
955 	struct yds_codec_softc *sc;
956 
957 	sc = sc_;
958 	sc->codec_if = codec_if;
959 	return 0;
960 }
961 
962 static int
963 yds_ready_codec(struct yds_codec_softc *sc)
964 {
965 	int to;
966 
967 	for (to = 0; to < AC97_TIMEOUT; to++) {
968 		if ((YREAD2(sc->sc, sc->status_addr) & AC97_BUSY) == 0)
969 			return 0;
970 		delay(1);
971 	}
972 
973 	return 1;
974 }
975 
976 static int
977 yds_read_codec(void *sc_, uint8_t reg, uint16_t *data)
978 {
979 	struct yds_codec_softc *sc;
980 
981 	sc = sc_;
982 	YWRITE2(sc->sc, AC97_CMD_ADDR, AC97_CMD_READ | AC97_ID(sc->id) | reg);
983 
984 	if (yds_ready_codec(sc)) {
985 		aprint_error_dev(sc->sc->sc_dev, "yds_read_codec timeout\n");
986 		return EIO;
987 	}
988 
989 	if (PCI_PRODUCT(sc->sc->sc_id) == PCI_PRODUCT_YAMAHA_YMF744B &&
990 	    sc->sc->sc_revision < 2) {
991 		int i;
992 		for (i=0; i<600; i++)
993 			(void)YREAD2(sc->sc, sc->status_data);
994 	}
995 
996 	*data = YREAD2(sc->sc, sc->status_data);
997 
998 	return 0;
999 }
1000 
1001 static int
1002 yds_write_codec(void *sc_, uint8_t reg, uint16_t data)
1003 {
1004 	struct yds_codec_softc *sc;
1005 
1006 	sc = sc_;
1007 	YWRITE2(sc->sc, AC97_CMD_ADDR, AC97_CMD_WRITE | AC97_ID(sc->id) | reg);
1008 	YWRITE2(sc->sc, AC97_CMD_DATA, data);
1009 
1010 	if (yds_ready_codec(sc)) {
1011 		aprint_error_dev(sc->sc->sc_dev, "yds_write_codec timeout\n");
1012 		return EIO;
1013 	}
1014 
1015 	return 0;
1016 }
1017 
1018 /*
1019  * XXX: Must handle the secondary differntly!!
1020  */
1021 static int
1022 yds_reset_codec(void *sc_)
1023 {
1024 	struct yds_codec_softc *codec;
1025 	struct yds_softc *sc;
1026 	pcireg_t reg;
1027 
1028 	codec = sc_;
1029 	sc = codec->sc;
1030 	/* reset AC97 codec */
1031 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL);
1032 	if (reg & 0x03) {
1033 		pci_conf_write(sc->sc_pc, sc->sc_pcitag,
1034 			       YDS_PCI_DSCTRL, reg & ~0x03);
1035 		pci_conf_write(sc->sc_pc, sc->sc_pcitag,
1036 			       YDS_PCI_DSCTRL, reg | 0x03);
1037 		pci_conf_write(sc->sc_pc, sc->sc_pcitag,
1038 			       YDS_PCI_DSCTRL, reg & ~0x03);
1039 		delay(50000);
1040 	}
1041 
1042 	yds_ready_codec(sc_);
1043 	return 0;
1044 }
1045 
1046 static int
1047 yds_intr(void *p)
1048 {
1049 	struct yds_softc *sc = p;
1050 #if NMPU > 0
1051 	struct mpu_softc *sc_mpu = device_private(sc->sc_mpu);
1052 #endif
1053 	u_int status;
1054 
1055 	mutex_spin_enter(&sc->sc_intr_lock);
1056 	if (!sc->sc_enabled) {
1057 		mutex_spin_exit(&sc->sc_intr_lock);
1058 		return 0;
1059 	}
1060 
1061 	status = YREAD4(sc, YDS_STATUS);
1062 	DPRINTFN(1, ("yds_intr: status=%08x\n", status));
1063 	if ((status & (YDS_STAT_INT|YDS_STAT_TINT)) == 0) {
1064 #if NMPU > 0
1065 		if (sc_mpu)
1066 			return mpu_intr(sc_mpu);
1067 #endif
1068 		mutex_spin_exit(&sc->sc_intr_lock);
1069 		return 0;
1070 	}
1071 
1072 	if (status & YDS_STAT_TINT) {
1073 		YWRITE4(sc, YDS_STATUS, YDS_STAT_TINT);
1074 		printf ("yds_intr: timeout!\n");
1075 	}
1076 
1077 	if (status & YDS_STAT_INT) {
1078 		int nbank;
1079 
1080 		nbank = (YREAD4(sc, YDS_CONTROL_SELECT) == 0);
1081 		/* Clear interrupt flag */
1082 		YWRITE4(sc, YDS_STATUS, YDS_STAT_INT);
1083 
1084 		/* Buffer for the next frame is always ready. */
1085 		YWRITE4(sc, YDS_MODE, YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV2);
1086 
1087 		if (sc->sc_play.intr) {
1088 			u_int dma, ccpu, blk, len;
1089 
1090 			/* Sync play slot control data */
1091 			bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
1092 					sc->pbankoff,
1093 					sizeof(struct play_slot_ctrl_bank)*
1094 					    le32toh(*sc->ptbl)*
1095 					    N_PLAY_SLOT_CTRL_BANK,
1096 					BUS_DMASYNC_POSTWRITE|
1097 					BUS_DMASYNC_POSTREAD);
1098 			dma = le32toh(sc->pbankp[nbank]->pgstart) * sc->sc_play.factor;
1099 			ccpu = sc->sc_play.offset;
1100 			blk = sc->sc_play.blksize;
1101 			len = sc->sc_play.length;
1102 
1103 			if (((dma > ccpu) && (dma - ccpu > blk * 2)) ||
1104 			    ((ccpu > dma) && (dma + len - ccpu > blk * 2))) {
1105 				/* We can fill the next block */
1106 				/* Sync ring buffer for previous write */
1107 				bus_dmamap_sync(sc->sc_dmatag,
1108 						sc->sc_play.dma->map,
1109 						ccpu, blk,
1110 						BUS_DMASYNC_POSTWRITE);
1111 				sc->sc_play.intr(sc->sc_play.intr_arg);
1112 				sc->sc_play.offset += blk;
1113 				if (sc->sc_play.offset >= len) {
1114 					sc->sc_play.offset -= len;
1115 #ifdef DIAGNOSTIC
1116 					if (sc->sc_play.offset != 0)
1117 						printf ("Audio ringbuffer botch\n");
1118 #endif
1119 				}
1120 				/* Sync ring buffer for next write */
1121 				bus_dmamap_sync(sc->sc_dmatag,
1122 						sc->sc_play.dma->map,
1123 						ccpu, blk,
1124 						BUS_DMASYNC_PREWRITE);
1125 			}
1126 		}
1127 		if (sc->sc_rec.intr) {
1128 			u_int dma, ccpu, blk, len;
1129 
1130 			/* Sync rec slot control data */
1131 			bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
1132 					sc->rbankoff,
1133 					sizeof(struct rec_slot_ctrl_bank)*
1134 					    N_REC_SLOT_CTRL*
1135 					    N_REC_SLOT_CTRL_BANK,
1136 					BUS_DMASYNC_POSTWRITE|
1137 					BUS_DMASYNC_POSTREAD);
1138 			dma = le32toh(sc->rbank[YDS_INPUT_SLOT*2 + nbank].pgstartadr);
1139 			ccpu = sc->sc_rec.offset;
1140 			blk = sc->sc_rec.blksize;
1141 			len = sc->sc_rec.length;
1142 
1143 			if (((dma > ccpu) && (dma - ccpu > blk * 2)) ||
1144 			    ((ccpu > dma) && (dma + len - ccpu > blk * 2))) {
1145 				/* We can drain the current block */
1146 				/* Sync ring buffer first */
1147 				bus_dmamap_sync(sc->sc_dmatag,
1148 						sc->sc_rec.dma->map,
1149 						ccpu, blk,
1150 						BUS_DMASYNC_POSTREAD);
1151 				sc->sc_rec.intr(sc->sc_rec.intr_arg);
1152 				sc->sc_rec.offset += blk;
1153 				if (sc->sc_rec.offset >= len) {
1154 					sc->sc_rec.offset -= len;
1155 #ifdef DIAGNOSTIC
1156 					if (sc->sc_rec.offset != 0)
1157 						printf ("Audio ringbuffer botch\n");
1158 #endif
1159 				}
1160 				/* Sync ring buffer for next read */
1161 				bus_dmamap_sync(sc->sc_dmatag,
1162 						sc->sc_rec.dma->map,
1163 						ccpu, blk,
1164 						BUS_DMASYNC_PREREAD);
1165 			}
1166 		}
1167 	}
1168 
1169 	mutex_spin_exit(&sc->sc_intr_lock);
1170 	return 1;
1171 }
1172 
1173 static int
1174 yds_allocmem(struct yds_softc *sc, size_t size, size_t align, struct yds_dma *p)
1175 {
1176 	int error;
1177 
1178 	p->size = size;
1179 	error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0,
1180 				 p->segs, sizeof(p->segs)/sizeof(p->segs[0]),
1181 				 &p->nsegs, BUS_DMA_WAITOK);
1182 	if (error)
1183 		return error;
1184 
1185 	error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size,
1186 			       &p->addr, BUS_DMA_WAITOK|BUS_DMA_COHERENT);
1187 	if (error)
1188 		goto free;
1189 
1190 	error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size,
1191 				  0, BUS_DMA_WAITOK, &p->map);
1192 	if (error)
1193 		goto unmap;
1194 
1195 	error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL,
1196 				BUS_DMA_WAITOK);
1197 	if (error)
1198 		goto destroy;
1199 	return 0;
1200 
1201 destroy:
1202 	bus_dmamap_destroy(sc->sc_dmatag, p->map);
1203 unmap:
1204 	bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
1205 free:
1206 	bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
1207 	return error;
1208 }
1209 
1210 static int
1211 yds_freemem(struct yds_softc *sc, struct yds_dma *p)
1212 {
1213 
1214 	bus_dmamap_unload(sc->sc_dmatag, p->map);
1215 	bus_dmamap_destroy(sc->sc_dmatag, p->map);
1216 	bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
1217 	bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
1218 	return 0;
1219 }
1220 
1221 static int
1222 yds_open(void *addr, int flags)
1223 {
1224 	struct yds_softc *sc;
1225 	uint32_t mode;
1226 
1227 	sc = addr;
1228 	/* Select bank 0. */
1229 	YWRITE4(sc, YDS_CONTROL_SELECT, 0);
1230 
1231 	/* Start the DSP operation. */
1232 	mode = YREAD4(sc, YDS_MODE);
1233 	mode |= YDS_MODE_ACTV;
1234 	mode &= ~YDS_MODE_ACTV2;
1235 	YWRITE4(sc, YDS_MODE, mode);
1236 
1237 	return 0;
1238 }
1239 
1240 static void
1241 yds_close(void *addr)
1242 {
1243 
1244 	yds_halt(addr);
1245 }
1246 
1247 static int
1248 yds_query_encoding(void *addr, struct audio_encoding *fp)
1249 {
1250 	struct yds_softc *sc;
1251 
1252 	sc = addr;
1253 	return auconv_query_encoding(sc->sc_encodings, fp);
1254 }
1255 
1256 static int
1257 yds_set_params(void *addr, int setmode, int usemode,
1258 	       audio_params_t *play, audio_params_t* rec,
1259 	       stream_filter_list_t *pfil, stream_filter_list_t *rfil)
1260 {
1261 	if (setmode & AUMODE_RECORD) {
1262 		if (auconv_set_converter(yds_formats, YDS_NFORMATS,
1263 					 AUMODE_RECORD, rec, FALSE, rfil) < 0)
1264 			return EINVAL;
1265 	}
1266 	if (setmode & AUMODE_PLAY) {
1267 		if (auconv_set_converter(yds_formats, YDS_NFORMATS,
1268 					 AUMODE_PLAY, play, FALSE, pfil) < 0)
1269 			return EINVAL;
1270 	}
1271 	return 0;
1272 }
1273 
1274 static int
1275 yds_round_blocksize(void *addr, int blk, int mode,
1276     const audio_params_t *param)
1277 {
1278 
1279 	/*
1280 	 * Block size must be bigger than a frame.
1281 	 * That is 1024bytes at most, i.e. for 48000Hz, 16bit, 2ch.
1282 	 */
1283 	if (blk < 1024)
1284 		blk = 1024;
1285 
1286 	return blk & ~4;
1287 }
1288 
1289 static uint32_t
1290 yds_get_lpfq(u_int sample_rate)
1291 {
1292 	int i;
1293 	static struct lpfqt {
1294 		u_int rate;
1295 		uint32_t lpfq;
1296 	} lpfqt[] = {
1297 		{8000,  0x32020000},
1298 		{11025, 0x31770000},
1299 		{16000, 0x31390000},
1300 		{22050, 0x31c90000},
1301 		{32000, 0x33d00000},
1302 		{48000, 0x40000000},
1303 		{0, 0}
1304 	};
1305 
1306 	if (sample_rate == 44100)		/* for P44 slot? */
1307 		return 0x370A0000;
1308 
1309 	for (i = 0; lpfqt[i].rate != 0; i++)
1310 		if (sample_rate <= lpfqt[i].rate)
1311 			break;
1312 
1313 	return lpfqt[i].lpfq;
1314 }
1315 
1316 static uint32_t
1317 yds_get_lpfk(u_int sample_rate)
1318 {
1319 	int i;
1320 	static struct lpfkt {
1321 		u_int rate;
1322 		uint32_t lpfk;
1323 	} lpfkt[] = {
1324 		{8000,  0x18b20000},
1325 		{11025, 0x20930000},
1326 		{16000, 0x2b9a0000},
1327 		{22050, 0x35a10000},
1328 		{32000, 0x3eaa0000},
1329 		{48000, 0x40000000},
1330 		{0, 0}
1331 	};
1332 
1333 	if (sample_rate == 44100)		/* for P44 slot? */
1334 		return 0x46460000;
1335 
1336 	for (i = 0; lpfkt[i].rate != 0; i++)
1337 		if (sample_rate <= lpfkt[i].rate)
1338 			break;
1339 
1340 	return lpfkt[i].lpfk;
1341 }
1342 
1343 static int
1344 yds_trigger_output(void *addr, void *start, void *end, int blksize,
1345 		   void (*intr)(void *), void *arg, const audio_params_t *param)
1346 #define P44		(sc->sc_flags & YDS_CAP_HAS_P44)
1347 {
1348 	struct yds_softc *sc;
1349 	struct yds_dma *p;
1350 	struct play_slot_ctrl_bank *psb;
1351 	const u_int gain = 0x40000000;
1352 	bus_addr_t s;
1353 	size_t l;
1354 	int i;
1355 	int p44, channels;
1356 	uint32_t format;
1357 
1358 	sc = addr;
1359 #ifdef DIAGNOSTIC
1360 	if (sc->sc_play.intr)
1361 		panic("yds_trigger_output: already running");
1362 #endif
1363 
1364 	sc->sc_play.intr = intr;
1365 	sc->sc_play.intr_arg = arg;
1366 	sc->sc_play.offset = 0;
1367 	sc->sc_play.blksize = blksize;
1368 
1369 	DPRINTFN(1, ("yds_trigger_output: sc=%p start=%p end=%p "
1370 	    "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg));
1371 
1372 	p = yds_find_dma(sc, start);
1373 	if (!p) {
1374 		printf("yds_trigger_output: bad addr %p\n", start);
1375 		return EINVAL;
1376 	}
1377 	sc->sc_play.dma = p;
1378 
1379 #ifdef YDS_USE_P44
1380 	/* The document says the P44 SRC supports only stereo, 16bit PCM. */
1381 	if (P44)
1382 		p44 = ((param->sample_rate == 44100) &&
1383 		       (param->channels == 2) &&
1384 		       (param->precision == 16));
1385 	else
1386 #endif
1387 		p44 = 0;
1388 	channels = p44 ? 1 : param->channels;
1389 
1390 	s = DMAADDR(p);
1391 	l = ((char *)end - (char *)start);
1392 	sc->sc_play.length = l;
1393 
1394 	*sc->ptbl = htole32(channels);	/* Num of play */
1395 
1396 	sc->sc_play.factor = 1;
1397 	if (param->channels == 2)
1398 		sc->sc_play.factor *= 2;
1399 	if (param->precision != 8)
1400 		sc->sc_play.factor *= 2;
1401 	l /= sc->sc_play.factor;
1402 
1403 	format = ((channels == 2 ? PSLT_FORMAT_STEREO : 0) |
1404 		  (param->precision == 8 ? PSLT_FORMAT_8BIT : 0) |
1405 		  (p44 ? PSLT_FORMAT_SRC441 : 0));
1406 
1407 	psb = sc->pbankp[0];
1408 	memset(psb, 0, sizeof(*psb));
1409 	psb->format = htole32(format);
1410 	psb->pgbase = htole32(s);
1411 	psb->pgloopend = htole32(l);
1412 	if (!p44) {
1413 		psb->pgdeltaend = htole32((param->sample_rate * 65536 / 48000) << 12);
1414 		psb->lpfkend = htole32(yds_get_lpfk(param->sample_rate));
1415 		psb->eggainend = htole32(gain);
1416 		psb->lpfq = htole32(yds_get_lpfq(param->sample_rate));
1417 		psb->pgdelta = htole32(psb->pgdeltaend);
1418 		psb->lpfk = htole32(yds_get_lpfk(param->sample_rate));
1419 		psb->eggain = htole32(gain);
1420 	}
1421 
1422 	for (i = 0; i < channels; i++) {
1423 		/* i == 0: left or mono, i == 1: right */
1424 		psb = sc->pbankp[i*2];
1425 		if (i)
1426 			/* copy from left */
1427 			*psb = *(sc->pbankp[0]);
1428 		if (channels == 2) {
1429 			/* stereo */
1430 			if (i == 0) {
1431 				psb->lchgain = psb->lchgainend = htole32(gain);
1432 			} else {
1433 				psb->lchgain = psb->lchgainend = 0;
1434 				psb->rchgain = psb->rchgainend = htole32(gain);
1435 				psb->format |= htole32(PSLT_FORMAT_RCH);
1436 			}
1437 		} else if (!p44) {
1438 			/* mono */
1439 			psb->lchgain = psb->rchgain = htole32(gain);
1440 			psb->lchgainend = psb->rchgainend = htole32(gain);
1441 		}
1442 		/* copy to the other bank */
1443 		*(sc->pbankp[i*2+1]) = *psb;
1444 	}
1445 
1446 	YDS_DUMP_PLAY_SLOT(5, sc, 0);
1447 	YDS_DUMP_PLAY_SLOT(5, sc, 1);
1448 
1449 	if (p44)
1450 		YWRITE4(sc, YDS_P44_OUT_VOLUME, 0x3fff3fff);
1451 	else
1452 		YWRITE4(sc, YDS_DAC_OUT_VOLUME, 0x3fff3fff);
1453 
1454 	/* Now the play slot for the next frame is set up!! */
1455 	/* Sync play slot control data for both directions */
1456 	bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
1457 			sc->ptbloff,
1458 			sizeof(struct play_slot_ctrl_bank) *
1459 			    channels * N_PLAY_SLOT_CTRL_BANK,
1460 			BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
1461 	/* Sync ring buffer */
1462 	bus_dmamap_sync(sc->sc_dmatag, p->map, 0, blksize,
1463 			BUS_DMASYNC_PREWRITE);
1464 	/* HERE WE GO!! */
1465 	YWRITE4(sc, YDS_MODE,
1466 		YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV | YDS_MODE_ACTV2);
1467 
1468 	return 0;
1469 }
1470 #undef P44
1471 
1472 static int
1473 yds_trigger_input(void *addr, void *start, void *end, int blksize,
1474 		  void (*intr)(void *), void *arg, const audio_params_t *param)
1475 {
1476 	struct yds_softc *sc;
1477 	struct yds_dma *p;
1478 	u_int srate, format;
1479 	struct rec_slot_ctrl_bank *rsb;
1480 	bus_addr_t s;
1481 	size_t l;
1482 
1483 	sc = addr;
1484 #ifdef DIAGNOSTIC
1485 	if (sc->sc_rec.intr)
1486 		panic("yds_trigger_input: already running");
1487 #endif
1488 	sc->sc_rec.intr = intr;
1489 	sc->sc_rec.intr_arg = arg;
1490 	sc->sc_rec.offset = 0;
1491 	sc->sc_rec.blksize = blksize;
1492 
1493 	DPRINTFN(1, ("yds_trigger_input: "
1494 	    "sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
1495 	    addr, start, end, blksize, intr, arg));
1496 	DPRINTFN(1, (" parameters: rate=%u, precision=%u, channels=%u\n",
1497 	    param->sample_rate, param->precision, param->channels));
1498 
1499 	p = yds_find_dma(sc, start);
1500 	if (!p) {
1501 		printf("yds_trigger_input: bad addr %p\n", start);
1502 		return EINVAL;
1503 	}
1504 	sc->sc_rec.dma = p;
1505 
1506 	s = DMAADDR(p);
1507 	l = ((char *)end - (char *)start);
1508 	sc->sc_rec.length = l;
1509 
1510 	sc->sc_rec.factor = 1;
1511 	if (param->channels == 2)
1512 		sc->sc_rec.factor *= 2;
1513 	if (param->precision != 8)
1514 		sc->sc_rec.factor *= 2;
1515 
1516 	rsb = &sc->rbank[0];
1517 	memset(rsb, 0, sizeof(*rsb));
1518 	rsb->pgbase = htole32(s);
1519 	rsb->pgloopendadr = htole32(l);
1520 	/* Seems all 4 banks must be set up... */
1521 	sc->rbank[1] = *rsb;
1522 	sc->rbank[2] = *rsb;
1523 	sc->rbank[3] = *rsb;
1524 
1525 	YWRITE4(sc, YDS_ADC_IN_VOLUME, 0x3fff3fff);
1526 	YWRITE4(sc, YDS_REC_IN_VOLUME, 0x3fff3fff);
1527 	srate = 48000 * 4096 / param->sample_rate - 1;
1528 	format = ((param->precision == 8 ? YDS_FORMAT_8BIT : 0) |
1529 		  (param->channels == 2 ? YDS_FORMAT_STEREO : 0));
1530 	DPRINTF(("srate=%d, format=%08x\n", srate, format));
1531 #ifdef YDS_USE_REC_SLOT
1532 	YWRITE4(sc, YDS_DAC_REC_VOLUME, 0x3fff3fff);
1533 	YWRITE4(sc, YDS_P44_REC_VOLUME, 0x3fff3fff);
1534 	YWRITE4(sc, YDS_MAPOF_REC, YDS_RECSLOT_VALID);
1535 	YWRITE4(sc, YDS_REC_SAMPLE_RATE, srate);
1536 	YWRITE4(sc, YDS_REC_FORMAT, format);
1537 #else
1538 	YWRITE4(sc, YDS_MAPOF_REC, YDS_ADCSLOT_VALID);
1539 	YWRITE4(sc, YDS_ADC_SAMPLE_RATE, srate);
1540 	YWRITE4(sc, YDS_ADC_FORMAT, format);
1541 #endif
1542 	/* Now the rec slot for the next frame is set up!! */
1543 	/* Sync record slot control data */
1544 	bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
1545 			sc->rbankoff,
1546 			sizeof(struct rec_slot_ctrl_bank)*
1547 			    N_REC_SLOT_CTRL*
1548 			    N_REC_SLOT_CTRL_BANK,
1549 			BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
1550 	/* Sync ring buffer */
1551 	bus_dmamap_sync(sc->sc_dmatag, p->map, 0, blksize,
1552 			BUS_DMASYNC_PREREAD);
1553 	/* HERE WE GO!! */
1554 	YWRITE4(sc, YDS_MODE,
1555 		YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV | YDS_MODE_ACTV2);
1556 
1557 	return 0;
1558 }
1559 
1560 static int
1561 yds_halt(struct yds_softc *sc)
1562 {
1563 	uint32_t mode;
1564 
1565 	/* Stop the DSP operation. */
1566 	mode = YREAD4(sc, YDS_MODE);
1567 	YWRITE4(sc, YDS_MODE, mode & ~(YDS_MODE_ACTV|YDS_MODE_ACTV2));
1568 
1569 	/* Paranoia...  mute all */
1570 	YWRITE4(sc, YDS_P44_OUT_VOLUME, 0);
1571 	YWRITE4(sc, YDS_DAC_OUT_VOLUME, 0);
1572 	YWRITE4(sc, YDS_ADC_IN_VOLUME, 0);
1573 	YWRITE4(sc, YDS_REC_IN_VOLUME, 0);
1574 	YWRITE4(sc, YDS_DAC_REC_VOLUME, 0);
1575 	YWRITE4(sc, YDS_P44_REC_VOLUME, 0);
1576 
1577 	return 0;
1578 }
1579 
1580 static int
1581 yds_halt_output(void *addr)
1582 {
1583 	struct yds_softc *sc;
1584 
1585 	DPRINTF(("yds: yds_halt_output\n"));
1586 	sc = addr;
1587 	if (sc->sc_play.intr) {
1588 		sc->sc_play.intr = 0;
1589 		/* Sync play slot control data */
1590 		bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
1591 				sc->pbankoff,
1592 				sizeof(struct play_slot_ctrl_bank)*
1593 				    (*sc->ptbl)*N_PLAY_SLOT_CTRL_BANK,
1594 				BUS_DMASYNC_POSTWRITE|BUS_DMASYNC_POSTREAD);
1595 		/* Stop the play slot operation */
1596 		sc->pbankp[0]->status =
1597 		sc->pbankp[1]->status =
1598 		sc->pbankp[2]->status =
1599 		sc->pbankp[3]->status = 1;
1600 		/* Sync ring buffer */
1601 		bus_dmamap_sync(sc->sc_dmatag, sc->sc_play.dma->map,
1602 				0, sc->sc_play.length, BUS_DMASYNC_POSTWRITE);
1603 	}
1604 
1605 	return 0;
1606 }
1607 
1608 static int
1609 yds_halt_input(void *addr)
1610 {
1611 	struct yds_softc *sc;
1612 
1613 	DPRINTF(("yds: yds_halt_input\n"));
1614 	sc = addr;
1615 	sc->sc_rec.intr = NULL;
1616 	if (sc->sc_rec.intr) {
1617 		/* Stop the rec slot operation */
1618 		YWRITE4(sc, YDS_MAPOF_REC, 0);
1619 		sc->sc_rec.intr = 0;
1620 		/* Sync rec slot control data */
1621 		bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
1622 				sc->rbankoff,
1623 				sizeof(struct rec_slot_ctrl_bank)*
1624 				    N_REC_SLOT_CTRL*N_REC_SLOT_CTRL_BANK,
1625 				BUS_DMASYNC_POSTWRITE|BUS_DMASYNC_POSTREAD);
1626 		/* Sync ring buffer */
1627 		bus_dmamap_sync(sc->sc_dmatag, sc->sc_rec.dma->map,
1628 				0, sc->sc_rec.length, BUS_DMASYNC_POSTREAD);
1629 	}
1630 
1631 	return 0;
1632 }
1633 
1634 static int
1635 yds_getdev(void *addr, struct audio_device *retp)
1636 {
1637 
1638 	*retp = yds_device;
1639 	return 0;
1640 }
1641 
1642 static int
1643 yds_mixer_set_port(void *addr, mixer_ctrl_t *cp)
1644 {
1645 	struct yds_softc *sc;
1646 
1647 	sc = addr;
1648 	return sc->sc_codec[0].codec_if->vtbl->mixer_set_port(
1649 	    sc->sc_codec[0].codec_if, cp);
1650 }
1651 
1652 static int
1653 yds_mixer_get_port(void *addr, mixer_ctrl_t *cp)
1654 {
1655 	struct yds_softc *sc;
1656 
1657 	sc = addr;
1658 	return sc->sc_codec[0].codec_if->vtbl->mixer_get_port(
1659 	    sc->sc_codec[0].codec_if, cp);
1660 }
1661 
1662 static int
1663 yds_query_devinfo(void *addr, mixer_devinfo_t *dip)
1664 {
1665 	struct yds_softc *sc;
1666 
1667 	sc = addr;
1668 	return sc->sc_codec[0].codec_if->vtbl->query_devinfo(
1669 	    sc->sc_codec[0].codec_if, dip);
1670 }
1671 
1672 static void *
1673 yds_malloc(void *addr, int direction, size_t size)
1674 {
1675 	struct yds_softc *sc;
1676 	struct yds_dma *p;
1677 	int error;
1678 
1679 	p = kmem_alloc(sizeof(*p), KM_SLEEP);
1680 	sc = addr;
1681 	error = yds_allocmem(sc, size, 16, p);
1682 	if (error) {
1683 		kmem_free(p, sizeof(*p));
1684 		return NULL;
1685 	}
1686 	p->next = sc->sc_dmas;
1687 	sc->sc_dmas = p;
1688 	return KERNADDR(p);
1689 }
1690 
1691 static void
1692 yds_free(void *addr, void *ptr, size_t size)
1693 {
1694 	struct yds_softc *sc;
1695 	struct yds_dma **pp, *p;
1696 
1697 	sc = addr;
1698 	for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
1699 		if (KERNADDR(p) == ptr) {
1700 			yds_freemem(sc, p);
1701 			*pp = p->next;
1702 			kmem_free(p, sizeof(*p));
1703 			return;
1704 		}
1705 	}
1706 }
1707 
1708 static struct yds_dma *
1709 yds_find_dma(struct yds_softc *sc, void *addr)
1710 {
1711 	struct yds_dma *p;
1712 
1713 	for (p = sc->sc_dmas; p && KERNADDR(p) != addr; p = p->next)
1714 		continue;
1715 
1716 	return p;
1717 }
1718 
1719 static size_t
1720 yds_round_buffersize(void *addr, int direction, size_t size)
1721 {
1722 
1723 	/*
1724 	 * Buffer size should be at least twice as bigger as a frame.
1725 	 */
1726 	if (size < 1024 * 3)
1727 		size = 1024 * 3;
1728 	return size;
1729 }
1730 
1731 static paddr_t
1732 yds_mappage(void *addr, void *mem, off_t off, int prot)
1733 {
1734 	struct yds_softc *sc;
1735 	struct yds_dma *p;
1736 
1737 	if (off < 0)
1738 		return -1;
1739 	sc = addr;
1740 	p = yds_find_dma(sc, mem);
1741 	if (p == NULL)
1742 		return -1;
1743 	return bus_dmamem_mmap(sc->sc_dmatag, p->segs, p->nsegs,
1744 	    off, prot, BUS_DMA_WAITOK);
1745 }
1746 
1747 static int
1748 yds_get_props(void *addr)
1749 {
1750 
1751 	return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT |
1752 	    AUDIO_PROP_FULLDUPLEX;
1753 }
1754 
1755 static void
1756 yds_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread)
1757 {
1758 	struct yds_softc *sc;
1759 
1760 	sc = addr;
1761 	*intr = &sc->sc_intr_lock;
1762 	*thread = &sc->sc_lock;
1763 }
1764