xref: /netbsd-src/sys/dev/pci/yds.c (revision 181254a7b1bdde6873432bffef2d2decc4b5c22f)
1 /*	$NetBSD: yds.c,v 1.65 2020/02/29 05:51:11 isaki Exp $	*/
2 
3 /*
4  * Copyright (c) 2000, 2001 Kazuki Sakamoto and Minoura Makoto.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 /*
29  * Yamaha YMF724[B-F]/740[B-C]/744/754
30  *
31  * Documentation links:
32  * - ftp://ftp.alsa-project.org/pub/manuals/yamaha/
33  * - ftp://ftp.alsa-project.org/pub/manuals/yamaha/pci/
34  *
35  * TODO:
36  * - FM synth volume (difficult: mixed before ac97)
37  * - Digital in/out (SPDIF) support
38  * - Effect??
39  */
40 
41 #include <sys/cdefs.h>
42 __KERNEL_RCSID(0, "$NetBSD: yds.c,v 1.65 2020/02/29 05:51:11 isaki Exp $");
43 
44 #include "mpu.h"
45 
46 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/kernel.h>
49 #include <sys/fcntl.h>
50 #include <sys/kmem.h>
51 #include <sys/device.h>
52 #include <sys/proc.h>
53 
54 #include <dev/pci/pcidevs.h>
55 #include <dev/pci/pcireg.h>
56 #include <dev/pci/pcivar.h>
57 
58 #include <sys/audioio.h>
59 #include <dev/audio/audio_if.h>
60 #include <dev/ic/ac97reg.h>
61 #include <dev/ic/ac97var.h>
62 #include <dev/ic/mpuvar.h>
63 
64 #include <sys/bus.h>
65 #include <sys/intr.h>
66 
67 #include <dev/microcode/yds/yds_hwmcode.h>
68 #include <dev/pci/ydsreg.h>
69 #include <dev/pci/ydsvar.h>
70 
71 /* Debug */
72 #undef YDS_USE_REC_SLOT
73 #define YDS_USE_P44
74 
75 #ifdef AUDIO_DEBUG
76 # define DPRINTF(x)	if (ydsdebug) printf x
77 # define DPRINTFN(n,x)	if (ydsdebug>(n)) printf x
78 int	ydsdebug = 0;
79 #else
80 # define DPRINTF(x)
81 # define DPRINTFN(n,x)
82 #endif
83 #ifdef YDS_USE_REC_SLOT
84 # define YDS_INPUT_SLOT 0	/* REC slot = ADC + loopbacks */
85 #else
86 # define YDS_INPUT_SLOT 1	/* ADC slot */
87 #endif
88 
89 static int	yds_match(device_t, cfdata_t, void *);
90 static void	yds_attach(device_t, device_t, void *);
91 static int	yds_intr(void *);
92 
93 #define DMAADDR(p)	((p)->map->dm_segs[0].ds_addr)
94 #define KERNADDR(p)	((void *)((p)->addr))
95 
96 static int	yds_allocmem(struct yds_softc *, size_t, size_t,
97 			     struct yds_dma *);
98 static int	yds_freemem(struct yds_softc *, struct yds_dma *);
99 
100 #ifndef AUDIO_DEBUG
101 #define YWRITE1(sc, r, x) bus_space_write_1((sc)->memt, (sc)->memh, (r), (x))
102 #define YWRITE2(sc, r, x) bus_space_write_2((sc)->memt, (sc)->memh, (r), (x))
103 #define YWRITE4(sc, r, x) bus_space_write_4((sc)->memt, (sc)->memh, (r), (x))
104 #define YREAD1(sc, r)	bus_space_read_1((sc)->memt, (sc)->memh, (r))
105 #define YREAD2(sc, r)	bus_space_read_2((sc)->memt, (sc)->memh, (r))
106 #define YREAD4(sc, r)	bus_space_read_4((sc)->memt, (sc)->memh, (r))
107 #else
108 static uint16_t YREAD2(struct yds_softc *sc, bus_size_t r)
109 {
110 	DPRINTFN(5, (" YREAD2(0x%lX)\n", (unsigned long)r));
111 	return bus_space_read_2(sc->memt, sc->memh, r);
112 }
113 
114 static uint32_t YREAD4(struct yds_softc *sc, bus_size_t r)
115 {
116 	DPRINTFN(5, (" YREAD4(0x%lX)\n", (unsigned long)r));
117 	return bus_space_read_4(sc->memt, sc->memh, r);
118 }
119 
120 #ifdef notdef
121 static void YWRITE1(struct yds_softc *sc, bus_size_t r, uint8_t x)
122 {
123 	DPRINTFN(5, (" YWRITE1(0x%lX,0x%lX)\n", (unsigned long)r,
124 		     (unsigned long)x));
125 	bus_space_write_1(sc->memt, sc->memh, r, x);
126 }
127 #endif
128 
129 static void YWRITE2(struct yds_softc *sc, bus_size_t r, uint16_t x)
130 {
131 	DPRINTFN(5, (" YWRITE2(0x%lX,0x%lX)\n", (unsigned long)r,
132 		     (unsigned long)x));
133 	bus_space_write_2(sc->memt, sc->memh, r, x);
134 }
135 
136 static void YWRITE4(struct yds_softc *sc, bus_size_t r, uint32_t x)
137 {
138 	DPRINTFN(5, (" YWRITE4(0x%lX,0x%lX)\n", (unsigned long)r,
139 		     (unsigned long)x));
140 	bus_space_write_4(sc->memt, sc->memh, r, x);
141 }
142 #endif
143 
144 #define	YWRITEREGION4(sc, r, x, c)	\
145 	bus_space_write_region_4((sc)->memt, (sc)->memh, (r), (x), (c) / 4)
146 
147 CFATTACH_DECL_NEW(yds, sizeof(struct yds_softc),
148     yds_match, yds_attach, NULL, NULL);
149 
150 static int	yds_open(void *, int);
151 static void	yds_close(void *);
152 static int	yds_query_format(void *, audio_format_query_t *);
153 static int	yds_set_format(void *, int,
154 			       const audio_params_t *, const audio_params_t *,
155 			       audio_filter_reg_t *, audio_filter_reg_t *);
156 static int	yds_round_blocksize(void *, int, int, const audio_params_t *);
157 static int	yds_trigger_output(void *, void *, void *, int,
158 				   void (*)(void *), void *,
159 				   const audio_params_t *);
160 static int	yds_trigger_input(void *, void *, void *, int,
161 				  void (*)(void *), void *,
162 				  const audio_params_t *);
163 static int	yds_halt_output(void *);
164 static int	yds_halt_input(void *);
165 static int	yds_getdev(void *, struct audio_device *);
166 static int	yds_mixer_set_port(void *, mixer_ctrl_t *);
167 static int	yds_mixer_get_port(void *, mixer_ctrl_t *);
168 static void *	yds_malloc(void *, int, size_t);
169 static void	yds_free(void *, void *, size_t);
170 static size_t	yds_round_buffersize(void *, int, size_t);
171 static int	yds_get_props(void *);
172 static int	yds_query_devinfo(void *, mixer_devinfo_t *);
173 static void	yds_get_locks(void *, kmutex_t **, kmutex_t **);
174 
175 static int	yds_attach_codec(void *, struct ac97_codec_if *);
176 static int	yds_read_codec(void *, uint8_t, uint16_t *);
177 static int	yds_write_codec(void *, uint8_t, uint16_t);
178 static int	yds_reset_codec(void *);
179 
180 static u_int	yds_get_dstype(int);
181 static int	yds_download_mcode(struct yds_softc *);
182 static int	yds_allocate_slots(struct yds_softc *);
183 static void	yds_configure_legacy(device_t);
184 static void	yds_enable_dsp(struct yds_softc *);
185 static int	yds_disable_dsp(struct yds_softc *);
186 static int	yds_ready_codec(struct yds_codec_softc *);
187 static int	yds_halt(struct yds_softc *);
188 static uint32_t yds_get_lpfq(u_int);
189 static uint32_t yds_get_lpfk(u_int);
190 static struct yds_dma *yds_find_dma(struct yds_softc *, void *);
191 
192 static int	yds_init(struct yds_softc *);
193 
194 #ifdef AUDIO_DEBUG
195 static void	yds_dump_play_slot(struct yds_softc *, int);
196 #define	YDS_DUMP_PLAY_SLOT(n, sc, bank) \
197 	if (ydsdebug > (n)) yds_dump_play_slot(sc, bank)
198 #else
199 #define	YDS_DUMP_PLAY_SLOT(n, sc, bank)
200 #endif /* AUDIO_DEBUG */
201 
202 static const struct audio_hw_if yds_hw_if = {
203 	.open		  = yds_open,
204 	.close		  = yds_close,
205 	.query_format	  = yds_query_format,
206 	.set_format	  = yds_set_format,
207 	.round_blocksize  = yds_round_blocksize,
208 	.commit_settings  = NULL,
209 	.init_output	  = NULL,
210 	.init_input	  = NULL,
211 	.start_output	  = NULL,
212 	.start_input	  = NULL,
213 	.halt_output	  = yds_halt_output,
214 	.halt_input	  = yds_halt_input,
215 	.speaker_ctl	  = NULL,
216 	.getdev		  = yds_getdev,
217 	.set_port	  = yds_mixer_set_port,
218 	.get_port	  = yds_mixer_get_port,
219 	.query_devinfo	  = yds_query_devinfo,
220 	.allocm		  = yds_malloc,
221 	.freem		  = yds_free,
222 	.round_buffersize = yds_round_buffersize,
223 	.get_props	  = yds_get_props,
224 	.trigger_output	  = yds_trigger_output,
225 	.trigger_input	  = yds_trigger_input,
226 	.dev_ioctl	  = NULL,
227 	.get_locks	  = yds_get_locks,
228 };
229 
230 static const struct audio_device yds_device = {
231 	.name    = "Yamaha DS-1",
232 	.version = "",
233 	.config  = "yds"
234 };
235 
236 static const struct {
237 	uint	id;
238 	u_int	flags;
239 #define YDS_CAP_MCODE_1			0x0001
240 #define YDS_CAP_MCODE_1E		0x0002
241 #define YDS_CAP_LEGACY_SELECTABLE	0x0004
242 #define YDS_CAP_LEGACY_FLEXIBLE		0x0008
243 #define YDS_CAP_HAS_P44			0x0010
244 } yds_chip_capabliity_list[] = {
245 	{ PCI_PRODUCT_YAMAHA_YMF724,
246 	  YDS_CAP_MCODE_1|YDS_CAP_LEGACY_SELECTABLE },
247 	/* 740[C] has only 32 slots.  But anyway we use only 2 */
248 	{ PCI_PRODUCT_YAMAHA_YMF740,
249 	  YDS_CAP_MCODE_1|YDS_CAP_LEGACY_SELECTABLE },	/* XXX NOT TESTED */
250 	{ PCI_PRODUCT_YAMAHA_YMF740C,
251 	  YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_SELECTABLE },
252 	{ PCI_PRODUCT_YAMAHA_YMF724F,
253 	  YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_SELECTABLE },
254 	{ PCI_PRODUCT_YAMAHA_YMF744B,
255 	  YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_FLEXIBLE },
256 	{ PCI_PRODUCT_YAMAHA_YMF754,
257 	  YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_FLEXIBLE|YDS_CAP_HAS_P44 },
258 	{ 0, 0 }
259 };
260 #ifdef AUDIO_DEBUG
261 #define YDS_CAP_BITS	"\020\005P44\004LEGFLEX\003LEGSEL\002MCODE1E\001MCODE1"
262 #endif
263 
264 static const struct audio_format yds_formats[] = {
265 	{
266 		.mode		= AUMODE_PLAY | AUMODE_RECORD,
267 		.encoding	= AUDIO_ENCODING_SLINEAR_LE,
268 		.validbits	= 16,
269 		.precision	= 16,
270 		.channels	= 2,
271 		.channel_mask	= AUFMT_STEREO,
272 		.frequency_type	= 8,
273 		.frequency	=
274 		    { 5512, 8000, 11025, 16000, 22050, 32000, 44100, 48000 },
275 	},
276 };
277 #define	YDS_NFORMATS	(sizeof(yds_formats) / sizeof(struct audio_format))
278 
279 #ifdef AUDIO_DEBUG
280 static void
281 yds_dump_play_slot(struct yds_softc *sc, int bank)
282 {
283 	int i, j;
284 	uint32_t *p;
285 	uint32_t num;
286 	bus_addr_t pa;
287 
288 	for (i = 0; i < N_PLAY_SLOTS; i++) {
289 		printf("pbankp[%d] = %p,", i*2, sc->pbankp[i*2]);
290 		printf("pbankp[%d] = %p\n", i*2+1, sc->pbankp[i*2+1]);
291 	}
292 
293 	pa = DMAADDR(&sc->sc_ctrldata) + sc->pbankoff;
294 	p = sc->ptbl;
295 	printf("ptbl + 0: %d\n", *p++);
296 	for (i = 0; i < N_PLAY_SLOTS; i++) {
297 		printf("ptbl + %d: %#x, should be %#" PRIxPADDR "\n",
298 		       i+1, *p,
299 		       pa + i * sizeof(struct play_slot_ctrl_bank) *
300 				N_PLAY_SLOT_CTRL_BANK);
301 		p++;
302 	}
303 
304 	num = le32toh(*(uint32_t*)sc->ptbl);
305 	printf("numofplay = %d\n", num);
306 
307 	for (i = 0; i < num; i++) {
308 		p = (uint32_t *)sc->pbankp[i*2];
309 
310 		printf("  pbankp[%d], bank 0 : %p\n", i*2, p);
311 		for (j = 0;
312 		     j < sizeof(struct play_slot_ctrl_bank) / sizeof(uint32_t);
313 		     j++) {
314 			printf("    0x%02x: 0x%08x\n",
315 			       (unsigned)(j * sizeof(uint32_t)),
316 			       (unsigned)*p++);
317 		}
318 
319 		p = (uint32_t *)sc->pbankp[i*2 + 1];
320 		printf("  pbankp[%d], bank 1 : %p\n", i*2 + 1, p);
321 		for (j = 0;
322 		     j < sizeof(struct play_slot_ctrl_bank) / sizeof(uint32_t);
323 		     j++) {
324 			printf("    0x%02x: 0x%08x\n",
325 			       (unsigned)(j * sizeof(uint32_t)),
326 			       (unsigned)*p++);
327 		}
328 	}
329 }
330 #endif /* AUDIO_DEBUG */
331 
332 static u_int
333 yds_get_dstype(int id)
334 {
335 	int i;
336 
337 	for (i = 0; yds_chip_capabliity_list[i].id; i++) {
338 		if (PCI_PRODUCT(id) == yds_chip_capabliity_list[i].id)
339 			return yds_chip_capabliity_list[i].flags;
340 	}
341 
342 	return -1;
343 }
344 
345 static int
346 yds_download_mcode(struct yds_softc *sc)
347 {
348 	static struct {
349 		const uint32_t *mcode;
350 		size_t size;
351 	} ctrls[] = {
352 		{yds_ds1_ctrl_mcode, sizeof(yds_ds1_ctrl_mcode)},
353 		{yds_ds1e_ctrl_mcode, sizeof(yds_ds1e_ctrl_mcode)},
354 	};
355 	u_int ctrl;
356 	const uint32_t *p;
357 	size_t size;
358 	int dstype;
359 
360 	if (sc->sc_flags & YDS_CAP_MCODE_1)
361 		dstype = YDS_DS_1;
362 	else if (sc->sc_flags & YDS_CAP_MCODE_1E)
363 		dstype = YDS_DS_1E;
364 	else
365 		return 1;	/* unknown */
366 
367 	if (yds_disable_dsp(sc))
368 		return 1;
369 
370 	/* Software reset */
371 	YWRITE4(sc, YDS_MODE, YDS_MODE_RESET);
372 	YWRITE4(sc, YDS_MODE, 0);
373 
374 	YWRITE4(sc, YDS_MAPOF_REC, 0);
375 	YWRITE4(sc, YDS_MAPOF_EFFECT, 0);
376 	YWRITE4(sc, YDS_PLAY_CTRLBASE, 0);
377 	YWRITE4(sc, YDS_REC_CTRLBASE, 0);
378 	YWRITE4(sc, YDS_EFFECT_CTRLBASE, 0);
379 	YWRITE4(sc, YDS_WORK_BASE, 0);
380 
381 	ctrl = YREAD2(sc, YDS_GLOBAL_CONTROL);
382 	YWRITE2(sc, YDS_GLOBAL_CONTROL, ctrl & ~0x0007);
383 
384 	/* Download DSP microcode. */
385 	p = yds_dsp_mcode;
386 	size = sizeof(yds_dsp_mcode);
387 	YWRITEREGION4(sc, YDS_DSP_INSTRAM, p, size);
388 
389 	/* Download CONTROL microcode. */
390 	p = ctrls[dstype].mcode;
391 	size = ctrls[dstype].size;
392 	YWRITEREGION4(sc, YDS_CTRL_INSTRAM, p, size);
393 
394 	yds_enable_dsp(sc);
395 	delay(10 * 1000);		/* nessesary on my 724F (??) */
396 
397 	return 0;
398 }
399 
400 static int
401 yds_allocate_slots(struct yds_softc *sc)
402 {
403 	size_t pcs, rcs, ecs, ws, memsize;
404 	void *mp;
405 	uint32_t da;		/* DMA address */
406 	char *va;		/* KVA */
407 	off_t cb;
408 	int i;
409 	struct yds_dma *p;
410 
411 	/* Alloc DSP Control Data */
412 	pcs = YREAD4(sc, YDS_PLAY_CTRLSIZE) * sizeof(uint32_t);
413 	rcs = YREAD4(sc, YDS_REC_CTRLSIZE) * sizeof(uint32_t);
414 	ecs = YREAD4(sc, YDS_EFFECT_CTRLSIZE) * sizeof(uint32_t);
415 	ws = WORK_SIZE;
416 	YWRITE4(sc, YDS_WORK_SIZE, ws / sizeof(uint32_t));
417 
418 	DPRINTF(("play control size : %d\n", (unsigned int)pcs));
419 	DPRINTF(("rec control size : %d\n", (unsigned int)rcs));
420 	DPRINTF(("eff control size : %d\n", (unsigned int)ecs));
421 #ifndef AUDIO_DEBUG
422 	__USE(ecs);
423 #endif
424 	DPRINTF(("work size : %d\n", (unsigned int)ws));
425 #ifdef DIAGNOSTIC
426 	if (pcs != sizeof(struct play_slot_ctrl_bank)) {
427 		aprint_error_dev(sc->sc_dev, "invalid play slot ctrldata %d != %d\n",
428 		       (unsigned int)pcs,
429 		       (unsigned int)sizeof(struct play_slot_ctrl_bank));
430 	if (rcs != sizeof(struct rec_slot_ctrl_bank))
431 		aprint_error_dev(sc->sc_dev, "invalid rec slot ctrldata %d != %d\n",
432 		       (unsigned int)rcs,
433 		       (unsigned int)sizeof(struct rec_slot_ctrl_bank));
434 	}
435 #endif
436 
437 	memsize = N_PLAY_SLOTS*N_PLAY_SLOT_CTRL_BANK*pcs +
438 		  N_REC_SLOT_CTRL*N_REC_SLOT_CTRL_BANK*rcs + ws;
439 	memsize += (N_PLAY_SLOTS+1)*sizeof(uint32_t);
440 
441 	p = &sc->sc_ctrldata;
442 	if (KERNADDR(p) == NULL) {
443 		i = yds_allocmem(sc, memsize, 16, p);
444 		if (i) {
445 			aprint_error_dev(sc->sc_dev, "couldn't alloc/map DSP DMA buffer, reason %d\n", i);
446 			return 1;
447 		}
448 	}
449 	mp = KERNADDR(p);
450 	da = DMAADDR(p);
451 
452 	DPRINTF(("mp:%p, DMA addr:%#" PRIxPADDR "\n",
453 		 mp, sc->sc_ctrldata.map->dm_segs[0].ds_addr));
454 
455 	memset(mp, 0, memsize);
456 
457 	/* Work space */
458 	cb = 0;
459 	va = (uint8_t *)mp;
460 	YWRITE4(sc, YDS_WORK_BASE, da + cb);
461 	cb += ws;
462 
463 	/* Play control data table */
464 	sc->ptbl = (uint32_t *)(va + cb);
465 	sc->ptbloff = cb;
466 	YWRITE4(sc, YDS_PLAY_CTRLBASE, da + cb);
467 	cb += (N_PLAY_SLOT_CTRL + 1) * sizeof(uint32_t);
468 
469 	/* Record slot control data */
470 	sc->rbank = (struct rec_slot_ctrl_bank *)(va + cb);
471 	YWRITE4(sc, YDS_REC_CTRLBASE, da + cb);
472 	sc->rbankoff = cb;
473 	cb += N_REC_SLOT_CTRL * N_REC_SLOT_CTRL_BANK * rcs;
474 
475 #if 0
476 	/* Effect slot control data -- unused */
477 	YWRITE4(sc, YDS_EFFECT_CTRLBASE, da + cb);
478 	cb += N_EFFECT_SLOT_CTRL * N_EFFECT_SLOT_CTRL_BANK * ecs;
479 #endif
480 
481 	/* Play slot control data */
482 	sc->pbankoff = cb;
483 	for (i=0; i < N_PLAY_SLOT_CTRL; i++) {
484 		sc->pbankp[i*2] = (struct play_slot_ctrl_bank *)(va + cb);
485 		*(sc->ptbl + i+1) = htole32(da + cb);
486 		cb += pcs;
487 
488 		sc->pbankp[i*2+1] = (struct play_slot_ctrl_bank *)(va + cb);
489 		cb += pcs;
490 	}
491 	/* Sync play control data table */
492 	bus_dmamap_sync(sc->sc_dmatag, p->map,
493 			sc->ptbloff, (N_PLAY_SLOT_CTRL+1) * sizeof(uint32_t),
494 			BUS_DMASYNC_PREWRITE);
495 
496 	return 0;
497 }
498 
499 static void
500 yds_enable_dsp(struct yds_softc *sc)
501 {
502 
503 	YWRITE4(sc, YDS_CONFIG, YDS_DSP_SETUP);
504 }
505 
506 static int
507 yds_disable_dsp(struct yds_softc *sc)
508 {
509 	int to;
510 	uint32_t data;
511 
512 	data = YREAD4(sc, YDS_CONFIG);
513 	if (data)
514 		YWRITE4(sc, YDS_CONFIG, YDS_DSP_DISABLE);
515 
516 	for (to = 0; to < YDS_WORK_TIMEOUT; to++) {
517 		if ((YREAD4(sc, YDS_STATUS) & YDS_STAT_WORK) == 0)
518 			return 0;
519 		delay(1);
520 	}
521 
522 	return 1;
523 }
524 
525 static int
526 yds_match(device_t parent, cfdata_t match, void *aux)
527 {
528 	struct pci_attach_args *pa;
529 
530 	pa = (struct pci_attach_args *)aux;
531 	switch (PCI_VENDOR(pa->pa_id)) {
532 	case PCI_VENDOR_YAMAHA:
533 		switch (PCI_PRODUCT(pa->pa_id)) {
534 		case PCI_PRODUCT_YAMAHA_YMF724:
535 		case PCI_PRODUCT_YAMAHA_YMF740:
536 		case PCI_PRODUCT_YAMAHA_YMF740C:
537 		case PCI_PRODUCT_YAMAHA_YMF724F:
538 		case PCI_PRODUCT_YAMAHA_YMF744B:
539 		case PCI_PRODUCT_YAMAHA_YMF754:
540 			return 1;
541 		}
542 		break;
543 	}
544 
545 	return 0;
546 }
547 
548 /*
549  * This routine is called after all the ISA devices are configured,
550  * to avoid conflict.
551  */
552 static void
553 yds_configure_legacy(device_t self)
554 #define FLEXIBLE	(sc->sc_flags & YDS_CAP_LEGACY_FLEXIBLE)
555 #define SELECTABLE	(sc->sc_flags & YDS_CAP_LEGACY_SELECTABLE)
556 {
557 	static const bus_addr_t opl_addrs[] = {0x388, 0x398, 0x3A0, 0x3A8};
558 	static const bus_addr_t mpu_addrs[] = {0x330, 0x300, 0x332, 0x334};
559 	struct yds_softc *sc;
560 	pcireg_t reg;
561 	device_t dev;
562 	int i;
563 
564 	sc = device_private(self);
565 	if (!FLEXIBLE && !SELECTABLE)
566 		return;
567 
568 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY);
569 	reg &= ~0x8133c03f;	/* these bits are out of interest */
570 	reg |= ((YDS_PCI_EX_LEGACY_IMOD) |
571 		(YDS_PCI_LEGACY_FMEN |
572 		 YDS_PCI_LEGACY_MEN /*| YDS_PCI_LEGACY_MIEN*/));
573 	reg |= YDS_PCI_EX_LEGACY_SMOD_DISABLE;
574 	if (FLEXIBLE) {
575 		pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY, reg);
576 		delay(100*1000);
577 	}
578 
579 	/* Look for OPL */
580 	dev = 0;
581 	for (i = 0; i < sizeof(opl_addrs) / sizeof(bus_addr_t); i++) {
582 		if (SELECTABLE) {
583 			pci_conf_write(sc->sc_pc, sc->sc_pcitag,
584 				       YDS_PCI_LEGACY, reg | (i << (0+16)));
585 			delay(100*1000);	/* wait 100ms */
586 		} else
587 			pci_conf_write(sc->sc_pc, sc->sc_pcitag,
588 				       YDS_PCI_FM_BA, opl_addrs[i]);
589 		if (bus_space_map(sc->sc_opl_iot,
590 				  opl_addrs[i], 4, 0, &sc->sc_opl_ioh) == 0) {
591 			struct audio_attach_args aa;
592 
593 			aa.type = AUDIODEV_TYPE_OPL;
594 			aa.hwif = aa.hdl = NULL;
595 			dev = config_found(self, &aa, audioprint);
596 			if (dev == 0)
597 				bus_space_unmap(sc->sc_opl_iot,
598 						sc->sc_opl_ioh, 4);
599 			else {
600 				if (SELECTABLE)
601 					reg |= (i << (0+16));
602 				break;
603 			}
604 		}
605 	}
606 	if (dev == 0) {
607 		reg &= ~YDS_PCI_LEGACY_FMEN;
608 		pci_conf_write(sc->sc_pc, sc->sc_pcitag,
609 			       YDS_PCI_LEGACY, reg);
610 	} else {
611 		/* Max. volume */
612 		YWRITE4(sc, YDS_LEGACY_OUT_VOLUME, 0x3fff3fff);
613 		YWRITE4(sc, YDS_LEGACY_REC_VOLUME, 0x3fff3fff);
614 	}
615 
616 	/* Look for MPU */
617 	dev = NULL;
618 	for (i = 0; i < sizeof(mpu_addrs) / sizeof(bus_addr_t); i++) {
619 		if (SELECTABLE)
620 			pci_conf_write(sc->sc_pc, sc->sc_pcitag,
621 				       YDS_PCI_LEGACY, reg | (i << (4+16)));
622 		else
623 			pci_conf_write(sc->sc_pc, sc->sc_pcitag,
624 				       YDS_PCI_MPU_BA, mpu_addrs[i]);
625 		if (bus_space_map(sc->sc_mpu_iot,
626 				  mpu_addrs[i], 2, 0, &sc->sc_mpu_ioh) == 0) {
627 			struct audio_attach_args aa;
628 
629 			aa.type = AUDIODEV_TYPE_MPU;
630 			aa.hwif = aa.hdl = NULL;
631 			dev = config_found(self, &aa, audioprint);
632 			if (dev == 0)
633 				bus_space_unmap(sc->sc_mpu_iot,
634 						sc->sc_mpu_ioh, 2);
635 			else {
636 				if (SELECTABLE)
637 					reg |= (i << (4+16));
638 				break;
639 			}
640 		}
641 	}
642 	if (dev == 0) {
643 		reg &= ~(YDS_PCI_LEGACY_MEN | YDS_PCI_LEGACY_MIEN);
644 		pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY, reg);
645 	}
646 	sc->sc_mpu = dev;
647 }
648 #undef FLEXIBLE
649 #undef SELECTABLE
650 
651 static int
652 yds_init(struct yds_softc *sc)
653 {
654 	uint32_t reg;
655 
656 	DPRINTF(("yds_init()\n"));
657 
658 	/* Download microcode */
659 	if (yds_download_mcode(sc)) {
660 		aprint_error_dev(sc->sc_dev, "download microcode failed\n");
661 		return 1;
662 	}
663 
664 	/* Allocate DMA buffers */
665 	if (yds_allocate_slots(sc)) {
666 		aprint_error_dev(sc->sc_dev, "could not allocate slots\n");
667 		return 1;
668 	}
669 
670 	/* Warm reset */
671 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL);
672 	pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL,
673 		reg | YDS_DSCTRL_WRST);
674 	delay(50000);
675 
676 	return 0;
677 }
678 
679 static bool
680 yds_suspend(device_t dv, const pmf_qual_t *qual)
681 {
682 	struct yds_softc *sc = device_private(dv);
683 	pci_chipset_tag_t pc = sc->sc_pc;
684 	pcitag_t tag = sc->sc_pcitag;
685 
686 	mutex_enter(&sc->sc_lock);
687 	mutex_spin_enter(&sc->sc_intr_lock);
688 	sc->sc_enabled = 0;
689 	sc->sc_dsctrl = pci_conf_read(pc, tag, YDS_PCI_DSCTRL);
690 	sc->sc_legacy = pci_conf_read(pc, tag, YDS_PCI_LEGACY);
691 	sc->sc_ba[0] = pci_conf_read(pc, tag, YDS_PCI_FM_BA);
692 	sc->sc_ba[1] = pci_conf_read(pc, tag, YDS_PCI_MPU_BA);
693 	mutex_spin_exit(&sc->sc_intr_lock);
694 	mutex_exit(&sc->sc_lock);
695 
696 	return true;
697 }
698 
699 static bool
700 yds_resume(device_t dv, const pmf_qual_t *qual)
701 {
702 	struct yds_softc *sc = device_private(dv);
703 	pci_chipset_tag_t pc = sc->sc_pc;
704 	pcitag_t tag = sc->sc_pcitag;
705 	pcireg_t reg;
706 
707 	/* Disable legacy mode */
708 	mutex_enter(&sc->sc_lock);
709 	mutex_spin_enter(&sc->sc_intr_lock);
710 	reg = pci_conf_read(pc, tag, YDS_PCI_LEGACY);
711 	pci_conf_write(pc, tag, YDS_PCI_LEGACY, reg & YDS_PCI_LEGACY_LAD);
712 
713 	/* Enable the device. */
714 	reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
715 	reg |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
716 		PCI_COMMAND_MASTER_ENABLE);
717 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, reg);
718 	reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
719 	mutex_spin_exit(&sc->sc_intr_lock);
720 	if (yds_init(sc)) {
721 		aprint_error_dev(dv, "reinitialize failed\n");
722 		mutex_exit(&sc->sc_lock);
723 		return false;
724 	}
725 
726 	pci_conf_write(pc, tag, YDS_PCI_DSCTRL, sc->sc_dsctrl);
727 	sc->sc_enabled = 1;
728 	mutex_spin_exit(&sc->sc_intr_lock);
729 	sc->sc_codec[0].codec_if->vtbl->restore_ports(sc->sc_codec[0].codec_if);
730 	mutex_exit(&sc->sc_lock);
731 
732 	return true;
733 }
734 
735 static void
736 yds_attach(device_t parent, device_t self, void *aux)
737 {
738 	struct yds_softc *sc;
739 	struct pci_attach_args *pa;
740 	pci_chipset_tag_t pc;
741 	char const *intrstr;
742 	pci_intr_handle_t ih;
743 	pcireg_t reg;
744 	struct yds_codec_softc *codec;
745 	int i, r, to;
746 	int revision;
747 	int ac97_id2;
748 	char intrbuf[PCI_INTRSTR_LEN];
749 
750 	sc = device_private(self);
751 	sc->sc_dev = self;
752 	pa = (struct pci_attach_args *)aux;
753 	pc = pa->pa_pc;
754 	revision = PCI_REVISION(pa->pa_class);
755 
756 	pci_aprint_devinfo(pa, NULL);
757 
758 	/* Map register to memory */
759 	if (pci_mapreg_map(pa, YDS_PCI_MBA, PCI_MAPREG_TYPE_MEM, 0,
760 			   &sc->memt, &sc->memh, NULL, NULL)) {
761 		aprint_error_dev(self, "can't map memory space\n");
762 		return;
763 	}
764 
765 	/* Map and establish the interrupt. */
766 	if (pci_intr_map(pa, &ih)) {
767 		aprint_error_dev(self, "couldn't map interrupt\n");
768 		return;
769 	}
770 
771 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
772 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO);
773 
774 	intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
775 	sc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_AUDIO, yds_intr, sc,
776 	    device_xname(self));
777 	if (sc->sc_ih == NULL) {
778 		aprint_error_dev(self, "couldn't establish interrupt");
779 		if (intrstr != NULL)
780 			aprint_error(" at %s", intrstr);
781 		aprint_error("\n");
782 		mutex_destroy(&sc->sc_lock);
783 		mutex_destroy(&sc->sc_intr_lock);
784 		return;
785 	}
786 	aprint_normal_dev(self, "interrupting at %s\n", intrstr);
787 
788 	sc->sc_enabled = 0;
789 	sc->sc_dmatag = pa->pa_dmat;
790 	sc->sc_pc = pc;
791 	sc->sc_pcitag = pa->pa_tag;
792 	sc->sc_id = pa->pa_id;
793 	sc->sc_revision = revision;
794 	sc->sc_flags = yds_get_dstype(sc->sc_id);
795 #ifdef AUDIO_DEBUG
796 	if (ydsdebug) {
797 		char bits[80];
798 
799 		snprintb(bits, sizeof(bits), YDS_CAP_BITS, sc->sc_flags);
800 		printf("%s: chip has %s\n", device_xname(self), bits);
801 	}
802 #endif
803 
804 	/* Disable legacy mode */
805 	reg = pci_conf_read(pc, pa->pa_tag, YDS_PCI_LEGACY);
806 	pci_conf_write(pc, pa->pa_tag, YDS_PCI_LEGACY,
807 		       reg & YDS_PCI_LEGACY_LAD);
808 
809 	/* Enable the device. */
810 	reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
811 	reg |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
812 		PCI_COMMAND_MASTER_ENABLE);
813 	pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
814 	reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
815 
816 	/* Mute all volumes */
817 	for (i = 0x80; i < 0xc0; i += 2)
818 		YWRITE2(sc, i, 0);
819 
820 	/* Initialize the device */
821 	if (yds_init(sc)) {
822 		aprint_error_dev(self, "initialize failed\n");
823 		mutex_destroy(&sc->sc_lock);
824 		mutex_destroy(&sc->sc_intr_lock);
825 		return;
826 	}
827 
828 	/*
829 	 * Detect primary/secondary AC97
830 	 *	YMF754 Hardware Specification Rev 1.01 page 24
831 	 */
832 	reg = pci_conf_read(pc, pa->pa_tag, YDS_PCI_DSCTRL);
833 	pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg & ~YDS_DSCTRL_CRST);
834 	delay(400000);		/* Needed for 740C. */
835 
836 	/* Primary */
837 	for (to = 0; to < AC97_TIMEOUT; to++) {
838 		if ((YREAD2(sc, AC97_STAT_ADDR1) & AC97_BUSY) == 0)
839 			break;
840 		delay(1);
841 	}
842 	if (to == AC97_TIMEOUT) {
843 		aprint_error_dev(self, "no AC97 available\n");
844 		mutex_destroy(&sc->sc_lock);
845 		mutex_destroy(&sc->sc_intr_lock);
846 		return;
847 	}
848 
849 	/* Secondary */
850 	/* Secondary AC97 is used for 4ch audio. Currently unused. */
851 	ac97_id2 = -1;
852 	if ((YREAD2(sc, YDS_ACTIVITY) & YDS_ACTIVITY_DOCKA) == 0)
853 		goto detected;
854 #if 0				/* reset secondary... */
855 	YWRITE2(sc, YDS_GPIO_OCTRL,
856 		YREAD2(sc, YDS_GPIO_OCTRL) & ~YDS_GPIO_GPO2);
857 	YWRITE2(sc, YDS_GPIO_FUNCE,
858 		(YREAD2(sc, YDS_GPIO_FUNCE)&(~YDS_GPIO_GPC2))|YDS_GPIO_GPE2);
859 #endif
860 	for (to = 0; to < AC97_TIMEOUT; to++) {
861 		if ((YREAD2(sc, AC97_STAT_ADDR2) & AC97_BUSY) == 0)
862 			break;
863 		delay(1);
864 	}
865 	if (to < AC97_TIMEOUT) {
866 		/* detect id */
867 		for (ac97_id2 = 1; ac97_id2 < 4; ac97_id2++) {
868 			YWRITE2(sc, AC97_CMD_ADDR,
869 				AC97_CMD_READ | AC97_ID(ac97_id2) | 0x28);
870 
871 			for (to = 0; to < AC97_TIMEOUT; to++) {
872 				if ((YREAD2(sc, AC97_STAT_ADDR2) & AC97_BUSY)
873 				    == 0)
874 					goto detected;
875 				delay(1);
876 			}
877 		}
878 		if (ac97_id2 == 4)
879 			ac97_id2 = -1;
880 detected:
881 		;
882 	}
883 
884 	pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg | YDS_DSCTRL_CRST);
885 	delay (20);
886 	pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg & ~YDS_DSCTRL_CRST);
887 	delay (400000);
888 	for (to = 0; to < AC97_TIMEOUT; to++) {
889 		if ((YREAD2(sc, AC97_STAT_ADDR1) & AC97_BUSY) == 0)
890 			break;
891 		delay(1);
892 	}
893 
894 	/*
895 	 * Attach ac97 codec
896 	 */
897 	for (i = 0; i < 2; i++) {
898 		static struct {
899 			int data;
900 			int addr;
901 		} statregs[] = {
902 			{AC97_STAT_DATA1, AC97_STAT_ADDR1},
903 			{AC97_STAT_DATA2, AC97_STAT_ADDR2},
904 		};
905 
906 		if (i == 1 && ac97_id2 == -1)
907 			break;		/* secondary ac97 not available */
908 
909 		codec = &sc->sc_codec[i];
910 		codec->sc = sc;
911 		codec->id = i == 1 ? ac97_id2 : 0;
912 		codec->status_data = statregs[i].data;
913 		codec->status_addr = statregs[i].addr;
914 		codec->host_if.arg = codec;
915 		codec->host_if.attach = yds_attach_codec;
916 		codec->host_if.read = yds_read_codec;
917 		codec->host_if.write = yds_write_codec;
918 		codec->host_if.reset = yds_reset_codec;
919 
920 		r = ac97_attach(&codec->host_if, self, &sc->sc_lock);
921 		if (r != 0) {
922 			aprint_error_dev(self,
923 			    "can't attach codec (error 0x%X)\n", r);
924 			mutex_destroy(&sc->sc_lock);
925 			mutex_destroy(&sc->sc_intr_lock);
926 			return;
927 		}
928 	}
929 
930 	audio_attach_mi(&yds_hw_if, sc, self);
931 
932 	sc->sc_legacy_iot = pa->pa_iot;
933 	config_defer(self, yds_configure_legacy);
934 
935 	if (!pmf_device_register(self, yds_suspend, yds_resume))
936 		aprint_error_dev(self, "couldn't establish power handler\n");
937 
938 	mutex_spin_enter(&sc->sc_intr_lock);
939 	sc->sc_enabled = 1;
940 	mutex_spin_exit(&sc->sc_intr_lock);
941 }
942 
943 static int
944 yds_attach_codec(void *sc_, struct ac97_codec_if *codec_if)
945 {
946 	struct yds_codec_softc *sc;
947 
948 	sc = sc_;
949 	sc->codec_if = codec_if;
950 	return 0;
951 }
952 
953 static int
954 yds_ready_codec(struct yds_codec_softc *sc)
955 {
956 	int to;
957 
958 	for (to = 0; to < AC97_TIMEOUT; to++) {
959 		if ((YREAD2(sc->sc, sc->status_addr) & AC97_BUSY) == 0)
960 			return 0;
961 		delay(1);
962 	}
963 
964 	return 1;
965 }
966 
967 static int
968 yds_read_codec(void *sc_, uint8_t reg, uint16_t *data)
969 {
970 	struct yds_codec_softc *sc;
971 
972 	sc = sc_;
973 	YWRITE2(sc->sc, AC97_CMD_ADDR, AC97_CMD_READ | AC97_ID(sc->id) | reg);
974 
975 	if (yds_ready_codec(sc)) {
976 		aprint_error_dev(sc->sc->sc_dev, "yds_read_codec timeout\n");
977 		return EIO;
978 	}
979 
980 	if (PCI_PRODUCT(sc->sc->sc_id) == PCI_PRODUCT_YAMAHA_YMF744B &&
981 	    sc->sc->sc_revision < 2) {
982 		int i;
983 		for (i=0; i<600; i++)
984 			(void)YREAD2(sc->sc, sc->status_data);
985 	}
986 
987 	*data = YREAD2(sc->sc, sc->status_data);
988 
989 	return 0;
990 }
991 
992 static int
993 yds_write_codec(void *sc_, uint8_t reg, uint16_t data)
994 {
995 	struct yds_codec_softc *sc;
996 
997 	sc = sc_;
998 	YWRITE2(sc->sc, AC97_CMD_ADDR, AC97_CMD_WRITE | AC97_ID(sc->id) | reg);
999 	YWRITE2(sc->sc, AC97_CMD_DATA, data);
1000 
1001 	if (yds_ready_codec(sc)) {
1002 		aprint_error_dev(sc->sc->sc_dev, "yds_write_codec timeout\n");
1003 		return EIO;
1004 	}
1005 
1006 	return 0;
1007 }
1008 
1009 /*
1010  * XXX: Must handle the secondary differntly!!
1011  */
1012 static int
1013 yds_reset_codec(void *sc_)
1014 {
1015 	struct yds_codec_softc *codec;
1016 	struct yds_softc *sc;
1017 	pcireg_t reg;
1018 
1019 	codec = sc_;
1020 	sc = codec->sc;
1021 	/* reset AC97 codec */
1022 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL);
1023 	if (reg & 0x03) {
1024 		pci_conf_write(sc->sc_pc, sc->sc_pcitag,
1025 			       YDS_PCI_DSCTRL, reg & ~0x03);
1026 		pci_conf_write(sc->sc_pc, sc->sc_pcitag,
1027 			       YDS_PCI_DSCTRL, reg | 0x03);
1028 		pci_conf_write(sc->sc_pc, sc->sc_pcitag,
1029 			       YDS_PCI_DSCTRL, reg & ~0x03);
1030 		delay(50000);
1031 	}
1032 
1033 	yds_ready_codec(sc_);
1034 	return 0;
1035 }
1036 
1037 static int
1038 yds_intr(void *p)
1039 {
1040 	struct yds_softc *sc = p;
1041 #if NMPU > 0
1042 	struct mpu_softc *sc_mpu = device_private(sc->sc_mpu);
1043 #endif
1044 	u_int status;
1045 
1046 	mutex_spin_enter(&sc->sc_intr_lock);
1047 	if (!sc->sc_enabled) {
1048 		mutex_spin_exit(&sc->sc_intr_lock);
1049 		return 0;
1050 	}
1051 
1052 	status = YREAD4(sc, YDS_STATUS);
1053 	DPRINTFN(1, ("yds_intr: status=%08x\n", status));
1054 	if ((status & (YDS_STAT_INT|YDS_STAT_TINT)) == 0) {
1055 #if NMPU > 0
1056 		if (sc_mpu)
1057 			return mpu_intr(sc_mpu);
1058 #endif
1059 		mutex_spin_exit(&sc->sc_intr_lock);
1060 		return 0;
1061 	}
1062 
1063 	if (status & YDS_STAT_TINT) {
1064 		YWRITE4(sc, YDS_STATUS, YDS_STAT_TINT);
1065 		printf ("yds_intr: timeout!\n");
1066 	}
1067 
1068 	/*
1069 	 * XXX
1070 	 * An interrupt in YMF754 occurs when next hardware frame is
1071 	 * requested, not when current hardware frame processing is
1072 	 * completed.  According to the datasheet, only access to the
1073 	 * inactive bank is permitted, but in fact, fields in inactive
1074 	 * bank that the chip should write to may or may not be filled
1075 	 * at that time.  On the other hand, both the CPU and the device
1076 	 * must guarantee that the fields in active bank are determined
1077 	 * at the beginning of the interrupt.
1078 	 * Therefore, we read active bank.
1079 	 */
1080 
1081 	if (status & YDS_STAT_INT) {
1082 		int nbank;
1083 		u_int pdma = 0;
1084 		u_int rdma = 0;
1085 
1086 		/* nbank is bank number that YDS is processing now. */
1087 		nbank = YREAD4(sc, YDS_CONTROL_SELECT) & 1;
1088 
1089 		/* Clear interrupt flag */
1090 		YWRITE4(sc, YDS_STATUS, YDS_STAT_INT);
1091 
1092 		/* Read current data offset before ACTV2 */
1093 		if (sc->sc_play.intr) {
1094 			/* Sync play slot control data */
1095 			bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
1096 					sc->pbankoff,
1097 					sizeof(struct play_slot_ctrl_bank)*
1098 					    le32toh(*sc->ptbl)*
1099 					    N_PLAY_SLOT_CTRL_BANK,
1100 					BUS_DMASYNC_POSTWRITE|
1101 					BUS_DMASYNC_POSTREAD);
1102 			/* start offset of current processing bank */
1103 			pdma = le32toh(sc->pbankp[nbank]->pgstart) *
1104 			    sc->sc_play.factor;
1105 		}
1106 
1107 		if (sc->sc_rec.intr) {
1108 			/* Sync rec slot control data */
1109 			bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
1110 					sc->rbankoff,
1111 					sizeof(struct rec_slot_ctrl_bank)*
1112 					    N_REC_SLOT_CTRL*
1113 					    N_REC_SLOT_CTRL_BANK,
1114 					BUS_DMASYNC_POSTWRITE|
1115 					BUS_DMASYNC_POSTREAD);
1116 			/* start offset of current processing bank */
1117 			rdma = le32toh(
1118 			    sc->rbank[YDS_INPUT_SLOT * 2 + nbank].pgstartadr);
1119 		}
1120 
1121 		/* Buffer for the next frame is always ready. */
1122 		YWRITE4(sc, YDS_MODE, YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV2);
1123 
1124 		if (sc->sc_play.intr) {
1125 			if (pdma < sc->sc_play.offset)
1126 				pdma += sc->sc_play.length;
1127 			if (pdma >= sc->sc_play.offset + sc->sc_play.blksize) {
1128 				/* We can fill the next block */
1129 				/* Sync ring buffer for previous write */
1130 				bus_dmamap_sync(sc->sc_dmatag,
1131 						sc->sc_play.dma->map,
1132 						0, sc->sc_play.length,
1133 						BUS_DMASYNC_POSTWRITE);
1134 				sc->sc_play.intr(sc->sc_play.intr_arg);
1135 				sc->sc_play.offset += sc->sc_play.blksize;
1136 				if (sc->sc_play.offset >= sc->sc_play.length) {
1137 					sc->sc_play.offset -= sc->sc_play.length;
1138 #ifdef DIAGNOSTIC
1139 					if (sc->sc_play.offset != 0)
1140 						printf ("Audio ringbuffer botch\n");
1141 #endif
1142 				}
1143 				/* Sync ring buffer for next write */
1144 				bus_dmamap_sync(sc->sc_dmatag,
1145 						sc->sc_play.dma->map,
1146 						0, sc->sc_play.length,
1147 						BUS_DMASYNC_PREWRITE);
1148 			}
1149 		}
1150 		if (sc->sc_rec.intr) {
1151 			if (rdma < sc->sc_rec.offset)
1152 				rdma += sc->sc_rec.length;
1153 			if (rdma >= sc->sc_rec.offset + sc->sc_rec.blksize) {
1154 				/* We can drain the current block */
1155 				/* Sync ring buffer first */
1156 				bus_dmamap_sync(sc->sc_dmatag,
1157 						sc->sc_rec.dma->map,
1158 						0, sc->sc_rec.length,
1159 						BUS_DMASYNC_POSTREAD);
1160 				sc->sc_rec.intr(sc->sc_rec.intr_arg);
1161 				sc->sc_rec.offset += sc->sc_rec.blksize;
1162 				if (sc->sc_rec.offset >= sc->sc_rec.length) {
1163 					sc->sc_rec.offset -= sc->sc_rec.length;
1164 #ifdef DIAGNOSTIC
1165 					if (sc->sc_rec.offset != 0)
1166 						printf ("Audio ringbuffer botch\n");
1167 #endif
1168 				}
1169 				/* Sync ring buffer for next read */
1170 				bus_dmamap_sync(sc->sc_dmatag,
1171 						sc->sc_rec.dma->map,
1172 						0, sc->sc_rec.length,
1173 						BUS_DMASYNC_PREREAD);
1174 			}
1175 		}
1176 	}
1177 
1178 	mutex_spin_exit(&sc->sc_intr_lock);
1179 	return 1;
1180 }
1181 
1182 static int
1183 yds_allocmem(struct yds_softc *sc, size_t size, size_t align, struct yds_dma *p)
1184 {
1185 	int error;
1186 
1187 	p->size = size;
1188 	error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0,
1189 				 p->segs, sizeof(p->segs)/sizeof(p->segs[0]),
1190 				 &p->nsegs, BUS_DMA_WAITOK);
1191 	if (error)
1192 		return error;
1193 
1194 	error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size,
1195 			       &p->addr, BUS_DMA_WAITOK|BUS_DMA_COHERENT);
1196 	if (error)
1197 		goto free;
1198 
1199 	error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size,
1200 				  0, BUS_DMA_WAITOK, &p->map);
1201 	if (error)
1202 		goto unmap;
1203 
1204 	error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL,
1205 				BUS_DMA_WAITOK);
1206 	if (error)
1207 		goto destroy;
1208 	return 0;
1209 
1210 destroy:
1211 	bus_dmamap_destroy(sc->sc_dmatag, p->map);
1212 unmap:
1213 	bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
1214 free:
1215 	bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
1216 	return error;
1217 }
1218 
1219 static int
1220 yds_freemem(struct yds_softc *sc, struct yds_dma *p)
1221 {
1222 
1223 	bus_dmamap_unload(sc->sc_dmatag, p->map);
1224 	bus_dmamap_destroy(sc->sc_dmatag, p->map);
1225 	bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
1226 	bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
1227 	return 0;
1228 }
1229 
1230 static int
1231 yds_open(void *addr, int flags)
1232 {
1233 	struct yds_softc *sc;
1234 	uint32_t mode;
1235 
1236 	sc = addr;
1237 	/* Select bank 0. */
1238 	YWRITE4(sc, YDS_CONTROL_SELECT, 0);
1239 
1240 	/* Start the DSP operation. */
1241 	mode = YREAD4(sc, YDS_MODE);
1242 	mode |= YDS_MODE_ACTV;
1243 	mode &= ~YDS_MODE_ACTV2;
1244 	YWRITE4(sc, YDS_MODE, mode);
1245 
1246 	return 0;
1247 }
1248 
1249 static void
1250 yds_close(void *addr)
1251 {
1252 
1253 	yds_halt(addr);
1254 }
1255 
1256 static int
1257 yds_query_format(void *addr, audio_format_query_t *afp)
1258 {
1259 
1260 	return audio_query_format(yds_formats, YDS_NFORMATS, afp);
1261 }
1262 
1263 static int
1264 yds_set_format(void *addr, int setmode,
1265 	const audio_params_t *play, const audio_params_t *rec,
1266 	audio_filter_reg_t *pfil, audio_filter_reg_t *rfil)
1267 {
1268 	return 0;
1269 }
1270 
1271 static int
1272 yds_round_blocksize(void *addr, int blk, int mode,
1273     const audio_params_t *param)
1274 {
1275 
1276 	/*
1277 	 * Block size must be bigger than a frame.
1278 	 * That is 1024bytes at most, i.e. for 48000Hz, 16bit, 2ch.
1279 	 */
1280 	if (blk < 1024)
1281 		blk = 1024;
1282 
1283 	return blk;
1284 }
1285 
1286 static uint32_t
1287 yds_get_lpfq(u_int sample_rate)
1288 {
1289 	int i;
1290 	static struct lpfqt {
1291 		u_int rate;
1292 		uint32_t lpfq;
1293 	} lpfqt[] = {
1294 		{8000,  0x32020000},
1295 		{11025, 0x31770000},
1296 		{16000, 0x31390000},
1297 		{22050, 0x31c90000},
1298 		{32000, 0x33d00000},
1299 		{48000, 0x40000000},
1300 		{0, 0}
1301 	};
1302 
1303 	if (sample_rate == 44100)		/* for P44 slot? */
1304 		return 0x370A0000;
1305 
1306 	for (i = 0; lpfqt[i].rate != 0; i++)
1307 		if (sample_rate <= lpfqt[i].rate)
1308 			break;
1309 
1310 	return lpfqt[i].lpfq;
1311 }
1312 
1313 static uint32_t
1314 yds_get_lpfk(u_int sample_rate)
1315 {
1316 	int i;
1317 	static struct lpfkt {
1318 		u_int rate;
1319 		uint32_t lpfk;
1320 	} lpfkt[] = {
1321 		{8000,  0x18b20000},
1322 		{11025, 0x20930000},
1323 		{16000, 0x2b9a0000},
1324 		{22050, 0x35a10000},
1325 		{32000, 0x3eaa0000},
1326 		{48000, 0x40000000},
1327 		{0, 0}
1328 	};
1329 
1330 	if (sample_rate == 44100)		/* for P44 slot? */
1331 		return 0x46460000;
1332 
1333 	for (i = 0; lpfkt[i].rate != 0; i++)
1334 		if (sample_rate <= lpfkt[i].rate)
1335 			break;
1336 
1337 	return lpfkt[i].lpfk;
1338 }
1339 
1340 static int
1341 yds_trigger_output(void *addr, void *start, void *end, int blksize,
1342 		   void (*intr)(void *), void *arg, const audio_params_t *param)
1343 #define P44		(sc->sc_flags & YDS_CAP_HAS_P44)
1344 {
1345 	struct yds_softc *sc;
1346 	struct yds_dma *p;
1347 	struct play_slot_ctrl_bank *psb;
1348 	const u_int gain = 0x40000000;
1349 	bus_addr_t s;
1350 	size_t l;
1351 	int i;
1352 	int p44, channels;
1353 	uint32_t format;
1354 
1355 	sc = addr;
1356 #ifdef DIAGNOSTIC
1357 	if (sc->sc_play.intr)
1358 		panic("yds_trigger_output: already running");
1359 #endif
1360 
1361 	sc->sc_play.intr = intr;
1362 	sc->sc_play.intr_arg = arg;
1363 	sc->sc_play.offset = 0;
1364 	sc->sc_play.blksize = blksize;
1365 
1366 	DPRINTFN(1, ("yds_trigger_output: sc=%p start=%p end=%p "
1367 	    "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg));
1368 
1369 	p = yds_find_dma(sc, start);
1370 	if (!p) {
1371 		printf("yds_trigger_output: bad addr %p\n", start);
1372 		return EINVAL;
1373 	}
1374 	sc->sc_play.dma = p;
1375 
1376 #ifdef YDS_USE_P44
1377 	/* The document says the P44 SRC supports only stereo, 16bit PCM. */
1378 	if (P44)
1379 		p44 = ((param->sample_rate == 44100) &&
1380 		       (param->channels == 2) &&
1381 		       (param->precision == 16));
1382 	else
1383 #endif
1384 		p44 = 0;
1385 	channels = p44 ? 1 : param->channels;
1386 
1387 	s = DMAADDR(p);
1388 	l = ((char *)end - (char *)start);
1389 	sc->sc_play.length = l;
1390 
1391 	*sc->ptbl = htole32(channels);	/* Num of play */
1392 
1393 	sc->sc_play.factor = 1;
1394 	if (param->channels == 2)
1395 		sc->sc_play.factor *= 2;
1396 	if (param->precision != 8)
1397 		sc->sc_play.factor *= 2;
1398 	l /= sc->sc_play.factor;
1399 
1400 	format = ((channels == 2 ? PSLT_FORMAT_STEREO : 0) |
1401 		  (param->precision == 8 ? PSLT_FORMAT_8BIT : 0) |
1402 		  (p44 ? PSLT_FORMAT_SRC441 : 0));
1403 
1404 	psb = sc->pbankp[0];
1405 	memset(psb, 0, sizeof(*psb));
1406 	psb->format = htole32(format);
1407 	psb->pgbase = htole32(s);
1408 	psb->pgloopend = htole32(l);
1409 	if (!p44) {
1410 		psb->pgdeltaend = htole32((param->sample_rate * 65536 / 48000) << 12);
1411 		psb->lpfkend = htole32(yds_get_lpfk(param->sample_rate));
1412 		psb->eggainend = htole32(gain);
1413 		psb->lpfq = htole32(yds_get_lpfq(param->sample_rate));
1414 		psb->pgdelta = htole32(psb->pgdeltaend);
1415 		psb->lpfk = htole32(yds_get_lpfk(param->sample_rate));
1416 		psb->eggain = htole32(gain);
1417 	}
1418 
1419 	for (i = 0; i < channels; i++) {
1420 		/* i == 0: left or mono, i == 1: right */
1421 		psb = sc->pbankp[i*2];
1422 		if (i)
1423 			/* copy from left */
1424 			*psb = *(sc->pbankp[0]);
1425 		if (channels == 2) {
1426 			/* stereo */
1427 			if (i == 0) {
1428 				psb->lchgain = psb->lchgainend = htole32(gain);
1429 			} else {
1430 				psb->lchgain = psb->lchgainend = 0;
1431 				psb->rchgain = psb->rchgainend = htole32(gain);
1432 				psb->format |= htole32(PSLT_FORMAT_RCH);
1433 			}
1434 		} else if (!p44) {
1435 			/* mono */
1436 			psb->lchgain = psb->rchgain = htole32(gain);
1437 			psb->lchgainend = psb->rchgainend = htole32(gain);
1438 		}
1439 		/* copy to the other bank */
1440 		*(sc->pbankp[i*2+1]) = *psb;
1441 	}
1442 
1443 	YDS_DUMP_PLAY_SLOT(5, sc, 0);
1444 	YDS_DUMP_PLAY_SLOT(5, sc, 1);
1445 
1446 	if (p44)
1447 		YWRITE4(sc, YDS_P44_OUT_VOLUME, 0x3fff3fff);
1448 	else
1449 		YWRITE4(sc, YDS_DAC_OUT_VOLUME, 0x3fff3fff);
1450 
1451 	/* Now the play slot for the next frame is set up!! */
1452 	/* Sync play slot control data for both directions */
1453 	bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
1454 			sc->pbankoff,
1455 			sizeof(struct play_slot_ctrl_bank) *
1456 			    channels * N_PLAY_SLOT_CTRL_BANK,
1457 			BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
1458 	/* Sync ring buffer */
1459 	bus_dmamap_sync(sc->sc_dmatag, p->map, 0, blksize,
1460 			BUS_DMASYNC_PREWRITE);
1461 	/* HERE WE GO!! */
1462 	YWRITE4(sc, YDS_MODE,
1463 		YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV | YDS_MODE_ACTV2);
1464 
1465 	return 0;
1466 }
1467 #undef P44
1468 
1469 static int
1470 yds_trigger_input(void *addr, void *start, void *end, int blksize,
1471 		  void (*intr)(void *), void *arg, const audio_params_t *param)
1472 {
1473 	struct yds_softc *sc;
1474 	struct yds_dma *p;
1475 	u_int srate, format;
1476 	struct rec_slot_ctrl_bank *rsb;
1477 	bus_addr_t s;
1478 	size_t l;
1479 
1480 	sc = addr;
1481 #ifdef DIAGNOSTIC
1482 	if (sc->sc_rec.intr)
1483 		panic("yds_trigger_input: already running");
1484 #endif
1485 	sc->sc_rec.intr = intr;
1486 	sc->sc_rec.intr_arg = arg;
1487 	sc->sc_rec.offset = 0;
1488 	sc->sc_rec.blksize = blksize;
1489 
1490 	DPRINTFN(1, ("yds_trigger_input: "
1491 	    "sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
1492 	    addr, start, end, blksize, intr, arg));
1493 	DPRINTFN(1, (" parameters: rate=%u, precision=%u, channels=%u\n",
1494 	    param->sample_rate, param->precision, param->channels));
1495 
1496 	p = yds_find_dma(sc, start);
1497 	if (!p) {
1498 		printf("yds_trigger_input: bad addr %p\n", start);
1499 		return EINVAL;
1500 	}
1501 	sc->sc_rec.dma = p;
1502 
1503 	s = DMAADDR(p);
1504 	l = ((char *)end - (char *)start);
1505 	sc->sc_rec.length = l;
1506 
1507 	sc->sc_rec.factor = 1;
1508 	if (param->channels == 2)
1509 		sc->sc_rec.factor *= 2;
1510 	if (param->precision != 8)
1511 		sc->sc_rec.factor *= 2;
1512 
1513 	rsb = &sc->rbank[0];
1514 	memset(rsb, 0, sizeof(*rsb));
1515 	rsb->pgbase = htole32(s);
1516 	rsb->pgloopendadr = htole32(l);
1517 	/* Seems all 4 banks must be set up... */
1518 	sc->rbank[1] = *rsb;
1519 	sc->rbank[2] = *rsb;
1520 	sc->rbank[3] = *rsb;
1521 
1522 	YWRITE4(sc, YDS_ADC_IN_VOLUME, 0x3fff3fff);
1523 	YWRITE4(sc, YDS_REC_IN_VOLUME, 0x3fff3fff);
1524 	srate = 48000 * 4096 / param->sample_rate - 1;
1525 	format = ((param->precision == 8 ? YDS_FORMAT_8BIT : 0) |
1526 		  (param->channels == 2 ? YDS_FORMAT_STEREO : 0));
1527 	DPRINTF(("srate=%d, format=%08x\n", srate, format));
1528 #ifdef YDS_USE_REC_SLOT
1529 	YWRITE4(sc, YDS_DAC_REC_VOLUME, 0x3fff3fff);
1530 	YWRITE4(sc, YDS_P44_REC_VOLUME, 0x3fff3fff);
1531 	YWRITE4(sc, YDS_MAPOF_REC, YDS_RECSLOT_VALID);
1532 	YWRITE4(sc, YDS_REC_SAMPLE_RATE, srate);
1533 	YWRITE4(sc, YDS_REC_FORMAT, format);
1534 #else
1535 	YWRITE4(sc, YDS_MAPOF_REC, YDS_ADCSLOT_VALID);
1536 	YWRITE4(sc, YDS_ADC_SAMPLE_RATE, srate);
1537 	YWRITE4(sc, YDS_ADC_FORMAT, format);
1538 #endif
1539 	/* Now the rec slot for the next frame is set up!! */
1540 	/* Sync record slot control data */
1541 	bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
1542 			sc->rbankoff,
1543 			sizeof(struct rec_slot_ctrl_bank)*
1544 			    N_REC_SLOT_CTRL*
1545 			    N_REC_SLOT_CTRL_BANK,
1546 			BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
1547 	/* Sync ring buffer */
1548 	bus_dmamap_sync(sc->sc_dmatag, p->map, 0, blksize,
1549 			BUS_DMASYNC_PREREAD);
1550 	/* HERE WE GO!! */
1551 	YWRITE4(sc, YDS_MODE,
1552 		YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV | YDS_MODE_ACTV2);
1553 
1554 	return 0;
1555 }
1556 
1557 static int
1558 yds_halt(struct yds_softc *sc)
1559 {
1560 	uint32_t mode;
1561 
1562 	/* Stop the DSP operation. */
1563 	mode = YREAD4(sc, YDS_MODE);
1564 	YWRITE4(sc, YDS_MODE, mode & ~(YDS_MODE_ACTV|YDS_MODE_ACTV2));
1565 
1566 	/* Paranoia...  mute all */
1567 	YWRITE4(sc, YDS_P44_OUT_VOLUME, 0);
1568 	YWRITE4(sc, YDS_DAC_OUT_VOLUME, 0);
1569 	YWRITE4(sc, YDS_ADC_IN_VOLUME, 0);
1570 	YWRITE4(sc, YDS_REC_IN_VOLUME, 0);
1571 	YWRITE4(sc, YDS_DAC_REC_VOLUME, 0);
1572 	YWRITE4(sc, YDS_P44_REC_VOLUME, 0);
1573 
1574 	return 0;
1575 }
1576 
1577 static int
1578 yds_halt_output(void *addr)
1579 {
1580 	struct yds_softc *sc;
1581 
1582 	DPRINTF(("yds: yds_halt_output\n"));
1583 	sc = addr;
1584 	if (sc->sc_play.intr) {
1585 		sc->sc_play.intr = 0;
1586 		/* Sync play slot control data */
1587 		bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
1588 				sc->pbankoff,
1589 				sizeof(struct play_slot_ctrl_bank)*
1590 				    (*sc->ptbl)*N_PLAY_SLOT_CTRL_BANK,
1591 				BUS_DMASYNC_POSTWRITE|BUS_DMASYNC_POSTREAD);
1592 		/* Stop the play slot operation */
1593 		sc->pbankp[0]->status =
1594 		sc->pbankp[1]->status =
1595 		sc->pbankp[2]->status =
1596 		sc->pbankp[3]->status = 1;
1597 		/* Sync ring buffer */
1598 		bus_dmamap_sync(sc->sc_dmatag, sc->sc_play.dma->map,
1599 				0, sc->sc_play.length, BUS_DMASYNC_POSTWRITE);
1600 	}
1601 
1602 	return 0;
1603 }
1604 
1605 static int
1606 yds_halt_input(void *addr)
1607 {
1608 	struct yds_softc *sc;
1609 
1610 	DPRINTF(("yds: yds_halt_input\n"));
1611 	sc = addr;
1612 	if (sc->sc_rec.intr) {
1613 		sc->sc_rec.intr = NULL;
1614 		/* Stop the rec slot operation */
1615 		YWRITE4(sc, YDS_MAPOF_REC, 0);
1616 		/* Sync rec slot control data */
1617 		bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
1618 				sc->rbankoff,
1619 				sizeof(struct rec_slot_ctrl_bank)*
1620 				    N_REC_SLOT_CTRL*N_REC_SLOT_CTRL_BANK,
1621 				BUS_DMASYNC_POSTWRITE|BUS_DMASYNC_POSTREAD);
1622 		/* Sync ring buffer */
1623 		bus_dmamap_sync(sc->sc_dmatag, sc->sc_rec.dma->map,
1624 				0, sc->sc_rec.length, BUS_DMASYNC_POSTREAD);
1625 	}
1626 
1627 	return 0;
1628 }
1629 
1630 static int
1631 yds_getdev(void *addr, struct audio_device *retp)
1632 {
1633 
1634 	*retp = yds_device;
1635 	return 0;
1636 }
1637 
1638 static int
1639 yds_mixer_set_port(void *addr, mixer_ctrl_t *cp)
1640 {
1641 	struct yds_softc *sc;
1642 
1643 	sc = addr;
1644 	return sc->sc_codec[0].codec_if->vtbl->mixer_set_port(
1645 	    sc->sc_codec[0].codec_if, cp);
1646 }
1647 
1648 static int
1649 yds_mixer_get_port(void *addr, mixer_ctrl_t *cp)
1650 {
1651 	struct yds_softc *sc;
1652 
1653 	sc = addr;
1654 	return sc->sc_codec[0].codec_if->vtbl->mixer_get_port(
1655 	    sc->sc_codec[0].codec_if, cp);
1656 }
1657 
1658 static int
1659 yds_query_devinfo(void *addr, mixer_devinfo_t *dip)
1660 {
1661 	struct yds_softc *sc;
1662 
1663 	sc = addr;
1664 	return sc->sc_codec[0].codec_if->vtbl->query_devinfo(
1665 	    sc->sc_codec[0].codec_if, dip);
1666 }
1667 
1668 static void *
1669 yds_malloc(void *addr, int direction, size_t size)
1670 {
1671 	struct yds_softc *sc;
1672 	struct yds_dma *p;
1673 	int error;
1674 
1675 	p = kmem_alloc(sizeof(*p), KM_SLEEP);
1676 	sc = addr;
1677 	error = yds_allocmem(sc, size, 16, p);
1678 	if (error) {
1679 		kmem_free(p, sizeof(*p));
1680 		return NULL;
1681 	}
1682 	p->next = sc->sc_dmas;
1683 	sc->sc_dmas = p;
1684 	return KERNADDR(p);
1685 }
1686 
1687 static void
1688 yds_free(void *addr, void *ptr, size_t size)
1689 {
1690 	struct yds_softc *sc;
1691 	struct yds_dma **pp, *p;
1692 
1693 	sc = addr;
1694 	for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
1695 		if (KERNADDR(p) == ptr) {
1696 			yds_freemem(sc, p);
1697 			*pp = p->next;
1698 			kmem_free(p, sizeof(*p));
1699 			return;
1700 		}
1701 	}
1702 }
1703 
1704 static struct yds_dma *
1705 yds_find_dma(struct yds_softc *sc, void *addr)
1706 {
1707 	struct yds_dma *p;
1708 
1709 	for (p = sc->sc_dmas; p && KERNADDR(p) != addr; p = p->next)
1710 		continue;
1711 
1712 	return p;
1713 }
1714 
1715 static size_t
1716 yds_round_buffersize(void *addr, int direction, size_t size)
1717 {
1718 
1719 	/*
1720 	 * Buffer size should be at least twice as bigger as a frame.
1721 	 */
1722 	if (size < 1024 * 3)
1723 		size = 1024 * 3;
1724 	return size;
1725 }
1726 
1727 static int
1728 yds_get_props(void *addr)
1729 {
1730 
1731 	return AUDIO_PROP_PLAYBACK | AUDIO_PROP_CAPTURE |
1732 	    AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
1733 }
1734 
1735 static void
1736 yds_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread)
1737 {
1738 	struct yds_softc *sc;
1739 
1740 	sc = addr;
1741 	*intr = &sc->sc_intr_lock;
1742 	*thread = &sc->sc_lock;
1743 }
1744