xref: /netbsd-src/sys/dev/pci/vga_pci.c (revision 4817a0b0b8fe9612e8ebe21a9bf2d97b95038a97)
1 /*	$NetBSD: vga_pci.c,v 1.52 2010/12/16 06:45:50 cegger Exp $	*/
2 
3 /*
4  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5  * All rights reserved.
6  *
7  * Author: Chris G. Demetriou
8  *
9  * Permission to use, copy, modify and distribute this software and
10  * its documentation is hereby granted, provided that both the copyright
11  * notice and this permission notice appear in all copies of the
12  * software, derivative works or modified versions, and any portions
13  * thereof, and that both notices appear in supporting documentation.
14  *
15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18  *
19  * Carnegie Mellon requests users of this software to return to
20  *
21  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
22  *  School of Computer Science
23  *  Carnegie Mellon University
24  *  Pittsburgh PA 15213-3890
25  *
26  * any improvements or extensions that they make and grant Carnegie the
27  * rights to redistribute these changes.
28  */
29 
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: vga_pci.c,v 1.52 2010/12/16 06:45:50 cegger Exp $");
32 
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/device.h>
37 #include <sys/malloc.h>
38 
39 #include <dev/pci/pcireg.h>
40 #include <dev/pci/pcivar.h>
41 #include <dev/pci/pcidevs.h>
42 #include <dev/pci/pciio.h>
43 
44 #include <dev/ic/mc6845reg.h>
45 #include <dev/ic/pcdisplayvar.h>
46 #include <dev/ic/vgareg.h>
47 #include <dev/ic/vgavar.h>
48 #include <dev/pci/vga_pcivar.h>
49 
50 #include <dev/isa/isareg.h>	/* For legacy VGA address ranges */
51 
52 #include <dev/wscons/wsconsio.h>
53 #include <dev/wscons/wsdisplayvar.h>
54 
55 #include "opt_vga.h"
56 
57 #ifdef VGA_POST
58 #  if defined(__i386__) || defined(__amd64__)
59 #    include "acpica.h"
60 #  endif
61 #include <x86/vga_post.h>
62 #endif
63 
64 #define	NBARS		6	/* number of PCI BARs */
65 
66 struct vga_bar {
67 	bus_addr_t vb_base;
68 	bus_size_t vb_size;
69 	pcireg_t vb_type;
70 	int vb_flags;
71 };
72 
73 struct vga_pci_softc {
74 	struct vga_softc sc_vga;
75 
76 	pci_chipset_tag_t sc_pc;
77 	pcitag_t sc_pcitag;
78 
79 	struct vga_bar sc_bars[NBARS];
80 	struct vga_bar sc_rom;
81 
82 #ifdef VGA_POST
83 	struct vga_post *sc_posth;
84 #endif
85 
86 	struct pci_attach_args sc_paa;
87 };
88 
89 static int	vga_pci_match(device_t, cfdata_t, void *);
90 static void	vga_pci_attach(device_t, device_t, void *);
91 static int	vga_pci_rescan(device_t, const char *, const int *);
92 static int	vga_pci_lookup_quirks(struct pci_attach_args *);
93 static bool	vga_pci_resume(device_t dv, const pmf_qual_t *);
94 
95 CFATTACH_DECL2_NEW(vga_pci, sizeof(struct vga_pci_softc),
96     vga_pci_match, vga_pci_attach, NULL, NULL, vga_pci_rescan, NULL);
97 
98 static int	vga_pci_ioctl(void *, u_long, void *, int, struct lwp *);
99 static paddr_t	vga_pci_mmap(void *, off_t, int);
100 
101 static const struct vga_funcs vga_pci_funcs = {
102 	vga_pci_ioctl,
103 	vga_pci_mmap,
104 };
105 
106 static const struct {
107 	int id;
108 	int quirks;
109 } vga_pci_quirks[] = {
110 	{PCI_ID_CODE(PCI_VENDOR_SILMOTION, PCI_PRODUCT_SILMOTION_SM712),
111 	 VGA_QUIRK_NOFASTSCROLL},
112 	{PCI_ID_CODE(PCI_VENDOR_CYRIX, PCI_PRODUCT_CYRIX_CX5530_VIDEO),
113 	 VGA_QUIRK_NOFASTSCROLL},
114 };
115 
116 static const struct {
117 	int vid;
118 	int quirks;
119 } vga_pci_vquirks[] = {
120 	{PCI_VENDOR_ATI, VGA_QUIRK_ONEFONT},
121 };
122 
123 static int
124 vga_pci_lookup_quirks(struct pci_attach_args *pa)
125 {
126 	int i;
127 
128 	for (i = 0; i < sizeof(vga_pci_quirks) / sizeof (vga_pci_quirks[0]);
129 	     i++) {
130 		if (vga_pci_quirks[i].id == pa->pa_id)
131 			return (vga_pci_quirks[i].quirks);
132 	}
133 	for (i = 0; i < sizeof(vga_pci_vquirks) / sizeof (vga_pci_vquirks[0]);
134 	     i++) {
135 		if (vga_pci_vquirks[i].vid == PCI_VENDOR(pa->pa_id))
136 			return (vga_pci_vquirks[i].quirks);
137 	}
138 	return (0);
139 }
140 
141 static int
142 vga_pci_match(device_t parent, cfdata_t match, void *aux)
143 {
144 	struct pci_attach_args *pa = aux;
145 	int potential;
146 
147 	potential = 0;
148 
149 	/*
150 	 * If it's prehistoric/vga or display/vga, we might match.
151 	 * For the console device, this is just a sanity check.
152 	 */
153 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_PREHISTORIC &&
154 	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_PREHISTORIC_VGA)
155 		potential = 1;
156 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY &&
157 	     PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA)
158 		potential = 1;
159 
160 	if (!potential)
161 		return (0);
162 
163 	/* check whether it is disabled by firmware */
164 	if ((pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG)
165 	    & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE))
166 	    != (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE))
167 		return (0);
168 
169 	/* If it's the console, we have a winner! */
170 	if (vga_is_console(pa->pa_iot, WSDISPLAY_TYPE_PCIVGA))
171 		return (1);
172 
173 	/*
174 	 * If we might match, make sure that the card actually looks OK.
175 	 */
176 	if (!vga_common_probe(pa->pa_iot, pa->pa_memt))
177 		return (0);
178 
179 	return (1);
180 }
181 
182 static void
183 vga_pci_attach(device_t parent, device_t self, void *aux)
184 {
185 	struct vga_pci_softc *psc = device_private(self);
186 	struct vga_softc *sc = &psc->sc_vga;
187 	struct pci_attach_args *pa = aux;
188 	char devinfo[256];
189 	int bar, reg;
190 
191 	sc->sc_dev = self;
192 	psc->sc_pc = pa->pa_pc;
193 	psc->sc_pcitag = pa->pa_tag;
194 	psc->sc_paa = *pa;
195 
196 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
197 	aprint_naive("\n");
198 	aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
199 	    PCI_REVISION(pa->pa_class));
200 
201 	/*
202 	 * Gather info about all the BARs.  These are used to allow
203 	 * the X server to map the VGA device.
204 	 */
205 	for (bar = 0; bar < NBARS; bar++) {
206 		reg = PCI_MAPREG_START + (bar * 4);
207 		if (!pci_mapreg_probe(psc->sc_pc, psc->sc_pcitag, reg,
208 				      &psc->sc_bars[bar].vb_type)) {
209 			/* there is no valid mapping register */
210 			continue;
211 		}
212 		if (PCI_MAPREG_TYPE(psc->sc_bars[bar].vb_type) ==
213 		    PCI_MAPREG_TYPE_IO) {
214 			/* Don't bother fetching I/O BARs. */
215 			continue;
216 		}
217 #ifndef __LP64__
218 		if (PCI_MAPREG_MEM_TYPE(psc->sc_bars[bar].vb_type) ==
219 		    PCI_MAPREG_MEM_TYPE_64BIT) {
220 			/* XXX */
221 			aprint_error_dev(self,
222 			    "WARNING: ignoring 64-bit BAR @ 0x%02x\n", reg);
223 			bar++;
224 			continue;
225 		}
226 #endif
227 		if (pci_mapreg_info(psc->sc_pc, psc->sc_pcitag, reg,
228 		     psc->sc_bars[bar].vb_type,
229 		     &psc->sc_bars[bar].vb_base,
230 		     &psc->sc_bars[bar].vb_size,
231 		     &psc->sc_bars[bar].vb_flags))
232 			aprint_error_dev(self,
233 			    "WARNING: strange BAR @ 0x%02x\n", reg);
234 	}
235 
236 	/* XXX Expansion ROM? */
237 
238 	vga_common_attach(sc, pa->pa_iot, pa->pa_memt, WSDISPLAY_TYPE_PCIVGA,
239 			  vga_pci_lookup_quirks(pa), &vga_pci_funcs);
240 
241 #ifdef VGA_POST
242 	psc->sc_posth = vga_post_init(pa->pa_bus, pa->pa_device, pa->pa_function);
243 	if (psc->sc_posth == NULL)
244 		aprint_error_dev(self, "WARNING: could not prepare POST handler\n");
245 #endif
246 
247 	/*
248 	 * XXX Do not use the generic PCI framework for now as
249 	 * XXX it would power down the device when the console
250 	 * XXX is still using it.
251 	 */
252 	if (!pmf_device_register(self, NULL, vga_pci_resume))
253 		aprint_error_dev(self, "couldn't establish power handler\n");
254 	config_found_ia(self, "drm", aux, vga_drm_print);
255 }
256 
257 static int
258 vga_pci_rescan(device_t self, const char *ifattr, const int *locators)
259 {
260 	struct vga_pci_softc *psc = device_private(self);
261 
262 	config_found_ia(self, "drm", &psc->sc_paa, vga_drm_print);
263 
264 	return 0;
265 }
266 
267 static bool
268 vga_pci_resume(device_t dv, const pmf_qual_t *qual)
269 {
270 #if defined(VGA_POST) && NACPICA > 0
271 	extern int acpi_md_vbios_reset;
272 #endif
273 	struct vga_pci_softc *sc = device_private(dv);
274 
275 	vga_resume(&sc->sc_vga);
276 
277 #if defined(VGA_POST) && NACPICA > 0
278 	if (sc->sc_posth != NULL && acpi_md_vbios_reset == 2)
279 		vga_post_call(sc->sc_posth);
280 #endif
281 
282 	return true;
283 }
284 
285 int
286 vga_pci_cnattach(bus_space_tag_t iot, bus_space_tag_t memt,
287     pci_chipset_tag_t pc, int bus, int device,
288     int function)
289 {
290 
291 	return (vga_cnattach(iot, memt, WSDISPLAY_TYPE_PCIVGA, 0));
292 }
293 
294 int
295 vga_drm_print(void *aux, const char *pnp)
296 {
297 	if (pnp)
298 		aprint_normal("drm at %s", pnp);
299 	return (UNCONF);
300 }
301 
302 
303 static int
304 vga_pci_ioctl(void *v, u_long cmd, void *data, int flag, struct lwp *l)
305 {
306 	struct vga_config *vc = v;
307 	struct vga_pci_softc *psc = (void *) vc->softc;
308 
309 	switch (cmd) {
310 	/* PCI config read/write passthrough. */
311 	case PCI_IOC_CFGREAD:
312 	case PCI_IOC_CFGWRITE:
313 		return pci_devioctl(psc->sc_pc, psc->sc_pcitag,
314 		    cmd, data, flag, l);
315 
316 	default:
317 		return EPASSTHROUGH;
318 	}
319 }
320 
321 static paddr_t
322 vga_pci_mmap(void *v, off_t offset, int prot)
323 {
324 	struct vga_config *vc = v;
325 	struct vga_pci_softc *psc = (void *) vc->softc;
326 	struct vga_bar *vb;
327 	int bar;
328 
329 	for (bar = 0; bar < NBARS; bar++) {
330 		vb = &psc->sc_bars[bar];
331 		if (vb->vb_size == 0)
332 			continue;
333 		if (offset >= vb->vb_base &&
334 		    offset < (vb->vb_base + vb->vb_size)) {
335 			/* XXX This the right thing to do with flags? */
336 			return (bus_space_mmap(vc->hdl.vh_memt, vb->vb_base,
337 			    (offset - vb->vb_base), prot, vb->vb_flags));
338 		}
339 	}
340 
341 	/* XXX Expansion ROM? */
342 
343 	/*
344 	 * Allow mmap access to the legacy ISA hole.  This is where
345 	 * the legacy video BIOS will be located, and also where
346 	 * the legacy VGA display buffer is located.
347 	 *
348 	 * XXX Security implications, here?
349 	 */
350 	if (offset >= IOM_BEGIN && offset < IOM_END)
351 		return (bus_space_mmap(vc->hdl.vh_memt, IOM_BEGIN,
352 		    (offset - IOM_BEGIN), prot, 0));
353 
354 #ifdef PCI_MAGIC_IO_RANGE
355 	/* allow to map our IO space on non-x86 machines */
356 	if ((offset >= PCI_MAGIC_IO_RANGE) &&
357 	    (offset < PCI_MAGIC_IO_RANGE + 0x10000)) {
358 		return bus_space_mmap(vc->hdl.vh_iot,
359 		    offset - PCI_MAGIC_IO_RANGE,
360 		    0, prot, BUS_SPACE_MAP_LINEAR);
361 	}
362 #endif
363 
364 	/* Range not found. */
365 	return (-1);
366 }
367