xref: /netbsd-src/sys/dev/pci/vga_pci.c (revision 220b5c059a84c51ea44107ea8951a57ffaecdc8c)
1 /* $NetBSD: vga_pci.c,v 1.8 2001/11/13 07:48:49 lukem Exp $ */
2 
3 /*
4  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5  * All rights reserved.
6  *
7  * Author: Chris G. Demetriou
8  *
9  * Permission to use, copy, modify and distribute this software and
10  * its documentation is hereby granted, provided that both the copyright
11  * notice and this permission notice appear in all copies of the
12  * software, derivative works or modified versions, and any portions
13  * thereof, and that both notices appear in supporting documentation.
14  *
15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18  *
19  * Carnegie Mellon requests users of this software to return to
20  *
21  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
22  *  School of Computer Science
23  *  Carnegie Mellon University
24  *  Pittsburgh PA 15213-3890
25  *
26  * any improvements or extensions that they make and grant Carnegie the
27  * rights to redistribute these changes.
28  */
29 
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: vga_pci.c,v 1.8 2001/11/13 07:48:49 lukem Exp $");
32 
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/device.h>
37 #include <sys/malloc.h>
38 
39 #include <dev/pci/pcireg.h>
40 #include <dev/pci/pcivar.h>
41 #include <dev/pci/pcidevs.h>
42 #include <dev/pci/pciio.h>
43 
44 #include <dev/ic/mc6845reg.h>
45 #include <dev/ic/pcdisplayvar.h>
46 #include <dev/ic/vgareg.h>
47 #include <dev/ic/vgavar.h>
48 #include <dev/pci/vga_pcivar.h>
49 
50 #include <dev/isa/isareg.h>	/* For legacy VGA address ranges */
51 
52 #include <dev/wscons/wsconsio.h>
53 #include <dev/wscons/wsdisplayvar.h>
54 
55 #define	NBARS		6	/* number of PCI BARs */
56 
57 struct vga_bar {
58 	bus_addr_t vb_base;
59 	bus_size_t vb_size;
60 	pcireg_t vb_type;
61 	int vb_flags;
62 };
63 
64 struct vga_pci_softc {
65 	struct vga_softc sc_vga;
66 
67 	pci_chipset_tag_t sc_pc;
68 	pcitag_t sc_pcitag;
69 
70 	struct vga_bar sc_bars[NBARS];
71 	struct vga_bar sc_rom;
72 };
73 
74 int	vga_pci_match __P((struct device *, struct cfdata *, void *));
75 void	vga_pci_attach __P((struct device *, struct device *, void *));
76 
77 struct cfattach vga_pci_ca = {
78 	sizeof(struct vga_pci_softc), vga_pci_match, vga_pci_attach,
79 };
80 
81 int	vga_pci_ioctl(void *, u_long, caddr_t, int, struct proc *);
82 paddr_t	vga_pci_mmap(void *, off_t, int);
83 
84 const struct vga_funcs vga_pci_funcs = {
85 	vga_pci_ioctl,
86 	vga_pci_mmap,
87 };
88 
89 int
90 vga_pci_match(parent, match, aux)
91 	struct device *parent;
92 	struct cfdata *match;
93 	void *aux;
94 {
95 	struct pci_attach_args *pa = aux;
96 	int potential;
97 
98 	potential = 0;
99 
100 	/*
101 	 * If it's prehistoric/vga or display/vga, we might match.
102 	 * For the console device, this is jut a sanity check.
103 	 */
104 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_PREHISTORIC &&
105 	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_PREHISTORIC_VGA)
106 		potential = 1;
107 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY &&
108 	     PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA)
109 		potential = 1;
110 
111 	if (!potential)
112 		return (0);
113 
114 	/* check whether it is disabled by firmware */
115 	if ((pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG)
116 	    & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE))
117 	    != (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE))
118 		return (0);
119 
120 	/* If it's the console, we have a winner! */
121 	if (vga_is_console(pa->pa_iot, WSDISPLAY_TYPE_PCIVGA))
122 		return (1);
123 
124 	/*
125 	 * If we might match, make sure that the card actually looks OK.
126 	 */
127 	if (!vga_common_probe(pa->pa_iot, pa->pa_memt))
128 		return (0);
129 
130 	return (1);
131 }
132 
133 void
134 vga_pci_attach(parent, self, aux)
135 	struct device *parent, *self;
136 	void *aux;
137 {
138 	struct vga_pci_softc *psc = (void *) self;
139 	struct vga_softc *sc = &psc->sc_vga;
140 	struct pci_attach_args *pa = aux;
141 	char devinfo[256];
142 	int bar, reg;
143 
144 	psc->sc_pc = pa->pa_pc;
145 	psc->sc_pcitag = pa->pa_tag;
146 
147 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
148 	printf(": %s (rev. 0x%02x)\n", devinfo,
149 	    PCI_REVISION(pa->pa_class));
150 
151 	/*
152 	 * Gather info about all the BARs.  These are used to allow
153 	 * the X server to map the VGA device.
154 	 */
155 	for (bar = 0; bar < NBARS; bar++) {
156 		reg = PCI_MAPREG_START + (bar * 4);
157 		psc->sc_bars[bar].vb_type = pci_mapreg_type(psc->sc_pc,
158 		    psc->sc_pcitag, reg);
159 		if (PCI_MAPREG_TYPE(psc->sc_bars[bar].vb_type) ==
160 		    PCI_MAPREG_TYPE_IO) {
161 			/* Don't bother fetching I/O BARs. */
162 			continue;
163 		}
164 		if (PCI_MAPREG_MEM_TYPE(psc->sc_bars[bar].vb_type) ==
165 		    PCI_MAPREG_MEM_TYPE_64BIT) {
166 			/* XXX */
167 			printf("%s: WARNING: ignoring 64-bit BAR @ 0x%02x\n",
168 			    sc->sc_dev.dv_xname, reg);
169 			continue;
170 		}
171 		/* Ignore errors (unimplemented BARs). */
172 		(void) pci_mapreg_info(psc->sc_pc, psc->sc_pcitag, reg,
173 		     psc->sc_bars[bar].vb_type,
174 		     &psc->sc_bars[bar].vb_base,
175 		     &psc->sc_bars[bar].vb_size,
176 		     &psc->sc_bars[bar].vb_flags);
177 	}
178 
179 	/* XXX Expansion ROM? */
180 
181 	vga_common_attach(sc, pa->pa_iot, pa->pa_memt, WSDISPLAY_TYPE_PCIVGA,
182 	    &vga_pci_funcs);
183 }
184 
185 int
186 vga_pci_cnattach(iot, memt, pc, bus, device, function)
187 	bus_space_tag_t iot, memt;
188 	pci_chipset_tag_t pc;
189 	int bus, device, function;
190 {
191 	return (vga_cnattach(iot, memt, WSDISPLAY_TYPE_PCIVGA, 0));
192 }
193 
194 int
195 vga_pci_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p)
196 {
197 	struct vga_config *vc = v;
198 	struct vga_pci_softc *psc = (void *) vc->softc;
199 
200 	switch (cmd) {
201 	/* PCI config read/write passthrough. */
202 	case PCI_IOC_CFGREAD:
203 	case PCI_IOC_CFGWRITE:
204 		return (pci_devioctl(psc->sc_pc, psc->sc_pcitag,
205 		    cmd, data, flag, p));
206 
207 	default:
208 		return (ENOTTY);
209 	}
210 }
211 
212 paddr_t
213 vga_pci_mmap(void *v, off_t offset, int prot)
214 {
215 	struct vga_config *vc = v;
216 	struct vga_pci_softc *psc = (void *) vc->softc;
217 	struct vga_bar *vb;
218 	int bar;
219 
220 	for (bar = 0; bar < NBARS; bar++) {
221 		vb = &psc->sc_bars[bar];
222 		if (vb->vb_size == 0)
223 			continue;
224 		if (offset >= vb->vb_base &&
225 		    offset < (vb->vb_base + vb->vb_size)) {
226 			/* XXX This the right thing to do with flags? */
227 			return (bus_space_mmap(vc->hdl.vh_memt, vb->vb_base,
228 			    (offset - vb->vb_base), prot, vb->vb_flags));
229 		}
230 	}
231 
232 	/* XXX Expansion ROM? */
233 
234 	/*
235 	 * Allow mmap access to the legacy ISA hole.  This is where
236 	 * the legacy video BIOS will be located, and also where
237 	 * the legacy VGA display buffer is located.
238 	 *
239 	 * XXX Security implications, here?
240 	 */
241 	if (offset >= IOM_BEGIN && offset < IOM_END)
242 		return (bus_space_mmap(vc->hdl.vh_memt, IOM_BEGIN,
243 		    (offset - IOM_BEGIN), prot, 0));
244 
245 	/* Range not found. */
246 	return (-1);
247 }
248