1 /* $NetBSD: vga_pci.c,v 1.17 2002/07/08 19:48:37 drochner Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> 31 __KERNEL_RCSID(0, "$NetBSD: vga_pci.c,v 1.17 2002/07/08 19:48:37 drochner Exp $"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/device.h> 37 #include <sys/malloc.h> 38 39 #include <dev/pci/pcireg.h> 40 #include <dev/pci/pcivar.h> 41 #include <dev/pci/pcidevs.h> 42 #include <dev/pci/pciio.h> 43 44 #include <dev/ic/mc6845reg.h> 45 #include <dev/ic/pcdisplayvar.h> 46 #include <dev/ic/vgareg.h> 47 #include <dev/ic/vgavar.h> 48 #include <dev/pci/vga_pcivar.h> 49 50 #include <dev/isa/isareg.h> /* For legacy VGA address ranges */ 51 52 #include <dev/wscons/wsconsio.h> 53 #include <dev/wscons/wsdisplayvar.h> 54 55 #define NBARS 6 /* number of PCI BARs */ 56 57 struct vga_bar { 58 bus_addr_t vb_base; 59 bus_size_t vb_size; 60 pcireg_t vb_type; 61 int vb_flags; 62 }; 63 64 struct vga_pci_softc { 65 struct vga_softc sc_vga; 66 67 pci_chipset_tag_t sc_pc; 68 pcitag_t sc_pcitag; 69 70 struct vga_bar sc_bars[NBARS]; 71 struct vga_bar sc_rom; 72 }; 73 74 int vga_pci_match(struct device *, struct cfdata *, void *); 75 void vga_pci_attach(struct device *, struct device *, void *); 76 static int vga_pci_lookup_quirks(struct pci_attach_args *); 77 78 struct cfattach vga_pci_ca = { 79 sizeof(struct vga_pci_softc), 80 vga_pci_match, 81 vga_pci_attach, 82 }; 83 84 int vga_pci_ioctl(void *, u_long, caddr_t, int, struct proc *); 85 paddr_t vga_pci_mmap(void *, off_t, int); 86 87 const struct vga_funcs vga_pci_funcs = { 88 vga_pci_ioctl, 89 vga_pci_mmap, 90 }; 91 92 static const struct { 93 int id; 94 int quirks; 95 } vga_pci_quirks[] = { 96 {PCI_ID_CODE(PCI_VENDOR_SILMOTION, PCI_PRODUCT_SILMOTION_LYNX_EMP), 97 VGA_QUIRK_NOFASTSCROLL}, 98 }; 99 100 static const struct { 101 int vid; 102 int quirks; 103 } vga_pci_vquirks[] = { 104 {PCI_VENDOR_ATI, VGA_QUIRK_ONEFONT}, 105 }; 106 107 static int 108 vga_pci_lookup_quirks(pa) 109 struct pci_attach_args *pa; 110 { 111 int i; 112 113 for (i = 0; i < sizeof(vga_pci_quirks) / sizeof (vga_pci_quirks[0]); 114 i++) { 115 if (vga_pci_quirks[i].id == pa->pa_id) 116 return (vga_pci_quirks[i].quirks); 117 } 118 for (i = 0; i < sizeof(vga_pci_vquirks) / sizeof (vga_pci_vquirks[0]); 119 i++) { 120 if (vga_pci_vquirks[i].vid == PCI_VENDOR(pa->pa_id)) 121 return (vga_pci_vquirks[i].quirks); 122 } 123 return (0); 124 } 125 126 int 127 vga_pci_match(struct device *parent, struct cfdata *match, void *aux) 128 { 129 struct pci_attach_args *pa = aux; 130 int potential; 131 132 potential = 0; 133 134 /* 135 * If it's prehistoric/vga or display/vga, we might match. 136 * For the console device, this is jut a sanity check. 137 */ 138 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_PREHISTORIC && 139 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_PREHISTORIC_VGA) 140 potential = 1; 141 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY && 142 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA) 143 potential = 1; 144 145 if (!potential) 146 return (0); 147 148 /* check whether it is disabled by firmware */ 149 if ((pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) 150 & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE)) 151 != (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE)) 152 return (0); 153 154 /* If it's the console, we have a winner! */ 155 if (vga_is_console(pa->pa_iot, WSDISPLAY_TYPE_PCIVGA)) 156 return (1); 157 158 /* 159 * If we might match, make sure that the card actually looks OK. 160 */ 161 if (!vga_common_probe(pa->pa_iot, pa->pa_memt)) 162 return (0); 163 164 return (1); 165 } 166 167 void 168 vga_pci_attach(struct device *parent, struct device *self, void *aux) 169 { 170 struct vga_pci_softc *psc = (void *) self; 171 struct vga_softc *sc = &psc->sc_vga; 172 struct pci_attach_args *pa = aux; 173 char devinfo[256]; 174 int bar, reg; 175 176 psc->sc_pc = pa->pa_pc; 177 psc->sc_pcitag = pa->pa_tag; 178 179 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo); 180 printf(": %s (rev. 0x%02x)\n", devinfo, 181 PCI_REVISION(pa->pa_class)); 182 183 /* 184 * Gather info about all the BARs. These are used to allow 185 * the X server to map the VGA device. 186 */ 187 for (bar = 0; bar < NBARS; bar++) { 188 reg = PCI_MAPREG_START + (bar * 4); 189 if (!pci_mapreg_probe(psc->sc_pc, psc->sc_pcitag, reg, 190 &psc->sc_bars[bar].vb_type)) { 191 /* there is no valid mapping register */ 192 continue; 193 } 194 if (PCI_MAPREG_TYPE(psc->sc_bars[bar].vb_type) == 195 PCI_MAPREG_TYPE_IO) { 196 /* Don't bother fetching I/O BARs. */ 197 continue; 198 } 199 if (PCI_MAPREG_MEM_TYPE(psc->sc_bars[bar].vb_type) == 200 PCI_MAPREG_MEM_TYPE_64BIT) { 201 /* XXX */ 202 printf("%s: WARNING: ignoring 64-bit BAR @ 0x%02x\n", 203 sc->sc_dev.dv_xname, reg); 204 bar++; 205 continue; 206 } 207 if (pci_mapreg_info(psc->sc_pc, psc->sc_pcitag, reg, 208 psc->sc_bars[bar].vb_type, 209 &psc->sc_bars[bar].vb_base, 210 &psc->sc_bars[bar].vb_size, 211 &psc->sc_bars[bar].vb_flags)) 212 printf("%s: WARNING: strange BAR @ 0x%02x\n", 213 sc->sc_dev.dv_xname, reg); 214 } 215 216 /* XXX Expansion ROM? */ 217 218 vga_common_attach(sc, pa->pa_iot, pa->pa_memt, WSDISPLAY_TYPE_PCIVGA, 219 vga_pci_lookup_quirks(pa), &vga_pci_funcs); 220 } 221 222 int 223 vga_pci_cnattach(bus_space_tag_t iot, bus_space_tag_t memt, 224 pci_chipset_tag_t pc, int bus, int device, int function) 225 { 226 227 return (vga_cnattach(iot, memt, WSDISPLAY_TYPE_PCIVGA, 0)); 228 } 229 230 int 231 vga_pci_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p) 232 { 233 struct vga_config *vc = v; 234 struct vga_pci_softc *psc = (void *) vc->softc; 235 236 switch (cmd) { 237 /* PCI config read/write passthrough. */ 238 case PCI_IOC_CFGREAD: 239 case PCI_IOC_CFGWRITE: 240 return (pci_devioctl(psc->sc_pc, psc->sc_pcitag, 241 cmd, data, flag, p)); 242 243 default: 244 return (EPASSTHROUGH); 245 } 246 } 247 248 paddr_t 249 vga_pci_mmap(void *v, off_t offset, int prot) 250 { 251 struct vga_config *vc = v; 252 struct vga_pci_softc *psc = (void *) vc->softc; 253 struct vga_bar *vb; 254 int bar; 255 256 for (bar = 0; bar < NBARS; bar++) { 257 vb = &psc->sc_bars[bar]; 258 if (vb->vb_size == 0) 259 continue; 260 if (offset >= vb->vb_base && 261 offset < (vb->vb_base + vb->vb_size)) { 262 /* XXX This the right thing to do with flags? */ 263 return (bus_space_mmap(vc->hdl.vh_memt, vb->vb_base, 264 (offset - vb->vb_base), prot, vb->vb_flags)); 265 } 266 } 267 268 /* XXX Expansion ROM? */ 269 270 /* 271 * Allow mmap access to the legacy ISA hole. This is where 272 * the legacy video BIOS will be located, and also where 273 * the legacy VGA display buffer is located. 274 * 275 * XXX Security implications, here? 276 */ 277 if (offset >= IOM_BEGIN && offset < IOM_END) 278 return (bus_space_mmap(vc->hdl.vh_memt, IOM_BEGIN, 279 (offset - IOM_BEGIN), prot, 0)); 280 281 /* Range not found. */ 282 return (-1); 283 } 284