xref: /netbsd-src/sys/dev/pci/universe_pci.c (revision 27578b9aac214cc7796ead81dcc5427e79d5f2a0)
1 /* $NetBSD: universe_pci.c,v 1.3 2000/12/28 22:59:15 sommerfeld Exp $ */
2 
3 /*
4  * Copyright (c) 1999
5  * 	Matthias Drochner.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions, and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 /*
30  * Common functions for PCI-VME-interfaces using the
31  * Newbridge/Tundra Universe II chip (CA91C142).
32  */
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/device.h>
37 
38 #include <dev/pci/pcireg.h>
39 #include <dev/pci/pcivar.h>
40 /*#include <dev/pci/pcidevs.h>*/
41 
42 #include <machine/bus.h>
43 
44 #include <dev/vme/vmereg.h>
45 #include <dev/vme/vmevar.h>
46 
47 #include <dev/ic/universereg.h>
48 #include <dev/pci/universe_pci_var.h>
49 
50 int univ_pci_intr __P((void *));
51 
52 #define read_csr_4(d, reg) \
53   bus_space_read_4(d->csrt, d->csrh, offsetof(struct universereg, reg))
54 #define write_csr_4(d, reg, val) \
55   bus_space_write_4(d->csrt, d->csrh, offsetof(struct universereg, reg), val)
56 
57 #define _pso(i) offsetof(struct universereg, __CONCAT(pcislv, i))
58 static int pcislvoffsets[8] = {
59 	_pso(0), _pso(1), _pso(2), _pso(3),
60 	_pso(4), _pso(5), _pso(6), _pso(7)
61 };
62 #undef _pso
63 
64 #define read_pcislv(d, idx, reg) \
65   bus_space_read_4(d->csrt, d->csrh, \
66    pcislvoffsets[idx] + offsetof(struct universe_pcislvimg, reg))
67 #define write_pcislv(d, idx, reg, val) \
68   bus_space_write_4(d->csrt, d->csrh, \
69    pcislvoffsets[idx] + offsetof(struct universe_pcislvimg, reg), val)
70 
71 
72 #define _vso(i) offsetof(struct universereg, __CONCAT(vmeslv, i))
73 static int vmeslvoffsets[8] = {
74 	_vso(0), _vso(1), _vso(2), _vso(3),
75 	_vso(4), _vso(5), _vso(6), _vso(7)
76 };
77 #undef _vso
78 
79 #define read_vmeslv(d, idx, reg) \
80   bus_space_read_4(d->csrt, d->csrh, \
81    vmeslvoffsets[idx] + offsetof(struct universe_vmeslvimg, reg))
82 #define write_vmeslv(d, idx, reg, val) \
83   bus_space_write_4(d->csrt, d->csrh, \
84    vmeslvoffsets[idx] + offsetof(struct universe_vmeslvimg, reg), val)
85 
86 int
87 univ_pci_attach(d, pa, name, inthdl, intcookie)
88 	struct univ_pci_data *d;
89 	struct pci_attach_args *pa;
90 	const char *name;
91 	void (*inthdl) __P((void *, int, int));
92 	void *intcookie;
93 {
94 	pci_chipset_tag_t pc = pa->pa_pc;
95 	pci_intr_handle_t ih;
96 	const char *intrstr = NULL;
97 	u_int32_t reg;
98 	int i;
99 
100 	d->pc = pc;
101 	strncpy(d->devname, name, sizeof(d->devname));
102 	d->devname[sizeof(d->devname) - 1] = '\0';
103 
104 	if (pci_mapreg_map(pa, 0x10,
105 			   PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
106 			   0, &d->csrt, &d->csrh, NULL, NULL) &&
107 	    pci_mapreg_map(pa, 0x14,
108 			   PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
109 			   0, &d->csrt, &d->csrh, NULL, NULL) &&
110 	    pci_mapreg_map(pa, 0x10,
111 			   PCI_MAPREG_TYPE_IO,
112 			   0, &d->csrt, &d->csrh, NULL, NULL) &&
113 	    pci_mapreg_map(pa, 0x14,
114 			   PCI_MAPREG_TYPE_IO,
115 			   0, &d->csrt, &d->csrh, NULL, NULL))
116 		return (-1);
117 
118 	/* name sure the chip is in a sane state */
119 	write_csr_4(d, lint_en, 0); /* mask all PCI interrupts */
120 	write_csr_4(d, vint_en, 0); /* mask all VME interrupts */
121 	write_csr_4(d, dgcs, 0x40000000); /* stop DMA activity */
122 	for (i = 0; i < 8; i++) {
123 		univ_pci_unmapvme(d, i);
124 		univ_pci_unmappci(d, i);
125 	}
126 	write_csr_4(d, slsi, 0); /* disable "special PCI slave image" */
127 
128 	/* enable DMA */
129 	pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
130 	    pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
131 	    PCI_COMMAND_MASTER_ENABLE);
132 
133 	reg = read_csr_4(d, misc_ctl);
134 	printf("%s: ", name);
135 	if (reg & 0x00020000) /* SYSCON */
136 		printf("VME bus controller, ");
137 	reg = read_csr_4(d, mast_ctl);
138 	printf("requesting at VME bus level %d\n", (reg >> 22) & 3);
139 
140 	/* Map and establish the PCI interrupt. */
141 	if (pci_intr_map(pa, &ih)) {
142 		printf("%s: couldn't map interrupt\n", name);
143 		return (-1);
144 	}
145 	intrstr = pci_intr_string(pc, ih);
146 	/*
147 	 * Use a low interrupt level (the lowest?).
148 	 * We will raise before calling a subdevice's handler.
149 	 */
150 	d->ih = pci_intr_establish(pc, ih, IPL_BIO, univ_pci_intr, d);
151 	if (d->ih == NULL) {
152 		printf("%s: couldn't establish interrupt", name);
153 		if (intrstr != NULL)
154 			printf(" at %s", intrstr);
155 		printf("\n");
156 		return (-1);
157 	}
158 	printf("%s: interrupting at %s\n", name, intrstr);
159 
160 	/* handle all VME interrupts (XXX should be configurable) */
161 	d->vmeinthandler = inthdl;
162 	d->vmeintcookie = intcookie;
163 	write_csr_4(d, lint_stat, 0x00ff37ff); /* ack all pending IRQs */
164 	write_csr_4(d, lint_en, 0x000000fe); /* enable VME IRQ 1..7 */
165 
166 	return (0);
167 }
168 
169 int
170 univ_pci_mapvme(d, wnd, vmebase, len, am, datawidth, pcibase)
171 	struct univ_pci_data *d;
172 	int wnd;
173 	vme_addr_t vmebase;
174 	u_int32_t len;
175 	vme_am_t am;
176 	vme_datasize_t datawidth;
177 	u_int32_t pcibase;
178 {
179 	u_int32_t ctl = 0x80000000;
180 
181 	switch (am & VME_AM_ADRSIZEMASK) {
182 	case VME_AM_A32:
183 		ctl |= 0x00020000;
184 		break;
185 	case VME_AM_A24:
186 		ctl |= 0x00010000;
187 		break;
188 	case VME_AM_A16:
189 		break;
190 	default:
191 		return (EINVAL);
192 	}
193 	if (am & VME_AM_SUPER)
194 		ctl |= 0x00001000;
195 	if ((am & VME_AM_MODEMASK) == VME_AM_PRG)
196 		ctl |= 0x00004000;
197 	if (datawidth & VME_D32)
198 		ctl |= 0x00800000;
199 	else if (datawidth & VME_D16)
200 		ctl |= 0x00400000;
201 	else if (!(datawidth & VME_D8))
202 		return (EINVAL);
203 
204 #ifdef UNIV_DEBUG
205 	printf("%s: wnd %d, map VME %x-%x to %x, ctl=%x\n",
206 	       d->devname, wnd, vmebase, vmebase + len, pcibase, ctl);
207 #endif
208 
209 	write_pcislv(d, wnd, lsi_bs, pcibase);
210 	write_pcislv(d, wnd, lsi_bd, pcibase + len);
211 	write_pcislv(d, wnd, lsi_to, vmebase - pcibase);
212 	write_pcislv(d, wnd, lsi_ctl, ctl);
213 	return (0);
214 }
215 
216 void
217 univ_pci_unmapvme(d, wnd)
218 	struct univ_pci_data *d;
219 	int wnd;
220 {
221 #ifdef UNIV_DEBUG
222 	printf("%s: unmap VME wnd %d\n", d->devname, wnd);
223 #endif
224 	write_pcislv(d, wnd, lsi_ctl, 0);
225 }
226 
227 
228 int
229 univ_pci_mappci(d, wnd, pcibase, len, vmebase, am)
230 	struct univ_pci_data *d;
231 	int wnd;
232 	u_int32_t pcibase;
233 	u_int32_t len;
234 	vme_addr_t vmebase;
235 	vme_am_t am;
236 {
237 	u_int32_t ctl = 0x80000000;
238 
239 	switch (am & VME_AM_ADRSIZEMASK) {
240 	case VME_AM_A32:
241 		ctl |= 0x00020000;
242 		break;
243 	case VME_AM_A24:
244 		ctl |= 0x00010000;
245 		break;
246 	case VME_AM_A16:
247 		break;
248 	default:
249 		return (EINVAL);
250 	}
251 	if (am & VME_AM_SUPER)
252 		ctl |= 0x00200000;
253 	else
254 		ctl |= 0x00300000; /* both */
255 	if ((am & VME_AM_MODEMASK) == VME_AM_PRG)
256 		ctl |= 0x00800000;
257 	else
258 		ctl |= 0x00c00000; /* both */
259 
260 #ifdef UNIV_DEBUG
261 	printf("%s: wnd %d, map PCI %x-%x to %x, ctl=%x\n",
262 	       d->devname, wnd, pcibase, pcibase + len, vmebase, ctl);
263 #endif
264 
265 	write_vmeslv(d, wnd, vsi_bs, vmebase);
266 	write_vmeslv(d, wnd, vsi_bd, vmebase + len);
267 	write_vmeslv(d, wnd, vsi_to, pcibase - vmebase);
268 	write_vmeslv(d, wnd, vsi_ctl, ctl);
269 	return (0);
270 }
271 
272 void
273 univ_pci_unmappci(d, wnd)
274 	struct univ_pci_data *d;
275 	int wnd;
276 {
277 #ifdef UNIV_DEBUG
278 	printf("%s: unmap PCI wnd %d\n", d->devname, wnd);
279 #endif
280 	write_vmeslv(d, wnd, vsi_ctl, 0);
281 }
282 
283 int
284 univ_pci_vmebuserr(d, clear)
285 	struct univ_pci_data *d;
286 	int clear;
287 {
288 	u_int32_t pcicsr;
289 
290 	pcicsr = read_csr_4(d, pci_csr);
291 	if ((pcicsr & 0xf8000000) && clear)
292 		write_csr_4(d, pci_csr, pcicsr | 0xf8000000);
293 	return (pcicsr & 0x08000000); /* target abort */
294 }
295 
296 int
297 univ_pci_intr(v)
298 	void *v;
299 {
300 	struct univ_pci_data *d = v;
301 	u_int32_t intcsr;
302 	int i, vec;
303 
304 	intcsr = read_csr_4(d, lint_stat) & 0xffffff;
305 	if (!intcsr)
306 		return (0);
307 
308 	/* ack everything */
309 	write_csr_4(d, lint_stat, intcsr);
310 #ifdef UNIV_DEBUG
311 	printf("%s: intr, lint_stat=%x\n", d->devname, intcsr);
312 #endif
313 	if (intcsr & 0x000000fe) { /* VME interrupt */
314 		for (i = 7; i >= 1; i--) {
315 			if (!(intcsr & (1 << i)))
316 				continue;
317 			vec = read_csr_4(d, v_statid[i - 1]);
318 			if (vec & 0x100) {
319 				printf("%s: err irq %d\n", d->devname, i);
320 				continue;
321 			}
322 			if (d->vmeinthandler)
323 				(*d->vmeinthandler)(d->vmeintcookie, i, vec);
324 		}
325 	}
326 
327 	return (1);
328 }
329