1 /* $NetBSD: twe.c,v 1.85 2008/04/10 19:13:38 cegger Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2001, 2002, 2003, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran; and by Jason R. Thorpe of Wasabi Systems, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /*- 40 * Copyright (c) 2000 Michael Smith 41 * Copyright (c) 2000 BSDi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 56 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 57 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 59 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 63 * SUCH DAMAGE. 64 * 65 * from FreeBSD: twe.c,v 1.1 2000/05/24 23:35:23 msmith Exp 66 */ 67 68 /* 69 * Driver for the 3ware Escalade family of RAID controllers. 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: twe.c,v 1.85 2008/04/10 19:13:38 cegger Exp $"); 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/device.h> 79 #include <sys/queue.h> 80 #include <sys/proc.h> 81 #include <sys/buf.h> 82 #include <sys/endian.h> 83 #include <sys/malloc.h> 84 #include <sys/conf.h> 85 #include <sys/disk.h> 86 #include <sys/sysctl.h> 87 #include <sys/syslog.h> 88 #include <sys/kauth.h> 89 90 #include <uvm/uvm_extern.h> 91 92 #include <sys/bswap.h> 93 #include <sys/bus.h> 94 95 #include <dev/pci/pcireg.h> 96 #include <dev/pci/pcivar.h> 97 #include <dev/pci/pcidevs.h> 98 #include <dev/pci/twereg.h> 99 #include <dev/pci/twevar.h> 100 #include <dev/pci/tweio.h> 101 102 #include "locators.h" 103 104 #define PCI_CBIO 0x10 105 106 static int twe_aen_get(struct twe_softc *, uint16_t *); 107 static void twe_aen_handler(struct twe_ccb *, int); 108 static void twe_aen_enqueue(struct twe_softc *sc, uint16_t, int); 109 static uint16_t twe_aen_dequeue(struct twe_softc *); 110 111 static void twe_attach(struct device *, struct device *, void *); 112 static int twe_init_connection(struct twe_softc *); 113 static int twe_intr(void *); 114 static int twe_match(struct device *, struct cfdata *, void *); 115 static int twe_param_set(struct twe_softc *, int, int, size_t, void *); 116 static void twe_poll(struct twe_softc *); 117 static int twe_print(void *, const char *); 118 static int twe_reset(struct twe_softc *); 119 static int twe_status_check(struct twe_softc *, u_int); 120 static int twe_status_wait(struct twe_softc *, u_int, int); 121 static void twe_describe_controller(struct twe_softc *); 122 static void twe_clear_pci_abort(struct twe_softc *sc); 123 static void twe_clear_pci_parity_error(struct twe_softc *sc); 124 125 static int twe_add_unit(struct twe_softc *, int); 126 static int twe_del_unit(struct twe_softc *, int); 127 static int twe_init_connection(struct twe_softc *); 128 129 static inline u_int32_t twe_inl(struct twe_softc *, int); 130 static inline void twe_outl(struct twe_softc *, int, u_int32_t); 131 132 extern struct cfdriver twe_cd; 133 134 CFATTACH_DECL(twe, sizeof(struct twe_softc), 135 twe_match, twe_attach, NULL, NULL); 136 137 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 138 const char twever[] = "1.50.01.002"; 139 140 /* 141 * Tables to convert numeric codes to strings. 142 */ 143 const struct twe_code_table twe_table_status[] = { 144 { 0x00, "successful completion" }, 145 146 /* info */ 147 { 0x42, "command in progress" }, 148 { 0x6c, "retrying interface CRC error from UDMA command" }, 149 150 /* warning */ 151 { 0x81, "redundant/inconsequential request ignored" }, 152 { 0x8e, "failed to write zeroes to LBA 0" }, 153 { 0x8f, "failed to profile TwinStor zones" }, 154 155 /* fatal */ 156 { 0xc1, "aborted due to system command or reconfiguration" }, 157 { 0xc4, "aborted" }, 158 { 0xc5, "access error" }, 159 { 0xc6, "access violation" }, 160 { 0xc7, "device failure" }, /* high byte may be port # */ 161 { 0xc8, "controller error" }, 162 { 0xc9, "timed out" }, 163 { 0xcb, "invalid unit number" }, 164 { 0xcf, "unit not available" }, 165 { 0xd2, "undefined opcode" }, 166 { 0xdb, "request incompatible with unit" }, 167 { 0xdc, "invalid request" }, 168 { 0xff, "firmware error, reset requested" }, 169 170 { 0, NULL } 171 }; 172 173 const struct twe_code_table twe_table_unitstate[] = { 174 { TWE_PARAM_UNITSTATUS_Normal, "Normal" }, 175 { TWE_PARAM_UNITSTATUS_Initialising, "Initializing" }, 176 { TWE_PARAM_UNITSTATUS_Degraded, "Degraded" }, 177 { TWE_PARAM_UNITSTATUS_Rebuilding, "Rebuilding" }, 178 { TWE_PARAM_UNITSTATUS_Verifying, "Verifying" }, 179 { TWE_PARAM_UNITSTATUS_Corrupt, "Corrupt" }, 180 { TWE_PARAM_UNITSTATUS_Missing, "Missing" }, 181 182 { 0, NULL } 183 }; 184 185 const struct twe_code_table twe_table_unittype[] = { 186 /* array descriptor configuration */ 187 { TWE_AD_CONFIG_RAID0, "RAID0" }, 188 { TWE_AD_CONFIG_RAID1, "RAID1" }, 189 { TWE_AD_CONFIG_TwinStor, "TwinStor" }, 190 { TWE_AD_CONFIG_RAID5, "RAID5" }, 191 { TWE_AD_CONFIG_RAID10, "RAID10" }, 192 { TWE_UD_CONFIG_JBOD, "JBOD" }, 193 194 { 0, NULL } 195 }; 196 197 const struct twe_code_table twe_table_stripedepth[] = { 198 { TWE_AD_STRIPE_4k, "4K" }, 199 { TWE_AD_STRIPE_8k, "8K" }, 200 { TWE_AD_STRIPE_16k, "16K" }, 201 { TWE_AD_STRIPE_32k, "32K" }, 202 { TWE_AD_STRIPE_64k, "64K" }, 203 { TWE_AD_STRIPE_128k, "128K" }, 204 { TWE_AD_STRIPE_256k, "256K" }, 205 { TWE_AD_STRIPE_512k, "512K" }, 206 { TWE_AD_STRIPE_1024k, "1024K" }, 207 208 { 0, NULL } 209 }; 210 211 /* 212 * Asynchronous event notification messages are qualified: 213 * a - not unit/port specific 214 * u - unit specific 215 * p - port specific 216 * 217 * They are further qualified with a severity: 218 * E - LOG_EMERG 219 * a - LOG_ALERT 220 * c - LOG_CRIT 221 * e - LOG_ERR 222 * w - LOG_WARNING 223 * n - LOG_NOTICE 224 * i - LOG_INFO 225 * d - LOG_DEBUG 226 * blank - just use printf 227 */ 228 const struct twe_code_table twe_table_aen[] = { 229 { 0x00, "a queue empty" }, 230 { 0x01, "a soft reset" }, 231 { 0x02, "uc degraded mode" }, 232 { 0x03, "aa controller error" }, 233 { 0x04, "uE rebuild fail" }, 234 { 0x05, "un rebuild done" }, 235 { 0x06, "ue incomplete unit" }, 236 { 0x07, "un initialization done" }, 237 { 0x08, "uw unclean shutdown detected" }, 238 { 0x09, "pe drive timeout" }, 239 { 0x0a, "pc drive error" }, 240 { 0x0b, "un rebuild started" }, 241 { 0x0c, "un initialization started" }, 242 { 0x0d, "ui logical unit deleted" }, 243 { 0x0f, "pc SMART threshold exceeded" }, 244 { 0x15, "a table undefined" }, /* XXX: Not in FreeBSD's table */ 245 { 0x21, "pe ATA UDMA downgrade" }, 246 { 0x22, "pi ATA UDMA upgrade" }, 247 { 0x23, "pw sector repair occurred" }, 248 { 0x24, "aa SBUF integrity check failure" }, 249 { 0x25, "pa lost cached write" }, 250 { 0x26, "pa drive ECC error detected" }, 251 { 0x27, "pe DCB checksum error" }, 252 { 0x28, "pn DCB unsupported version" }, 253 { 0x29, "ui verify started" }, 254 { 0x2a, "ua verify failed" }, 255 { 0x2b, "ui verify complete" }, 256 { 0x2c, "pw overwrote bad sector during rebuild" }, 257 { 0x2d, "pa encountered bad sector during rebuild" }, 258 { 0x2e, "pe replacement drive too small" }, 259 { 0x2f, "ue array not previously initialized" }, 260 { 0x30, "p drive not supported" }, 261 { 0xff, "a aen queue full" }, 262 263 { 0, NULL }, 264 }; 265 266 const char * 267 twe_describe_code(const struct twe_code_table *table, uint32_t code) 268 { 269 270 for (; table->string != NULL; table++) { 271 if (table->code == code) 272 return (table->string); 273 } 274 return (NULL); 275 } 276 277 static inline u_int32_t 278 twe_inl(struct twe_softc *sc, int off) 279 { 280 281 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 282 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 283 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, off)); 284 } 285 286 static inline void 287 twe_outl(struct twe_softc *sc, int off, u_int32_t val) 288 { 289 290 bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val); 291 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 292 BUS_SPACE_BARRIER_WRITE); 293 } 294 295 /* 296 * Match a supported board. 297 */ 298 static int 299 twe_match(struct device *parent, struct cfdata *cfdata, 300 void *aux) 301 { 302 struct pci_attach_args *pa; 303 304 pa = aux; 305 306 return (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE && 307 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE || 308 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE_ASIC)); 309 } 310 311 /* 312 * Attach a supported board. 313 * 314 * XXX This doesn't fail gracefully. 315 */ 316 static void 317 twe_attach(struct device *parent, struct device *self, void *aux) 318 { 319 struct pci_attach_args *pa; 320 struct twe_softc *sc; 321 pci_chipset_tag_t pc; 322 pci_intr_handle_t ih; 323 pcireg_t csr; 324 const char *intrstr; 325 int s, size, i, rv, rseg; 326 size_t max_segs, max_xfer; 327 bus_dma_segment_t seg; 328 struct ctlname ctlnames[] = CTL_NAMES; 329 const struct sysctlnode *node; 330 struct twe_cmd *tc; 331 struct twe_ccb *ccb; 332 333 sc = (struct twe_softc *)self; 334 pa = aux; 335 pc = pa->pa_pc; 336 sc->sc_dmat = pa->pa_dmat; 337 SIMPLEQ_INIT(&sc->sc_ccb_queue); 338 SLIST_INIT(&sc->sc_ccb_freelist); 339 340 aprint_naive(": RAID controller\n"); 341 aprint_normal(": 3ware Escalade\n"); 342 343 344 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 345 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 346 aprint_error_dev(&sc->sc_dv, "can't map i/o space\n"); 347 return; 348 } 349 350 /* Enable the device. */ 351 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 352 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 353 csr | PCI_COMMAND_MASTER_ENABLE); 354 355 /* Map and establish the interrupt. */ 356 if (pci_intr_map(pa, &ih)) { 357 aprint_error_dev(&sc->sc_dv, "can't map interrupt\n"); 358 return; 359 } 360 361 intrstr = pci_intr_string(pc, ih); 362 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, twe_intr, sc); 363 if (sc->sc_ih == NULL) { 364 aprint_error_dev(&sc->sc_dv, "can't establish interrupt%s%s\n", 365 (intrstr) ? " at " : "", 366 (intrstr) ? intrstr : ""); 367 return; 368 } 369 370 if (intrstr != NULL) 371 aprint_normal_dev(&sc->sc_dv, "interrupting at %s\n", 372 intrstr); 373 374 /* 375 * Allocate and initialise the command blocks and CCBs. 376 */ 377 size = sizeof(struct twe_cmd) * TWE_MAX_QUEUECNT; 378 379 if ((rv = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg, 1, 380 &rseg, BUS_DMA_NOWAIT)) != 0) { 381 aprint_error_dev(&sc->sc_dv, "unable to allocate commands, rv = %d\n", rv); 382 return; 383 } 384 385 if ((rv = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 386 (void **)&sc->sc_cmds, 387 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 388 aprint_error_dev(&sc->sc_dv, "unable to map commands, rv = %d\n", rv); 389 return; 390 } 391 392 if ((rv = bus_dmamap_create(sc->sc_dmat, size, size, 1, 0, 393 BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { 394 aprint_error_dev(&sc->sc_dv, "unable to create command DMA map, rv = %d\n", rv); 395 return; 396 } 397 398 if ((rv = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_cmds, 399 size, NULL, BUS_DMA_NOWAIT)) != 0) { 400 aprint_error_dev(&sc->sc_dv, "unable to load command DMA map, rv = %d\n", rv); 401 return; 402 } 403 404 ccb = malloc(sizeof(*ccb) * TWE_MAX_QUEUECNT, M_DEVBUF, M_NOWAIT); 405 if (ccb == NULL) { 406 aprint_error_dev(&sc->sc_dv, "unable to allocate memory for ccbs\n"); 407 return; 408 } 409 410 sc->sc_cmds_paddr = sc->sc_dmamap->dm_segs[0].ds_addr; 411 memset(sc->sc_cmds, 0, size); 412 413 sc->sc_ccbs = ccb; 414 tc = (struct twe_cmd *)sc->sc_cmds; 415 max_segs = twe_get_maxsegs(); 416 max_xfer = twe_get_maxxfer(max_segs); 417 418 for (i = 0; i < TWE_MAX_QUEUECNT; i++, tc++, ccb++) { 419 ccb->ccb_cmd = tc; 420 ccb->ccb_cmdid = i; 421 ccb->ccb_flags = 0; 422 rv = bus_dmamap_create(sc->sc_dmat, max_xfer, 423 max_segs, PAGE_SIZE, 0, 424 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 425 &ccb->ccb_dmamap_xfer); 426 if (rv != 0) { 427 aprint_error_dev(&sc->sc_dv, "can't create dmamap, rv = %d\n", rv); 428 return; 429 } 430 431 /* Save the first CCB for AEN retrieval. */ 432 if (i != 0) 433 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, 434 ccb_chain.slist); 435 } 436 437 /* Wait for the controller to become ready. */ 438 if (twe_status_wait(sc, TWE_STS_MICROCONTROLLER_READY, 6)) { 439 aprint_error_dev(&sc->sc_dv, "microcontroller not ready\n"); 440 return; 441 } 442 443 twe_outl(sc, TWE_REG_CTL, TWE_CTL_DISABLE_INTRS); 444 445 /* Reset the controller. */ 446 s = splbio(); 447 rv = twe_reset(sc); 448 splx(s); 449 if (rv) { 450 aprint_error_dev(&sc->sc_dv, "reset failed\n"); 451 return; 452 } 453 454 /* Initialise connection with controller. */ 455 twe_init_connection(sc); 456 457 twe_describe_controller(sc); 458 459 /* Find and attach RAID array units. */ 460 sc->sc_nunits = 0; 461 for (i = 0; i < TWE_MAX_UNITS; i++) 462 (void) twe_add_unit(sc, i); 463 464 /* ...and finally, enable interrupts. */ 465 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR | 466 TWE_CTL_UNMASK_RESP_INTR | 467 TWE_CTL_ENABLE_INTRS); 468 469 /* sysctl set-up for 3ware cli */ 470 if (sysctl_createv(NULL, 0, NULL, NULL, 471 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", 472 NULL, NULL, 0, NULL, 0, 473 CTL_HW, CTL_EOL) != 0) { 474 aprint_error_dev(&sc->sc_dv, "could not create %s sysctl node\n", 475 ctlnames[CTL_HW].ctl_name); 476 return; 477 } 478 if (sysctl_createv(NULL, 0, NULL, &node, 479 0, CTLTYPE_NODE, device_xname(&sc->sc_dv), 480 SYSCTL_DESCR("twe driver information"), 481 NULL, 0, NULL, 0, 482 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 483 aprint_error_dev(&sc->sc_dv, "could not create %s.%s sysctl node\n", 484 ctlnames[CTL_HW].ctl_name, device_xname(&sc->sc_dv)); 485 return; 486 } 487 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 488 0, CTLTYPE_STRING, "driver_version", 489 SYSCTL_DESCR("twe0 driver version"), 490 NULL, 0, &twever, 0, 491 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 492 != 0) { 493 aprint_error_dev(&sc->sc_dv, "could not create %s.%s.driver_version sysctl\n", 494 ctlnames[CTL_HW].ctl_name, device_xname(&sc->sc_dv)); 495 return; 496 } 497 } 498 499 void 500 twe_register_callbacks(struct twe_softc *sc, int unit, 501 const struct twe_callbacks *tcb) 502 { 503 504 sc->sc_units[unit].td_callbacks = tcb; 505 } 506 507 static void 508 twe_recompute_openings(struct twe_softc *sc) 509 { 510 struct twe_drive *td; 511 int unit, openings; 512 513 if (sc->sc_nunits != 0) 514 openings = (TWE_MAX_QUEUECNT - 1) / sc->sc_nunits; 515 else 516 openings = 0; 517 if (openings == sc->sc_openings) 518 return; 519 sc->sc_openings = openings; 520 521 #ifdef TWE_DEBUG 522 printf("%s: %d array%s, %d openings per array\n", 523 device_xname(&sc->sc_dv), sc->sc_nunits, 524 sc->sc_nunits == 1 ? "" : "s", sc->sc_openings); 525 #endif 526 527 for (unit = 0; unit < TWE_MAX_UNITS; unit++) { 528 td = &sc->sc_units[unit]; 529 if (td->td_dev != NULL) 530 (*td->td_callbacks->tcb_openings)(td->td_dev, 531 sc->sc_openings); 532 } 533 } 534 535 static int 536 twe_add_unit(struct twe_softc *sc, int unit) 537 { 538 struct twe_param *dtp, *atp; 539 struct twe_array_descriptor *ad; 540 struct twe_drive *td; 541 struct twe_attach_args twea; 542 uint32_t newsize; 543 int rv; 544 uint16_t dsize; 545 uint8_t newtype, newstripe; 546 int locs[TWECF_NLOCS]; 547 548 if (unit < 0 || unit >= TWE_MAX_UNITS) 549 return (EINVAL); 550 551 /* Find attached units. */ 552 rv = twe_param_get(sc, TWE_PARAM_UNITSUMMARY, 553 TWE_PARAM_UNITSUMMARY_Status, TWE_MAX_UNITS, NULL, &dtp); 554 if (rv != 0) { 555 aprint_error_dev(&sc->sc_dv, "error %d fetching unit summary\n", 556 rv); 557 return (rv); 558 } 559 560 /* For each detected unit, collect size and store in an array. */ 561 td = &sc->sc_units[unit]; 562 563 /* Unit present? */ 564 if ((dtp->tp_data[unit] & TWE_PARAM_UNITSTATUS_Online) == 0) { 565 /* 566 * XXX Should we check to see if a device has been 567 * XXX attached at this index and detach it if it 568 * XXX has? ("rescan" semantics) 569 */ 570 rv = 0; 571 goto out; 572 } 573 574 rv = twe_param_get_2(sc, TWE_PARAM_UNITINFO + unit, 575 TWE_PARAM_UNITINFO_DescriptorSize, &dsize); 576 if (rv != 0) { 577 aprint_error_dev(&sc->sc_dv, "error %d fetching descriptor size " 578 "for unit %d\n", rv, unit); 579 goto out; 580 } 581 582 rv = twe_param_get(sc, TWE_PARAM_UNITINFO + unit, 583 TWE_PARAM_UNITINFO_Descriptor, dsize - 3, NULL, &atp); 584 if (rv != 0) { 585 aprint_error_dev(&sc->sc_dv, "error %d fetching array descriptor " 586 "for unit %d\n", rv, unit); 587 goto out; 588 } 589 590 ad = (struct twe_array_descriptor *)atp->tp_data; 591 newtype = ad->configuration; 592 newstripe = ad->stripe_size; 593 free(atp, M_DEVBUF); 594 595 rv = twe_param_get_4(sc, TWE_PARAM_UNITINFO + unit, 596 TWE_PARAM_UNITINFO_Capacity, &newsize); 597 if (rv != 0) { 598 aprint_error_dev(&sc->sc_dv, 599 "error %d fetching capacity for unit %d\n", 600 rv, unit); 601 goto out; 602 } 603 604 /* 605 * Have a device, so we need to attach it. If there is currently 606 * something sitting at the slot, and the parameters are different, 607 * then we detach the old device before attaching the new one. 608 */ 609 if (td->td_dev != NULL && 610 td->td_size == newsize && 611 td->td_type == newtype && 612 td->td_stripe == newstripe) { 613 /* Same as the old device; just keep using it. */ 614 rv = 0; 615 goto out; 616 } else if (td->td_dev != NULL) { 617 /* Detach the old device first. */ 618 (void) config_detach(td->td_dev, DETACH_FORCE); 619 td->td_dev = NULL; 620 } else if (td->td_size == 0) 621 sc->sc_nunits++; 622 623 /* 624 * Committed to the new array unit; assign its parameters and 625 * recompute the number of available command openings. 626 */ 627 td->td_size = newsize; 628 td->td_type = newtype; 629 td->td_stripe = newstripe; 630 twe_recompute_openings(sc); 631 632 twea.twea_unit = unit; 633 634 locs[TWECF_UNIT] = unit; 635 636 td->td_dev = config_found_sm_loc(&sc->sc_dv, "twe", locs, &twea, 637 twe_print, config_stdsubmatch); 638 639 rv = 0; 640 out: 641 free(dtp, M_DEVBUF); 642 return (rv); 643 } 644 645 static int 646 twe_del_unit(struct twe_softc *sc, int unit) 647 { 648 struct twe_drive *td; 649 650 if (unit < 0 || unit >= TWE_MAX_UNITS) 651 return (EINVAL); 652 653 td = &sc->sc_units[unit]; 654 if (td->td_size != 0) 655 sc->sc_nunits--; 656 td->td_size = 0; 657 td->td_type = 0; 658 td->td_stripe = 0; 659 if (td->td_dev != NULL) { 660 (void) config_detach(td->td_dev, DETACH_FORCE); 661 td->td_dev = NULL; 662 } 663 twe_recompute_openings(sc); 664 return (0); 665 } 666 667 /* 668 * Reset the controller. 669 * MUST BE CALLED AT splbio()! 670 */ 671 static int 672 twe_reset(struct twe_softc *sc) 673 { 674 uint16_t aen; 675 u_int status; 676 volatile u_int32_t junk; 677 int got, rv; 678 679 /* Issue a soft reset. */ 680 twe_outl(sc, TWE_REG_CTL, TWE_CTL_ISSUE_SOFT_RESET | 681 TWE_CTL_CLEAR_HOST_INTR | 682 TWE_CTL_CLEAR_ATTN_INTR | 683 TWE_CTL_MASK_CMD_INTR | 684 TWE_CTL_MASK_RESP_INTR | 685 TWE_CTL_CLEAR_ERROR_STS | 686 TWE_CTL_DISABLE_INTRS); 687 688 /* Wait for attention... */ 689 if (twe_status_wait(sc, TWE_STS_ATTN_INTR, 30)) { 690 aprint_error_dev(&sc->sc_dv, "timeout waiting for attention interrupt\n"); 691 return (-1); 692 } 693 694 /* ...and ACK it. */ 695 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 696 697 /* 698 * Pull AENs out of the controller; look for a soft reset AEN. 699 * Open code this, since we want to detect reset even if the 700 * queue for management tools is full. 701 * 702 * Note that since: 703 * - interrupts are blocked 704 * - we have reset the controller 705 * - acknowledged the pending ATTENTION 706 * that there is no way a pending asynchronous AEN fetch would 707 * finish, so clear the flag. 708 */ 709 sc->sc_flags &= ~TWEF_AEN; 710 for (got = 0;;) { 711 rv = twe_aen_get(sc, &aen); 712 if (rv != 0) 713 printf("%s: error %d while draining event queue\n", 714 device_xname(&sc->sc_dv), rv); 715 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) 716 break; 717 if (TWE_AEN_CODE(aen) == TWE_AEN_SOFT_RESET) 718 got = 1; 719 twe_aen_enqueue(sc, aen, 1); 720 } 721 722 if (!got) { 723 printf("%s: reset not reported\n", device_xname(&sc->sc_dv)); 724 return (-1); 725 } 726 727 /* Check controller status. */ 728 status = twe_inl(sc, TWE_REG_STS); 729 if (twe_status_check(sc, status)) { 730 printf("%s: controller errors detected\n", 731 device_xname(&sc->sc_dv)); 732 return (-1); 733 } 734 735 /* Drain the response queue. */ 736 for (;;) { 737 status = twe_inl(sc, TWE_REG_STS); 738 if (twe_status_check(sc, status) != 0) { 739 aprint_error_dev(&sc->sc_dv, "can't drain response queue\n"); 740 return (-1); 741 } 742 if ((status & TWE_STS_RESP_QUEUE_EMPTY) != 0) 743 break; 744 junk = twe_inl(sc, TWE_REG_RESP_QUEUE); 745 } 746 747 return (0); 748 } 749 750 /* 751 * Print autoconfiguration message for a sub-device. 752 */ 753 static int 754 twe_print(void *aux, const char *pnp) 755 { 756 struct twe_attach_args *twea; 757 758 twea = aux; 759 760 if (pnp != NULL) 761 aprint_normal("block device at %s", pnp); 762 aprint_normal(" unit %d", twea->twea_unit); 763 return (UNCONF); 764 } 765 766 /* 767 * Interrupt service routine. 768 */ 769 static int 770 twe_intr(void *arg) 771 { 772 struct twe_softc *sc; 773 u_int status; 774 int caught, rv; 775 776 sc = arg; 777 caught = 0; 778 status = twe_inl(sc, TWE_REG_STS); 779 twe_status_check(sc, status); 780 781 /* Host interrupts - purpose unknown. */ 782 if ((status & TWE_STS_HOST_INTR) != 0) { 783 #ifdef DEBUG 784 printf("%s: host interrupt\n", device_xname(&sc->sc_dv)); 785 #endif 786 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_HOST_INTR); 787 caught = 1; 788 } 789 790 /* 791 * Attention interrupts, signalled when a controller or child device 792 * state change has occurred. 793 */ 794 if ((status & TWE_STS_ATTN_INTR) != 0) { 795 rv = twe_aen_get(sc, NULL); 796 if (rv != 0) 797 aprint_error_dev(&sc->sc_dv, "unable to retrieve AEN (%d)\n", rv); 798 else 799 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 800 caught = 1; 801 } 802 803 /* 804 * Command interrupts, signalled when the controller can accept more 805 * commands. We don't use this; instead, we try to submit commands 806 * when we receive them, and when other commands have completed. 807 * Mask it so we don't get another one. 808 */ 809 if ((status & TWE_STS_CMD_INTR) != 0) { 810 #ifdef DEBUG 811 printf("%s: command interrupt\n", device_xname(&sc->sc_dv)); 812 #endif 813 twe_outl(sc, TWE_REG_CTL, TWE_CTL_MASK_CMD_INTR); 814 caught = 1; 815 } 816 817 if ((status & TWE_STS_RESP_INTR) != 0) { 818 twe_poll(sc); 819 caught = 1; 820 } 821 822 return (caught); 823 } 824 825 /* 826 * Fetch an AEN. Even though this is really like parameter 827 * retrieval, we handle this specially, because we issue this 828 * AEN retrieval command from interrupt context, and thus 829 * reserve a CCB for it to avoid resource shortage. 830 * 831 * XXX There are still potential resource shortages we could 832 * XXX encounter. Consider pre-allocating all AEN-related 833 * XXX resources. 834 * 835 * MUST BE CALLED AT splbio()! 836 */ 837 static int 838 twe_aen_get(struct twe_softc *sc, uint16_t *aenp) 839 { 840 struct twe_ccb *ccb; 841 struct twe_cmd *tc; 842 struct twe_param *tp; 843 int rv; 844 845 /* 846 * If we're already retrieving an AEN, just wait; another 847 * retrieval will be chained after the current one completes. 848 */ 849 if (sc->sc_flags & TWEF_AEN) { 850 /* 851 * It is a fatal software programming error to attempt 852 * to fetch an AEN synchronously when an AEN fetch is 853 * already pending. 854 */ 855 KASSERT(aenp == NULL); 856 return (0); 857 } 858 859 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 860 if (tp == NULL) 861 return (ENOMEM); 862 863 ccb = twe_ccb_alloc(sc, 864 TWE_CCB_AEN | TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 865 KASSERT(ccb != NULL); 866 867 ccb->ccb_data = tp; 868 ccb->ccb_datasize = TWE_SECTOR_SIZE; 869 ccb->ccb_tx.tx_handler = (aenp == NULL) ? twe_aen_handler : NULL; 870 ccb->ccb_tx.tx_context = tp; 871 ccb->ccb_tx.tx_dv = &sc->sc_dv; 872 873 tc = ccb->ccb_cmd; 874 tc->tc_size = 2; 875 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 876 tc->tc_unit = 0; 877 tc->tc_count = htole16(1); 878 879 /* Fill in the outbound parameter data. */ 880 tp->tp_table_id = htole16(TWE_PARAM_AEN); 881 tp->tp_param_id = TWE_PARAM_AEN_UnitCode; 882 tp->tp_param_size = 2; 883 884 /* Map the transfer. */ 885 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 886 twe_ccb_free(sc, ccb); 887 goto done; 888 } 889 890 /* Enqueue the command and wait. */ 891 if (aenp != NULL) { 892 rv = twe_ccb_poll(sc, ccb, 5); 893 twe_ccb_unmap(sc, ccb); 894 twe_ccb_free(sc, ccb); 895 if (rv == 0) 896 *aenp = le16toh(*(uint16_t *)tp->tp_data); 897 free(tp, M_DEVBUF); 898 } else { 899 sc->sc_flags |= TWEF_AEN; 900 twe_ccb_enqueue(sc, ccb); 901 rv = 0; 902 } 903 904 done: 905 return (rv); 906 } 907 908 /* 909 * Handle an AEN returned by the controller. 910 * MUST BE CALLED AT splbio()! 911 */ 912 static void 913 twe_aen_handler(struct twe_ccb *ccb, int error) 914 { 915 struct twe_softc *sc; 916 struct twe_param *tp; 917 uint16_t aen; 918 int rv; 919 920 sc = (struct twe_softc *)ccb->ccb_tx.tx_dv; 921 tp = ccb->ccb_tx.tx_context; 922 twe_ccb_unmap(sc, ccb); 923 924 sc->sc_flags &= ~TWEF_AEN; 925 926 if (error) { 927 aprint_error_dev(&sc->sc_dv, "error retrieving AEN\n"); 928 aen = TWE_AEN_QUEUE_EMPTY; 929 } else 930 aen = le16toh(*(u_int16_t *)tp->tp_data); 931 free(tp, M_DEVBUF); 932 twe_ccb_free(sc, ccb); 933 934 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) { 935 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 936 return; 937 } 938 939 twe_aen_enqueue(sc, aen, 0); 940 941 /* 942 * Chain another retrieval in case interrupts have been 943 * coalesced. 944 */ 945 rv = twe_aen_get(sc, NULL); 946 if (rv != 0) 947 aprint_error_dev(&sc->sc_dv, "unable to retrieve AEN (%d)\n", rv); 948 } 949 950 static void 951 twe_aen_enqueue(struct twe_softc *sc, uint16_t aen, int quiet) 952 { 953 const char *str, *msg; 954 int s, next, nextnext, level; 955 956 /* 957 * First report the AEN on the console. Maybe. 958 */ 959 if (! quiet) { 960 str = twe_describe_code(twe_table_aen, TWE_AEN_CODE(aen)); 961 if (str == NULL) { 962 aprint_error_dev(&sc->sc_dv, "unknown AEN 0x%04x\n", aen); 963 } else { 964 msg = str + 3; 965 switch (str[1]) { 966 case 'E': level = LOG_EMERG; break; 967 case 'a': level = LOG_ALERT; break; 968 case 'c': level = LOG_CRIT; break; 969 case 'e': level = LOG_ERR; break; 970 case 'w': level = LOG_WARNING; break; 971 case 'n': level = LOG_NOTICE; break; 972 case 'i': level = LOG_INFO; break; 973 case 'd': level = LOG_DEBUG; break; 974 default: 975 /* Don't use syslog. */ 976 level = -1; 977 } 978 979 if (level < 0) { 980 switch (str[0]) { 981 case 'u': 982 case 'p': 983 printf("%s: %s %d: %s\n", 984 device_xname(&sc->sc_dv), 985 str[0] == 'u' ? "unit" : "port", 986 TWE_AEN_UNIT(aen), msg); 987 break; 988 989 default: 990 printf("%s: %s\n", 991 device_xname(&sc->sc_dv), msg); 992 } 993 } else { 994 switch (str[0]) { 995 case 'u': 996 case 'p': 997 log(level, "%s: %s %d: %s\n", 998 device_xname(&sc->sc_dv), 999 str[0] == 'u' ? "unit" : "port", 1000 TWE_AEN_UNIT(aen), msg); 1001 break; 1002 1003 default: 1004 log(level, "%s: %s\n", 1005 device_xname(&sc->sc_dv), msg); 1006 } 1007 } 1008 } 1009 } 1010 1011 /* Now enqueue the AEN for mangement tools. */ 1012 s = splbio(); 1013 1014 next = (sc->sc_aen_head + 1) % TWE_AEN_Q_LENGTH; 1015 nextnext = (sc->sc_aen_head + 2) % TWE_AEN_Q_LENGTH; 1016 1017 /* 1018 * If this is the last free slot, then queue up a "queue 1019 * full" message. 1020 */ 1021 if (nextnext == sc->sc_aen_tail) 1022 aen = TWE_AEN_QUEUE_FULL; 1023 1024 if (next != sc->sc_aen_tail) { 1025 sc->sc_aen_queue[sc->sc_aen_head] = aen; 1026 sc->sc_aen_head = next; 1027 } 1028 1029 if (sc->sc_flags & TWEF_AENQ_WAIT) { 1030 sc->sc_flags &= ~TWEF_AENQ_WAIT; 1031 wakeup(&sc->sc_aen_queue); 1032 } 1033 1034 splx(s); 1035 } 1036 1037 /* NOTE: Must be called at splbio(). */ 1038 static uint16_t 1039 twe_aen_dequeue(struct twe_softc *sc) 1040 { 1041 uint16_t aen; 1042 1043 if (sc->sc_aen_tail == sc->sc_aen_head) 1044 aen = TWE_AEN_QUEUE_EMPTY; 1045 else { 1046 aen = sc->sc_aen_queue[sc->sc_aen_tail]; 1047 sc->sc_aen_tail = (sc->sc_aen_tail + 1) % TWE_AEN_Q_LENGTH; 1048 } 1049 1050 return (aen); 1051 } 1052 1053 /* 1054 * These are short-hand functions that execute TWE_OP_GET_PARAM to 1055 * fetch 1, 2, and 4 byte parameter values, respectively. 1056 */ 1057 int 1058 twe_param_get_1(struct twe_softc *sc, int table_id, int param_id, 1059 uint8_t *valp) 1060 { 1061 struct twe_param *tp; 1062 int rv; 1063 1064 rv = twe_param_get(sc, table_id, param_id, 1, NULL, &tp); 1065 if (rv != 0) 1066 return (rv); 1067 *valp = *(uint8_t *)tp->tp_data; 1068 free(tp, M_DEVBUF); 1069 return (0); 1070 } 1071 1072 int 1073 twe_param_get_2(struct twe_softc *sc, int table_id, int param_id, 1074 uint16_t *valp) 1075 { 1076 struct twe_param *tp; 1077 int rv; 1078 1079 rv = twe_param_get(sc, table_id, param_id, 2, NULL, &tp); 1080 if (rv != 0) 1081 return (rv); 1082 *valp = le16toh(*(uint16_t *)tp->tp_data); 1083 free(tp, M_DEVBUF); 1084 return (0); 1085 } 1086 1087 int 1088 twe_param_get_4(struct twe_softc *sc, int table_id, int param_id, 1089 uint32_t *valp) 1090 { 1091 struct twe_param *tp; 1092 int rv; 1093 1094 rv = twe_param_get(sc, table_id, param_id, 4, NULL, &tp); 1095 if (rv != 0) 1096 return (rv); 1097 *valp = le32toh(*(uint32_t *)tp->tp_data); 1098 free(tp, M_DEVBUF); 1099 return (0); 1100 } 1101 1102 /* 1103 * Execute a TWE_OP_GET_PARAM command. If a callback function is provided, 1104 * it will be called with generated context when the command has completed. 1105 * If no callback is provided, the command will be executed synchronously 1106 * and a pointer to a buffer containing the data returned. 1107 * 1108 * The caller or callback is responsible for freeing the buffer. 1109 * 1110 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1111 */ 1112 int 1113 twe_param_get(struct twe_softc *sc, int table_id, int param_id, size_t size, 1114 void (*func)(struct twe_ccb *, int), struct twe_param **pbuf) 1115 { 1116 struct twe_ccb *ccb; 1117 struct twe_cmd *tc; 1118 struct twe_param *tp; 1119 int rv, s; 1120 1121 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1122 if (tp == NULL) 1123 return ENOMEM; 1124 1125 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1126 KASSERT(ccb != NULL); 1127 1128 ccb->ccb_data = tp; 1129 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1130 ccb->ccb_tx.tx_handler = func; 1131 ccb->ccb_tx.tx_context = tp; 1132 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1133 1134 tc = ccb->ccb_cmd; 1135 tc->tc_size = 2; 1136 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 1137 tc->tc_unit = 0; 1138 tc->tc_count = htole16(1); 1139 1140 /* Fill in the outbound parameter data. */ 1141 tp->tp_table_id = htole16(table_id); 1142 tp->tp_param_id = param_id; 1143 tp->tp_param_size = size; 1144 1145 /* Map the transfer. */ 1146 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1147 twe_ccb_free(sc, ccb); 1148 goto done; 1149 } 1150 1151 /* Submit the command and either wait or let the callback handle it. */ 1152 if (func == NULL) { 1153 s = splbio(); 1154 rv = twe_ccb_poll(sc, ccb, 5); 1155 twe_ccb_unmap(sc, ccb); 1156 twe_ccb_free(sc, ccb); 1157 splx(s); 1158 } else { 1159 #ifdef DEBUG 1160 if (pbuf != NULL) 1161 panic("both func and pbuf defined"); 1162 #endif 1163 twe_ccb_enqueue(sc, ccb); 1164 return 0; 1165 } 1166 1167 done: 1168 if (pbuf == NULL || rv != 0) 1169 free(tp, M_DEVBUF); 1170 else if (pbuf != NULL && rv == 0) 1171 *pbuf = tp; 1172 return rv; 1173 } 1174 1175 /* 1176 * Execute a TWE_OP_SET_PARAM command. 1177 * 1178 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1179 */ 1180 static int 1181 twe_param_set(struct twe_softc *sc, int table_id, int param_id, size_t size, 1182 void *sbuf) 1183 { 1184 struct twe_ccb *ccb; 1185 struct twe_cmd *tc; 1186 struct twe_param *tp; 1187 int rv, s; 1188 1189 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1190 if (tp == NULL) 1191 return ENOMEM; 1192 1193 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1194 KASSERT(ccb != NULL); 1195 1196 ccb->ccb_data = tp; 1197 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1198 ccb->ccb_tx.tx_handler = 0; 1199 ccb->ccb_tx.tx_context = tp; 1200 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1201 1202 tc = ccb->ccb_cmd; 1203 tc->tc_size = 2; 1204 tc->tc_opcode = TWE_OP_SET_PARAM | (tc->tc_size << 5); 1205 tc->tc_unit = 0; 1206 tc->tc_count = htole16(1); 1207 1208 /* Fill in the outbound parameter data. */ 1209 tp->tp_table_id = htole16(table_id); 1210 tp->tp_param_id = param_id; 1211 tp->tp_param_size = size; 1212 memcpy(tp->tp_data, sbuf, size); 1213 1214 /* Map the transfer. */ 1215 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1216 twe_ccb_free(sc, ccb); 1217 goto done; 1218 } 1219 1220 /* Submit the command and wait. */ 1221 s = splbio(); 1222 rv = twe_ccb_poll(sc, ccb, 5); 1223 twe_ccb_unmap(sc, ccb); 1224 twe_ccb_free(sc, ccb); 1225 splx(s); 1226 done: 1227 free(tp, M_DEVBUF); 1228 return (rv); 1229 } 1230 1231 /* 1232 * Execute a TWE_OP_INIT_CONNECTION command. Return non-zero on error. 1233 * Must be called with interrupts blocked. 1234 */ 1235 static int 1236 twe_init_connection(struct twe_softc *sc) 1237 { 1238 struct twe_ccb *ccb; 1239 struct twe_cmd *tc; 1240 int rv; 1241 1242 if ((ccb = twe_ccb_alloc(sc, 0)) == NULL) 1243 return (EAGAIN); 1244 1245 /* Build the command. */ 1246 tc = ccb->ccb_cmd; 1247 tc->tc_size = 3; 1248 tc->tc_opcode = TWE_OP_INIT_CONNECTION; 1249 tc->tc_unit = 0; 1250 tc->tc_count = htole16(TWE_MAX_CMDS); 1251 tc->tc_args.init_connection.response_queue_pointer = 0; 1252 1253 /* Submit the command for immediate execution. */ 1254 rv = twe_ccb_poll(sc, ccb, 5); 1255 twe_ccb_free(sc, ccb); 1256 return (rv); 1257 } 1258 1259 /* 1260 * Poll the controller for completed commands. Must be called with 1261 * interrupts blocked. 1262 */ 1263 static void 1264 twe_poll(struct twe_softc *sc) 1265 { 1266 struct twe_ccb *ccb; 1267 int found; 1268 u_int status, cmdid; 1269 1270 found = 0; 1271 1272 for (;;) { 1273 status = twe_inl(sc, TWE_REG_STS); 1274 twe_status_check(sc, status); 1275 1276 if ((status & TWE_STS_RESP_QUEUE_EMPTY)) 1277 break; 1278 1279 found = 1; 1280 cmdid = twe_inl(sc, TWE_REG_RESP_QUEUE); 1281 cmdid = (cmdid & TWE_RESP_MASK) >> TWE_RESP_SHIFT; 1282 if (cmdid >= TWE_MAX_QUEUECNT) { 1283 aprint_error_dev(&sc->sc_dv, "bad cmdid %d\n", cmdid); 1284 continue; 1285 } 1286 1287 ccb = sc->sc_ccbs + cmdid; 1288 if ((ccb->ccb_flags & TWE_CCB_ACTIVE) == 0) { 1289 printf("%s: CCB for cmdid %d not active\n", 1290 device_xname(&sc->sc_dv), cmdid); 1291 continue; 1292 } 1293 ccb->ccb_flags ^= TWE_CCB_COMPLETE | TWE_CCB_ACTIVE; 1294 1295 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1296 (char *)ccb->ccb_cmd - (char *)sc->sc_cmds, 1297 sizeof(struct twe_cmd), 1298 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1299 1300 /* Pass notification to upper layers. */ 1301 if (ccb->ccb_tx.tx_handler != NULL) 1302 (*ccb->ccb_tx.tx_handler)(ccb, 1303 ccb->ccb_cmd->tc_status != 0 ? EIO : 0); 1304 } 1305 1306 /* If any commands have completed, run the software queue. */ 1307 if (found) 1308 twe_ccb_enqueue(sc, NULL); 1309 } 1310 1311 /* 1312 * Wait for `status' to be set in the controller status register. Return 1313 * zero if found, non-zero if the operation timed out. 1314 */ 1315 static int 1316 twe_status_wait(struct twe_softc *sc, u_int32_t status, int timo) 1317 { 1318 1319 for (timo *= 10; timo != 0; timo--) { 1320 if ((twe_inl(sc, TWE_REG_STS) & status) == status) 1321 break; 1322 delay(100000); 1323 } 1324 1325 return (timo == 0); 1326 } 1327 1328 /* 1329 * Clear a PCI parity error. 1330 */ 1331 static void 1332 twe_clear_pci_parity_error(struct twe_softc *sc) 1333 { 1334 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PARITY_ERROR); 1335 1336 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PARITY_ERROR, 2); 1337 } 1338 1339 1340 /* 1341 * Clear a PCI abort. 1342 */ 1343 static void 1344 twe_clear_pci_abort(struct twe_softc *sc) 1345 { 1346 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PCI_ABORT); 1347 1348 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PCI_ABORT, 2); 1349 } 1350 1351 /* 1352 * Complain if the status bits aren't what we expect. 1353 */ 1354 static int 1355 twe_status_check(struct twe_softc *sc, u_int status) 1356 { 1357 int rv; 1358 1359 rv = 0; 1360 1361 if ((status & TWE_STS_EXPECTED_BITS) != TWE_STS_EXPECTED_BITS) { 1362 aprint_error_dev(&sc->sc_dv, "missing status bits: 0x%08x\n", 1363 status & ~TWE_STS_EXPECTED_BITS); 1364 rv = -1; 1365 } 1366 1367 if ((status & TWE_STS_UNEXPECTED_BITS) != 0) { 1368 aprint_error_dev(&sc->sc_dv, "unexpected status bits: 0x%08x\n", 1369 status & TWE_STS_UNEXPECTED_BITS); 1370 rv = -1; 1371 if (status & TWE_STS_PCI_PARITY_ERROR) { 1372 aprint_error_dev(&sc->sc_dv, "PCI parity error: Reseat card, move card " 1373 "or buggy device present.\n"); 1374 twe_clear_pci_parity_error(sc); 1375 } 1376 if (status & TWE_STS_PCI_ABORT) { 1377 aprint_error_dev(&sc->sc_dv, "PCI abort, clearing.\n"); 1378 twe_clear_pci_abort(sc); 1379 } 1380 } 1381 1382 return (rv); 1383 } 1384 1385 /* 1386 * Allocate and initialise a CCB. 1387 */ 1388 static inline void 1389 twe_ccb_init(struct twe_softc *sc, struct twe_ccb *ccb, int flags) 1390 { 1391 struct twe_cmd *tc; 1392 1393 ccb->ccb_tx.tx_handler = NULL; 1394 ccb->ccb_flags = flags; 1395 tc = ccb->ccb_cmd; 1396 tc->tc_status = 0; 1397 tc->tc_flags = 0; 1398 tc->tc_cmdid = ccb->ccb_cmdid; 1399 } 1400 1401 struct twe_ccb * 1402 twe_ccb_alloc(struct twe_softc *sc, int flags) 1403 { 1404 struct twe_ccb *ccb; 1405 int s; 1406 1407 s = splbio(); 1408 if (__predict_false((flags & TWE_CCB_AEN) != 0)) { 1409 /* Use the reserved CCB. */ 1410 ccb = sc->sc_ccbs; 1411 } else { 1412 /* Allocate a CCB and command block. */ 1413 if (__predict_false((ccb = 1414 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1415 splx(s); 1416 return (NULL); 1417 } 1418 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1419 } 1420 #ifdef DIAGNOSTIC 1421 if ((long)(ccb - sc->sc_ccbs) == 0 && (flags & TWE_CCB_AEN) == 0) 1422 panic("twe_ccb_alloc: got reserved CCB for non-AEN"); 1423 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1424 panic("twe_ccb_alloc: CCB %ld already allocated", 1425 (long)(ccb - sc->sc_ccbs)); 1426 flags |= TWE_CCB_ALLOCED; 1427 #endif 1428 splx(s); 1429 1430 twe_ccb_init(sc, ccb, flags); 1431 return (ccb); 1432 } 1433 1434 struct twe_ccb * 1435 twe_ccb_alloc_wait(struct twe_softc *sc, int flags) 1436 { 1437 struct twe_ccb *ccb; 1438 int s; 1439 1440 KASSERT((flags & TWE_CCB_AEN) == 0); 1441 1442 s = splbio(); 1443 while (__predict_false((ccb = 1444 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1445 sc->sc_flags |= TWEF_WAIT_CCB; 1446 (void) tsleep(&sc->sc_ccb_freelist, PRIBIO, "tweccb", 0); 1447 } 1448 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1449 #ifdef DIAGNOSTIC 1450 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1451 panic("twe_ccb_alloc_wait: CCB %ld already allocated", 1452 (long)(ccb - sc->sc_ccbs)); 1453 flags |= TWE_CCB_ALLOCED; 1454 #endif 1455 splx(s); 1456 1457 twe_ccb_init(sc, ccb, flags); 1458 return (ccb); 1459 } 1460 1461 /* 1462 * Free a CCB. 1463 */ 1464 void 1465 twe_ccb_free(struct twe_softc *sc, struct twe_ccb *ccb) 1466 { 1467 int s; 1468 1469 s = splbio(); 1470 if ((ccb->ccb_flags & TWE_CCB_AEN) == 0) { 1471 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, ccb_chain.slist); 1472 if (__predict_false((sc->sc_flags & TWEF_WAIT_CCB) != 0)) { 1473 sc->sc_flags &= ~TWEF_WAIT_CCB; 1474 wakeup(&sc->sc_ccb_freelist); 1475 } 1476 } 1477 ccb->ccb_flags = 0; 1478 splx(s); 1479 } 1480 1481 /* 1482 * Map the specified CCB's command block and data buffer (if any) into 1483 * controller visible space. Perform DMA synchronisation. 1484 */ 1485 int 1486 twe_ccb_map(struct twe_softc *sc, struct twe_ccb *ccb) 1487 { 1488 struct twe_cmd *tc; 1489 int flags, nsegs, i, s, rv; 1490 void *data; 1491 1492 /* 1493 * The data as a whole must be 512-byte aligned. 1494 */ 1495 if (((u_long)ccb->ccb_data & (TWE_ALIGNMENT - 1)) != 0) { 1496 s = splvm(); 1497 /* XXX */ 1498 ccb->ccb_abuf = uvm_km_alloc(kmem_map, 1499 ccb->ccb_datasize, 0, UVM_KMF_NOWAIT|UVM_KMF_WIRED); 1500 splx(s); 1501 data = (void *)ccb->ccb_abuf; 1502 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1503 memcpy(data, ccb->ccb_data, ccb->ccb_datasize); 1504 } else { 1505 ccb->ccb_abuf = (vaddr_t)0; 1506 data = ccb->ccb_data; 1507 } 1508 1509 /* 1510 * Map the data buffer into bus space and build the S/G list. 1511 */ 1512 rv = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer, data, 1513 ccb->ccb_datasize, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | 1514 ((ccb->ccb_flags & TWE_CCB_DATA_IN) ? 1515 BUS_DMA_READ : BUS_DMA_WRITE)); 1516 if (rv != 0) { 1517 if (ccb->ccb_abuf != (vaddr_t)0) { 1518 s = splvm(); 1519 /* XXX */ 1520 uvm_km_free(kmem_map, ccb->ccb_abuf, 1521 ccb->ccb_datasize, UVM_KMF_WIRED); 1522 splx(s); 1523 } 1524 return (rv); 1525 } 1526 1527 nsegs = ccb->ccb_dmamap_xfer->dm_nsegs; 1528 tc = ccb->ccb_cmd; 1529 tc->tc_size += 2 * nsegs; 1530 1531 /* The location of the S/G list is dependant upon command type. */ 1532 switch (tc->tc_opcode >> 5) { 1533 case 2: 1534 for (i = 0; i < nsegs; i++) { 1535 tc->tc_args.param.sgl[i].tsg_address = 1536 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1537 tc->tc_args.param.sgl[i].tsg_length = 1538 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1539 } 1540 /* XXX Needed? */ 1541 for (; i < TWE_SG_SIZE; i++) { 1542 tc->tc_args.param.sgl[i].tsg_address = 0; 1543 tc->tc_args.param.sgl[i].tsg_length = 0; 1544 } 1545 break; 1546 case 3: 1547 for (i = 0; i < nsegs; i++) { 1548 tc->tc_args.io.sgl[i].tsg_address = 1549 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1550 tc->tc_args.io.sgl[i].tsg_length = 1551 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1552 } 1553 /* XXX Needed? */ 1554 for (; i < TWE_SG_SIZE; i++) { 1555 tc->tc_args.io.sgl[i].tsg_address = 0; 1556 tc->tc_args.io.sgl[i].tsg_length = 0; 1557 } 1558 break; 1559 default: 1560 /* 1561 * In all likelihood, this is a command passed from 1562 * management tools in userspace where no S/G list is 1563 * necessary because no data is being passed. 1564 */ 1565 break; 1566 } 1567 1568 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1569 flags = BUS_DMASYNC_PREREAD; 1570 else 1571 flags = 0; 1572 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1573 flags |= BUS_DMASYNC_PREWRITE; 1574 1575 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1576 ccb->ccb_datasize, flags); 1577 return (0); 1578 } 1579 1580 /* 1581 * Unmap the specified CCB's command block and data buffer (if any) and 1582 * perform DMA synchronisation. 1583 */ 1584 void 1585 twe_ccb_unmap(struct twe_softc *sc, struct twe_ccb *ccb) 1586 { 1587 int flags, s; 1588 1589 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1590 flags = BUS_DMASYNC_POSTREAD; 1591 else 1592 flags = 0; 1593 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1594 flags |= BUS_DMASYNC_POSTWRITE; 1595 1596 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1597 ccb->ccb_datasize, flags); 1598 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer); 1599 1600 if (ccb->ccb_abuf != (vaddr_t)0) { 1601 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1602 memcpy(ccb->ccb_data, (void *)ccb->ccb_abuf, 1603 ccb->ccb_datasize); 1604 s = splvm(); 1605 /* XXX */ 1606 uvm_km_free(kmem_map, ccb->ccb_abuf, ccb->ccb_datasize, 1607 UVM_KMF_WIRED); 1608 splx(s); 1609 } 1610 } 1611 1612 /* 1613 * Submit a command to the controller and poll on completion. Return 1614 * non-zero on timeout (but don't check status, as some command types don't 1615 * return status). Must be called with interrupts blocked. 1616 */ 1617 int 1618 twe_ccb_poll(struct twe_softc *sc, struct twe_ccb *ccb, int timo) 1619 { 1620 int rv; 1621 1622 if ((rv = twe_ccb_submit(sc, ccb)) != 0) 1623 return (rv); 1624 1625 for (timo *= 1000; timo != 0; timo--) { 1626 twe_poll(sc); 1627 if ((ccb->ccb_flags & TWE_CCB_COMPLETE) != 0) 1628 break; 1629 DELAY(100); 1630 } 1631 1632 return (timo == 0); 1633 } 1634 1635 /* 1636 * If a CCB is specified, enqueue it. Pull CCBs off the software queue in 1637 * the order that they were enqueued and try to submit their command blocks 1638 * to the controller for execution. 1639 */ 1640 void 1641 twe_ccb_enqueue(struct twe_softc *sc, struct twe_ccb *ccb) 1642 { 1643 int s; 1644 1645 s = splbio(); 1646 1647 if (ccb != NULL) 1648 SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain.simpleq); 1649 1650 while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) { 1651 if (twe_ccb_submit(sc, ccb)) 1652 break; 1653 SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb_chain.simpleq); 1654 } 1655 1656 splx(s); 1657 } 1658 1659 /* 1660 * Submit the command block associated with the specified CCB to the 1661 * controller for execution. Must be called with interrupts blocked. 1662 */ 1663 int 1664 twe_ccb_submit(struct twe_softc *sc, struct twe_ccb *ccb) 1665 { 1666 bus_addr_t pa; 1667 int rv; 1668 u_int status; 1669 1670 /* Check to see if we can post a command. */ 1671 status = twe_inl(sc, TWE_REG_STS); 1672 twe_status_check(sc, status); 1673 1674 if ((status & TWE_STS_CMD_QUEUE_FULL) == 0) { 1675 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1676 (char *)ccb->ccb_cmd - (char *)sc->sc_cmds, 1677 sizeof(struct twe_cmd), 1678 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1679 #ifdef DIAGNOSTIC 1680 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) == 0) 1681 panic("%s: CCB %ld not ALLOCED\n", 1682 device_xname(&sc->sc_dv), (long)(ccb - sc->sc_ccbs)); 1683 #endif 1684 ccb->ccb_flags |= TWE_CCB_ACTIVE; 1685 pa = sc->sc_cmds_paddr + 1686 ccb->ccb_cmdid * sizeof(struct twe_cmd); 1687 twe_outl(sc, TWE_REG_CMD_QUEUE, (u_int32_t)pa); 1688 rv = 0; 1689 } else 1690 rv = EBUSY; 1691 1692 return (rv); 1693 } 1694 1695 1696 /* 1697 * Accept an open operation on the control device. 1698 */ 1699 static int 1700 tweopen(dev_t dev, int flag, int mode, struct lwp *l) 1701 { 1702 struct twe_softc *twe; 1703 1704 if ((twe = device_lookup(&twe_cd, minor(dev))) == NULL) 1705 return (ENXIO); 1706 if ((twe->sc_flags & TWEF_OPEN) != 0) 1707 return (EBUSY); 1708 1709 twe->sc_flags |= TWEF_OPEN; 1710 return (0); 1711 } 1712 1713 /* 1714 * Accept the last close on the control device. 1715 */ 1716 static int 1717 tweclose(dev_t dev, int flag, int mode, 1718 struct lwp *l) 1719 { 1720 struct twe_softc *twe; 1721 1722 twe = device_lookup(&twe_cd, minor(dev)); 1723 twe->sc_flags &= ~TWEF_OPEN; 1724 return (0); 1725 } 1726 1727 void 1728 twe_ccb_wait_handler(struct twe_ccb *ccb, int error) 1729 { 1730 1731 /* Just wake up the sleeper. */ 1732 wakeup(ccb); 1733 } 1734 1735 /* 1736 * Handle control operations. 1737 */ 1738 static int 1739 tweioctl(dev_t dev, u_long cmd, void *data, int flag, 1740 struct lwp *l) 1741 { 1742 struct twe_softc *twe; 1743 struct twe_ccb *ccb; 1744 struct twe_param *param; 1745 struct twe_usercommand *tu; 1746 struct twe_paramcommand *tp; 1747 struct twe_drivecommand *td; 1748 void *pdata = NULL; 1749 int s, error = 0; 1750 u_int8_t cmdid; 1751 1752 twe = device_lookup(&twe_cd, minor(dev)); 1753 tu = (struct twe_usercommand *)data; 1754 tp = (struct twe_paramcommand *)data; 1755 td = (struct twe_drivecommand *)data; 1756 1757 /* This is intended to be compatible with the FreeBSD interface. */ 1758 switch (cmd) { 1759 case TWEIO_COMMAND: 1760 error = kauth_authorize_device_passthru(l->l_cred, dev, 1761 KAUTH_REQ_DEVICE_RAWIO_PASSTHRU_ALL, data); 1762 if (error) 1763 return (error); 1764 1765 /* XXX mutex */ 1766 if (tu->tu_size > 0) { 1767 /* 1768 * XXX Handle > TWE_SECTOR_SIZE? Let's see if 1769 * it's really necessary, first. 1770 */ 1771 if (tu->tu_size > TWE_SECTOR_SIZE) { 1772 #ifdef TWE_DEBUG 1773 printf("%s: TWEIO_COMMAND: tu_size = %d\n", 1774 device_xname(&twe->sc_dv), tu->tu_size); 1775 #endif 1776 return EINVAL; 1777 } 1778 pdata = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_WAITOK); 1779 error = copyin(tu->tu_data, pdata, tu->tu_size); 1780 if (error != 0) 1781 goto done; 1782 ccb = twe_ccb_alloc_wait(twe, 1783 TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1784 KASSERT(ccb != NULL); 1785 ccb->ccb_data = pdata; 1786 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1787 } else { 1788 ccb = twe_ccb_alloc_wait(twe, 0); 1789 KASSERT(ccb != NULL); 1790 } 1791 1792 ccb->ccb_tx.tx_handler = twe_ccb_wait_handler; 1793 ccb->ccb_tx.tx_context = NULL; 1794 ccb->ccb_tx.tx_dv = &twe->sc_dv; 1795 1796 cmdid = ccb->ccb_cmdid; 1797 memcpy(ccb->ccb_cmd, &tu->tu_cmd, sizeof(struct twe_cmd)); 1798 ccb->ccb_cmd->tc_cmdid = cmdid; 1799 1800 /* Map the transfer. */ 1801 if ((error = twe_ccb_map(twe, ccb)) != 0) { 1802 twe_ccb_free(twe, ccb); 1803 goto done; 1804 } 1805 1806 /* Submit the command and wait up to 1 minute. */ 1807 error = 0; 1808 twe_ccb_enqueue(twe, ccb); 1809 s = splbio(); 1810 while ((ccb->ccb_flags & TWE_CCB_COMPLETE) == 0) 1811 if ((error = tsleep(ccb, PRIBIO, "tweioctl", 1812 60 * hz)) != 0) 1813 break; 1814 splx(s); 1815 1816 /* Copy the command back to the ioctl argument. */ 1817 memcpy(&tu->tu_cmd, ccb->ccb_cmd, sizeof(struct twe_cmd)); 1818 #ifdef TWE_DEBUG 1819 printf("%s: TWEIO_COMMAND: tc_opcode = 0x%02x, " 1820 "tc_status = 0x%02x\n", device_xname(&twe->sc_dv), 1821 tu->tu_cmd.tc_opcode, tu->tu_cmd.tc_status); 1822 #endif 1823 1824 s = splbio(); 1825 twe_ccb_free(twe, ccb); 1826 splx(s); 1827 1828 if (tu->tu_size > 0) 1829 error = copyout(pdata, tu->tu_data, tu->tu_size); 1830 goto done; 1831 1832 case TWEIO_STATS: 1833 return (ENOENT); 1834 1835 case TWEIO_AEN_POLL: 1836 s = splbio(); 1837 *(u_int *)data = twe_aen_dequeue(twe); 1838 splx(s); 1839 return (0); 1840 1841 case TWEIO_AEN_WAIT: 1842 s = splbio(); 1843 while ((*(u_int *)data = 1844 twe_aen_dequeue(twe)) == TWE_AEN_QUEUE_EMPTY) { 1845 twe->sc_flags |= TWEF_AENQ_WAIT; 1846 error = tsleep(&twe->sc_aen_queue, PRIBIO | PCATCH, 1847 "tweaen", 0); 1848 if (error == EINTR) { 1849 splx(s); 1850 return (error); 1851 } 1852 } 1853 splx(s); 1854 return (0); 1855 1856 case TWEIO_GET_PARAM: 1857 error = twe_param_get(twe, tp->tp_table_id, tp->tp_param_id, 1858 tp->tp_size, 0, ¶m); 1859 if (error != 0) 1860 return (error); 1861 if (param->tp_param_size > tp->tp_size) { 1862 error = EFAULT; 1863 goto done; 1864 } 1865 error = copyout(param->tp_data, tp->tp_data, 1866 param->tp_param_size); 1867 free(param, M_DEVBUF); 1868 goto done; 1869 1870 case TWEIO_SET_PARAM: 1871 pdata = malloc(tp->tp_size, M_DEVBUF, M_WAITOK); 1872 if ((error = copyin(tp->tp_data, pdata, tp->tp_size)) != 0) 1873 goto done; 1874 error = twe_param_set(twe, tp->tp_table_id, tp->tp_param_id, 1875 tp->tp_size, pdata); 1876 goto done; 1877 1878 case TWEIO_RESET: 1879 s = splbio(); 1880 twe_reset(twe); 1881 splx(s); 1882 return (0); 1883 1884 case TWEIO_ADD_UNIT: 1885 /* XXX mutex */ 1886 return (twe_add_unit(twe, td->td_unit)); 1887 1888 case TWEIO_DEL_UNIT: 1889 /* XXX mutex */ 1890 return (twe_del_unit(twe, td->td_unit)); 1891 1892 default: 1893 return EINVAL; 1894 } 1895 done: 1896 if (pdata) 1897 free(pdata, M_DEVBUF); 1898 return error; 1899 } 1900 1901 const struct cdevsw twe_cdevsw = { 1902 tweopen, tweclose, noread, nowrite, tweioctl, 1903 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER, 1904 }; 1905 1906 /* 1907 * Print some information about the controller 1908 */ 1909 static void 1910 twe_describe_controller(struct twe_softc *sc) 1911 { 1912 struct twe_param *p[6]; 1913 int i, rv = 0; 1914 uint32_t dsize; 1915 uint8_t ports; 1916 1917 ports = 0; 1918 1919 /* get the port count */ 1920 rv |= twe_param_get_1(sc, TWE_PARAM_CONTROLLER, 1921 TWE_PARAM_CONTROLLER_PortCount, &ports); 1922 1923 /* get version strings */ 1924 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_Mon, 1925 16, NULL, &p[0]); 1926 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_FW, 1927 16, NULL, &p[1]); 1928 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_BIOS, 1929 16, NULL, &p[2]); 1930 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCB, 1931 8, NULL, &p[3]); 1932 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_ATA, 1933 8, NULL, &p[4]); 1934 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCI, 1935 8, NULL, &p[5]); 1936 1937 if (rv) { 1938 /* some error occurred */ 1939 aprint_error_dev(&sc->sc_dv, "failed to fetch version information\n"); 1940 return; 1941 } 1942 1943 aprint_normal_dev(&sc->sc_dv, "%d ports, Firmware %.16s, BIOS %.16s\n", 1944 ports, p[1]->tp_data, p[2]->tp_data); 1945 1946 aprint_verbose_dev(&sc->sc_dv, "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 1947 p[0]->tp_data, p[3]->tp_data, 1948 p[4]->tp_data, p[5]->tp_data); 1949 1950 free(p[0], M_DEVBUF); 1951 free(p[1], M_DEVBUF); 1952 free(p[2], M_DEVBUF); 1953 free(p[3], M_DEVBUF); 1954 free(p[4], M_DEVBUF); 1955 free(p[5], M_DEVBUF); 1956 1957 rv = twe_param_get(sc, TWE_PARAM_DRIVESUMMARY, 1958 TWE_PARAM_DRIVESUMMARY_Status, 16, NULL, &p[0]); 1959 if (rv) { 1960 aprint_error_dev(&sc->sc_dv, "failed to get drive status summary\n"); 1961 return; 1962 } 1963 for (i = 0; i < ports; i++) { 1964 if (p[0]->tp_data[i] != TWE_PARAM_DRIVESTATUS_Present) 1965 continue; 1966 rv = twe_param_get_4(sc, TWE_PARAM_DRIVEINFO + i, 1967 TWE_PARAM_DRIVEINFO_Size, &dsize); 1968 if (rv) { 1969 aprint_error_dev(&sc->sc_dv, 1970 "unable to get drive size for port %d\n", i); 1971 continue; 1972 } 1973 rv = twe_param_get(sc, TWE_PARAM_DRIVEINFO + i, 1974 TWE_PARAM_DRIVEINFO_Model, 40, NULL, &p[1]); 1975 if (rv) { 1976 aprint_error_dev(&sc->sc_dv, 1977 "unable to get drive model for port %d\n", i); 1978 continue; 1979 } 1980 aprint_verbose_dev(&sc->sc_dv, "port %d: %.40s %d MB\n", 1981 i, p[1]->tp_data, dsize / 2048); 1982 free(p[1], M_DEVBUF); 1983 } 1984 free(p[0], M_DEVBUF); 1985 } 1986