xref: /netbsd-src/sys/dev/pci/twe.c (revision 48fb7bfab72acd4281a53bbee5ccf3f809019e75)
1 /*	$NetBSD: twe.c,v 1.100 2014/02/25 18:30:10 pooka Exp $	*/
2 
3 /*-
4  * Copyright (c) 2000, 2001, 2002, 2003, 2004 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Andrew Doran; and by Jason R. Thorpe of Wasabi Systems, Inc.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*-
33  * Copyright (c) 2000 Michael Smith
34  * Copyright (c) 2000 BSDi
35  * All rights reserved.
36  *
37  * Redistribution and use in source and binary forms, with or without
38  * modification, are permitted provided that the following conditions
39  * are met:
40  * 1. Redistributions of source code must retain the above copyright
41  *    notice, this list of conditions and the following disclaimer.
42  * 2. Redistributions in binary form must reproduce the above copyright
43  *    notice, this list of conditions and the following disclaimer in the
44  *    documentation and/or other materials provided with the distribution.
45  *
46  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
47  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
48  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
49  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
50  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
51  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
52  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
53  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
54  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
55  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
56  * SUCH DAMAGE.
57  *
58  * from FreeBSD: twe.c,v 1.1 2000/05/24 23:35:23 msmith Exp
59  */
60 
61 /*
62  * Driver for the 3ware Escalade family of RAID controllers.
63  */
64 
65 #include <sys/cdefs.h>
66 __KERNEL_RCSID(0, "$NetBSD: twe.c,v 1.100 2014/02/25 18:30:10 pooka Exp $");
67 
68 #include <sys/param.h>
69 #include <sys/systm.h>
70 #include <sys/kernel.h>
71 #include <sys/device.h>
72 #include <sys/queue.h>
73 #include <sys/proc.h>
74 #include <sys/buf.h>
75 #include <sys/endian.h>
76 #include <sys/malloc.h>
77 #include <sys/conf.h>
78 #include <sys/disk.h>
79 #include <sys/sysctl.h>
80 #include <sys/syslog.h>
81 #include <sys/kauth.h>
82 
83 #include <sys/bswap.h>
84 #include <sys/bus.h>
85 
86 #include <dev/pci/pcireg.h>
87 #include <dev/pci/pcivar.h>
88 #include <dev/pci/pcidevs.h>
89 #include <dev/pci/twereg.h>
90 #include <dev/pci/twevar.h>
91 #include <dev/pci/tweio.h>
92 
93 #include "locators.h"
94 
95 #define	PCI_CBIO	0x10
96 
97 static int	twe_aen_get(struct twe_softc *, uint16_t *);
98 static void	twe_aen_handler(struct twe_ccb *, int);
99 static void	twe_aen_enqueue(struct twe_softc *sc, uint16_t, int);
100 static uint16_t	twe_aen_dequeue(struct twe_softc *);
101 
102 static void	twe_attach(device_t, device_t, void *);
103 static int	twe_init_connection(struct twe_softc *);
104 static int	twe_intr(void *);
105 static int	twe_match(device_t, cfdata_t, void *);
106 static int	twe_param_set(struct twe_softc *, int, int, size_t, void *);
107 static void	twe_poll(struct twe_softc *);
108 static int	twe_print(void *, const char *);
109 static int	twe_reset(struct twe_softc *);
110 static int	twe_status_check(struct twe_softc *, u_int);
111 static int	twe_status_wait(struct twe_softc *, u_int, int);
112 static void	twe_describe_controller(struct twe_softc *);
113 static void twe_clear_pci_abort(struct twe_softc *sc);
114 static void twe_clear_pci_parity_error(struct twe_softc *sc);
115 
116 static int	twe_add_unit(struct twe_softc *, int);
117 static int	twe_del_unit(struct twe_softc *, int);
118 static int	twe_init_connection(struct twe_softc *);
119 
120 static inline u_int32_t	twe_inl(struct twe_softc *, int);
121 static inline void twe_outl(struct twe_softc *, int, u_int32_t);
122 
123 extern struct	cfdriver twe_cd;
124 
125 CFATTACH_DECL_NEW(twe, sizeof(struct twe_softc),
126     twe_match, twe_attach, NULL, NULL);
127 
128 /* FreeBSD driver revision for sysctl expected by the 3ware cli */
129 const char twever[] = "1.50.01.002";
130 
131 /*
132  * Tables to convert numeric codes to strings.
133  */
134 const struct twe_code_table twe_table_status[] = {
135 	{ 0x00,	"successful completion" },
136 
137 	/* info */
138 	{ 0x42,	"command in progress" },
139 	{ 0x6c,	"retrying interface CRC error from UDMA command" },
140 
141 	/* warning */
142 	{ 0x81,	"redundant/inconsequential request ignored" },
143 	{ 0x8e,	"failed to write zeroes to LBA 0" },
144 	{ 0x8f,	"failed to profile TwinStor zones" },
145 
146 	/* fatal */
147 	{ 0xc1,	"aborted due to system command or reconfiguration" },
148 	{ 0xc4,	"aborted" },
149 	{ 0xc5,	"access error" },
150 	{ 0xc6,	"access violation" },
151 	{ 0xc7,	"device failure" },	/* high byte may be port # */
152 	{ 0xc8,	"controller error" },
153 	{ 0xc9,	"timed out" },
154 	{ 0xcb,	"invalid unit number" },
155 	{ 0xcf,	"unit not available" },
156 	{ 0xd2,	"undefined opcode" },
157 	{ 0xdb,	"request incompatible with unit" },
158 	{ 0xdc,	"invalid request" },
159 	{ 0xff,	"firmware error, reset requested" },
160 
161 	{ 0,	NULL }
162 };
163 
164 const struct twe_code_table twe_table_unitstate[] = {
165 	{ TWE_PARAM_UNITSTATUS_Normal,		"Normal" },
166 	{ TWE_PARAM_UNITSTATUS_Initialising,	"Initializing" },
167 	{ TWE_PARAM_UNITSTATUS_Degraded,	"Degraded" },
168 	{ TWE_PARAM_UNITSTATUS_Rebuilding,	"Rebuilding" },
169 	{ TWE_PARAM_UNITSTATUS_Verifying,	"Verifying" },
170 	{ TWE_PARAM_UNITSTATUS_Corrupt,		"Corrupt" },
171 	{ TWE_PARAM_UNITSTATUS_Missing,		"Missing" },
172 
173 	{ 0,					NULL }
174 };
175 
176 const struct twe_code_table twe_table_unittype[] = {
177 	/* array descriptor configuration */
178 	{ TWE_AD_CONFIG_RAID0,			"RAID0" },
179 	{ TWE_AD_CONFIG_RAID1,			"RAID1" },
180 	{ TWE_AD_CONFIG_TwinStor,		"TwinStor" },
181 	{ TWE_AD_CONFIG_RAID5,			"RAID5" },
182 	{ TWE_AD_CONFIG_RAID10,			"RAID10" },
183 	{ TWE_UD_CONFIG_JBOD,			"JBOD" },
184 
185 	{ 0,					NULL }
186 };
187 
188 const struct twe_code_table twe_table_stripedepth[] = {
189 	{ TWE_AD_STRIPE_4k,			"4K" },
190 	{ TWE_AD_STRIPE_8k,			"8K" },
191 	{ TWE_AD_STRIPE_16k,			"16K" },
192 	{ TWE_AD_STRIPE_32k,			"32K" },
193 	{ TWE_AD_STRIPE_64k,			"64K" },
194 	{ TWE_AD_STRIPE_128k,			"128K" },
195 	{ TWE_AD_STRIPE_256k,			"256K" },
196 	{ TWE_AD_STRIPE_512k,			"512K" },
197 	{ TWE_AD_STRIPE_1024k,			"1024K" },
198 
199 	{ 0,					NULL }
200 };
201 
202 /*
203  * Asynchronous event notification messages are qualified:
204  *	a - not unit/port specific
205  *	u - unit specific
206  *	p - port specific
207  *
208  * They are further qualified with a severity:
209  *	E - LOG_EMERG
210  *	a - LOG_ALERT
211  *	c - LOG_CRIT
212  *	e - LOG_ERR
213  *	w - LOG_WARNING
214  *	n - LOG_NOTICE
215  *	i - LOG_INFO
216  *	d - LOG_DEBUG
217  *	blank - just use printf
218  */
219 const struct twe_code_table twe_table_aen[] = {
220 	{ 0x00,	"a  queue empty" },
221 	{ 0x01,	"a  soft reset" },
222 	{ 0x02,	"uc degraded mode" },
223 	{ 0x03,	"aa controller error" },
224 	{ 0x04,	"uE rebuild fail" },
225 	{ 0x05,	"un rebuild done" },
226 	{ 0x06,	"ue incomplete unit" },
227 	{ 0x07,	"un initialization done" },
228 	{ 0x08,	"uw unclean shutdown detected" },
229 	{ 0x09,	"pe drive timeout" },
230 	{ 0x0a,	"pc drive error" },
231 	{ 0x0b,	"un rebuild started" },
232 	{ 0x0c,	"un initialization started" },
233 	{ 0x0d,	"ui logical unit deleted" },
234 	{ 0x0f,	"pc SMART threshold exceeded" },
235 	{ 0x15,	"a  table undefined" },	/* XXX: Not in FreeBSD's table */
236 	{ 0x21,	"pe ATA UDMA downgrade" },
237 	{ 0x22,	"pi ATA UDMA upgrade" },
238 	{ 0x23,	"pw sector repair occurred" },
239 	{ 0x24,	"aa SBUF integrity check failure" },
240 	{ 0x25,	"pa lost cached write" },
241 	{ 0x26,	"pa drive ECC error detected" },
242 	{ 0x27,	"pe DCB checksum error" },
243 	{ 0x28,	"pn DCB unsupported version" },
244 	{ 0x29,	"ui verify started" },
245 	{ 0x2a,	"ua verify failed" },
246 	{ 0x2b,	"ui verify complete" },
247 	{ 0x2c,	"pw overwrote bad sector during rebuild" },
248 	{ 0x2d,	"pa encountered bad sector during rebuild" },
249 	{ 0x2e,	"pe replacement drive too small" },
250 	{ 0x2f,	"ue array not previously initialized" },
251 	{ 0x30,	"p  drive not supported" },
252 	{ 0xff,	"a  aen queue full" },
253 
254 	{ 0,	NULL },
255 };
256 
257 const char *
258 twe_describe_code(const struct twe_code_table *table, uint32_t code)
259 {
260 
261 	for (; table->string != NULL; table++) {
262 		if (table->code == code)
263 			return (table->string);
264 	}
265 	return (NULL);
266 }
267 
268 static inline u_int32_t
269 twe_inl(struct twe_softc *sc, int off)
270 {
271 
272 	bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4,
273 	    BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ);
274 	return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, off));
275 }
276 
277 static inline void
278 twe_outl(struct twe_softc *sc, int off, u_int32_t val)
279 {
280 
281 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val);
282 	bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4,
283 	    BUS_SPACE_BARRIER_WRITE);
284 }
285 
286 /*
287  * Match a supported board.
288  */
289 static int
290 twe_match(device_t parent, cfdata_t cfdata, void *aux)
291 {
292 	struct pci_attach_args *pa;
293 
294 	pa = aux;
295 
296 	return (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE &&
297 	    (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE ||
298 	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE_ASIC));
299 }
300 
301 /*
302  * Attach a supported board.
303  *
304  * XXX This doesn't fail gracefully.
305  */
306 static void
307 twe_attach(device_t parent, device_t self, void *aux)
308 {
309 	struct pci_attach_args *pa;
310 	struct twe_softc *sc;
311 	pci_chipset_tag_t pc;
312 	pci_intr_handle_t ih;
313 	pcireg_t csr;
314 	const char *intrstr;
315 	int s, size, i, rv, rseg;
316 	size_t max_segs, max_xfer;
317 	bus_dma_segment_t seg;
318 	const struct sysctlnode *node;
319 	struct twe_cmd *tc;
320 	struct twe_ccb *ccb;
321 
322 	sc = device_private(self);
323 	sc->sc_dev = self;
324 	pa = aux;
325 	pc = pa->pa_pc;
326 	sc->sc_dmat = pa->pa_dmat;
327 	SIMPLEQ_INIT(&sc->sc_ccb_queue);
328 	SLIST_INIT(&sc->sc_ccb_freelist);
329 
330 	aprint_naive(": RAID controller\n");
331 	aprint_normal(": 3ware Escalade\n");
332 
333 
334 	if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
335 	    &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) {
336 		aprint_error_dev(self, "can't map i/o space\n");
337 		return;
338 	}
339 
340 	/* Enable the device. */
341 	csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
342 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
343 	    csr | PCI_COMMAND_MASTER_ENABLE);
344 
345 	/* Map and establish the interrupt. */
346 	if (pci_intr_map(pa, &ih)) {
347 		aprint_error_dev(self, "can't map interrupt\n");
348 		return;
349 	}
350 
351 	intrstr = pci_intr_string(pc, ih);
352 	sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, twe_intr, sc);
353 	if (sc->sc_ih == NULL) {
354 		aprint_error_dev(self, "can't establish interrupt%s%s\n",
355 			(intrstr) ? " at " : "",
356 			(intrstr) ? intrstr : "");
357 		return;
358 	}
359 
360 	if (intrstr != NULL)
361 		aprint_normal_dev(self, "interrupting at %s\n",
362 			intrstr);
363 
364 	/*
365 	 * Allocate and initialise the command blocks and CCBs.
366 	 */
367 	size = sizeof(struct twe_cmd) * TWE_MAX_QUEUECNT;
368 
369 	if ((rv = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg, 1,
370 	    &rseg, BUS_DMA_NOWAIT)) != 0) {
371 		aprint_error_dev(self, "unable to allocate commands, rv = %d\n", rv);
372 		return;
373 	}
374 
375 	if ((rv = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
376 	    (void **)&sc->sc_cmds,
377 	    BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
378 		aprint_error_dev(self, "unable to map commands, rv = %d\n", rv);
379 		return;
380 	}
381 
382 	if ((rv = bus_dmamap_create(sc->sc_dmat, size, size, 1, 0,
383 	    BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) {
384 		aprint_error_dev(self, "unable to create command DMA map, rv = %d\n", rv);
385 		return;
386 	}
387 
388 	if ((rv = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_cmds,
389 	    size, NULL, BUS_DMA_NOWAIT)) != 0) {
390 		aprint_error_dev(self, "unable to load command DMA map, rv = %d\n", rv);
391 		return;
392 	}
393 
394 	ccb = malloc(sizeof(*ccb) * TWE_MAX_QUEUECNT, M_DEVBUF, M_NOWAIT);
395 	if (ccb == NULL) {
396 		aprint_error_dev(self, "unable to allocate memory for ccbs\n");
397 		return;
398 	}
399 
400 	sc->sc_cmds_paddr = sc->sc_dmamap->dm_segs[0].ds_addr;
401 	memset(sc->sc_cmds, 0, size);
402 
403 	sc->sc_ccbs = ccb;
404 	tc = (struct twe_cmd *)sc->sc_cmds;
405 	max_segs = twe_get_maxsegs();
406 	max_xfer = twe_get_maxxfer(max_segs);
407 
408 	for (i = 0; i < TWE_MAX_QUEUECNT; i++, tc++, ccb++) {
409 		ccb->ccb_cmd = tc;
410 		ccb->ccb_cmdid = i;
411 		ccb->ccb_flags = 0;
412 		rv = bus_dmamap_create(sc->sc_dmat, max_xfer,
413 		    max_segs, PAGE_SIZE, 0,
414 		    BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
415 		    &ccb->ccb_dmamap_xfer);
416 		if (rv != 0) {
417 			aprint_error_dev(self, "can't create dmamap, rv = %d\n", rv);
418 			return;
419 		}
420 
421 		/* Save the first CCB for AEN retrieval. */
422 		if (i != 0)
423 			SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb,
424 			    ccb_chain.slist);
425 	}
426 
427 	/* Wait for the controller to become ready. */
428 	if (twe_status_wait(sc, TWE_STS_MICROCONTROLLER_READY, 6)) {
429 		aprint_error_dev(self, "microcontroller not ready\n");
430 		return;
431 	}
432 
433 	twe_outl(sc, TWE_REG_CTL, TWE_CTL_DISABLE_INTRS);
434 
435 	/* Reset the controller. */
436 	s = splbio();
437 	rv = twe_reset(sc);
438 	splx(s);
439 	if (rv) {
440 		aprint_error_dev(self, "reset failed\n");
441 		return;
442 	}
443 
444 	/* Initialise connection with controller. */
445 	twe_init_connection(sc);
446 
447 	twe_describe_controller(sc);
448 
449 	/* Find and attach RAID array units. */
450 	sc->sc_nunits = 0;
451 	for (i = 0; i < TWE_MAX_UNITS; i++)
452 		(void) twe_add_unit(sc, i);
453 
454 	/* ...and finally, enable interrupts. */
455 	twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR |
456 	    TWE_CTL_UNMASK_RESP_INTR |
457 	    TWE_CTL_ENABLE_INTRS);
458 
459 	/* sysctl set-up for 3ware cli */
460 	if (sysctl_createv(NULL, 0, NULL, &node,
461 				0, CTLTYPE_NODE, device_xname(self),
462 				SYSCTL_DESCR("twe driver information"),
463 				NULL, 0, NULL, 0,
464 				CTL_HW, CTL_CREATE, CTL_EOL) != 0) {
465 		aprint_error_dev(self, "could not create %s.%s sysctl node\n",
466 			"hw", device_xname(self));
467 		return;
468 	}
469 	if ((i = sysctl_createv(NULL, 0, NULL, NULL,
470 				0, CTLTYPE_STRING, "driver_version",
471 				SYSCTL_DESCR("twe0 driver version"),
472 				NULL, 0, __UNCONST(&twever), 0,
473 				CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL))
474 				!= 0) {
475 		aprint_error_dev(self, "could not create %s.%s.driver_version sysctl\n",
476 			"hw", device_xname(self));
477 		return;
478 	}
479 }
480 
481 void
482 twe_register_callbacks(struct twe_softc *sc, int unit,
483     const struct twe_callbacks *tcb)
484 {
485 
486 	sc->sc_units[unit].td_callbacks = tcb;
487 }
488 
489 static void
490 twe_recompute_openings(struct twe_softc *sc)
491 {
492 	struct twe_drive *td;
493 	int unit, openings;
494 
495 	if (sc->sc_nunits != 0)
496 		openings = (TWE_MAX_QUEUECNT - 1) / sc->sc_nunits;
497 	else
498 		openings = 0;
499 	if (openings == sc->sc_openings)
500 		return;
501 	sc->sc_openings = openings;
502 
503 #ifdef TWE_DEBUG
504 	printf("%s: %d array%s, %d openings per array\n",
505 	    device_xname(sc->sc_dev), sc->sc_nunits,
506 	    sc->sc_nunits == 1 ? "" : "s", sc->sc_openings);
507 #endif
508 
509 	for (unit = 0; unit < TWE_MAX_UNITS; unit++) {
510 		td = &sc->sc_units[unit];
511 		if (td->td_dev != NULL)
512 			(*td->td_callbacks->tcb_openings)(td->td_dev,
513 			    sc->sc_openings);
514 	}
515 }
516 
517 static int
518 twe_add_unit(struct twe_softc *sc, int unit)
519 {
520 	struct twe_param *dtp, *atp;
521 	struct twe_array_descriptor *ad;
522 	struct twe_drive *td;
523 	struct twe_attach_args twea;
524 	uint32_t newsize;
525 	int rv;
526 	uint16_t dsize;
527 	uint8_t newtype, newstripe;
528 	int locs[TWECF_NLOCS];
529 
530 	if (unit < 0 || unit >= TWE_MAX_UNITS)
531 		return (EINVAL);
532 
533 	/* Find attached units. */
534 	rv = twe_param_get(sc, TWE_PARAM_UNITSUMMARY,
535 	    TWE_PARAM_UNITSUMMARY_Status, TWE_MAX_UNITS, NULL, &dtp);
536 	if (rv != 0) {
537 		aprint_error_dev(sc->sc_dev, "error %d fetching unit summary\n",
538 		    rv);
539 		return (rv);
540 	}
541 
542 	/* For each detected unit, collect size and store in an array. */
543 	td = &sc->sc_units[unit];
544 
545 	/* Unit present? */
546 	if ((dtp->tp_data[unit] & TWE_PARAM_UNITSTATUS_Online) == 0) {
547 		/*
548 		 * XXX Should we check to see if a device has been
549 		 * XXX attached at this index and detach it if it
550 		 * XXX has?  ("rescan" semantics)
551 		 */
552 		rv = 0;
553 		goto out;
554    	}
555 
556 	rv = twe_param_get_2(sc, TWE_PARAM_UNITINFO + unit,
557 	    TWE_PARAM_UNITINFO_DescriptorSize, &dsize);
558 	if (rv != 0) {
559 		aprint_error_dev(sc->sc_dev, "error %d fetching descriptor size "
560 		    "for unit %d\n", rv, unit);
561 		goto out;
562 	}
563 
564 	rv = twe_param_get(sc, TWE_PARAM_UNITINFO + unit,
565 	    TWE_PARAM_UNITINFO_Descriptor, dsize - 3, NULL, &atp);
566 	if (rv != 0) {
567 		aprint_error_dev(sc->sc_dev, "error %d fetching array descriptor "
568 		    "for unit %d\n", rv, unit);
569 		goto out;
570 	}
571 
572 	ad = (struct twe_array_descriptor *)atp->tp_data;
573 	newtype = ad->configuration;
574 	newstripe = ad->stripe_size;
575 	free(atp, M_DEVBUF);
576 
577 	rv = twe_param_get_4(sc, TWE_PARAM_UNITINFO + unit,
578 	    TWE_PARAM_UNITINFO_Capacity, &newsize);
579 	if (rv != 0) {
580 		aprint_error_dev(sc->sc_dev,
581 		    "error %d fetching capacity for unit %d\n",
582 		    rv, unit);
583 		goto out;
584 	}
585 
586 	/*
587 	 * Have a device, so we need to attach it.  If there is currently
588 	 * something sitting at the slot, and the parameters are different,
589 	 * then we detach the old device before attaching the new one.
590 	 */
591 	if (td->td_dev != NULL &&
592 	    td->td_size == newsize &&
593 	    td->td_type == newtype &&
594 	    td->td_stripe == newstripe) {
595 		/* Same as the old device; just keep using it. */
596 		rv = 0;
597 		goto out;
598 	} else if (td->td_dev != NULL) {
599 		/* Detach the old device first. */
600 		(void) config_detach(td->td_dev, DETACH_FORCE);
601 		td->td_dev = NULL;
602 	} else if (td->td_size == 0)
603 		sc->sc_nunits++;
604 
605 	/*
606 	 * Committed to the new array unit; assign its parameters and
607 	 * recompute the number of available command openings.
608 	 */
609 	td->td_size = newsize;
610 	td->td_type = newtype;
611 	td->td_stripe = newstripe;
612 	twe_recompute_openings(sc);
613 
614 	twea.twea_unit = unit;
615 
616 	locs[TWECF_UNIT] = unit;
617 
618 	td->td_dev = config_found_sm_loc(sc->sc_dev, "twe", locs, &twea,
619 					 twe_print, config_stdsubmatch);
620 
621 	rv = 0;
622  out:
623 	free(dtp, M_DEVBUF);
624 	return (rv);
625 }
626 
627 static int
628 twe_del_unit(struct twe_softc *sc, int unit)
629 {
630 	struct twe_drive *td;
631 
632 	if (unit < 0 || unit >= TWE_MAX_UNITS)
633 		return (EINVAL);
634 
635 	td = &sc->sc_units[unit];
636 	if (td->td_size != 0)
637 		sc->sc_nunits--;
638 	td->td_size = 0;
639 	td->td_type = 0;
640 	td->td_stripe = 0;
641 	if (td->td_dev != NULL) {
642 		(void) config_detach(td->td_dev, DETACH_FORCE);
643 		td->td_dev = NULL;
644 	}
645 	twe_recompute_openings(sc);
646 	return (0);
647 }
648 
649 /*
650  * Reset the controller.
651  * MUST BE CALLED AT splbio()!
652  */
653 static int
654 twe_reset(struct twe_softc *sc)
655 {
656 	uint16_t aen;
657 	u_int status;
658 	int got, rv;
659 
660 	/* Issue a soft reset. */
661 	twe_outl(sc, TWE_REG_CTL, TWE_CTL_ISSUE_SOFT_RESET |
662 	    TWE_CTL_CLEAR_HOST_INTR |
663 	    TWE_CTL_CLEAR_ATTN_INTR |
664 	    TWE_CTL_MASK_CMD_INTR |
665 	    TWE_CTL_MASK_RESP_INTR |
666 	    TWE_CTL_CLEAR_ERROR_STS |
667 	    TWE_CTL_DISABLE_INTRS);
668 
669 	/* Wait for attention... */
670 	if (twe_status_wait(sc, TWE_STS_ATTN_INTR, 30)) {
671 		aprint_error_dev(sc->sc_dev, "timeout waiting for attention interrupt\n");
672 		return (-1);
673 	}
674 
675 	/* ...and ACK it. */
676 	twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR);
677 
678 	/*
679 	 * Pull AENs out of the controller; look for a soft reset AEN.
680 	 * Open code this, since we want to detect reset even if the
681 	 * queue for management tools is full.
682 	 *
683 	 * Note that since:
684 	 *	- interrupts are blocked
685 	 *	- we have reset the controller
686 	 *	- acknowledged the pending ATTENTION
687 	 * that there is no way a pending asynchronous AEN fetch would
688 	 * finish, so clear the flag.
689 	 */
690 	sc->sc_flags &= ~TWEF_AEN;
691 	for (got = 0;;) {
692 		rv = twe_aen_get(sc, &aen);
693 		if (rv != 0)
694 			printf("%s: error %d while draining event queue\n",
695 			    device_xname(sc->sc_dev), rv);
696 		if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY)
697 			break;
698 		if (TWE_AEN_CODE(aen) == TWE_AEN_SOFT_RESET)
699 			got = 1;
700 		twe_aen_enqueue(sc, aen, 1);
701 	}
702 
703 	if (!got) {
704 		printf("%s: reset not reported\n", device_xname(sc->sc_dev));
705 		return (-1);
706 	}
707 
708 	/* Check controller status. */
709 	status = twe_inl(sc, TWE_REG_STS);
710 	if (twe_status_check(sc, status)) {
711 		printf("%s: controller errors detected\n",
712 		    device_xname(sc->sc_dev));
713 		return (-1);
714 	}
715 
716 	/* Drain the response queue. */
717 	for (;;) {
718 		status = twe_inl(sc, TWE_REG_STS);
719 		if (twe_status_check(sc, status) != 0) {
720 			aprint_error_dev(sc->sc_dev, "can't drain response queue\n");
721 			return (-1);
722 		}
723 		if ((status & TWE_STS_RESP_QUEUE_EMPTY) != 0)
724 			break;
725 		(void)twe_inl(sc, TWE_REG_RESP_QUEUE);
726 	}
727 
728 	return (0);
729 }
730 
731 /*
732  * Print autoconfiguration message for a sub-device.
733  */
734 static int
735 twe_print(void *aux, const char *pnp)
736 {
737 	struct twe_attach_args *twea;
738 
739 	twea = aux;
740 
741 	if (pnp != NULL)
742 		aprint_normal("block device at %s", pnp);
743 	aprint_normal(" unit %d", twea->twea_unit);
744 	return (UNCONF);
745 }
746 
747 /*
748  * Interrupt service routine.
749  */
750 static int
751 twe_intr(void *arg)
752 {
753 	struct twe_softc *sc;
754 	u_int status;
755 	int caught, rv;
756 
757 	sc = arg;
758 	caught = 0;
759 	status = twe_inl(sc, TWE_REG_STS);
760 	twe_status_check(sc, status);
761 
762 	/* Host interrupts - purpose unknown. */
763 	if ((status & TWE_STS_HOST_INTR) != 0) {
764 #ifdef DEBUG
765 		printf("%s: host interrupt\n", device_xname(sc->sc_dev));
766 #endif
767 		twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_HOST_INTR);
768 		caught = 1;
769 	}
770 
771 	/*
772 	 * Attention interrupts, signalled when a controller or child device
773 	 * state change has occurred.
774 	 */
775 	if ((status & TWE_STS_ATTN_INTR) != 0) {
776 		rv = twe_aen_get(sc, NULL);
777 		if (rv != 0)
778 			aprint_error_dev(sc->sc_dev, "unable to retrieve AEN (%d)\n", rv);
779 		else
780 			twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR);
781 		caught = 1;
782 	}
783 
784 	/*
785 	 * Command interrupts, signalled when the controller can accept more
786 	 * commands.  We don't use this; instead, we try to submit commands
787 	 * when we receive them, and when other commands have completed.
788 	 * Mask it so we don't get another one.
789 	 */
790 	if ((status & TWE_STS_CMD_INTR) != 0) {
791 #ifdef DEBUG
792 		printf("%s: command interrupt\n", device_xname(sc->sc_dev));
793 #endif
794 		twe_outl(sc, TWE_REG_CTL, TWE_CTL_MASK_CMD_INTR);
795 		caught = 1;
796 	}
797 
798 	if ((status & TWE_STS_RESP_INTR) != 0) {
799 		twe_poll(sc);
800 		caught = 1;
801 	}
802 
803 	return (caught);
804 }
805 
806 /*
807  * Fetch an AEN.  Even though this is really like parameter
808  * retrieval, we handle this specially, because we issue this
809  * AEN retrieval command from interrupt context, and thus
810  * reserve a CCB for it to avoid resource shortage.
811  *
812  * XXX There are still potential resource shortages we could
813  * XXX encounter.  Consider pre-allocating all AEN-related
814  * XXX resources.
815  *
816  * MUST BE CALLED AT splbio()!
817  */
818 static int
819 twe_aen_get(struct twe_softc *sc, uint16_t *aenp)
820 {
821 	struct twe_ccb *ccb;
822 	struct twe_cmd *tc;
823 	struct twe_param *tp;
824 	int rv;
825 
826 	/*
827 	 * If we're already retrieving an AEN, just wait; another
828 	 * retrieval will be chained after the current one completes.
829 	 */
830 	if (sc->sc_flags & TWEF_AEN) {
831 		/*
832 		 * It is a fatal software programming error to attempt
833 		 * to fetch an AEN synchronously when an AEN fetch is
834 		 * already pending.
835 		 */
836 		KASSERT(aenp == NULL);
837 		return (0);
838 	}
839 
840 	tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT);
841 	if (tp == NULL)
842 		return (ENOMEM);
843 
844 	ccb = twe_ccb_alloc(sc,
845 	    TWE_CCB_AEN | TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT);
846 	KASSERT(ccb != NULL);
847 
848 	ccb->ccb_data = tp;
849 	ccb->ccb_datasize = TWE_SECTOR_SIZE;
850 	ccb->ccb_tx.tx_handler = (aenp == NULL) ? twe_aen_handler : NULL;
851 	ccb->ccb_tx.tx_context = tp;
852 	ccb->ccb_tx.tx_dv = sc->sc_dev;
853 
854 	tc = ccb->ccb_cmd;
855 	tc->tc_size = 2;
856 	tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5);
857 	tc->tc_unit = 0;
858 	tc->tc_count = htole16(1);
859 
860 	/* Fill in the outbound parameter data. */
861 	tp->tp_table_id = htole16(TWE_PARAM_AEN);
862 	tp->tp_param_id = TWE_PARAM_AEN_UnitCode;
863 	tp->tp_param_size = 2;
864 
865 	/* Map the transfer. */
866 	if ((rv = twe_ccb_map(sc, ccb)) != 0) {
867 		twe_ccb_free(sc, ccb);
868 		goto done;
869 	}
870 
871 	/* Enqueue the command and wait. */
872 	if (aenp != NULL) {
873 		rv = twe_ccb_poll(sc, ccb, 5);
874 		twe_ccb_unmap(sc, ccb);
875 		twe_ccb_free(sc, ccb);
876 		if (rv == 0)
877 			*aenp = le16toh(*(uint16_t *)tp->tp_data);
878 		free(tp, M_DEVBUF);
879 	} else {
880 		sc->sc_flags |= TWEF_AEN;
881 		twe_ccb_enqueue(sc, ccb);
882 		rv = 0;
883 	}
884 
885  done:
886 	return (rv);
887 }
888 
889 /*
890  * Handle an AEN returned by the controller.
891  * MUST BE CALLED AT splbio()!
892  */
893 static void
894 twe_aen_handler(struct twe_ccb *ccb, int error)
895 {
896 	struct twe_softc *sc;
897 	struct twe_param *tp;
898 	uint16_t aen;
899 	int rv;
900 
901 	sc = device_private(ccb->ccb_tx.tx_dv);
902 	tp = ccb->ccb_tx.tx_context;
903 	twe_ccb_unmap(sc, ccb);
904 
905 	sc->sc_flags &= ~TWEF_AEN;
906 
907 	if (error) {
908 		aprint_error_dev(sc->sc_dev, "error retrieving AEN\n");
909 		aen = TWE_AEN_QUEUE_EMPTY;
910 	} else
911 		aen = le16toh(*(u_int16_t *)tp->tp_data);
912 	free(tp, M_DEVBUF);
913 	twe_ccb_free(sc, ccb);
914 
915 	if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) {
916 		twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR);
917 		return;
918 	}
919 
920 	twe_aen_enqueue(sc, aen, 0);
921 
922 	/*
923 	 * Chain another retrieval in case interrupts have been
924 	 * coalesced.
925 	 */
926 	rv = twe_aen_get(sc, NULL);
927 	if (rv != 0)
928 		aprint_error_dev(sc->sc_dev, "unable to retrieve AEN (%d)\n", rv);
929 }
930 
931 static void
932 twe_aen_enqueue(struct twe_softc *sc, uint16_t aen, int quiet)
933 {
934 	const char *str, *msg;
935 	int s, next, nextnext, level;
936 
937 	/*
938 	 * First report the AEN on the console.  Maybe.
939 	 */
940 	if (! quiet) {
941 		str = twe_describe_code(twe_table_aen, TWE_AEN_CODE(aen));
942 		if (str == NULL) {
943 			aprint_error_dev(sc->sc_dev, "unknown AEN 0x%04x\n", aen);
944 		} else {
945 			msg = str + 3;
946 			switch (str[1]) {
947 			case 'E':	level = LOG_EMERG; break;
948 			case 'a':	level = LOG_ALERT; break;
949 			case 'c':	level = LOG_CRIT; break;
950 			case 'e':	level = LOG_ERR; break;
951 			case 'w':	level = LOG_WARNING; break;
952 			case 'n':	level = LOG_NOTICE; break;
953 			case 'i':	level = LOG_INFO; break;
954 			case 'd':	level = LOG_DEBUG; break;
955 			default:
956 				/* Don't use syslog. */
957 				level = -1;
958 			}
959 
960 			if (level < 0) {
961 				switch (str[0]) {
962 				case 'u':
963 				case 'p':
964 					printf("%s: %s %d: %s\n",
965 					    device_xname(sc->sc_dev),
966 					    str[0] == 'u' ? "unit" : "port",
967 					    TWE_AEN_UNIT(aen), msg);
968 					break;
969 
970 				default:
971 					printf("%s: %s\n",
972 					    device_xname(sc->sc_dev), msg);
973 				}
974 			} else {
975 				switch (str[0]) {
976 				case 'u':
977 				case 'p':
978 					log(level, "%s: %s %d: %s\n",
979 					    device_xname(sc->sc_dev),
980 					    str[0] == 'u' ? "unit" : "port",
981 					    TWE_AEN_UNIT(aen), msg);
982 					break;
983 
984 				default:
985 					log(level, "%s: %s\n",
986 					    device_xname(sc->sc_dev), msg);
987 				}
988 			}
989 		}
990 	}
991 
992 	/* Now enqueue the AEN for mangement tools. */
993 	s = splbio();
994 
995 	next = (sc->sc_aen_head + 1) % TWE_AEN_Q_LENGTH;
996 	nextnext = (sc->sc_aen_head + 2) % TWE_AEN_Q_LENGTH;
997 
998 	/*
999 	 * If this is the last free slot, then queue up a "queue
1000 	 * full" message.
1001 	 */
1002 	if (nextnext == sc->sc_aen_tail)
1003 		aen = TWE_AEN_QUEUE_FULL;
1004 
1005 	if (next != sc->sc_aen_tail) {
1006 		sc->sc_aen_queue[sc->sc_aen_head] = aen;
1007 		sc->sc_aen_head = next;
1008 	}
1009 
1010 	if (sc->sc_flags & TWEF_AENQ_WAIT) {
1011 		sc->sc_flags &= ~TWEF_AENQ_WAIT;
1012 		wakeup(&sc->sc_aen_queue);
1013 	}
1014 
1015 	splx(s);
1016 }
1017 
1018 /* NOTE: Must be called at splbio(). */
1019 static uint16_t
1020 twe_aen_dequeue(struct twe_softc *sc)
1021 {
1022 	uint16_t aen;
1023 
1024 	if (sc->sc_aen_tail == sc->sc_aen_head)
1025 		aen = TWE_AEN_QUEUE_EMPTY;
1026 	else {
1027 		aen = sc->sc_aen_queue[sc->sc_aen_tail];
1028 		sc->sc_aen_tail = (sc->sc_aen_tail + 1) % TWE_AEN_Q_LENGTH;
1029 	}
1030 
1031 	return (aen);
1032 }
1033 
1034 /*
1035  * These are short-hand functions that execute TWE_OP_GET_PARAM to
1036  * fetch 1, 2, and 4 byte parameter values, respectively.
1037  */
1038 int
1039 twe_param_get_1(struct twe_softc *sc, int table_id, int param_id,
1040     uint8_t *valp)
1041 {
1042 	struct twe_param *tp;
1043 	int rv;
1044 
1045 	rv = twe_param_get(sc, table_id, param_id, 1, NULL, &tp);
1046 	if (rv != 0)
1047 		return (rv);
1048 	*valp = *(uint8_t *)tp->tp_data;
1049 	free(tp, M_DEVBUF);
1050 	return (0);
1051 }
1052 
1053 int
1054 twe_param_get_2(struct twe_softc *sc, int table_id, int param_id,
1055     uint16_t *valp)
1056 {
1057 	struct twe_param *tp;
1058 	int rv;
1059 
1060 	rv = twe_param_get(sc, table_id, param_id, 2, NULL, &tp);
1061 	if (rv != 0)
1062 		return (rv);
1063 	*valp = le16toh(*(uint16_t *)tp->tp_data);
1064 	free(tp, M_DEVBUF);
1065 	return (0);
1066 }
1067 
1068 int
1069 twe_param_get_4(struct twe_softc *sc, int table_id, int param_id,
1070     uint32_t *valp)
1071 {
1072 	struct twe_param *tp;
1073 	int rv;
1074 
1075 	rv = twe_param_get(sc, table_id, param_id, 4, NULL, &tp);
1076 	if (rv != 0)
1077 		return (rv);
1078 	*valp = le32toh(*(uint32_t *)tp->tp_data);
1079 	free(tp, M_DEVBUF);
1080 	return (0);
1081 }
1082 
1083 /*
1084  * Execute a TWE_OP_GET_PARAM command.  If a callback function is provided,
1085  * it will be called with generated context when the command has completed.
1086  * If no callback is provided, the command will be executed synchronously
1087  * and a pointer to a buffer containing the data returned.
1088  *
1089  * The caller or callback is responsible for freeing the buffer.
1090  *
1091  * NOTE: We assume we can sleep here to wait for a CCB to become available.
1092  */
1093 int
1094 twe_param_get(struct twe_softc *sc, int table_id, int param_id, size_t size,
1095 	      void (*func)(struct twe_ccb *, int), struct twe_param **pbuf)
1096 {
1097 	struct twe_ccb *ccb;
1098 	struct twe_cmd *tc;
1099 	struct twe_param *tp;
1100 	int rv, s;
1101 
1102 	tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT);
1103 	if (tp == NULL)
1104 		return ENOMEM;
1105 
1106 	ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT);
1107 	KASSERT(ccb != NULL);
1108 
1109 	ccb->ccb_data = tp;
1110 	ccb->ccb_datasize = TWE_SECTOR_SIZE;
1111 	ccb->ccb_tx.tx_handler = func;
1112 	ccb->ccb_tx.tx_context = tp;
1113 	ccb->ccb_tx.tx_dv = sc->sc_dev;
1114 
1115 	tc = ccb->ccb_cmd;
1116 	tc->tc_size = 2;
1117 	tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5);
1118 	tc->tc_unit = 0;
1119 	tc->tc_count = htole16(1);
1120 
1121 	/* Fill in the outbound parameter data. */
1122 	tp->tp_table_id = htole16(table_id);
1123 	tp->tp_param_id = param_id;
1124 	tp->tp_param_size = size;
1125 
1126 	/* Map the transfer. */
1127 	if ((rv = twe_ccb_map(sc, ccb)) != 0) {
1128 		twe_ccb_free(sc, ccb);
1129 		goto done;
1130 	}
1131 
1132 	/* Submit the command and either wait or let the callback handle it. */
1133 	if (func == NULL) {
1134 		s = splbio();
1135 		rv = twe_ccb_poll(sc, ccb, 5);
1136 		twe_ccb_unmap(sc, ccb);
1137 		twe_ccb_free(sc, ccb);
1138 		splx(s);
1139 	} else {
1140 #ifdef DEBUG
1141 		if (pbuf != NULL)
1142 			panic("both func and pbuf defined");
1143 #endif
1144 		twe_ccb_enqueue(sc, ccb);
1145 		return 0;
1146 	}
1147 
1148 done:
1149 	if (pbuf == NULL || rv != 0)
1150 		free(tp, M_DEVBUF);
1151 	else if (pbuf != NULL && rv == 0)
1152 		*pbuf = tp;
1153 	return rv;
1154 }
1155 
1156 /*
1157  * Execute a TWE_OP_SET_PARAM command.
1158  *
1159  * NOTE: We assume we can sleep here to wait for a CCB to become available.
1160  */
1161 static int
1162 twe_param_set(struct twe_softc *sc, int table_id, int param_id, size_t size,
1163 	      void *sbuf)
1164 {
1165 	struct twe_ccb *ccb;
1166 	struct twe_cmd *tc;
1167 	struct twe_param *tp;
1168 	int rv, s;
1169 
1170 	tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT);
1171 	if (tp == NULL)
1172 		return ENOMEM;
1173 
1174 	ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT);
1175 	KASSERT(ccb != NULL);
1176 
1177 	ccb->ccb_data = tp;
1178 	ccb->ccb_datasize = TWE_SECTOR_SIZE;
1179 	ccb->ccb_tx.tx_handler = 0;
1180 	ccb->ccb_tx.tx_context = tp;
1181 	ccb->ccb_tx.tx_dv = sc->sc_dev;
1182 
1183 	tc = ccb->ccb_cmd;
1184 	tc->tc_size = 2;
1185 	tc->tc_opcode = TWE_OP_SET_PARAM | (tc->tc_size << 5);
1186 	tc->tc_unit = 0;
1187 	tc->tc_count = htole16(1);
1188 
1189 	/* Fill in the outbound parameter data. */
1190 	tp->tp_table_id = htole16(table_id);
1191 	tp->tp_param_id = param_id;
1192 	tp->tp_param_size = size;
1193 	memcpy(tp->tp_data, sbuf, size);
1194 
1195 	/* Map the transfer. */
1196 	if ((rv = twe_ccb_map(sc, ccb)) != 0) {
1197 		twe_ccb_free(sc, ccb);
1198 		goto done;
1199 	}
1200 
1201 	/* Submit the command and wait. */
1202 	s = splbio();
1203 	rv = twe_ccb_poll(sc, ccb, 5);
1204 	twe_ccb_unmap(sc, ccb);
1205 	twe_ccb_free(sc, ccb);
1206 	splx(s);
1207 done:
1208 	free(tp, M_DEVBUF);
1209 	return (rv);
1210 }
1211 
1212 /*
1213  * Execute a TWE_OP_INIT_CONNECTION command.  Return non-zero on error.
1214  * Must be called with interrupts blocked.
1215  */
1216 static int
1217 twe_init_connection(struct twe_softc *sc)
1218 {
1219 	struct twe_ccb *ccb;
1220 	struct twe_cmd *tc;
1221 	int rv;
1222 
1223 	if ((ccb = twe_ccb_alloc(sc, 0)) == NULL)
1224 		return (EAGAIN);
1225 
1226 	/* Build the command. */
1227 	tc = ccb->ccb_cmd;
1228 	tc->tc_size = 3;
1229 	tc->tc_opcode = TWE_OP_INIT_CONNECTION;
1230 	tc->tc_unit = 0;
1231 	tc->tc_count = htole16(TWE_MAX_CMDS);
1232 	tc->tc_args.init_connection.response_queue_pointer = 0;
1233 
1234 	/* Submit the command for immediate execution. */
1235 	rv = twe_ccb_poll(sc, ccb, 5);
1236 	twe_ccb_free(sc, ccb);
1237 	return (rv);
1238 }
1239 
1240 /*
1241  * Poll the controller for completed commands.  Must be called with
1242  * interrupts blocked.
1243  */
1244 static void
1245 twe_poll(struct twe_softc *sc)
1246 {
1247 	struct twe_ccb *ccb;
1248 	int found;
1249 	u_int status, cmdid;
1250 
1251 	found = 0;
1252 
1253 	for (;;) {
1254 		status = twe_inl(sc, TWE_REG_STS);
1255 		twe_status_check(sc, status);
1256 
1257 		if ((status & TWE_STS_RESP_QUEUE_EMPTY))
1258 			break;
1259 
1260 		found = 1;
1261 		cmdid = twe_inl(sc, TWE_REG_RESP_QUEUE);
1262 		cmdid = (cmdid & TWE_RESP_MASK) >> TWE_RESP_SHIFT;
1263 		if (cmdid >= TWE_MAX_QUEUECNT) {
1264 			aprint_error_dev(sc->sc_dev, "bad cmdid %d\n", cmdid);
1265 			continue;
1266 		}
1267 
1268 		ccb = sc->sc_ccbs + cmdid;
1269 		if ((ccb->ccb_flags & TWE_CCB_ACTIVE) == 0) {
1270 			printf("%s: CCB for cmdid %d not active\n",
1271 			    device_xname(sc->sc_dev), cmdid);
1272 			continue;
1273 		}
1274 		ccb->ccb_flags ^= TWE_CCB_COMPLETE | TWE_CCB_ACTIVE;
1275 
1276 		bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
1277 		    (char *)ccb->ccb_cmd - (char *)sc->sc_cmds,
1278 		    sizeof(struct twe_cmd),
1279 		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1280 
1281 		/* Pass notification to upper layers. */
1282 		if (ccb->ccb_tx.tx_handler != NULL)
1283 			(*ccb->ccb_tx.tx_handler)(ccb,
1284 			    ccb->ccb_cmd->tc_status != 0 ? EIO : 0);
1285 	}
1286 
1287 	/* If any commands have completed, run the software queue. */
1288 	if (found)
1289 		twe_ccb_enqueue(sc, NULL);
1290 }
1291 
1292 /*
1293  * Wait for `status' to be set in the controller status register.  Return
1294  * zero if found, non-zero if the operation timed out.
1295  */
1296 static int
1297 twe_status_wait(struct twe_softc *sc, u_int32_t status, int timo)
1298 {
1299 
1300 	for (timo *= 10; timo != 0; timo--) {
1301 		if ((twe_inl(sc, TWE_REG_STS) & status) == status)
1302 			break;
1303 		delay(100000);
1304 	}
1305 
1306 	return (timo == 0);
1307 }
1308 
1309 /*
1310  * Clear a PCI parity error.
1311  */
1312 static void
1313 twe_clear_pci_parity_error(struct twe_softc *sc)
1314 {
1315 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PARITY_ERROR);
1316 
1317 	//FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PARITY_ERROR, 2);
1318 }
1319 
1320 
1321 /*
1322  * Clear a PCI abort.
1323  */
1324 static void
1325 twe_clear_pci_abort(struct twe_softc *sc)
1326 {
1327 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PCI_ABORT);
1328 
1329 	//FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PCI_ABORT, 2);
1330 }
1331 
1332 /*
1333  * Complain if the status bits aren't what we expect.
1334  */
1335 static int
1336 twe_status_check(struct twe_softc *sc, u_int status)
1337 {
1338 	int rv;
1339 
1340 	rv = 0;
1341 
1342 	if ((status & TWE_STS_EXPECTED_BITS) != TWE_STS_EXPECTED_BITS) {
1343 		aprint_error_dev(sc->sc_dev, "missing status bits: 0x%08x\n",
1344 		    status & ~TWE_STS_EXPECTED_BITS);
1345 		rv = -1;
1346 	}
1347 
1348 	if ((status & TWE_STS_UNEXPECTED_BITS) != 0) {
1349 		aprint_error_dev(sc->sc_dev, "unexpected status bits: 0x%08x\n",
1350 		    status & TWE_STS_UNEXPECTED_BITS);
1351 		rv = -1;
1352 		if (status & TWE_STS_PCI_PARITY_ERROR) {
1353 			aprint_error_dev(sc->sc_dev, "PCI parity error: Reseat card, move card "
1354 			       "or buggy device present.\n");
1355 			twe_clear_pci_parity_error(sc);
1356 		}
1357 		if (status & TWE_STS_PCI_ABORT) {
1358 			aprint_error_dev(sc->sc_dev, "PCI abort, clearing.\n");
1359 			twe_clear_pci_abort(sc);
1360 		}
1361 	}
1362 
1363 	return (rv);
1364 }
1365 
1366 /*
1367  * Allocate and initialise a CCB.
1368  */
1369 static inline void
1370 twe_ccb_init(struct twe_softc *sc, struct twe_ccb *ccb, int flags)
1371 {
1372 	struct twe_cmd *tc;
1373 
1374 	ccb->ccb_tx.tx_handler = NULL;
1375 	ccb->ccb_flags = flags;
1376 	tc = ccb->ccb_cmd;
1377 	tc->tc_status = 0;
1378 	tc->tc_flags = 0;
1379 	tc->tc_cmdid = ccb->ccb_cmdid;
1380 }
1381 
1382 struct twe_ccb *
1383 twe_ccb_alloc(struct twe_softc *sc, int flags)
1384 {
1385 	struct twe_ccb *ccb;
1386 	int s;
1387 
1388 	s = splbio();
1389 	if (__predict_false((flags & TWE_CCB_AEN) != 0)) {
1390 		/* Use the reserved CCB. */
1391 		ccb = sc->sc_ccbs;
1392 	} else {
1393 		/* Allocate a CCB and command block. */
1394 		if (__predict_false((ccb =
1395 				SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) {
1396 			splx(s);
1397 			return (NULL);
1398 		}
1399 		SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist);
1400 	}
1401 #ifdef DIAGNOSTIC
1402 	if ((long)(ccb - sc->sc_ccbs) == 0 && (flags & TWE_CCB_AEN) == 0)
1403 		panic("twe_ccb_alloc: got reserved CCB for non-AEN");
1404 	if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0)
1405 		panic("twe_ccb_alloc: CCB %ld already allocated",
1406 		    (long)(ccb - sc->sc_ccbs));
1407 	flags |= TWE_CCB_ALLOCED;
1408 #endif
1409 	splx(s);
1410 
1411 	twe_ccb_init(sc, ccb, flags);
1412 	return (ccb);
1413 }
1414 
1415 struct twe_ccb *
1416 twe_ccb_alloc_wait(struct twe_softc *sc, int flags)
1417 {
1418 	struct twe_ccb *ccb;
1419 	int s;
1420 
1421 	KASSERT((flags & TWE_CCB_AEN) == 0);
1422 
1423 	s = splbio();
1424 	while (__predict_false((ccb =
1425 				SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) {
1426 		sc->sc_flags |= TWEF_WAIT_CCB;
1427 		(void) tsleep(&sc->sc_ccb_freelist, PRIBIO, "tweccb", 0);
1428 	}
1429 	SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist);
1430 #ifdef DIAGNOSTIC
1431 	if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0)
1432 		panic("twe_ccb_alloc_wait: CCB %ld already allocated",
1433 		    (long)(ccb - sc->sc_ccbs));
1434 	flags |= TWE_CCB_ALLOCED;
1435 #endif
1436 	splx(s);
1437 
1438 	twe_ccb_init(sc, ccb, flags);
1439 	return (ccb);
1440 }
1441 
1442 /*
1443  * Free a CCB.
1444  */
1445 void
1446 twe_ccb_free(struct twe_softc *sc, struct twe_ccb *ccb)
1447 {
1448 	int s;
1449 
1450 	s = splbio();
1451 	if ((ccb->ccb_flags & TWE_CCB_AEN) == 0) {
1452 		SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, ccb_chain.slist);
1453 		if (__predict_false((sc->sc_flags & TWEF_WAIT_CCB) != 0)) {
1454 			sc->sc_flags &= ~TWEF_WAIT_CCB;
1455 			wakeup(&sc->sc_ccb_freelist);
1456 		}
1457 	}
1458 	ccb->ccb_flags = 0;
1459 	splx(s);
1460 }
1461 
1462 /*
1463  * Map the specified CCB's command block and data buffer (if any) into
1464  * controller visible space.  Perform DMA synchronisation.
1465  */
1466 int
1467 twe_ccb_map(struct twe_softc *sc, struct twe_ccb *ccb)
1468 {
1469 	struct twe_cmd *tc;
1470 	int flags, nsegs, i, s, rv;
1471 	void *data;
1472 
1473 	/*
1474 	 * The data as a whole must be 512-byte aligned.
1475 	 */
1476 	if (((u_long)ccb->ccb_data & (TWE_ALIGNMENT - 1)) != 0) {
1477 		s = splvm();
1478 		/* XXX */
1479 		rv = uvm_km_kmem_alloc(kmem_va_arena,
1480 		    ccb->ccb_datasize, (VM_NOSLEEP | VM_INSTANTFIT),
1481 		    (vmem_addr_t *)&ccb->ccb_abuf);
1482 		splx(s);
1483 		data = (void *)ccb->ccb_abuf;
1484 		if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0)
1485 			memcpy(data, ccb->ccb_data, ccb->ccb_datasize);
1486 	} else {
1487 		ccb->ccb_abuf = (vaddr_t)0;
1488 		data = ccb->ccb_data;
1489 	}
1490 
1491 	/*
1492 	 * Map the data buffer into bus space and build the S/G list.
1493 	 */
1494 	rv = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer, data,
1495 	    ccb->ccb_datasize, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING |
1496 	    ((ccb->ccb_flags & TWE_CCB_DATA_IN) ?
1497 	    BUS_DMA_READ : BUS_DMA_WRITE));
1498 	if (rv != 0) {
1499 		if (ccb->ccb_abuf != (vaddr_t)0) {
1500 			s = splvm();
1501 			/* XXX */
1502 			uvm_km_kmem_free(kmem_va_arena, ccb->ccb_abuf,
1503 			    ccb->ccb_datasize);
1504 			splx(s);
1505 		}
1506 		return (rv);
1507 	}
1508 
1509 	nsegs = ccb->ccb_dmamap_xfer->dm_nsegs;
1510 	tc = ccb->ccb_cmd;
1511 	tc->tc_size += 2 * nsegs;
1512 
1513 	/* The location of the S/G list is dependent upon command type. */
1514 	switch (tc->tc_opcode >> 5) {
1515 	case 2:
1516 		for (i = 0; i < nsegs; i++) {
1517 			tc->tc_args.param.sgl[i].tsg_address =
1518 			    htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr);
1519 			tc->tc_args.param.sgl[i].tsg_length =
1520 			    htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len);
1521 		}
1522 		/* XXX Needed? */
1523 		for (; i < TWE_SG_SIZE; i++) {
1524 			tc->tc_args.param.sgl[i].tsg_address = 0;
1525 			tc->tc_args.param.sgl[i].tsg_length = 0;
1526 		}
1527 		break;
1528 	case 3:
1529 		for (i = 0; i < nsegs; i++) {
1530 			tc->tc_args.io.sgl[i].tsg_address =
1531 			    htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr);
1532 			tc->tc_args.io.sgl[i].tsg_length =
1533 			    htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len);
1534 		}
1535 		/* XXX Needed? */
1536 		for (; i < TWE_SG_SIZE; i++) {
1537 			tc->tc_args.io.sgl[i].tsg_address = 0;
1538 			tc->tc_args.io.sgl[i].tsg_length = 0;
1539 		}
1540 		break;
1541 	default:
1542 		/*
1543 		 * In all likelihood, this is a command passed from
1544 		 * management tools in userspace where no S/G list is
1545 		 * necessary because no data is being passed.
1546 		 */
1547 		break;
1548 	}
1549 
1550 	if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0)
1551 		flags = BUS_DMASYNC_PREREAD;
1552 	else
1553 		flags = 0;
1554 	if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0)
1555 		flags |= BUS_DMASYNC_PREWRITE;
1556 
1557 	bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0,
1558 	    ccb->ccb_datasize, flags);
1559 	return (0);
1560 }
1561 
1562 /*
1563  * Unmap the specified CCB's command block and data buffer (if any) and
1564  * perform DMA synchronisation.
1565  */
1566 void
1567 twe_ccb_unmap(struct twe_softc *sc, struct twe_ccb *ccb)
1568 {
1569 	int flags, s;
1570 
1571 	if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0)
1572 		flags = BUS_DMASYNC_POSTREAD;
1573 	else
1574 		flags = 0;
1575 	if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0)
1576 		flags |= BUS_DMASYNC_POSTWRITE;
1577 
1578 	bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0,
1579 	    ccb->ccb_datasize, flags);
1580 	bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer);
1581 
1582 	if (ccb->ccb_abuf != (vaddr_t)0) {
1583 		if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0)
1584 			memcpy(ccb->ccb_data, (void *)ccb->ccb_abuf,
1585 			    ccb->ccb_datasize);
1586 		s = splvm();
1587 		/* XXX */
1588 		uvm_km_kmem_free(kmem_va_arena, ccb->ccb_abuf,
1589 		    ccb->ccb_datasize);
1590 		splx(s);
1591 	}
1592 }
1593 
1594 /*
1595  * Submit a command to the controller and poll on completion.  Return
1596  * non-zero on timeout (but don't check status, as some command types don't
1597  * return status).  Must be called with interrupts blocked.
1598  */
1599 int
1600 twe_ccb_poll(struct twe_softc *sc, struct twe_ccb *ccb, int timo)
1601 {
1602 	int rv;
1603 
1604 	if ((rv = twe_ccb_submit(sc, ccb)) != 0)
1605 		return (rv);
1606 
1607 	for (timo *= 1000; timo != 0; timo--) {
1608 		twe_poll(sc);
1609 		if ((ccb->ccb_flags & TWE_CCB_COMPLETE) != 0)
1610 			break;
1611 		DELAY(100);
1612 	}
1613 
1614 	return (timo == 0);
1615 }
1616 
1617 /*
1618  * If a CCB is specified, enqueue it.  Pull CCBs off the software queue in
1619  * the order that they were enqueued and try to submit their command blocks
1620  * to the controller for execution.
1621  */
1622 void
1623 twe_ccb_enqueue(struct twe_softc *sc, struct twe_ccb *ccb)
1624 {
1625 	int s;
1626 
1627 	s = splbio();
1628 
1629 	if (ccb != NULL)
1630 		SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain.simpleq);
1631 
1632 	while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) {
1633 		if (twe_ccb_submit(sc, ccb))
1634 			break;
1635 		SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb_chain.simpleq);
1636 	}
1637 
1638 	splx(s);
1639 }
1640 
1641 /*
1642  * Submit the command block associated with the specified CCB to the
1643  * controller for execution.  Must be called with interrupts blocked.
1644  */
1645 int
1646 twe_ccb_submit(struct twe_softc *sc, struct twe_ccb *ccb)
1647 {
1648 	bus_addr_t pa;
1649 	int rv;
1650 	u_int status;
1651 
1652 	/* Check to see if we can post a command. */
1653 	status = twe_inl(sc, TWE_REG_STS);
1654 	twe_status_check(sc, status);
1655 
1656 	if ((status & TWE_STS_CMD_QUEUE_FULL) == 0) {
1657 		bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
1658 		    (char *)ccb->ccb_cmd - (char *)sc->sc_cmds,
1659 		    sizeof(struct twe_cmd),
1660 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1661 #ifdef DIAGNOSTIC
1662 		if ((ccb->ccb_flags & TWE_CCB_ALLOCED) == 0)
1663 			panic("%s: CCB %ld not ALLOCED\n",
1664 			    device_xname(sc->sc_dev), (long)(ccb - sc->sc_ccbs));
1665 #endif
1666 		ccb->ccb_flags |= TWE_CCB_ACTIVE;
1667 		pa = sc->sc_cmds_paddr +
1668 		    ccb->ccb_cmdid * sizeof(struct twe_cmd);
1669 		twe_outl(sc, TWE_REG_CMD_QUEUE, (u_int32_t)pa);
1670 		rv = 0;
1671 	} else
1672 		rv = EBUSY;
1673 
1674 	return (rv);
1675 }
1676 
1677 
1678 /*
1679  * Accept an open operation on the control device.
1680  */
1681 static int
1682 tweopen(dev_t dev, int flag, int mode, struct lwp *l)
1683 {
1684 	struct twe_softc *twe;
1685 
1686 	if ((twe = device_lookup_private(&twe_cd, minor(dev))) == NULL)
1687 		return (ENXIO);
1688 	if ((twe->sc_flags & TWEF_OPEN) != 0)
1689 		return (EBUSY);
1690 
1691 	twe->sc_flags |= TWEF_OPEN;
1692 	return (0);
1693 }
1694 
1695 /*
1696  * Accept the last close on the control device.
1697  */
1698 static int
1699 tweclose(dev_t dev, int flag, int mode,
1700     struct lwp *l)
1701 {
1702 	struct twe_softc *twe;
1703 
1704 	twe = device_lookup_private(&twe_cd, minor(dev));
1705 	twe->sc_flags &= ~TWEF_OPEN;
1706 	return (0);
1707 }
1708 
1709 void
1710 twe_ccb_wait_handler(struct twe_ccb *ccb, int error)
1711 {
1712 
1713 	/* Just wake up the sleeper. */
1714 	wakeup(ccb);
1715 }
1716 
1717 /*
1718  * Handle control operations.
1719  */
1720 static int
1721 tweioctl(dev_t dev, u_long cmd, void *data, int flag,
1722     struct lwp *l)
1723 {
1724 	struct twe_softc *twe;
1725 	struct twe_ccb *ccb;
1726 	struct twe_param *param;
1727 	struct twe_usercommand *tu;
1728 	struct twe_paramcommand *tp;
1729 	struct twe_drivecommand *td;
1730 	void *pdata = NULL;
1731 	int s, error = 0;
1732 	u_int8_t cmdid;
1733 
1734 	twe = device_lookup_private(&twe_cd, minor(dev));
1735 	tu = (struct twe_usercommand *)data;
1736 	tp = (struct twe_paramcommand *)data;
1737 	td = (struct twe_drivecommand *)data;
1738 
1739 	/* This is intended to be compatible with the FreeBSD interface. */
1740 	switch (cmd) {
1741 	case TWEIO_COMMAND:
1742 		error = kauth_authorize_device_passthru(l->l_cred, dev,
1743 		    KAUTH_REQ_DEVICE_RAWIO_PASSTHRU_ALL, data);
1744 		if (error)
1745 			return (error);
1746 
1747 		/* XXX mutex */
1748 		if (tu->tu_size > 0) {
1749 			/*
1750 			 * XXX Handle > TWE_SECTOR_SIZE?  Let's see if
1751 			 * it's really necessary, first.
1752 			 */
1753 			if (tu->tu_size > TWE_SECTOR_SIZE) {
1754 #ifdef TWE_DEBUG
1755 				printf("%s: TWEIO_COMMAND: tu_size = %zu\n",
1756 				    device_xname(twe->sc_dev), tu->tu_size);
1757 #endif
1758 				return EINVAL;
1759 			}
1760 			pdata = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_WAITOK);
1761 			error = copyin(tu->tu_data, pdata, tu->tu_size);
1762 			if (error != 0)
1763 				goto done;
1764 			ccb = twe_ccb_alloc_wait(twe,
1765 			    TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT);
1766 			KASSERT(ccb != NULL);
1767 			ccb->ccb_data = pdata;
1768 			ccb->ccb_datasize = TWE_SECTOR_SIZE;
1769 		} else {
1770 			ccb = twe_ccb_alloc_wait(twe, 0);
1771 			KASSERT(ccb != NULL);
1772 		}
1773 
1774 		ccb->ccb_tx.tx_handler = twe_ccb_wait_handler;
1775 		ccb->ccb_tx.tx_context = NULL;
1776 		ccb->ccb_tx.tx_dv = twe->sc_dev;
1777 
1778 		cmdid = ccb->ccb_cmdid;
1779 		memcpy(ccb->ccb_cmd, &tu->tu_cmd, sizeof(struct twe_cmd));
1780 		ccb->ccb_cmd->tc_cmdid = cmdid;
1781 
1782 		/* Map the transfer. */
1783 		if ((error = twe_ccb_map(twe, ccb)) != 0) {
1784 			twe_ccb_free(twe, ccb);
1785 			goto done;
1786 		}
1787 
1788 		/* Submit the command and wait up to 1 minute. */
1789 		error = 0;
1790 		twe_ccb_enqueue(twe, ccb);
1791 		s = splbio();
1792 		while ((ccb->ccb_flags & TWE_CCB_COMPLETE) == 0)
1793 			if ((error = tsleep(ccb, PRIBIO, "tweioctl",
1794 					    60 * hz)) != 0)
1795 				break;
1796 		splx(s);
1797 
1798 		/* Copy the command back to the ioctl argument. */
1799 		memcpy(&tu->tu_cmd, ccb->ccb_cmd, sizeof(struct twe_cmd));
1800 #ifdef TWE_DEBUG
1801 		printf("%s: TWEIO_COMMAND: tc_opcode = 0x%02x, "
1802 		    "tc_status = 0x%02x\n", device_xname(twe->sc_dev),
1803 		    tu->tu_cmd.tc_opcode, tu->tu_cmd.tc_status);
1804 #endif
1805 
1806 		s = splbio();
1807 		twe_ccb_free(twe, ccb);
1808 		splx(s);
1809 
1810 		if (tu->tu_size > 0)
1811 			error = copyout(pdata, tu->tu_data, tu->tu_size);
1812 		goto done;
1813 
1814 	case TWEIO_STATS:
1815 		return (ENOENT);
1816 
1817 	case TWEIO_AEN_POLL:
1818 		s = splbio();
1819 		*(u_int *)data = twe_aen_dequeue(twe);
1820 		splx(s);
1821 		return (0);
1822 
1823 	case TWEIO_AEN_WAIT:
1824 		s = splbio();
1825 		while ((*(u_int *)data =
1826 		    twe_aen_dequeue(twe)) == TWE_AEN_QUEUE_EMPTY) {
1827 			twe->sc_flags |= TWEF_AENQ_WAIT;
1828 			error = tsleep(&twe->sc_aen_queue, PRIBIO | PCATCH,
1829 			    "tweaen", 0);
1830 			if (error == EINTR) {
1831 				splx(s);
1832 				return (error);
1833 			}
1834 		}
1835 		splx(s);
1836 		return (0);
1837 
1838 	case TWEIO_GET_PARAM:
1839 		error = twe_param_get(twe, tp->tp_table_id, tp->tp_param_id,
1840 		    tp->tp_size, 0, &param);
1841 		if (error != 0)
1842 			return (error);
1843 		if (param->tp_param_size > tp->tp_size) {
1844 			error = EFAULT;
1845 			goto done;
1846 		}
1847 		error = copyout(param->tp_data, tp->tp_data,
1848 		    param->tp_param_size);
1849 		free(param, M_DEVBUF);
1850 		goto done;
1851 
1852 	case TWEIO_SET_PARAM:
1853 		pdata = malloc(tp->tp_size, M_DEVBUF, M_WAITOK);
1854 		if ((error = copyin(tp->tp_data, pdata, tp->tp_size)) != 0)
1855 			goto done;
1856 		error = twe_param_set(twe, tp->tp_table_id, tp->tp_param_id,
1857 		    tp->tp_size, pdata);
1858 		goto done;
1859 
1860 	case TWEIO_RESET:
1861 		s = splbio();
1862 		twe_reset(twe);
1863 		splx(s);
1864 		return (0);
1865 
1866 	case TWEIO_ADD_UNIT:
1867 		/* XXX mutex */
1868 		return (twe_add_unit(twe, td->td_unit));
1869 
1870 	case TWEIO_DEL_UNIT:
1871 		/* XXX mutex */
1872 		return (twe_del_unit(twe, td->td_unit));
1873 
1874 	default:
1875 		return EINVAL;
1876 	}
1877 done:
1878 	if (pdata)
1879 		free(pdata, M_DEVBUF);
1880 	return error;
1881 }
1882 
1883 const struct cdevsw twe_cdevsw = {
1884 	tweopen, tweclose, noread, nowrite, tweioctl,
1885 	    nostop, notty, nopoll, nommap, nokqfilter, D_OTHER,
1886 };
1887 
1888 /*
1889  * Print some information about the controller
1890  */
1891 static void
1892 twe_describe_controller(struct twe_softc *sc)
1893 {
1894 	struct twe_param *p[6];
1895 	int i, rv = 0;
1896 	uint32_t dsize;
1897 	uint8_t ports;
1898 
1899 	ports = 0;
1900 
1901 	/* get the port count */
1902 	rv |= twe_param_get_1(sc, TWE_PARAM_CONTROLLER,
1903 		TWE_PARAM_CONTROLLER_PortCount, &ports);
1904 
1905 	/* get version strings */
1906 	rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_Mon,
1907 		16, NULL, &p[0]);
1908 	rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_FW,
1909 		16, NULL, &p[1]);
1910 	rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_BIOS,
1911 		16, NULL, &p[2]);
1912 	rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCB,
1913 		8, NULL, &p[3]);
1914 	rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_ATA,
1915 		8, NULL, &p[4]);
1916 	rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCI,
1917 		8, NULL, &p[5]);
1918 
1919 	if (rv) {
1920 		/* some error occurred */
1921 		aprint_error_dev(sc->sc_dev, "failed to fetch version information\n");
1922 		return;
1923 	}
1924 
1925 	aprint_normal_dev(sc->sc_dev, "%d ports, Firmware %.16s, BIOS %.16s\n",
1926 		ports, p[1]->tp_data, p[2]->tp_data);
1927 
1928 	aprint_verbose_dev(sc->sc_dev, "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n",
1929 		p[0]->tp_data, p[3]->tp_data,
1930 		p[4]->tp_data, p[5]->tp_data);
1931 
1932 	free(p[0], M_DEVBUF);
1933 	free(p[1], M_DEVBUF);
1934 	free(p[2], M_DEVBUF);
1935 	free(p[3], M_DEVBUF);
1936 	free(p[4], M_DEVBUF);
1937 	free(p[5], M_DEVBUF);
1938 
1939 	rv = twe_param_get(sc, TWE_PARAM_DRIVESUMMARY,
1940 	    TWE_PARAM_DRIVESUMMARY_Status, 16, NULL, &p[0]);
1941 	if (rv) {
1942 		aprint_error_dev(sc->sc_dev, "failed to get drive status summary\n");
1943 		return;
1944 	}
1945 	for (i = 0; i < ports; i++) {
1946 		if (p[0]->tp_data[i] != TWE_PARAM_DRIVESTATUS_Present)
1947 			continue;
1948 		rv = twe_param_get_4(sc, TWE_PARAM_DRIVEINFO + i,
1949 		    TWE_PARAM_DRIVEINFO_Size, &dsize);
1950 		if (rv) {
1951 			aprint_error_dev(sc->sc_dev,
1952 			    "unable to get drive size for port %d\n", i);
1953 			continue;
1954 		}
1955 		rv = twe_param_get(sc, TWE_PARAM_DRIVEINFO + i,
1956 		    TWE_PARAM_DRIVEINFO_Model, 40, NULL, &p[1]);
1957 		if (rv) {
1958 			aprint_error_dev(sc->sc_dev,
1959 			    "unable to get drive model for port %d\n", i);
1960 			continue;
1961 		}
1962 		aprint_verbose_dev(sc->sc_dev, "port %d: %.40s %d MB\n",
1963 		    i, p[1]->tp_data, dsize / 2048);
1964 		free(p[1], M_DEVBUF);
1965 	}
1966 	free(p[0], M_DEVBUF);
1967 }
1968