1 /* $NetBSD: twe.c,v 1.62 2005/02/20 19:01:47 heas Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2001, 2002, 2003, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran; and by Jason R. Thorpe of Wasabi Systems, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /*- 40 * Copyright (c) 2000 Michael Smith 41 * Copyright (c) 2000 BSDi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 56 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 57 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 59 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 63 * SUCH DAMAGE. 64 * 65 * from FreeBSD: twe.c,v 1.1 2000/05/24 23:35:23 msmith Exp 66 */ 67 68 /* 69 * Driver for the 3ware Escalade family of RAID controllers. 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: twe.c,v 1.62 2005/02/20 19:01:47 heas Exp $"); 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/device.h> 79 #include <sys/queue.h> 80 #include <sys/proc.h> 81 #include <sys/buf.h> 82 #include <sys/endian.h> 83 #include <sys/malloc.h> 84 #include <sys/conf.h> 85 #include <sys/disk.h> 86 #include <sys/sysctl.h> 87 #include <sys/syslog.h> 88 89 #include <uvm/uvm_extern.h> 90 91 #include <machine/bswap.h> 92 #include <machine/bus.h> 93 94 #include <dev/pci/pcireg.h> 95 #include <dev/pci/pcivar.h> 96 #include <dev/pci/pcidevs.h> 97 #include <dev/pci/twereg.h> 98 #include <dev/pci/twevar.h> 99 #include <dev/pci/tweio.h> 100 101 #include "locators.h" 102 103 #define PCI_CBIO 0x10 104 105 static int twe_aen_get(struct twe_softc *, uint16_t *); 106 static void twe_aen_handler(struct twe_ccb *, int); 107 static void twe_aen_enqueue(struct twe_softc *sc, uint16_t, int); 108 static uint16_t twe_aen_dequeue(struct twe_softc *); 109 110 static void twe_attach(struct device *, struct device *, void *); 111 static int twe_init_connection(struct twe_softc *); 112 static int twe_intr(void *); 113 static int twe_match(struct device *, struct cfdata *, void *); 114 static int twe_param_set(struct twe_softc *, int, int, size_t, void *); 115 static void twe_poll(struct twe_softc *); 116 static int twe_print(void *, const char *); 117 static int twe_reset(struct twe_softc *); 118 static int twe_submatch(struct device *, struct cfdata *, 119 const locdesc_t *, void *); 120 static int twe_status_check(struct twe_softc *, u_int); 121 static int twe_status_wait(struct twe_softc *, u_int, int); 122 static void twe_describe_controller(struct twe_softc *); 123 124 static int twe_add_unit(struct twe_softc *, int); 125 static int twe_del_unit(struct twe_softc *, int); 126 127 static inline u_int32_t twe_inl(struct twe_softc *, int); 128 static inline void twe_outl(struct twe_softc *, int, u_int32_t); 129 130 dev_type_open(tweopen); 131 dev_type_close(tweclose); 132 dev_type_ioctl(tweioctl); 133 134 const struct cdevsw twe_cdevsw = { 135 tweopen, tweclose, noread, nowrite, tweioctl, 136 nostop, notty, nopoll, nommap, 137 }; 138 139 extern struct cfdriver twe_cd; 140 141 CFATTACH_DECL(twe, sizeof(struct twe_softc), 142 twe_match, twe_attach, NULL, NULL); 143 144 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 145 const char twever[] = "1.50.01.002"; 146 147 /* 148 * Tables to convert numeric codes to strings. 149 */ 150 const struct twe_code_table twe_table_status[] = { 151 { 0x00, "successful completion" }, 152 153 /* info */ 154 { 0x42, "command in progress" }, 155 { 0x6c, "retrying interface CRC error from UDMA command" }, 156 157 /* warning */ 158 { 0x81, "redundant/inconsequential request ignored" }, 159 { 0x8e, "failed to write zeroes to LBA 0" }, 160 { 0x8f, "failed to profile TwinStor zones" }, 161 162 /* fatal */ 163 { 0xc1, "aborted due to system command or reconfiguration" }, 164 { 0xc4, "aborted" }, 165 { 0xc5, "access error" }, 166 { 0xc6, "access violation" }, 167 { 0xc7, "device failure" }, /* high byte may be port # */ 168 { 0xc8, "controller error" }, 169 { 0xc9, "timed out" }, 170 { 0xcb, "invalid unit number" }, 171 { 0xcf, "unit not available" }, 172 { 0xd2, "undefined opcode" }, 173 { 0xdb, "request incompatible with unit" }, 174 { 0xdc, "invalid request" }, 175 { 0xff, "firmware error, reset requested" }, 176 177 { 0, NULL } 178 }; 179 180 const struct twe_code_table twe_table_unitstate[] = { 181 { TWE_PARAM_UNITSTATUS_Normal, "Normal" }, 182 { TWE_PARAM_UNITSTATUS_Initialising, "Initializing" }, 183 { TWE_PARAM_UNITSTATUS_Degraded, "Degraded" }, 184 { TWE_PARAM_UNITSTATUS_Rebuilding, "Rebuilding" }, 185 { TWE_PARAM_UNITSTATUS_Verifying, "Verifying" }, 186 { TWE_PARAM_UNITSTATUS_Corrupt, "Corrupt" }, 187 { TWE_PARAM_UNITSTATUS_Missing, "Missing" }, 188 189 { 0, NULL } 190 }; 191 192 const struct twe_code_table twe_table_unittype[] = { 193 /* array descriptor configuration */ 194 { TWE_AD_CONFIG_RAID0, "RAID0" }, 195 { TWE_AD_CONFIG_RAID1, "RAID1" }, 196 { TWE_AD_CONFIG_TwinStor, "TwinStor" }, 197 { TWE_AD_CONFIG_RAID5, "RAID5" }, 198 { TWE_AD_CONFIG_RAID10, "RAID10" }, 199 { TWE_UD_CONFIG_JBOD, "JBOD" }, 200 201 { 0, NULL } 202 }; 203 204 const struct twe_code_table twe_table_stripedepth[] = { 205 { TWE_AD_STRIPE_4k, "4K" }, 206 { TWE_AD_STRIPE_8k, "8K" }, 207 { TWE_AD_STRIPE_16k, "16K" }, 208 { TWE_AD_STRIPE_32k, "32K" }, 209 { TWE_AD_STRIPE_64k, "64K" }, 210 { TWE_AD_STRIPE_128k, "128K" }, 211 { TWE_AD_STRIPE_256k, "256K" }, 212 { TWE_AD_STRIPE_512k, "512K" }, 213 { TWE_AD_STRIPE_1024k, "1024K" }, 214 215 { 0, NULL } 216 }; 217 218 /* 219 * Asynchronous event notification messages are qualified: 220 * a - not unit/port specific 221 * u - unit specific 222 * p - port specific 223 * 224 * They are further qualified with a severity: 225 * E - LOG_EMERG 226 * a - LOG_ALERT 227 * c - LOG_CRIT 228 * e - LOG_ERR 229 * w - LOG_WARNING 230 * n - LOG_NOTICE 231 * i - LOG_INFO 232 * d - LOG_DEBUG 233 * blank - just use printf 234 */ 235 const struct twe_code_table twe_table_aen[] = { 236 { 0x00, "a queue empty" }, 237 { 0x01, "a soft reset" }, 238 { 0x02, "uc degraded mode" }, 239 { 0x03, "aa controller error" }, 240 { 0x04, "uE rebuild fail" }, 241 { 0x05, "un rebuild done" }, 242 { 0x06, "ue incomplete unit" }, 243 { 0x07, "un initialization done" }, 244 { 0x08, "uw unclean shutdown detected" }, 245 { 0x09, "pe drive timeout" }, 246 { 0x0a, "pc drive error" }, 247 { 0x0b, "un rebuild started" }, 248 { 0x0c, "un initialization started" }, 249 { 0x0d, "ui logical unit deleted" }, 250 { 0x0f, "pc SMART threshold exceeded" }, 251 { 0x15, "a table undefined" }, /* XXX: Not in FreeBSD's table */ 252 { 0x21, "pe ATA UDMA downgrade" }, 253 { 0x22, "pi ATA UDMA upgrade" }, 254 { 0x23, "pw sector repair occurred" }, 255 { 0x24, "aa SBUF integrity check failure" }, 256 { 0x25, "pa lost cached write" }, 257 { 0x26, "pa drive ECC error detected" }, 258 { 0x27, "pe DCB checksum error" }, 259 { 0x28, "pn DCB unsupported version" }, 260 { 0x29, "ui verify started" }, 261 { 0x2a, "ua verify failed" }, 262 { 0x2b, "ui verify complete" }, 263 { 0x2c, "pw overwrote bad sector during rebuild" }, 264 { 0x2d, "pa encountered bad sector during rebuild" }, 265 { 0x2e, "pe replacement drive too small" }, 266 { 0x2f, "ue array not previously initialized" }, 267 { 0x30, "p drive not supported" }, 268 { 0xff, "a aen queue full" }, 269 270 { 0, NULL }, 271 }; 272 273 const char * 274 twe_describe_code(const struct twe_code_table *table, uint32_t code) 275 { 276 277 for (; table->string != NULL; table++) { 278 if (table->code == code) 279 return (table->string); 280 } 281 return (NULL); 282 } 283 284 static inline u_int32_t 285 twe_inl(struct twe_softc *sc, int off) 286 { 287 288 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 289 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 290 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, off)); 291 } 292 293 static inline void 294 twe_outl(struct twe_softc *sc, int off, u_int32_t val) 295 { 296 297 bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val); 298 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 299 BUS_SPACE_BARRIER_WRITE); 300 } 301 302 /* 303 * Match a supported board. 304 */ 305 static int 306 twe_match(struct device *parent, struct cfdata *cfdata, void *aux) 307 { 308 struct pci_attach_args *pa; 309 310 pa = aux; 311 312 return (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE && 313 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE || 314 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE_ASIC)); 315 } 316 317 /* 318 * Attach a supported board. 319 * 320 * XXX This doesn't fail gracefully. 321 */ 322 static void 323 twe_attach(struct device *parent, struct device *self, void *aux) 324 { 325 struct pci_attach_args *pa; 326 struct twe_softc *sc; 327 pci_chipset_tag_t pc; 328 pci_intr_handle_t ih; 329 pcireg_t csr; 330 const char *intrstr; 331 int s, size, i, rv, rseg; 332 size_t max_segs, max_xfer; 333 bus_dma_segment_t seg; 334 struct ctlname ctlnames[] = CTL_NAMES; 335 struct sysctlnode *node; 336 struct twe_cmd *tc; 337 struct twe_ccb *ccb; 338 339 sc = (struct twe_softc *)self; 340 pa = aux; 341 pc = pa->pa_pc; 342 sc->sc_dmat = pa->pa_dmat; 343 SIMPLEQ_INIT(&sc->sc_ccb_queue); 344 SLIST_INIT(&sc->sc_ccb_freelist); 345 346 aprint_naive(": RAID controller\n"); 347 aprint_normal(": 3ware Escalade\n"); 348 349 ccb = malloc(sizeof(*ccb) * TWE_MAX_QUEUECNT, M_DEVBUF, M_NOWAIT); 350 if (ccb == NULL) { 351 aprint_error("%s: unable to allocate memory for ccbs\n", 352 sc->sc_dv.dv_xname); 353 return; 354 } 355 356 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 357 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 358 aprint_error("%s: can't map i/o space\n", sc->sc_dv.dv_xname); 359 return; 360 } 361 362 /* Enable the device. */ 363 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 364 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 365 csr | PCI_COMMAND_MASTER_ENABLE); 366 367 /* Map and establish the interrupt. */ 368 if (pci_intr_map(pa, &ih)) { 369 aprint_error("%s: can't map interrupt\n", sc->sc_dv.dv_xname); 370 return; 371 } 372 373 intrstr = pci_intr_string(pc, ih); 374 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, twe_intr, sc); 375 if (sc->sc_ih == NULL) { 376 aprint_error("%s: can't establish interrupt%s%s\n", 377 sc->sc_dv.dv_xname, 378 (intrstr) ? " at " : "", 379 (intrstr) ? intrstr : ""); 380 return; 381 } 382 383 if (intrstr != NULL) 384 aprint_normal("%s: interrupting at %s\n", 385 sc->sc_dv.dv_xname, intrstr); 386 387 /* 388 * Allocate and initialise the command blocks and CCBs. 389 */ 390 size = sizeof(struct twe_cmd) * TWE_MAX_QUEUECNT; 391 392 if ((rv = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg, 1, 393 &rseg, BUS_DMA_NOWAIT)) != 0) { 394 aprint_error("%s: unable to allocate commands, rv = %d\n", 395 sc->sc_dv.dv_xname, rv); 396 return; 397 } 398 399 if ((rv = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 400 (caddr_t *)&sc->sc_cmds, 401 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 402 aprint_error("%s: unable to map commands, rv = %d\n", 403 sc->sc_dv.dv_xname, rv); 404 return; 405 } 406 407 if ((rv = bus_dmamap_create(sc->sc_dmat, size, size, 1, 0, 408 BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { 409 aprint_error("%s: unable to create command DMA map, rv = %d\n", 410 sc->sc_dv.dv_xname, rv); 411 return; 412 } 413 414 if ((rv = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_cmds, 415 size, NULL, BUS_DMA_NOWAIT)) != 0) { 416 aprint_error("%s: unable to load command DMA map, rv = %d\n", 417 sc->sc_dv.dv_xname, rv); 418 return; 419 } 420 421 sc->sc_cmds_paddr = sc->sc_dmamap->dm_segs[0].ds_addr; 422 memset(sc->sc_cmds, 0, size); 423 424 sc->sc_ccbs = ccb; 425 tc = (struct twe_cmd *)sc->sc_cmds; 426 max_segs = twe_get_maxsegs(); 427 max_xfer = twe_get_maxxfer(max_segs); 428 429 for (i = 0; i < TWE_MAX_QUEUECNT; i++, tc++, ccb++) { 430 ccb->ccb_cmd = tc; 431 ccb->ccb_cmdid = i; 432 ccb->ccb_flags = 0; 433 rv = bus_dmamap_create(sc->sc_dmat, max_xfer, 434 max_segs, PAGE_SIZE, 0, 435 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 436 &ccb->ccb_dmamap_xfer); 437 if (rv != 0) { 438 aprint_error("%s: can't create dmamap, rv = %d\n", 439 sc->sc_dv.dv_xname, rv); 440 return; 441 } 442 443 /* Save the first CCB for AEN retrieval. */ 444 if (i != 0) 445 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, 446 ccb_chain.slist); 447 } 448 449 /* Wait for the controller to become ready. */ 450 if (twe_status_wait(sc, TWE_STS_MICROCONTROLLER_READY, 6)) { 451 aprint_error("%s: microcontroller not ready\n", 452 sc->sc_dv.dv_xname); 453 return; 454 } 455 456 twe_outl(sc, TWE_REG_CTL, TWE_CTL_DISABLE_INTRS); 457 458 /* Reset the controller. */ 459 s = splbio(); 460 rv = twe_reset(sc); 461 splx(s); 462 if (rv) { 463 aprint_error("%s: reset failed\n", sc->sc_dv.dv_xname); 464 return; 465 } 466 467 /* Initialise connection with controller. */ 468 twe_init_connection(sc); 469 470 twe_describe_controller(sc); 471 472 /* Find and attach RAID array units. */ 473 sc->sc_nunits = 0; 474 for (i = 0; i < TWE_MAX_UNITS; i++) 475 (void) twe_add_unit(sc, i); 476 477 /* ...and finally, enable interrupts. */ 478 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR | 479 TWE_CTL_UNMASK_RESP_INTR | 480 TWE_CTL_ENABLE_INTRS); 481 482 /* sysctl set-up for 3ware cli */ 483 if (sysctl_createv(NULL, 0, NULL, NULL, 484 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", 485 NULL, NULL, 0, NULL, 0, 486 CTL_HW, CTL_EOL) != 0) { 487 printf("%s: could not create %s sysctl node\n", 488 sc->sc_dv.dv_xname, ctlnames[CTL_HW].ctl_name); 489 return; 490 } 491 if (sysctl_createv(NULL, 0, NULL, &node, 492 0, CTLTYPE_NODE, sc->sc_dv.dv_xname, 493 SYSCTL_DESCR("twe driver information"), 494 NULL, 0, NULL, 0, 495 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 496 printf("%s: could not create %s.%s sysctl node\n", 497 sc->sc_dv.dv_xname, ctlnames[CTL_HW].ctl_name, 498 sc->sc_dv.dv_xname); 499 return; 500 } 501 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 502 0, CTLTYPE_STRING, "driver_version", 503 SYSCTL_DESCR("twe0 driver version"), 504 NULL, 0, &twever, 0, 505 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 506 != 0) { 507 printf("%s: could not create %s.%s.driver_version sysctl\n", 508 sc->sc_dv.dv_xname, ctlnames[CTL_HW].ctl_name, 509 sc->sc_dv.dv_xname); 510 return; 511 } 512 } 513 514 void 515 twe_register_callbacks(struct twe_softc *sc, int unit, 516 const struct twe_callbacks *tcb) 517 { 518 519 sc->sc_units[unit].td_callbacks = tcb; 520 } 521 522 static void 523 twe_recompute_openings(struct twe_softc *sc) 524 { 525 struct twe_drive *td; 526 int unit, openings; 527 528 if (sc->sc_nunits != 0) 529 openings = (TWE_MAX_QUEUECNT - 1) / sc->sc_nunits; 530 else 531 openings = 0; 532 if (openings == sc->sc_openings) 533 return; 534 sc->sc_openings = openings; 535 536 #ifdef TWE_DEBUG 537 printf("%s: %d array%s, %d openings per array\n", 538 sc->sc_dv.dv_xname, sc->sc_nunits, 539 sc->sc_nunits == 1 ? "" : "s", sc->sc_openings); 540 #endif 541 542 for (unit = 0; unit < TWE_MAX_UNITS; unit++) { 543 td = &sc->sc_units[unit]; 544 if (td->td_dev != NULL) 545 (*td->td_callbacks->tcb_openings)(td->td_dev, 546 sc->sc_openings); 547 } 548 } 549 550 static int 551 twe_add_unit(struct twe_softc *sc, int unit) 552 { 553 struct twe_param *dtp, *atp; 554 struct twe_array_descriptor *ad; 555 struct twe_drive *td; 556 struct twe_attach_args twea; 557 uint32_t newsize; 558 int rv; 559 uint16_t dsize; 560 uint8_t newtype, newstripe; 561 int help[2]; 562 locdesc_t *ldesc = (void *)help; /* XXX */ 563 564 if (unit < 0 || unit >= TWE_MAX_UNITS) 565 return (EINVAL); 566 567 /* Find attached units. */ 568 rv = twe_param_get(sc, TWE_PARAM_UNITSUMMARY, 569 TWE_PARAM_UNITSUMMARY_Status, TWE_MAX_UNITS, NULL, &dtp); 570 if (rv != 0) { 571 aprint_error("%s: error %d fetching unit summary\n", 572 sc->sc_dv.dv_xname, rv); 573 return (rv); 574 } 575 576 /* For each detected unit, collect size and store in an array. */ 577 td = &sc->sc_units[unit]; 578 579 /* Unit present? */ 580 if ((dtp->tp_data[unit] & TWE_PARAM_UNITSTATUS_Online) == 0) { 581 /* 582 * XXX Should we check to see if a device has been 583 * XXX attached at this index and detach it if it 584 * XXX has? ("rescan" semantics) 585 */ 586 rv = 0; 587 goto out; 588 } 589 590 rv = twe_param_get_2(sc, TWE_PARAM_UNITINFO + unit, 591 TWE_PARAM_UNITINFO_DescriptorSize, &dsize); 592 if (rv != 0) { 593 aprint_error("%s: error %d fetching descriptor size " 594 "for unit %d\n", sc->sc_dv.dv_xname, rv, unit); 595 goto out; 596 } 597 598 rv = twe_param_get(sc, TWE_PARAM_UNITINFO + unit, 599 TWE_PARAM_UNITINFO_Descriptor, dsize - 3, NULL, &atp); 600 if (rv != 0) { 601 aprint_error("%s: error %d fetching array descriptor " 602 "for unit %d\n", sc->sc_dv.dv_xname, rv, unit); 603 goto out; 604 } 605 606 ad = (struct twe_array_descriptor *)atp->tp_data; 607 newtype = ad->configuration; 608 newstripe = ad->stripe_size; 609 free(atp, M_DEVBUF); 610 611 rv = twe_param_get_4(sc, TWE_PARAM_UNITINFO + unit, 612 TWE_PARAM_UNITINFO_Capacity, &newsize); 613 if (rv != 0) { 614 aprint_error( 615 "%s: error %d fetching capacity for unit %d\n", 616 sc->sc_dv.dv_xname, rv, unit); 617 goto out; 618 } 619 620 /* 621 * Have a device, so we need to attach it. If there is currently 622 * something sitting at the slot, and the parameters are different, 623 * then we detach the old device before attaching the new one. 624 */ 625 if (td->td_dev != NULL && 626 td->td_size == newsize && 627 td->td_type == newtype && 628 td->td_stripe == newstripe) { 629 /* Same as the old device; just keep using it. */ 630 rv = 0; 631 goto out; 632 } else if (td->td_dev != NULL) { 633 /* Detach the old device first. */ 634 (void) config_detach(td->td_dev, DETACH_FORCE); 635 td->td_dev = NULL; 636 } else if (td->td_size == 0) 637 sc->sc_nunits++; 638 639 /* 640 * Committed to the new array unit; assign its parameters and 641 * recompute the number of available command openings. 642 */ 643 td->td_size = newsize; 644 td->td_type = newtype; 645 td->td_stripe = newstripe; 646 twe_recompute_openings(sc); 647 648 twea.twea_unit = unit; 649 650 ldesc->len = 1; 651 ldesc->locs[TWECF_UNIT] = unit; 652 653 td->td_dev = config_found_sm_loc(&sc->sc_dv, "twe", NULL, &twea, 654 twe_print, twe_submatch); 655 656 rv = 0; 657 out: 658 free(dtp, M_DEVBUF); 659 return (rv); 660 } 661 662 static int 663 twe_del_unit(struct twe_softc *sc, int unit) 664 { 665 struct twe_drive *td; 666 667 if (unit < 0 || unit >= TWE_MAX_UNITS) 668 return (EINVAL); 669 670 td = &sc->sc_units[unit]; 671 if (td->td_size != 0) 672 sc->sc_nunits--; 673 td->td_size = 0; 674 td->td_type = 0; 675 td->td_stripe = 0; 676 if (td->td_dev != NULL) { 677 (void) config_detach(td->td_dev, DETACH_FORCE); 678 td->td_dev = NULL; 679 } 680 twe_recompute_openings(sc); 681 return (0); 682 } 683 684 /* 685 * Reset the controller. 686 * MUST BE CALLED AT splbio()! 687 */ 688 static int 689 twe_reset(struct twe_softc *sc) 690 { 691 uint16_t aen; 692 u_int status; 693 volatile u_int32_t junk; 694 int got, rv; 695 696 /* Issue a soft reset. */ 697 twe_outl(sc, TWE_REG_CTL, TWE_CTL_ISSUE_SOFT_RESET | 698 TWE_CTL_CLEAR_HOST_INTR | 699 TWE_CTL_CLEAR_ATTN_INTR | 700 TWE_CTL_MASK_CMD_INTR | 701 TWE_CTL_MASK_RESP_INTR | 702 TWE_CTL_CLEAR_ERROR_STS | 703 TWE_CTL_DISABLE_INTRS); 704 705 /* Wait for attention... */ 706 if (twe_status_wait(sc, TWE_STS_ATTN_INTR, 30)) { 707 printf("%s: timeout waiting for attention interrupt\n", 708 sc->sc_dv.dv_xname); 709 return (-1); 710 } 711 712 /* ...and ACK it. */ 713 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 714 715 /* 716 * Pull AENs out of the controller; look for a soft reset AEN. 717 * Open code this, since we want to detect reset even if the 718 * queue for management tools is full. 719 * 720 * Note that since: 721 * - interrupts are blocked 722 * - we have reset the controller 723 * - acknowledged the pending ATTENTION 724 * that there is no way a pending asynchronous AEN fetch would 725 * finish, so clear the flag. 726 */ 727 sc->sc_flags &= ~TWEF_AEN; 728 for (got = 0;;) { 729 rv = twe_aen_get(sc, &aen); 730 if (rv != 0) 731 printf("%s: error %d while draining event queue\n", 732 sc->sc_dv.dv_xname, rv); 733 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) 734 break; 735 if (TWE_AEN_CODE(aen) == TWE_AEN_SOFT_RESET) 736 got = 1; 737 twe_aen_enqueue(sc, aen, 1); 738 } 739 740 if (!got) { 741 printf("%s: reset not reported\n", sc->sc_dv.dv_xname); 742 return (-1); 743 } 744 745 /* Check controller status. */ 746 status = twe_inl(sc, TWE_REG_STS); 747 if (twe_status_check(sc, status)) { 748 printf("%s: controller errors detected\n", 749 sc->sc_dv.dv_xname); 750 return (-1); 751 } 752 753 /* Drain the response queue. */ 754 for (;;) { 755 status = twe_inl(sc, TWE_REG_STS); 756 if (twe_status_check(sc, status) != 0) { 757 printf("%s: can't drain response queue\n", 758 sc->sc_dv.dv_xname); 759 return (-1); 760 } 761 if ((status & TWE_STS_RESP_QUEUE_EMPTY) != 0) 762 break; 763 junk = twe_inl(sc, TWE_REG_RESP_QUEUE); 764 } 765 766 return (0); 767 } 768 769 /* 770 * Print autoconfiguration message for a sub-device. 771 */ 772 static int 773 twe_print(void *aux, const char *pnp) 774 { 775 struct twe_attach_args *twea; 776 777 twea = aux; 778 779 if (pnp != NULL) 780 aprint_normal("block device at %s", pnp); 781 aprint_normal(" unit %d", twea->twea_unit); 782 return (UNCONF); 783 } 784 785 /* 786 * Match a sub-device. 787 */ 788 static int 789 twe_submatch(struct device *parent, struct cfdata *cf, 790 const locdesc_t *ldesc, void *aux) 791 { 792 793 if (cf->cf_loc[TWECF_UNIT] != TWECF_UNIT_DEFAULT && 794 cf->cf_loc[TWECF_UNIT] != ldesc->locs[TWECF_UNIT]) 795 return (0); 796 797 return (config_match(parent, cf, aux)); 798 } 799 800 /* 801 * Interrupt service routine. 802 */ 803 static int 804 twe_intr(void *arg) 805 { 806 struct twe_softc *sc; 807 u_int status; 808 int caught, rv; 809 810 sc = arg; 811 caught = 0; 812 status = twe_inl(sc, TWE_REG_STS); 813 twe_status_check(sc, status); 814 815 /* Host interrupts - purpose unknown. */ 816 if ((status & TWE_STS_HOST_INTR) != 0) { 817 #ifdef DEBUG 818 printf("%s: host interrupt\n", sc->sc_dv.dv_xname); 819 #endif 820 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_HOST_INTR); 821 caught = 1; 822 } 823 824 /* 825 * Attention interrupts, signalled when a controller or child device 826 * state change has occurred. 827 */ 828 if ((status & TWE_STS_ATTN_INTR) != 0) { 829 rv = twe_aen_get(sc, NULL); 830 if (rv != 0) 831 printf("%s: unable to retrieve AEN (%d)\n", 832 sc->sc_dv.dv_xname, rv); 833 else 834 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 835 caught = 1; 836 } 837 838 /* 839 * Command interrupts, signalled when the controller can accept more 840 * commands. We don't use this; instead, we try to submit commands 841 * when we receive them, and when other commands have completed. 842 * Mask it so we don't get another one. 843 */ 844 if ((status & TWE_STS_CMD_INTR) != 0) { 845 #ifdef DEBUG 846 printf("%s: command interrupt\n", sc->sc_dv.dv_xname); 847 #endif 848 twe_outl(sc, TWE_REG_CTL, TWE_CTL_MASK_CMD_INTR); 849 caught = 1; 850 } 851 852 if ((status & TWE_STS_RESP_INTR) != 0) { 853 twe_poll(sc); 854 caught = 1; 855 } 856 857 return (caught); 858 } 859 860 /* 861 * Fetch an AEN. Even though this is really like parameter 862 * retrieval, we handle this specially, because we issue this 863 * AEN retrieval command from interrupt context, and thus 864 * reserve a CCB for it to avoid resource shortage. 865 * 866 * XXX There are still potential resource shortages we could 867 * XXX encounter. Consider pre-allocating all AEN-related 868 * XXX resources. 869 * 870 * MUST BE CALLED AT splbio()! 871 */ 872 static int 873 twe_aen_get(struct twe_softc *sc, uint16_t *aenp) 874 { 875 struct twe_ccb *ccb; 876 struct twe_cmd *tc; 877 struct twe_param *tp; 878 int rv; 879 880 /* 881 * If we're already retrieving an AEN, just wait; another 882 * retrieval will be chained after the current one completes. 883 */ 884 if (sc->sc_flags & TWEF_AEN) { 885 /* 886 * It is a fatal software programming error to attempt 887 * to fetch an AEN synchronously when an AEN fetch is 888 * already pending. 889 */ 890 KASSERT(aenp == NULL); 891 return (0); 892 } 893 894 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 895 if (tp == NULL) 896 return (ENOMEM); 897 898 ccb = twe_ccb_alloc(sc, 899 TWE_CCB_AEN | TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 900 KASSERT(ccb != NULL); 901 902 ccb->ccb_data = tp; 903 ccb->ccb_datasize = TWE_SECTOR_SIZE; 904 ccb->ccb_tx.tx_handler = (aenp == NULL) ? twe_aen_handler : NULL; 905 ccb->ccb_tx.tx_context = tp; 906 ccb->ccb_tx.tx_dv = &sc->sc_dv; 907 908 tc = ccb->ccb_cmd; 909 tc->tc_size = 2; 910 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 911 tc->tc_unit = 0; 912 tc->tc_count = htole16(1); 913 914 /* Fill in the outbound parameter data. */ 915 tp->tp_table_id = htole16(TWE_PARAM_AEN); 916 tp->tp_param_id = TWE_PARAM_AEN_UnitCode; 917 tp->tp_param_size = 2; 918 919 /* Map the transfer. */ 920 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 921 twe_ccb_free(sc, ccb); 922 goto done; 923 } 924 925 /* Enqueue the command and wait. */ 926 if (aenp != NULL) { 927 rv = twe_ccb_poll(sc, ccb, 5); 928 twe_ccb_unmap(sc, ccb); 929 twe_ccb_free(sc, ccb); 930 if (rv == 0) 931 *aenp = le16toh(*(uint16_t *)tp->tp_data); 932 free(tp, M_DEVBUF); 933 } else { 934 sc->sc_flags |= TWEF_AEN; 935 twe_ccb_enqueue(sc, ccb); 936 rv = 0; 937 } 938 939 done: 940 return (rv); 941 } 942 943 /* 944 * Handle an AEN returned by the controller. 945 * MUST BE CALLED AT splbio()! 946 */ 947 static void 948 twe_aen_handler(struct twe_ccb *ccb, int error) 949 { 950 struct twe_softc *sc; 951 struct twe_param *tp; 952 uint16_t aen; 953 int rv; 954 955 sc = (struct twe_softc *)ccb->ccb_tx.tx_dv; 956 tp = ccb->ccb_tx.tx_context; 957 twe_ccb_unmap(sc, ccb); 958 959 sc->sc_flags &= ~TWEF_AEN; 960 961 if (error) { 962 printf("%s: error retrieving AEN\n", sc->sc_dv.dv_xname); 963 aen = TWE_AEN_QUEUE_EMPTY; 964 } else 965 aen = le16toh(*(u_int16_t *)tp->tp_data); 966 free(tp, M_DEVBUF); 967 twe_ccb_free(sc, ccb); 968 969 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) { 970 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 971 return; 972 } 973 974 twe_aen_enqueue(sc, aen, 0); 975 976 /* 977 * Chain another retrieval in case interrupts have been 978 * coalesced. 979 */ 980 rv = twe_aen_get(sc, NULL); 981 if (rv != 0) 982 printf("%s: unable to retrieve AEN (%d)\n", 983 sc->sc_dv.dv_xname, rv); 984 } 985 986 static void 987 twe_aen_enqueue(struct twe_softc *sc, uint16_t aen, int quiet) 988 { 989 const char *str, *msg; 990 int s, next, nextnext, level; 991 992 /* 993 * First report the AEN on the console. Maybe. 994 */ 995 if (! quiet) { 996 str = twe_describe_code(twe_table_aen, TWE_AEN_CODE(aen)); 997 if (str == NULL) { 998 printf("%s: unknown AEN 0x%04x\n", 999 sc->sc_dv.dv_xname, aen); 1000 } else { 1001 msg = str + 3; 1002 switch (str[1]) { 1003 case 'E': level = LOG_EMERG; break; 1004 case 'a': level = LOG_ALERT; break; 1005 case 'c': level = LOG_CRIT; break; 1006 case 'e': level = LOG_ERR; break; 1007 case 'w': level = LOG_WARNING; break; 1008 case 'n': level = LOG_NOTICE; break; 1009 case 'i': level = LOG_INFO; break; 1010 case 'd': level = LOG_DEBUG; break; 1011 default: 1012 /* Don't use syslog. */ 1013 level = -1; 1014 } 1015 1016 if (level < 0) { 1017 switch (str[0]) { 1018 case 'u': 1019 case 'p': 1020 printf("%s: %s %d: %s\n", 1021 sc->sc_dv.dv_xname, 1022 str[0] == 'u' ? "unit" : "port", 1023 TWE_AEN_UNIT(aen), msg); 1024 break; 1025 1026 default: 1027 printf("%s: %s\n", 1028 sc->sc_dv.dv_xname, msg); 1029 } 1030 } else { 1031 switch (str[0]) { 1032 case 'u': 1033 case 'p': 1034 log(level, "%s: %s %d: %s\n", 1035 sc->sc_dv.dv_xname, 1036 str[0] == 'u' ? "unit" : "port", 1037 TWE_AEN_UNIT(aen), msg); 1038 break; 1039 1040 default: 1041 log(level, "%s: %s\n", 1042 sc->sc_dv.dv_xname, msg); 1043 } 1044 } 1045 } 1046 } 1047 1048 /* Now enqueue the AEN for mangement tools. */ 1049 s = splbio(); 1050 1051 next = (sc->sc_aen_head + 1) % TWE_AEN_Q_LENGTH; 1052 nextnext = (sc->sc_aen_head + 2) % TWE_AEN_Q_LENGTH; 1053 1054 /* 1055 * If this is the last free slot, then queue up a "queue 1056 * full" message. 1057 */ 1058 if (nextnext == sc->sc_aen_tail) 1059 aen = TWE_AEN_QUEUE_FULL; 1060 1061 if (next != sc->sc_aen_tail) { 1062 sc->sc_aen_queue[sc->sc_aen_head] = aen; 1063 sc->sc_aen_head = next; 1064 } 1065 1066 if (sc->sc_flags & TWEF_AENQ_WAIT) { 1067 sc->sc_flags &= ~TWEF_AENQ_WAIT; 1068 wakeup(&sc->sc_aen_queue); 1069 } 1070 1071 splx(s); 1072 } 1073 1074 /* NOTE: Must be called at splbio(). */ 1075 static uint16_t 1076 twe_aen_dequeue(struct twe_softc *sc) 1077 { 1078 uint16_t aen; 1079 1080 if (sc->sc_aen_tail == sc->sc_aen_head) 1081 aen = TWE_AEN_QUEUE_EMPTY; 1082 else { 1083 aen = sc->sc_aen_queue[sc->sc_aen_tail]; 1084 sc->sc_aen_tail = (sc->sc_aen_tail + 1) % TWE_AEN_Q_LENGTH; 1085 } 1086 1087 return (aen); 1088 } 1089 1090 /* 1091 * These are short-hand functions that execute TWE_OP_GET_PARAM to 1092 * fetch 1, 2, and 4 byte parameter values, respectively. 1093 */ 1094 int 1095 twe_param_get_1(struct twe_softc *sc, int table_id, int param_id, 1096 uint8_t *valp) 1097 { 1098 struct twe_param *tp; 1099 int rv; 1100 1101 rv = twe_param_get(sc, table_id, param_id, 1, NULL, &tp); 1102 if (rv != 0) 1103 return (rv); 1104 *valp = *(uint8_t *)tp->tp_data; 1105 free(tp, M_DEVBUF); 1106 return (0); 1107 } 1108 1109 int 1110 twe_param_get_2(struct twe_softc *sc, int table_id, int param_id, 1111 uint16_t *valp) 1112 { 1113 struct twe_param *tp; 1114 int rv; 1115 1116 rv = twe_param_get(sc, table_id, param_id, 2, NULL, &tp); 1117 if (rv != 0) 1118 return (rv); 1119 *valp = le16toh(*(uint16_t *)tp->tp_data); 1120 free(tp, M_DEVBUF); 1121 return (0); 1122 } 1123 1124 int 1125 twe_param_get_4(struct twe_softc *sc, int table_id, int param_id, 1126 uint32_t *valp) 1127 { 1128 struct twe_param *tp; 1129 int rv; 1130 1131 rv = twe_param_get(sc, table_id, param_id, 4, NULL, &tp); 1132 if (rv != 0) 1133 return (rv); 1134 *valp = le32toh(*(uint32_t *)tp->tp_data); 1135 free(tp, M_DEVBUF); 1136 return (0); 1137 } 1138 1139 /* 1140 * Execute a TWE_OP_GET_PARAM command. If a callback function is provided, 1141 * it will be called with generated context when the command has completed. 1142 * If no callback is provided, the command will be executed synchronously 1143 * and a pointer to a buffer containing the data returned. 1144 * 1145 * The caller or callback is responsible for freeing the buffer. 1146 * 1147 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1148 */ 1149 int 1150 twe_param_get(struct twe_softc *sc, int table_id, int param_id, size_t size, 1151 void (*func)(struct twe_ccb *, int), struct twe_param **pbuf) 1152 { 1153 struct twe_ccb *ccb; 1154 struct twe_cmd *tc; 1155 struct twe_param *tp; 1156 int rv, s; 1157 1158 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1159 if (tp == NULL) 1160 return ENOMEM; 1161 1162 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1163 KASSERT(ccb != NULL); 1164 1165 ccb->ccb_data = tp; 1166 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1167 ccb->ccb_tx.tx_handler = func; 1168 ccb->ccb_tx.tx_context = tp; 1169 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1170 1171 tc = ccb->ccb_cmd; 1172 tc->tc_size = 2; 1173 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 1174 tc->tc_unit = 0; 1175 tc->tc_count = htole16(1); 1176 1177 /* Fill in the outbound parameter data. */ 1178 tp->tp_table_id = htole16(table_id); 1179 tp->tp_param_id = param_id; 1180 tp->tp_param_size = size; 1181 1182 /* Map the transfer. */ 1183 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1184 twe_ccb_free(sc, ccb); 1185 goto done; 1186 } 1187 1188 /* Submit the command and either wait or let the callback handle it. */ 1189 if (func == NULL) { 1190 s = splbio(); 1191 rv = twe_ccb_poll(sc, ccb, 5); 1192 twe_ccb_unmap(sc, ccb); 1193 twe_ccb_free(sc, ccb); 1194 splx(s); 1195 } else { 1196 #ifdef DEBUG 1197 if (pbuf != NULL) 1198 panic("both func and pbuf defined"); 1199 #endif 1200 twe_ccb_enqueue(sc, ccb); 1201 return 0; 1202 } 1203 1204 done: 1205 if (pbuf == NULL || rv != 0) 1206 free(tp, M_DEVBUF); 1207 else if (pbuf != NULL && rv == 0) 1208 *pbuf = tp; 1209 return rv; 1210 } 1211 1212 /* 1213 * Execute a TWE_OP_SET_PARAM command. 1214 * 1215 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1216 */ 1217 static int 1218 twe_param_set(struct twe_softc *sc, int table_id, int param_id, size_t size, 1219 void *buf) 1220 { 1221 struct twe_ccb *ccb; 1222 struct twe_cmd *tc; 1223 struct twe_param *tp; 1224 int rv, s; 1225 1226 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1227 if (tp == NULL) 1228 return ENOMEM; 1229 1230 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1231 KASSERT(ccb != NULL); 1232 1233 ccb->ccb_data = tp; 1234 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1235 ccb->ccb_tx.tx_handler = 0; 1236 ccb->ccb_tx.tx_context = tp; 1237 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1238 1239 tc = ccb->ccb_cmd; 1240 tc->tc_size = 2; 1241 tc->tc_opcode = TWE_OP_SET_PARAM | (tc->tc_size << 5); 1242 tc->tc_unit = 0; 1243 tc->tc_count = htole16(1); 1244 1245 /* Fill in the outbound parameter data. */ 1246 tp->tp_table_id = htole16(table_id); 1247 tp->tp_param_id = param_id; 1248 tp->tp_param_size = size; 1249 memcpy(tp->tp_data, buf, size); 1250 1251 /* Map the transfer. */ 1252 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1253 twe_ccb_free(sc, ccb); 1254 goto done; 1255 } 1256 1257 /* Submit the command and wait. */ 1258 s = splbio(); 1259 rv = twe_ccb_poll(sc, ccb, 5); 1260 twe_ccb_unmap(sc, ccb); 1261 twe_ccb_free(sc, ccb); 1262 splx(s); 1263 done: 1264 free(tp, M_DEVBUF); 1265 return (rv); 1266 } 1267 1268 /* 1269 * Execute a TWE_OP_INIT_CONNECTION command. Return non-zero on error. 1270 * Must be called with interrupts blocked. 1271 */ 1272 static int 1273 twe_init_connection(struct twe_softc *sc) 1274 /*###762 [cc] warning: `twe_init_connection' was used with no prototype before its definition%%%*/ 1275 /*###762 [cc] warning: `twe_init_connection' was declared implicitly `extern' and later `static'%%%*/ 1276 { 1277 struct twe_ccb *ccb; 1278 struct twe_cmd *tc; 1279 int rv; 1280 1281 if ((ccb = twe_ccb_alloc(sc, 0)) == NULL) 1282 return (EAGAIN); 1283 1284 /* Build the command. */ 1285 tc = ccb->ccb_cmd; 1286 tc->tc_size = 3; 1287 tc->tc_opcode = TWE_OP_INIT_CONNECTION; 1288 tc->tc_unit = 0; 1289 tc->tc_count = htole16(TWE_MAX_CMDS); 1290 tc->tc_args.init_connection.response_queue_pointer = 0; 1291 1292 /* Submit the command for immediate execution. */ 1293 rv = twe_ccb_poll(sc, ccb, 5); 1294 twe_ccb_free(sc, ccb); 1295 return (rv); 1296 } 1297 1298 /* 1299 * Poll the controller for completed commands. Must be called with 1300 * interrupts blocked. 1301 */ 1302 static void 1303 twe_poll(struct twe_softc *sc) 1304 { 1305 struct twe_ccb *ccb; 1306 int found; 1307 u_int status, cmdid; 1308 1309 found = 0; 1310 1311 for (;;) { 1312 status = twe_inl(sc, TWE_REG_STS); 1313 twe_status_check(sc, status); 1314 1315 if ((status & TWE_STS_RESP_QUEUE_EMPTY)) 1316 break; 1317 1318 found = 1; 1319 cmdid = twe_inl(sc, TWE_REG_RESP_QUEUE); 1320 cmdid = (cmdid & TWE_RESP_MASK) >> TWE_RESP_SHIFT; 1321 if (cmdid >= TWE_MAX_QUEUECNT) { 1322 printf("%s: bad cmdid %d\n", sc->sc_dv.dv_xname, cmdid); 1323 continue; 1324 } 1325 1326 ccb = sc->sc_ccbs + cmdid; 1327 if ((ccb->ccb_flags & TWE_CCB_ACTIVE) == 0) { 1328 printf("%s: CCB for cmdid %d not active\n", 1329 sc->sc_dv.dv_xname, cmdid); 1330 continue; 1331 } 1332 ccb->ccb_flags ^= TWE_CCB_COMPLETE | TWE_CCB_ACTIVE; 1333 1334 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1335 (caddr_t)ccb->ccb_cmd - sc->sc_cmds, 1336 sizeof(struct twe_cmd), 1337 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1338 1339 /* Pass notification to upper layers. */ 1340 if (ccb->ccb_tx.tx_handler != NULL) 1341 (*ccb->ccb_tx.tx_handler)(ccb, 1342 ccb->ccb_cmd->tc_status != 0 ? EIO : 0); 1343 } 1344 1345 /* If any commands have completed, run the software queue. */ 1346 if (found) 1347 twe_ccb_enqueue(sc, NULL); 1348 } 1349 1350 /* 1351 * Wait for `status' to be set in the controller status register. Return 1352 * zero if found, non-zero if the operation timed out. 1353 */ 1354 static int 1355 twe_status_wait(struct twe_softc *sc, u_int32_t status, int timo) 1356 { 1357 1358 for (timo *= 10; timo != 0; timo--) { 1359 if ((twe_inl(sc, TWE_REG_STS) & status) == status) 1360 break; 1361 delay(100000); 1362 } 1363 1364 return (timo == 0); 1365 } 1366 1367 /* 1368 * Complain if the status bits aren't what we expect. 1369 */ 1370 static int 1371 twe_status_check(struct twe_softc *sc, u_int status) 1372 { 1373 int rv; 1374 1375 rv = 0; 1376 1377 if ((status & TWE_STS_EXPECTED_BITS) != TWE_STS_EXPECTED_BITS) { 1378 printf("%s: missing status bits: 0x%08x\n", sc->sc_dv.dv_xname, 1379 status & ~TWE_STS_EXPECTED_BITS); 1380 rv = -1; 1381 } 1382 1383 if ((status & TWE_STS_UNEXPECTED_BITS) != 0) { 1384 printf("%s: unexpected status bits: 0x%08x\n", 1385 sc->sc_dv.dv_xname, status & TWE_STS_UNEXPECTED_BITS); 1386 rv = -1; 1387 } 1388 1389 return (rv); 1390 } 1391 1392 /* 1393 * Allocate and initialise a CCB. 1394 */ 1395 static __inline void 1396 twe_ccb_init(struct twe_softc *sc, struct twe_ccb *ccb, int flags) 1397 { 1398 struct twe_cmd *tc; 1399 1400 ccb->ccb_tx.tx_handler = NULL; 1401 ccb->ccb_flags = flags; 1402 tc = ccb->ccb_cmd; 1403 tc->tc_status = 0; 1404 tc->tc_flags = 0; 1405 tc->tc_cmdid = ccb->ccb_cmdid; 1406 } 1407 1408 struct twe_ccb * 1409 twe_ccb_alloc(struct twe_softc *sc, int flags) 1410 { 1411 struct twe_ccb *ccb; 1412 int s; 1413 1414 s = splbio(); 1415 if (__predict_false((flags & TWE_CCB_AEN) != 0)) { 1416 /* Use the reserved CCB. */ 1417 ccb = sc->sc_ccbs; 1418 } else { 1419 /* Allocate a CCB and command block. */ 1420 if (__predict_false((ccb = 1421 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1422 splx(s); 1423 return (NULL); 1424 } 1425 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1426 } 1427 #ifdef DIAGNOSTIC 1428 if ((long)(ccb - sc->sc_ccbs) == 0 && (flags & TWE_CCB_AEN) == 0) 1429 panic("twe_ccb_alloc: got reserved CCB for non-AEN"); 1430 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1431 panic("twe_ccb_alloc: CCB %ld already allocated", 1432 (long)(ccb - sc->sc_ccbs)); 1433 flags |= TWE_CCB_ALLOCED; 1434 #endif 1435 splx(s); 1436 1437 twe_ccb_init(sc, ccb, flags); 1438 return (ccb); 1439 } 1440 1441 struct twe_ccb * 1442 twe_ccb_alloc_wait(struct twe_softc *sc, int flags) 1443 { 1444 struct twe_ccb *ccb; 1445 int s; 1446 1447 KASSERT((flags & TWE_CCB_AEN) == 0); 1448 1449 s = splbio(); 1450 while (__predict_false((ccb = 1451 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1452 sc->sc_flags |= TWEF_WAIT_CCB; 1453 (void) tsleep(&sc->sc_ccb_freelist, PRIBIO, "tweccb", 0); 1454 } 1455 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1456 #ifdef DIAGNOSTIC 1457 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1458 panic("twe_ccb_alloc_wait: CCB %ld already allocated", 1459 (long)(ccb - sc->sc_ccbs)); 1460 flags |= TWE_CCB_ALLOCED; 1461 #endif 1462 splx(s); 1463 1464 twe_ccb_init(sc, ccb, flags); 1465 return (ccb); 1466 } 1467 1468 /* 1469 * Free a CCB. 1470 */ 1471 void 1472 twe_ccb_free(struct twe_softc *sc, struct twe_ccb *ccb) 1473 { 1474 int s; 1475 1476 s = splbio(); 1477 if ((ccb->ccb_flags & TWE_CCB_AEN) == 0) { 1478 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, ccb_chain.slist); 1479 if (__predict_false((sc->sc_flags & TWEF_WAIT_CCB) != 0)) { 1480 sc->sc_flags &= ~TWEF_WAIT_CCB; 1481 wakeup(&sc->sc_ccb_freelist); 1482 } 1483 } 1484 ccb->ccb_flags = 0; 1485 splx(s); 1486 } 1487 1488 /* 1489 * Map the specified CCB's command block and data buffer (if any) into 1490 * controller visible space. Perform DMA synchronisation. 1491 */ 1492 int 1493 twe_ccb_map(struct twe_softc *sc, struct twe_ccb *ccb) 1494 { 1495 struct twe_cmd *tc; 1496 int flags, nsegs, i, s, rv; 1497 void *data; 1498 1499 /* 1500 * The data as a whole must be 512-byte aligned. 1501 */ 1502 if (((u_long)ccb->ccb_data & (TWE_ALIGNMENT - 1)) != 0) { 1503 s = splvm(); 1504 /* XXX */ 1505 ccb->ccb_abuf = uvm_km_kmemalloc(kmem_map, NULL, 1506 ccb->ccb_datasize, UVM_KMF_NOWAIT); 1507 splx(s); 1508 data = (void *)ccb->ccb_abuf; 1509 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1510 memcpy(data, ccb->ccb_data, ccb->ccb_datasize); 1511 } else { 1512 ccb->ccb_abuf = (vaddr_t)0; 1513 data = ccb->ccb_data; 1514 } 1515 1516 /* 1517 * Map the data buffer into bus space and build the S/G list. 1518 */ 1519 rv = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer, data, 1520 ccb->ccb_datasize, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | 1521 ((ccb->ccb_flags & TWE_CCB_DATA_IN) ? 1522 BUS_DMA_READ : BUS_DMA_WRITE)); 1523 if (rv != 0) { 1524 if (ccb->ccb_abuf != (vaddr_t)0) { 1525 s = splvm(); 1526 /* XXX */ 1527 uvm_km_free(kmem_map, ccb->ccb_abuf, 1528 ccb->ccb_datasize); 1529 splx(s); 1530 } 1531 return (rv); 1532 } 1533 1534 nsegs = ccb->ccb_dmamap_xfer->dm_nsegs; 1535 tc = ccb->ccb_cmd; 1536 tc->tc_size += 2 * nsegs; 1537 1538 /* The location of the S/G list is dependant upon command type. */ 1539 switch (tc->tc_opcode >> 5) { 1540 case 2: 1541 for (i = 0; i < nsegs; i++) { 1542 tc->tc_args.param.sgl[i].tsg_address = 1543 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1544 tc->tc_args.param.sgl[i].tsg_length = 1545 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1546 } 1547 /* XXX Needed? */ 1548 for (; i < TWE_SG_SIZE; i++) { 1549 tc->tc_args.param.sgl[i].tsg_address = 0; 1550 tc->tc_args.param.sgl[i].tsg_length = 0; 1551 } 1552 break; 1553 case 3: 1554 for (i = 0; i < nsegs; i++) { 1555 tc->tc_args.io.sgl[i].tsg_address = 1556 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1557 tc->tc_args.io.sgl[i].tsg_length = 1558 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1559 } 1560 /* XXX Needed? */ 1561 for (; i < TWE_SG_SIZE; i++) { 1562 tc->tc_args.io.sgl[i].tsg_address = 0; 1563 tc->tc_args.io.sgl[i].tsg_length = 0; 1564 } 1565 break; 1566 default: 1567 /* 1568 * In all likelihood, this is a command passed from 1569 * management tools in userspace where no S/G list is 1570 * necessary because no data is being passed. 1571 */ 1572 break; 1573 } 1574 1575 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1576 flags = BUS_DMASYNC_PREREAD; 1577 else 1578 flags = 0; 1579 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1580 flags |= BUS_DMASYNC_PREWRITE; 1581 1582 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1583 ccb->ccb_datasize, flags); 1584 return (0); 1585 } 1586 1587 /* 1588 * Unmap the specified CCB's command block and data buffer (if any) and 1589 * perform DMA synchronisation. 1590 */ 1591 void 1592 twe_ccb_unmap(struct twe_softc *sc, struct twe_ccb *ccb) 1593 { 1594 int flags, s; 1595 1596 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1597 flags = BUS_DMASYNC_POSTREAD; 1598 else 1599 flags = 0; 1600 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1601 flags |= BUS_DMASYNC_POSTWRITE; 1602 1603 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1604 ccb->ccb_datasize, flags); 1605 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer); 1606 1607 if (ccb->ccb_abuf != (vaddr_t)0) { 1608 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1609 memcpy(ccb->ccb_data, (void *)ccb->ccb_abuf, 1610 ccb->ccb_datasize); 1611 s = splvm(); 1612 /* XXX */ 1613 uvm_km_free(kmem_map, ccb->ccb_abuf, ccb->ccb_datasize); 1614 splx(s); 1615 } 1616 } 1617 1618 /* 1619 * Submit a command to the controller and poll on completion. Return 1620 * non-zero on timeout (but don't check status, as some command types don't 1621 * return status). Must be called with interrupts blocked. 1622 */ 1623 int 1624 twe_ccb_poll(struct twe_softc *sc, struct twe_ccb *ccb, int timo) 1625 { 1626 int rv; 1627 1628 if ((rv = twe_ccb_submit(sc, ccb)) != 0) 1629 return (rv); 1630 1631 for (timo *= 1000; timo != 0; timo--) { 1632 twe_poll(sc); 1633 if ((ccb->ccb_flags & TWE_CCB_COMPLETE) != 0) 1634 break; 1635 DELAY(100); 1636 } 1637 1638 return (timo == 0); 1639 } 1640 1641 /* 1642 * If a CCB is specified, enqueue it. Pull CCBs off the software queue in 1643 * the order that they were enqueued and try to submit their command blocks 1644 * to the controller for execution. 1645 */ 1646 void 1647 twe_ccb_enqueue(struct twe_softc *sc, struct twe_ccb *ccb) 1648 { 1649 int s; 1650 1651 s = splbio(); 1652 1653 if (ccb != NULL) 1654 SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain.simpleq); 1655 1656 while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) { 1657 if (twe_ccb_submit(sc, ccb)) 1658 break; 1659 SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb_chain.simpleq); 1660 } 1661 1662 splx(s); 1663 } 1664 1665 /* 1666 * Submit the command block associated with the specified CCB to the 1667 * controller for execution. Must be called with interrupts blocked. 1668 */ 1669 int 1670 twe_ccb_submit(struct twe_softc *sc, struct twe_ccb *ccb) 1671 { 1672 bus_addr_t pa; 1673 int rv; 1674 u_int status; 1675 1676 /* Check to see if we can post a command. */ 1677 status = twe_inl(sc, TWE_REG_STS); 1678 twe_status_check(sc, status); 1679 1680 if ((status & TWE_STS_CMD_QUEUE_FULL) == 0) { 1681 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1682 (caddr_t)ccb->ccb_cmd - sc->sc_cmds, sizeof(struct twe_cmd), 1683 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1684 #ifdef DIAGNOSTIC 1685 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) == 0) 1686 panic("%s: CCB %ld not ALLOCED\n", 1687 sc->sc_dv.dv_xname, (long)(ccb - sc->sc_ccbs)); 1688 #endif 1689 ccb->ccb_flags |= TWE_CCB_ACTIVE; 1690 pa = sc->sc_cmds_paddr + 1691 ccb->ccb_cmdid * sizeof(struct twe_cmd); 1692 twe_outl(sc, TWE_REG_CMD_QUEUE, (u_int32_t)pa); 1693 rv = 0; 1694 } else 1695 rv = EBUSY; 1696 1697 return (rv); 1698 } 1699 1700 1701 /* 1702 * Accept an open operation on the control device. 1703 */ 1704 int 1705 tweopen(dev_t dev, int flag, int mode, struct proc *p) 1706 { 1707 struct twe_softc *twe; 1708 1709 if ((twe = device_lookup(&twe_cd, minor(dev))) == NULL) 1710 return (ENXIO); 1711 if ((twe->sc_flags & TWEF_OPEN) != 0) 1712 return (EBUSY); 1713 1714 twe->sc_flags |= TWEF_OPEN; 1715 return (0); 1716 } 1717 1718 /* 1719 * Accept the last close on the control device. 1720 */ 1721 int 1722 tweclose(dev_t dev, int flag, int mode, struct proc *p) 1723 { 1724 struct twe_softc *twe; 1725 1726 twe = device_lookup(&twe_cd, minor(dev)); 1727 twe->sc_flags &= ~TWEF_OPEN; 1728 return (0); 1729 } 1730 1731 void 1732 twe_ccb_wait_handler(struct twe_ccb *ccb, int error) 1733 { 1734 1735 /* Just wake up the sleeper. */ 1736 wakeup(ccb); 1737 } 1738 1739 /* 1740 * Handle control operations. 1741 */ 1742 int 1743 tweioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 1744 { 1745 struct twe_softc *twe; 1746 struct twe_ccb *ccb; 1747 struct twe_param *param; 1748 struct twe_usercommand *tu; 1749 struct twe_paramcommand *tp; 1750 struct twe_drivecommand *td; 1751 void *pdata = NULL; 1752 int s, error = 0; 1753 u_int8_t cmdid; 1754 1755 if (securelevel >= 2) 1756 return (EPERM); 1757 1758 twe = device_lookup(&twe_cd, minor(dev)); 1759 tu = (struct twe_usercommand *)data; 1760 tp = (struct twe_paramcommand *)data; 1761 td = (struct twe_drivecommand *)data; 1762 1763 /* This is intended to be compatible with the FreeBSD interface. */ 1764 switch (cmd) { 1765 case TWEIO_COMMAND: 1766 /* XXX mutex */ 1767 if (tu->tu_size > 0) { 1768 /* 1769 * XXX Handle > TWE_SECTOR_SIZE? Let's see if 1770 * it's really necessary, first. 1771 */ 1772 if (tu->tu_size > TWE_SECTOR_SIZE) { 1773 #ifdef TWE_DEBUG 1774 printf("%s: TWEIO_COMMAND: tu_size = %d\n", 1775 twe->sc_dv.dv_xname, tu->tu_size); 1776 #endif 1777 return EINVAL; 1778 } 1779 pdata = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_WAITOK); 1780 error = copyin(tu->tu_data, pdata, tu->tu_size); 1781 if (error != 0) 1782 goto done; 1783 ccb = twe_ccb_alloc_wait(twe, 1784 TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1785 KASSERT(ccb != NULL); 1786 ccb->ccb_data = pdata; 1787 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1788 } else { 1789 ccb = twe_ccb_alloc_wait(twe, 0); 1790 KASSERT(ccb != NULL); 1791 } 1792 1793 ccb->ccb_tx.tx_handler = twe_ccb_wait_handler; 1794 ccb->ccb_tx.tx_context = NULL; 1795 ccb->ccb_tx.tx_dv = &twe->sc_dv; 1796 1797 cmdid = ccb->ccb_cmdid; 1798 memcpy(ccb->ccb_cmd, &tu->tu_cmd, sizeof(struct twe_cmd)); 1799 ccb->ccb_cmd->tc_cmdid = cmdid; 1800 1801 /* Map the transfer. */ 1802 if ((error = twe_ccb_map(twe, ccb)) != 0) { 1803 twe_ccb_free(twe, ccb); 1804 goto done; 1805 } 1806 1807 /* Submit the command and wait up to 1 minute. */ 1808 error = 0; 1809 twe_ccb_enqueue(twe, ccb); 1810 s = splbio(); 1811 while ((ccb->ccb_flags & TWE_CCB_COMPLETE) == 0) 1812 if ((error = tsleep(ccb, PRIBIO, "tweioctl", 1813 60 * hz)) != 0) 1814 break; 1815 splx(s); 1816 1817 /* Copy the command back to the ioctl argument. */ 1818 memcpy(&tu->tu_cmd, ccb->ccb_cmd, sizeof(struct twe_cmd)); 1819 #ifdef TWE_DEBUG 1820 printf("%s: TWEIO_COMMAND: tc_opcode = 0x%02x, " 1821 "tc_status = 0x%02x\n", twe->sc_dv.dv_xname, 1822 tu->tu_cmd.tc_opcode, tu->tu_cmd.tc_status); 1823 #endif 1824 1825 s = splbio(); 1826 twe_ccb_free(twe, ccb); 1827 splx(s); 1828 1829 if (tu->tu_size > 0) 1830 error = copyout(pdata, tu->tu_data, tu->tu_size); 1831 goto done; 1832 1833 case TWEIO_STATS: 1834 return (ENOENT); 1835 1836 case TWEIO_AEN_POLL: 1837 s = splbio(); 1838 *(u_int *)data = twe_aen_dequeue(twe); 1839 splx(s); 1840 return (0); 1841 1842 case TWEIO_AEN_WAIT: 1843 s = splbio(); 1844 while ((*(u_int *)data = 1845 twe_aen_dequeue(twe)) == TWE_AEN_QUEUE_EMPTY) { 1846 twe->sc_flags |= TWEF_AENQ_WAIT; 1847 error = tsleep(&twe->sc_aen_queue, PRIBIO | PCATCH, 1848 "tweaen", 0); 1849 if (error == EINTR) { 1850 splx(s); 1851 return (error); 1852 } 1853 } 1854 splx(s); 1855 return (0); 1856 1857 case TWEIO_GET_PARAM: 1858 error = twe_param_get(twe, tp->tp_table_id, tp->tp_param_id, 1859 tp->tp_size, 0, ¶m); 1860 if (error != 0) 1861 return (error); 1862 if (param->tp_param_size > tp->tp_size) { 1863 error = EFAULT; 1864 goto done; 1865 } 1866 error = copyout(param->tp_data, tp->tp_data, 1867 param->tp_param_size); 1868 goto done; 1869 1870 case TWEIO_SET_PARAM: 1871 pdata = malloc(tp->tp_size, M_DEVBUF, M_WAITOK); 1872 if ((error = copyin(tp->tp_data, pdata, tp->tp_size)) != 0) 1873 goto done; 1874 error = twe_param_set(twe, tp->tp_table_id, tp->tp_param_id, 1875 tp->tp_size, pdata); 1876 goto done; 1877 1878 case TWEIO_RESET: 1879 s = splbio(); 1880 twe_reset(twe); 1881 splx(s); 1882 return (0); 1883 1884 case TWEIO_ADD_UNIT: 1885 /* XXX mutex */ 1886 return (twe_add_unit(twe, td->td_unit)); 1887 1888 case TWEIO_DEL_UNIT: 1889 /* XXX mutex */ 1890 return (twe_del_unit(twe, td->td_unit)); 1891 1892 default: 1893 return EINVAL; 1894 } 1895 done: 1896 if (pdata) 1897 free(pdata, M_DEVBUF); 1898 return error; 1899 } 1900 1901 /* 1902 * Print some information about the controller 1903 */ 1904 static void 1905 twe_describe_controller(struct twe_softc *sc) 1906 { 1907 struct twe_param *p[6]; 1908 int i, rv = 0; 1909 uint32_t dsize; 1910 uint8_t ports; 1911 1912 /* get the port count */ 1913 rv |= twe_param_get_1(sc, TWE_PARAM_CONTROLLER, 1914 TWE_PARAM_CONTROLLER_PortCount, &ports); 1915 1916 /* get version strings */ 1917 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_Mon, 1918 16, NULL, &p[0]); 1919 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_FW, 1920 16, NULL, &p[1]); 1921 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_BIOS, 1922 16, NULL, &p[2]); 1923 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCB, 1924 8, NULL, &p[3]); 1925 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_ATA, 1926 8, NULL, &p[4]); 1927 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCI, 1928 8, NULL, &p[5]); 1929 1930 if (rv) { 1931 /* some error occurred */ 1932 aprint_error("%s: failed to fetch version information\n", 1933 sc->sc_dv.dv_xname); 1934 return; 1935 } 1936 1937 aprint_normal("%s: %d ports, Firmware %.16s, BIOS %.16s\n", 1938 sc->sc_dv.dv_xname, ports, 1939 p[1]->tp_data, p[2]->tp_data); 1940 1941 aprint_verbose("%s: Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 1942 sc->sc_dv.dv_xname, 1943 p[0]->tp_data, p[3]->tp_data, 1944 p[4]->tp_data, p[5]->tp_data); 1945 1946 free(p[0], M_DEVBUF); 1947 free(p[1], M_DEVBUF); 1948 free(p[2], M_DEVBUF); 1949 free(p[3], M_DEVBUF); 1950 free(p[4], M_DEVBUF); 1951 free(p[5], M_DEVBUF); 1952 1953 rv = twe_param_get(sc, TWE_PARAM_DRIVESUMMARY, 1954 TWE_PARAM_DRIVESUMMARY_Status, 16, NULL, &p[0]); 1955 if (rv) { 1956 aprint_error("%s: failed to get drive status summary\n", 1957 sc->sc_dv.dv_xname); 1958 return; 1959 } 1960 for (i = 0; i < ports; i++) { 1961 if (p[0]->tp_data[i] != TWE_PARAM_DRIVESTATUS_Present) 1962 continue; 1963 rv = twe_param_get_4(sc, TWE_PARAM_DRIVEINFO + i, 1964 TWE_PARAM_DRIVEINFO_Size, &dsize); 1965 if (rv) { 1966 aprint_error( 1967 "%s: unable to get drive size for port %d\n", 1968 sc->sc_dv.dv_xname, i); 1969 continue; 1970 } 1971 rv = twe_param_get(sc, TWE_PARAM_DRIVEINFO + i, 1972 TWE_PARAM_DRIVEINFO_Model, 40, NULL, &p[1]); 1973 if (rv) { 1974 aprint_error( 1975 "%s: unable to get drive model for port %d\n", 1976 sc->sc_dv.dv_xname, i); 1977 continue; 1978 } 1979 aprint_verbose("%s: port %d: %.40s %d MB\n", sc->sc_dv.dv_xname, 1980 i, p[1]->tp_data, dsize / 2048); 1981 free(p[1], M_DEVBUF); 1982 } 1983 free(p[0], M_DEVBUF); 1984 } 1985