1 /* $NetBSD: twa.c,v 1.18 2007/10/19 12:00:55 ad Exp $ */ 2 /* $wasabi: twa.c,v 1.27 2006/07/28 18:17:21 wrstuden Exp $ */ 3 4 /*- 5 * Copyright (c) 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jordan Rhody of Wasabi Systems, Inc. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /*- 41 * Copyright (c) 2003-04 3ware, Inc. 42 * Copyright (c) 2000 Michael Smith 43 * Copyright (c) 2000 BSDi 44 * All rights reserved. 45 * 46 * Redistribution and use in source and binary forms, with or without 47 * modification, are permitted provided that the following conditions 48 * are met: 49 * 1. Redistributions of source code must retain the above copyright 50 * notice, this list of conditions and the following disclaimer. 51 * 2. Redistributions in binary form must reproduce the above copyright 52 * notice, this list of conditions and the following disclaimer in the 53 * documentation and/or other materials provided with the distribution. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * $FreeBSD: src/sys/dev/twa/twa.c,v 1.2 2004/04/02 15:09:57 des Exp $ 68 */ 69 70 /* 71 * 3ware driver for 9000 series storage controllers. 72 * 73 * Author: Vinod Kashyap 74 */ 75 76 #include <sys/cdefs.h> 77 __KERNEL_RCSID(0, "$NetBSD: twa.c,v 1.18 2007/10/19 12:00:55 ad Exp $"); 78 79 #include <sys/param.h> 80 #include <sys/systm.h> 81 #include <sys/kernel.h> 82 #include <sys/device.h> 83 #include <sys/queue.h> 84 #include <sys/proc.h> 85 #include <sys/bswap.h> 86 #include <sys/buf.h> 87 #include <sys/bufq.h> 88 #include <sys/endian.h> 89 #include <sys/malloc.h> 90 #include <sys/conf.h> 91 #include <sys/disk.h> 92 #include <sys/sysctl.h> 93 #include <sys/syslog.h> 94 #if 1 95 #include <sys/ktrace.h> 96 #endif 97 98 #include <uvm/uvm_extern.h> 99 100 #include <sys/bus.h> 101 102 #include <dev/pci/pcireg.h> 103 #include <dev/pci/pcivar.h> 104 #include <dev/pci/pcidevs.h> 105 #include <dev/pci/twareg.h> 106 #include <dev/pci/twavar.h> 107 #include <dev/pci/twaio.h> 108 109 #include <dev/scsipi/scsipi_all.h> 110 #include <dev/scsipi/scsipi_disk.h> 111 #include <dev/scsipi/scsipiconf.h> 112 #include <dev/scsipi/scsi_spc.h> 113 114 #include <dev/ldvar.h> 115 116 #include "locators.h" 117 118 #define PCI_CBIO 0x10 119 120 static int twa_fetch_aen(struct twa_softc *); 121 static void twa_aen_callback(struct twa_request *); 122 static int twa_find_aen(struct twa_softc *sc, uint16_t); 123 static uint16_t twa_enqueue_aen(struct twa_softc *sc, 124 struct twa_command_header *); 125 126 static void twa_attach(struct device *, struct device *, void *); 127 static void twa_shutdown(void *); 128 static int twa_init_connection(struct twa_softc *, uint16_t, uint32_t, 129 uint16_t, uint16_t, uint16_t, uint16_t, uint16_t *, 130 uint16_t *, uint16_t *, uint16_t *, uint32_t *); 131 static int twa_intr(void *); 132 static int twa_match(struct device *, struct cfdata *, void *); 133 static int twa_reset(struct twa_softc *); 134 135 static int twa_print(void *, const char *); 136 static int twa_soft_reset(struct twa_softc *); 137 138 static int twa_check_ctlr_state(struct twa_softc *, uint32_t); 139 static int twa_get_param(struct twa_softc *, int, int, size_t, 140 void (* callback)(struct twa_request *), 141 struct twa_param_9k **); 142 static int twa_set_param(struct twa_softc *, int, int, int, void *, 143 void (* callback)(struct twa_request *)); 144 static void twa_describe_controller(struct twa_softc *); 145 static int twa_wait_status(struct twa_softc *, uint32_t, uint32_t); 146 static int twa_done(struct twa_softc *); 147 #if 0 148 static int twa_flash_firmware(struct twa_softc *sc); 149 static int twa_hard_reset(struct twa_softc *sc); 150 #endif 151 152 extern struct cfdriver twa_cd; 153 extern uint32_t twa_fw_img_size; 154 extern uint8_t twa_fw_img[]; 155 156 CFATTACH_DECL(twa, sizeof(struct twa_softc), 157 twa_match, twa_attach, NULL, NULL); 158 159 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 160 const char twaver[] = "1.50.01.002"; 161 162 /* AEN messages. */ 163 static const struct twa_message twa_aen_table[] = { 164 {0x0000, "AEN queue empty"}, 165 {0x0001, "Controller reset occurred"}, 166 {0x0002, "Degraded unit detected"}, 167 {0x0003, "Controller error occured"}, 168 {0x0004, "Background rebuild failed"}, 169 {0x0005, "Background rebuild done"}, 170 {0x0006, "Incomplete unit detected"}, 171 {0x0007, "Background initialize done"}, 172 {0x0008, "Unclean shutdown detected"}, 173 {0x0009, "Drive timeout detected"}, 174 {0x000A, "Drive error detected"}, 175 {0x000B, "Rebuild started"}, 176 {0x000C, "Background initialize started"}, 177 {0x000D, "Entire logical unit was deleted"}, 178 {0x000E, "Background initialize failed"}, 179 {0x000F, "SMART attribute exceeded threshold"}, 180 {0x0010, "Power supply reported AC under range"}, 181 {0x0011, "Power supply reported DC out of range"}, 182 {0x0012, "Power supply reported a malfunction"}, 183 {0x0013, "Power supply predicted malfunction"}, 184 {0x0014, "Battery charge is below threshold"}, 185 {0x0015, "Fan speed is below threshold"}, 186 {0x0016, "Temperature sensor is above threshold"}, 187 {0x0017, "Power supply was removed"}, 188 {0x0018, "Power supply was inserted"}, 189 {0x0019, "Drive was removed from a bay"}, 190 {0x001A, "Drive was inserted into a bay"}, 191 {0x001B, "Drive bay cover door was opened"}, 192 {0x001C, "Drive bay cover door was closed"}, 193 {0x001D, "Product case was opened"}, 194 {0x0020, "Prepare for shutdown (power-off)"}, 195 {0x0021, "Downgrade UDMA mode to lower speed"}, 196 {0x0022, "Upgrade UDMA mode to higher speed"}, 197 {0x0023, "Sector repair completed"}, 198 {0x0024, "Sbuf memory test failed"}, 199 {0x0025, "Error flushing cached write data to disk"}, 200 {0x0026, "Drive reported data ECC error"}, 201 {0x0027, "DCB has checksum error"}, 202 {0x0028, "DCB version is unsupported"}, 203 {0x0029, "Background verify started"}, 204 {0x002A, "Background verify failed"}, 205 {0x002B, "Background verify done"}, 206 {0x002C, "Bad sector overwritten during rebuild"}, 207 {0x002E, "Replace failed because replacement drive too small"}, 208 {0x002F, "Verify failed because array was never initialized"}, 209 {0x0030, "Unsupported ATA drive"}, 210 {0x0031, "Synchronize host/controller time"}, 211 {0x0032, "Spare capacity is inadequate for some units"}, 212 {0x0033, "Background migration started"}, 213 {0x0034, "Background migration failed"}, 214 {0x0035, "Background migration done"}, 215 {0x0036, "Verify detected and fixed data/parity mismatch"}, 216 {0x0037, "SO-DIMM incompatible"}, 217 {0x0038, "SO-DIMM not detected"}, 218 {0x0039, "Corrected Sbuf ECC error"}, 219 {0x003A, "Drive power on reset detected"}, 220 {0x003B, "Background rebuild paused"}, 221 {0x003C, "Background initialize paused"}, 222 {0x003D, "Background verify paused"}, 223 {0x003E, "Background migration paused"}, 224 {0x003F, "Corrupt flash file system detected"}, 225 {0x0040, "Flash file system repaired"}, 226 {0x0041, "Unit number assignments were lost"}, 227 {0x0042, "Error during read of primary DCB"}, 228 {0x0043, "Latent error found in backup DCB"}, 229 {0x0044, "Battery voltage is normal"}, 230 {0x0045, "Battery voltage is low"}, 231 {0x0046, "Battery voltage is high"}, 232 {0x0047, "Battery voltage is too low"}, 233 {0x0048, "Battery voltage is too high"}, 234 {0x0049, "Battery temperature is normal"}, 235 {0x004A, "Battery temperature is low"}, 236 {0x004B, "Battery temperature is high"}, 237 {0x004C, "Battery temperature is too low"}, 238 {0x004D, "Battery temperature is too high"}, 239 {0x004E, "Battery capacity test started"}, 240 {0x004F, "Cache synchronization skipped"}, 241 {0x0050, "Battery capacity test completed"}, 242 {0x0051, "Battery health check started"}, 243 {0x0052, "Battery health check completed"}, 244 {0x0053, "Need to do a capacity test"}, 245 {0x0054, "Charge termination voltage is at high level"}, 246 {0x0055, "Battery charging started"}, 247 {0x0056, "Battery charging completed"}, 248 {0x0057, "Battery charging fault"}, 249 {0x0058, "Battery capacity is below warning level"}, 250 {0x0059, "Battery capacity is below error level"}, 251 {0x005A, "Battery is present"}, 252 {0x005B, "Battery is not present"}, 253 {0x005C, "Battery is weak"}, 254 {0x005D, "Battery health check failed"}, 255 {0x005E, "Cache synchronized after power fail"}, 256 {0x005F, "Cache synchronization failed; some data lost"}, 257 {0x0060, "Bad cache meta data checksum"}, 258 {0x0061, "Bad cache meta data signature"}, 259 {0x0062, "Cache meta data restore failed"}, 260 {0x0063, "BBU not found after power fail"}, 261 {0x00FC, "Recovered/finished array membership update"}, 262 {0x00FD, "Handler lockup"}, 263 {0x00FE, "Retrying PCI transfer"}, 264 {0x00FF, "AEN queue is full"}, 265 {0xFFFFFFFF, (char *)NULL} 266 }; 267 268 /* AEN severity table. */ 269 static const char *twa_aen_severity_table[] = { 270 "None", 271 "ERROR", 272 "WARNING", 273 "INFO", 274 "DEBUG", 275 (char *)NULL 276 }; 277 278 /* Error messages. */ 279 static const struct twa_message twa_error_table[] = { 280 {0x0100, "SGL entry contains zero data"}, 281 {0x0101, "Invalid command opcode"}, 282 {0x0102, "SGL entry has unaligned address"}, 283 {0x0103, "SGL size does not match command"}, 284 {0x0104, "SGL entry has illegal length"}, 285 {0x0105, "Command packet is not aligned"}, 286 {0x0106, "Invalid request ID"}, 287 {0x0107, "Duplicate request ID"}, 288 {0x0108, "ID not locked"}, 289 {0x0109, "LBA out of range"}, 290 {0x010A, "Logical unit not supported"}, 291 {0x010B, "Parameter table does not exist"}, 292 {0x010C, "Parameter index does not exist"}, 293 {0x010D, "Invalid field in CDB"}, 294 {0x010E, "Specified port has invalid drive"}, 295 {0x010F, "Parameter item size mismatch"}, 296 {0x0110, "Failed memory allocation"}, 297 {0x0111, "Memory request too large"}, 298 {0x0112, "Out of memory segments"}, 299 {0x0113, "Invalid address to deallocate"}, 300 {0x0114, "Out of memory"}, 301 {0x0115, "Out of heap"}, 302 {0x0120, "Double degrade"}, 303 {0x0121, "Drive not degraded"}, 304 {0x0122, "Reconstruct error"}, 305 {0x0123, "Replace not accepted"}, 306 {0x0124, "Replace drive capacity too small"}, 307 {0x0125, "Sector count not allowed"}, 308 {0x0126, "No spares left"}, 309 {0x0127, "Reconstruct error"}, 310 {0x0128, "Unit is offline"}, 311 {0x0129, "Cannot update status to DCB"}, 312 {0x0130, "Invalid stripe handle"}, 313 {0x0131, "Handle that was not locked"}, 314 {0x0132, "Handle that was not empy"}, 315 {0x0133, "Handle has different owner"}, 316 {0x0140, "IPR has parent"}, 317 {0x0150, "Illegal Pbuf address alignment"}, 318 {0x0151, "Illegal Pbuf transfer length"}, 319 {0x0152, "Illegal Sbuf address alignment"}, 320 {0x0153, "Illegal Sbuf transfer length"}, 321 {0x0160, "Command packet too large"}, 322 {0x0161, "SGL exceeds maximum length"}, 323 {0x0162, "SGL has too many entries"}, 324 {0x0170, "Insufficient resources for rebuilder"}, 325 {0x0171, "Verify error (data != parity)"}, 326 {0x0180, "Requested segment not in directory of this DCB"}, 327 {0x0181, "DCB segment has unsupported version"}, 328 {0x0182, "DCB segment has checksum error"}, 329 {0x0183, "DCB support (settings) segment invalid"}, 330 {0x0184, "DCB UDB (unit descriptor block) segment invalid"}, 331 {0x0185, "DCB GUID (globally unique identifier) segment invalid"}, 332 {0x01A0, "Could not clear Sbuf"}, 333 {0x01C0, "Flash identify failed"}, 334 {0x01C1, "Flash out of bounds"}, 335 {0x01C2, "Flash verify error"}, 336 {0x01C3, "Flash file object not found"}, 337 {0x01C4, "Flash file already present"}, 338 {0x01C5, "Flash file system full"}, 339 {0x01C6, "Flash file not present"}, 340 {0x01C7, "Flash file size error"}, 341 {0x01C8, "Bad flash file checksum"}, 342 {0x01CA, "Corrupt flash file system detected"}, 343 {0x01D0, "Invalid field in parameter list"}, 344 {0x01D1, "Parameter list length error"}, 345 {0x01D2, "Parameter item is not changeable"}, 346 {0x01D3, "Parameter item is not saveable"}, 347 {0x0200, "UDMA CRC error"}, 348 {0x0201, "Internal CRC error"}, 349 {0x0202, "Data ECC error"}, 350 {0x0203, "ADP level 1 error"}, 351 {0x0204, "Port timeout"}, 352 {0x0205, "Drive power on reset"}, 353 {0x0206, "ADP level 2 error"}, 354 {0x0207, "Soft reset failed"}, 355 {0x0208, "Drive not ready"}, 356 {0x0209, "Unclassified port error"}, 357 {0x020A, "Drive aborted command"}, 358 {0x0210, "Internal CRC error"}, 359 {0x0211, "Host PCI bus abort"}, 360 {0x0212, "Host PCI parity error"}, 361 {0x0213, "Port handler error"}, 362 {0x0214, "Token interrupt count error"}, 363 {0x0215, "Timeout waiting for PCI transfer"}, 364 {0x0216, "Corrected buffer ECC"}, 365 {0x0217, "Uncorrected buffer ECC"}, 366 {0x0230, "Unsupported command during flash recovery"}, 367 {0x0231, "Next image buffer expected"}, 368 {0x0232, "Binary image architecture incompatible"}, 369 {0x0233, "Binary image has no signature"}, 370 {0x0234, "Binary image has bad checksum"}, 371 {0x0235, "Image downloaded overflowed buffer"}, 372 {0x0240, "I2C device not found"}, 373 {0x0241, "I2C transaction aborted"}, 374 {0x0242, "SO-DIMM parameter(s) incompatible using defaults"}, 375 {0x0243, "SO-DIMM unsupported"}, 376 {0x0248, "SPI transfer status error"}, 377 {0x0249, "SPI transfer timeout error"}, 378 {0x0250, "Invalid unit descriptor size in CreateUnit"}, 379 {0x0251, "Unit descriptor size exceeds data buffer in CreateUnit"}, 380 {0x0252, "Invalid value in CreateUnit descriptor"}, 381 {0x0253, "Inadequate disk space to support descriptor in CreateUnit"}, 382 {0x0254, "Unable to create data channel for this unit descriptor"}, 383 {0x0255, "CreateUnit descriptor specifies a drive already in use"}, 384 {0x0256, "Unable to write configuration to all disks during CreateUnit"}, 385 {0x0257, "CreateUnit does not support this descriptor version"}, 386 {0x0258, "Invalid subunit for RAID 0 or 5 in CreateUnit"}, 387 {0x0259, "Too many descriptors in CreateUnit"}, 388 {0x025A, "Invalid configuration specified in CreateUnit descriptor"}, 389 {0x025B, "Invalid LBA offset specified in CreateUnit descriptor"}, 390 {0x025C, "Invalid stripelet size specified in CreateUnit descriptor"}, 391 {0x0260, "SMART attribute exceeded threshold"}, 392 {0xFFFFFFFF, (char *)NULL} 393 }; 394 395 struct twa_pci_identity { 396 uint32_t vendor_id; 397 uint32_t product_id; 398 const char *name; 399 }; 400 401 static const struct twa_pci_identity pci_twa_products[] = { 402 { PCI_VENDOR_3WARE, 403 PCI_PRODUCT_3WARE_9000, 404 "3ware 9000 series", 405 }, 406 { PCI_VENDOR_3WARE, 407 PCI_PRODUCT_3WARE_9550, 408 "3ware 9550SX series", 409 }, 410 { 0, 411 0, 412 NULL, 413 }, 414 }; 415 416 417 static inline void 418 twa_outl(struct twa_softc *sc, int off, uint32_t val) 419 { 420 421 bus_space_write_4(sc->twa_bus_iot, sc->twa_bus_ioh, off, val); 422 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 423 BUS_SPACE_BARRIER_WRITE); 424 } 425 426 static inline uint32_t twa_inl(struct twa_softc *sc, int off) 427 { 428 429 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 430 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 431 return (bus_space_read_4(sc->twa_bus_iot, sc->twa_bus_ioh, off)); 432 } 433 434 void 435 twa_request_wait_handler(struct twa_request *tr) 436 { 437 438 wakeup(tr); 439 } 440 441 static int 442 twa_match(struct device *parent, struct cfdata *cfdata, 443 void *aux) 444 { 445 int i; 446 struct pci_attach_args *pa = aux; 447 const struct twa_pci_identity *entry = 0; 448 449 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE) { 450 for (i = 0; (pci_twa_products[i].product_id); i++) { 451 entry = &pci_twa_products[i]; 452 if (entry->product_id == PCI_PRODUCT(pa->pa_id)) { 453 aprint_normal("%s: (rev. 0x%02x)\n", 454 entry->name, PCI_REVISION(pa->pa_class)); 455 return (1); 456 } 457 } 458 } 459 return (0); 460 } 461 462 static const char * 463 twa_find_msg_string(const struct twa_message *table, uint16_t code) 464 { 465 int i; 466 467 for (i = 0; table[i].message != NULL; i++) 468 if (table[i].code == code) 469 return(table[i].message); 470 471 return(table[i].message); 472 } 473 474 void 475 twa_release_request(struct twa_request *tr) 476 { 477 int s; 478 struct twa_softc *sc; 479 480 sc = tr->tr_sc; 481 482 if ((tr->tr_flags & TWA_CMD_AEN) == 0) { 483 s = splbio(); 484 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_free, tr, tr_link); 485 splx(s); 486 if (__predict_false((tr->tr_sc->twa_sc_flags & 487 TWA_STATE_REQUEST_WAIT) != 0)) { 488 tr->tr_sc->twa_sc_flags &= ~TWA_STATE_REQUEST_WAIT; 489 wakeup(&sc->twa_free); 490 } 491 } else 492 tr->tr_flags &= ~TWA_CMD_AEN_BUSY; 493 } 494 495 static void 496 twa_unmap_request(struct twa_request *tr) 497 { 498 struct twa_softc *sc = tr->tr_sc; 499 uint8_t cmd_status; 500 int s; 501 502 /* If the command involved data, unmap that too. */ 503 if (tr->tr_data != NULL) { 504 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) 505 cmd_status = tr->tr_command->command.cmd_pkt_9k.status; 506 else 507 cmd_status = 508 tr->tr_command->command.cmd_pkt_7k.generic.status; 509 510 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 511 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 512 0, tr->tr_length, BUS_DMASYNC_POSTREAD); 513 /* 514 * If we are using a bounce buffer, and we are reading 515 * data, copy the real data in. 516 */ 517 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 518 if (cmd_status == 0) 519 memcpy(tr->tr_real_data, tr->tr_data, 520 tr->tr_real_length); 521 } 522 if (tr->tr_flags & TWA_CMD_DATA_IN) 523 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 524 0, tr->tr_length, BUS_DMASYNC_POSTWRITE); 525 526 bus_dmamap_unload(sc->twa_dma_tag, tr->tr_dma_map); 527 } 528 529 /* Free alignment buffer if it was used. */ 530 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 531 s = splvm(); 532 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 533 tr->tr_length, UVM_KMF_WIRED); 534 splx(s); 535 tr->tr_data = tr->tr_real_data; 536 tr->tr_length = tr->tr_real_length; 537 } 538 } 539 540 /* 541 * Function name: twa_wait_request 542 * Description: Sends down a firmware cmd, and waits for the completion, 543 * but NOT in a tight loop. 544 * 545 * Input: tr -- ptr to request pkt 546 * timeout -- max # of seconds to wait before giving up 547 * Output: None 548 * Return value: 0 -- success 549 * non-zero-- failure 550 */ 551 static int 552 twa_wait_request(struct twa_request *tr, uint32_t timeout) 553 { 554 time_t end_time; 555 struct timeval t1; 556 int s, rv; 557 558 tr->tr_flags |= TWA_CMD_SLEEP_ON_REQUEST; 559 tr->tr_callback = twa_request_wait_handler; 560 tr->tr_status = TWA_CMD_BUSY; 561 562 rv = twa_map_request(tr); 563 564 if (rv != 0) 565 return (rv); 566 567 microtime(&t1); 568 end_time = t1.tv_usec + 569 (timeout * 1000 * 100); 570 571 while (tr->tr_status != TWA_CMD_COMPLETE) { 572 rv = tr->tr_error; 573 if (rv != 0) 574 return(rv); 575 if ((rv = tsleep(tr, PRIBIO, "twawait", timeout * hz)) == 0) 576 break; 577 578 if (rv == EWOULDBLOCK) { 579 /* 580 * We will reset the controller only if the request has 581 * already been submitted, so as to not lose the 582 * request packet. If a busy request timed out, the 583 * reset will take care of freeing resources. If a 584 * pending request timed out, we will free resources 585 * for that request, right here. So, the caller is 586 * expected to NOT cleanup when ETIMEDOUT is returned. 587 */ 588 if (tr->tr_status == TWA_CMD_BUSY) 589 twa_reset(tr->tr_sc); 590 else { 591 /* Request was never submitted. Clean up. */ 592 s = splbio(); 593 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, 594 tr_link); 595 splx(s); 596 597 twa_unmap_request(tr); 598 if (tr->tr_data) 599 free(tr->tr_data, M_DEVBUF); 600 601 twa_release_request(tr); 602 } 603 return(ETIMEDOUT); 604 } 605 /* 606 * Either the request got completed, or we were woken up by a 607 * signal. Calculate the new timeout, in case it was the 608 * latter. 609 */ 610 microtime(&t1); 611 612 timeout = (end_time - t1.tv_usec) / (1000 * 100); 613 } 614 return(rv); 615 } 616 617 /* 618 * Function name: twa_immediate_request 619 * Description: Sends down a firmware cmd, and waits for the completion 620 * in a tight loop. 621 * 622 * Input: tr -- ptr to request pkt 623 * timeout -- max # of seconds to wait before giving up 624 * Output: None 625 * Return value: 0 -- success 626 * non-zero-- failure 627 */ 628 static int 629 twa_immediate_request(struct twa_request *tr, uint32_t timeout) 630 { 631 struct timeval t1; 632 int s = 0, rv = 0; 633 634 rv = twa_map_request(tr); 635 636 if (rv != 0) 637 return(rv); 638 639 timeout = (timeout * 10000 * 10); 640 641 microtime(&t1); 642 643 timeout += t1.tv_usec; 644 645 do { 646 rv = tr->tr_error; 647 if (rv != 0) 648 return(rv); 649 s = splbio(); 650 twa_done(tr->tr_sc); 651 splx(s); 652 if (tr->tr_status == TWA_CMD_COMPLETE) 653 return(rv); 654 microtime(&t1); 655 } while (t1.tv_usec <= timeout); 656 657 /* 658 * We will reset the controller only if the request has 659 * already been submitted, so as to not lose the 660 * request packet. If a busy request timed out, the 661 * reset will take care of freeing resources. If a 662 * pending request timed out, we will free resources 663 * for that request, right here. So, the caller is 664 * expected to NOT cleanup when ETIMEDOUT is returned. 665 */ 666 rv = ETIMEDOUT; 667 668 if (tr->tr_status == TWA_CMD_BUSY) 669 twa_reset(tr->tr_sc); 670 else { 671 /* Request was never submitted. Clean up. */ 672 s = splbio(); 673 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, tr_link); 674 splx(s); 675 twa_unmap_request(tr); 676 if (tr->tr_data) 677 free(tr->tr_data, M_DEVBUF); 678 679 twa_release_request(tr); 680 } 681 return (rv); 682 } 683 684 static int 685 twa_inquiry(struct twa_request *tr, int lunid) 686 { 687 int error; 688 struct twa_command_9k *tr_9k_cmd; 689 690 if (tr->tr_data == NULL) 691 return (ENOMEM); 692 693 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 694 695 tr->tr_length = TWA_SECTOR_SIZE; 696 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 697 tr->tr_flags |= TWA_CMD_DATA_IN; 698 699 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 700 701 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 702 tr_9k_cmd->unit = lunid; 703 tr_9k_cmd->request_id = tr->tr_request_id; 704 tr_9k_cmd->status = 0; 705 tr_9k_cmd->sgl_offset = 16; 706 tr_9k_cmd->sgl_entries = 1; 707 /* create the CDB here */ 708 tr_9k_cmd->cdb[0] = INQUIRY; 709 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 710 tr_9k_cmd->cdb[4] = 255; 711 712 /* XXXX setup page data no lun device 713 * it seems 9000 series does not indicate 714 * NOTPRESENT - need more investigation 715 */ 716 ((struct scsipi_inquiry_data *)tr->tr_data)->device = 717 SID_QUAL_LU_NOTPRESENT; 718 719 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 720 721 if (error != 0) 722 return (error); 723 724 if (((struct scsipi_inquiry_data *)tr->tr_data)->device == 725 SID_QUAL_LU_NOTPRESENT) 726 error = 1; 727 728 return (error); 729 } 730 731 static int 732 twa_print_inquiry_data(struct twa_softc *sc, struct scsipi_inquiry_data *scsipi) 733 { 734 735 printf("%s: %s\n", sc->twa_dv.dv_xname, scsipi->vendor); 736 737 return (1); 738 } 739 740 741 static uint64_t 742 twa_read_capacity(struct twa_request *tr, int lunid) 743 { 744 int error; 745 struct twa_command_9k *tr_9k_cmd; 746 uint64_t array_size = 0LL; 747 748 if (tr->tr_data == NULL) 749 return (ENOMEM); 750 751 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 752 753 tr->tr_length = TWA_SECTOR_SIZE; 754 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 755 tr->tr_flags |= TWA_CMD_DATA_OUT; 756 757 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 758 759 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 760 tr_9k_cmd->unit = lunid; 761 tr_9k_cmd->request_id = tr->tr_request_id; 762 tr_9k_cmd->status = 0; 763 tr_9k_cmd->sgl_offset = 16; 764 tr_9k_cmd->sgl_entries = 1; 765 /* create the CDB here */ 766 tr_9k_cmd->cdb[0] = READ_CAPACITY_16; 767 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e) | SRC16_SERVICE_ACTION; 768 769 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 770 771 if (error == 0) { 772 #if BYTE_ORDER == BIG_ENDIAN 773 array_size = bswap64(_8btol( 774 ((struct scsipi_read_capacity_16_data *)tr->tr_data->addr) + 1); 775 #else 776 array_size = _8btol(((struct scsipi_read_capacity_16_data *) 777 tr->tr_data)->addr) + 1; 778 #endif 779 } 780 return (array_size); 781 } 782 783 static int 784 twa_request_sense(struct twa_request *tr, int lunid) 785 { 786 int error = 1; 787 struct twa_command_9k *tr_9k_cmd; 788 789 if (tr->tr_data == NULL) 790 return (error); 791 792 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 793 794 tr->tr_length = TWA_SECTOR_SIZE; 795 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 796 tr->tr_flags |= TWA_CMD_DATA_OUT; 797 798 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 799 800 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 801 tr_9k_cmd->unit = lunid; 802 tr_9k_cmd->request_id = tr->tr_request_id; 803 tr_9k_cmd->status = 0; 804 tr_9k_cmd->sgl_offset = 16; 805 tr_9k_cmd->sgl_entries = 1; 806 /* create the CDB here */ 807 tr_9k_cmd->cdb[0] = SCSI_REQUEST_SENSE; 808 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 809 tr_9k_cmd->cdb[4] = 255; 810 811 /*XXX AEN notification called in interrupt context 812 * so just queue the request. Return as quickly 813 * as possible from interrupt 814 */ 815 if ((tr->tr_flags & TWA_CMD_AEN) != 0) 816 error = twa_map_request(tr); 817 else 818 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 819 820 return (error); 821 } 822 823 static int 824 twa_alloc_req_pkts(struct twa_softc *sc, int num_reqs) 825 { 826 struct twa_request *tr; 827 struct twa_command_packet *tc; 828 bus_dma_segment_t seg; 829 size_t max_segs, max_xfer; 830 int i, rv, rseg, size; 831 832 if ((sc->twa_req_buf = malloc(num_reqs * sizeof(struct twa_request), 833 M_DEVBUF, M_NOWAIT)) == NULL) 834 return(ENOMEM); 835 836 size = num_reqs * sizeof(struct twa_command_packet); 837 838 /* Allocate memory for cmd pkts. */ 839 if ((rv = bus_dmamem_alloc(sc->twa_dma_tag, 840 size, PAGE_SIZE, 0, &seg, 841 1, &rseg, BUS_DMA_NOWAIT)) != 0){ 842 aprint_error("%s: unable to allocate " 843 "command packets, rv = %d\n", 844 sc->twa_dv.dv_xname, rv); 845 return (ENOMEM); 846 } 847 848 if ((rv = bus_dmamem_map(sc->twa_dma_tag, 849 &seg, rseg, size, (void **)&sc->twa_cmds, 850 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 851 aprint_error("%s: unable to map commands, rv = %d\n", 852 sc->twa_dv.dv_xname, rv); 853 return (1); 854 } 855 856 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 857 size, num_reqs, size, 858 0, BUS_DMA_NOWAIT, &sc->twa_cmd_map)) != 0) { 859 aprint_error("%s: unable to create command DMA map, " 860 "rv = %d\n", sc->twa_dv.dv_xname, rv); 861 return (ENOMEM); 862 } 863 864 if ((rv = bus_dmamap_load(sc->twa_dma_tag, sc->twa_cmd_map, 865 sc->twa_cmds, size, NULL, 866 BUS_DMA_NOWAIT)) != 0) { 867 aprint_error("%s: unable to load command DMA map, " 868 "rv = %d\n", sc->twa_dv.dv_xname, rv); 869 return (1); 870 } 871 872 if ((uintptr_t)sc->twa_cmds % TWA_ALIGNMENT) { 873 aprint_error("%s: DMA map memory not aligned on %d boundary\n", 874 sc->twa_dv.dv_xname, TWA_ALIGNMENT); 875 876 return (1); 877 } 878 tc = sc->twa_cmd_pkt_buf = (struct twa_command_packet *)sc->twa_cmds; 879 sc->twa_cmd_pkt_phys = sc->twa_cmd_map->dm_segs[0].ds_addr; 880 881 memset(sc->twa_req_buf, 0, num_reqs * sizeof(struct twa_request)); 882 memset(sc->twa_cmd_pkt_buf, 0, 883 num_reqs * sizeof(struct twa_command_packet)); 884 885 sc->sc_twa_request = sc->twa_req_buf; 886 max_segs = twa_get_maxsegs(); 887 max_xfer = twa_get_maxxfer(max_segs); 888 889 for (i = 0; i < num_reqs; i++, tc++) { 890 tr = &(sc->twa_req_buf[i]); 891 tr->tr_command = tc; 892 tr->tr_cmd_phys = sc->twa_cmd_pkt_phys + 893 (i * sizeof(struct twa_command_packet)); 894 tr->tr_request_id = i; 895 tr->tr_sc = sc; 896 897 /* 898 * Create a map for data buffers. maxsize (256 * 1024) used in 899 * bus_dma_tag_create above should suffice the bounce page needs 900 * for data buffers, since the max I/O size we support is 128KB. 901 * If we supported I/O's bigger than 256KB, we would have to 902 * create a second dma_tag, with the appropriate maxsize. 903 */ 904 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 905 max_xfer, max_segs, 1, 0, BUS_DMA_NOWAIT, 906 &tr->tr_dma_map)) != 0) { 907 aprint_error("%s: unable to create command " 908 "DMA map, rv = %d\n", 909 sc->twa_dv.dv_xname, rv); 910 return (ENOMEM); 911 } 912 /* Insert request into the free queue. */ 913 if (i != 0) { 914 sc->twa_lookup[i] = tr; 915 twa_release_request(tr); 916 } else 917 tr->tr_flags |= TWA_CMD_AEN; 918 } 919 return(0); 920 } 921 922 static void 923 twa_recompute_openings(struct twa_softc *sc) 924 { 925 struct twa_drive *td; 926 int unit; 927 int openings; 928 929 if (sc->sc_nunits != 0) 930 openings = ((TWA_Q_LENGTH / 2) / sc->sc_nunits); 931 else 932 openings = 0; 933 if (openings == sc->sc_openings) 934 return; 935 sc->sc_openings = openings; 936 937 #ifdef TWA_DEBUG 938 printf("%s: %d array%s, %d openings per array\n", 939 sc->twa_dv.dv_xname, sc->sc_nunits, 940 sc->sc_nunits == 1 ? "" : "s", sc->sc_openings); 941 #endif 942 for (unit = 0; unit < TWA_MAX_UNITS; unit++) { 943 td = &sc->sc_units[unit]; 944 if (td->td_dev != NULL) 945 (*td->td_callbacks->tcb_openings)(td->td_dev, 946 sc->sc_openings); 947 } 948 } 949 950 static int 951 twa_request_bus_scan(struct twa_softc *sc) 952 { 953 struct twa_drive *td; 954 struct twa_request *tr; 955 struct twa_attach_args twaa; 956 int locs[TWACF_NLOCS]; 957 int s, unit; 958 959 s = splbio(); 960 for (unit = 0; unit < TWA_MAX_UNITS; unit++) { 961 962 if ((tr = twa_get_request(sc, 0)) == NULL) { 963 splx(s); 964 return (EIO); 965 } 966 967 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 968 969 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 970 971 if (tr->tr_data == NULL) { 972 twa_release_request(tr); 973 splx(s); 974 return (ENOMEM); 975 } 976 td = &sc->sc_units[unit]; 977 978 if (twa_inquiry(tr, unit) == 0) { 979 if (td->td_dev == NULL) { 980 twa_print_inquiry_data(sc, 981 ((struct scsipi_inquiry_data *)tr->tr_data)); 982 983 sc->sc_nunits++; 984 985 sc->sc_units[unit].td_size = 986 twa_read_capacity(tr, unit); 987 988 twaa.twaa_unit = unit; 989 990 twa_recompute_openings(sc); 991 992 locs[TWACF_UNIT] = unit; 993 994 sc->sc_units[unit].td_dev = 995 config_found_sm_loc(&sc->twa_dv, "twa", 996 locs, &twaa, twa_print, config_stdsubmatch); 997 } 998 } else { 999 if (td->td_dev != NULL) { 1000 sc->sc_nunits--; 1001 1002 (void) config_detach(td->td_dev, DETACH_FORCE); 1003 td->td_dev = NULL; 1004 td->td_size = 0; 1005 1006 twa_recompute_openings(sc); 1007 } 1008 } 1009 free(tr->tr_data, M_DEVBUF); 1010 1011 twa_release_request(tr); 1012 } 1013 splx(s); 1014 1015 return (0); 1016 } 1017 1018 1019 #ifdef DIAGNOSTIC 1020 static inline void 1021 twa_check_busy_q(struct twa_request *tr) 1022 { 1023 struct twa_request *rq; 1024 struct twa_softc *sc = tr->tr_sc; 1025 1026 TAILQ_FOREACH(rq, &sc->twa_busy, tr_link) { 1027 if (tr->tr_request_id == rq->tr_request_id) { 1028 panic("cannot submit same request more than once"); 1029 } else if (tr->bp == rq->bp && tr->bp != 0) { 1030 /* XXX A check for 0 for the buf ptr is needed to 1031 * guard against ioctl requests with a buf ptr of 1032 * 0 and also aen notifications. Looking for 1033 * external cmds only. 1034 */ 1035 panic("cannot submit same buf more than once"); 1036 } else { 1037 /* Empty else statement */ 1038 } 1039 } 1040 } 1041 #endif 1042 1043 static int 1044 twa_start(struct twa_request *tr) 1045 { 1046 struct twa_softc *sc = tr->tr_sc; 1047 uint32_t status_reg; 1048 int s; 1049 int error; 1050 1051 s = splbio(); 1052 /* Check to see if we can post a command. */ 1053 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1054 if ((error = twa_check_ctlr_state(sc, status_reg))) 1055 goto out; 1056 1057 if (status_reg & TWA_STATUS_COMMAND_QUEUE_FULL) { 1058 if (tr->tr_status != TWA_CMD_PENDING) { 1059 tr->tr_status = TWA_CMD_PENDING; 1060 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_pending, 1061 tr, tr_link); 1062 } 1063 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1064 TWA_CONTROL_UNMASK_COMMAND_INTERRUPT); 1065 error = EBUSY; 1066 } else { 1067 bus_dmamap_sync(sc->twa_dma_tag, sc->twa_cmd_map, 1068 (char *)tr->tr_command - (char *)sc->twa_cmds, 1069 sizeof(struct twa_command_packet), 1070 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1071 1072 /* Cmd queue is not full. Post the command. */ 1073 TWA_WRITE_COMMAND_QUEUE(sc, tr->tr_cmd_phys + 1074 sizeof(struct twa_command_header)); 1075 1076 /* Mark the request as currently being processed. */ 1077 tr->tr_status = TWA_CMD_BUSY; 1078 1079 #ifdef DIAGNOSTIC 1080 twa_check_busy_q(tr); 1081 #endif 1082 1083 /* Move the request into the busy queue. */ 1084 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_busy, tr, tr_link); 1085 } 1086 out: 1087 splx(s); 1088 return(error); 1089 } 1090 1091 static int 1092 twa_drain_response_queue(struct twa_softc *sc) 1093 { 1094 union twa_response_queue rq; 1095 uint32_t status_reg; 1096 1097 for (;;) { 1098 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1099 if (twa_check_ctlr_state(sc, status_reg)) 1100 return(1); 1101 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1102 return(0); /* no more response queue entries */ 1103 rq = (union twa_response_queue)twa_inl(sc, 1104 TWA_RESPONSE_QUEUE_OFFSET); 1105 } 1106 } 1107 1108 static void 1109 twa_drain_busy_queue(struct twa_softc *sc) 1110 { 1111 struct twa_request *tr; 1112 1113 /* Walk the busy queue. */ 1114 1115 while ((tr = TAILQ_FIRST(&sc->twa_busy)) != NULL) { 1116 TAILQ_REMOVE(&sc->twa_busy, tr, tr_link); 1117 1118 twa_unmap_request(tr); 1119 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_INTERNAL) || 1120 (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_IOCTL)) { 1121 /* It's an internal/ioctl request. Simply free it. */ 1122 if (tr->tr_data) 1123 free(tr->tr_data, M_DEVBUF); 1124 twa_release_request(tr); 1125 } else { 1126 /* It's a SCSI request. Complete it. */ 1127 tr->tr_command->command.cmd_pkt_9k.status = EIO; 1128 if (tr->tr_callback) 1129 tr->tr_callback(tr); 1130 } 1131 } 1132 } 1133 1134 static int 1135 twa_drain_pending_queue(struct twa_softc *sc) 1136 { 1137 struct twa_request *tr; 1138 int s, error = 0; 1139 1140 /* 1141 * Pull requests off the pending queue, and submit them. 1142 */ 1143 s = splbio(); 1144 while ((tr = TAILQ_FIRST(&sc->twa_pending)) != NULL) { 1145 TAILQ_REMOVE(&sc->twa_pending, tr, tr_link); 1146 1147 if ((error = twa_start(tr))) { 1148 if (error == EBUSY) { 1149 tr->tr_status = TWA_CMD_PENDING; 1150 1151 /* queue at the head */ 1152 TAILQ_INSERT_HEAD(&tr->tr_sc->twa_pending, 1153 tr, tr_link); 1154 error = 0; 1155 break; 1156 } else { 1157 if (tr->tr_flags & TWA_CMD_SLEEP_ON_REQUEST) { 1158 tr->tr_error = error; 1159 tr->tr_callback(tr); 1160 error = EIO; 1161 } 1162 } 1163 } 1164 } 1165 splx(s); 1166 1167 return(error); 1168 } 1169 1170 static int 1171 twa_drain_aen_queue(struct twa_softc *sc) 1172 { 1173 int s, error = 0; 1174 struct twa_request *tr; 1175 struct twa_command_header *cmd_hdr; 1176 struct timeval t1; 1177 uint32_t timeout; 1178 1179 for (;;) { 1180 if ((tr = twa_get_request(sc, 0)) == NULL) { 1181 error = EIO; 1182 break; 1183 } 1184 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 1185 tr->tr_callback = NULL; 1186 1187 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1188 1189 if (tr->tr_data == NULL) { 1190 error = 1; 1191 goto out; 1192 } 1193 1194 if (twa_request_sense(tr, 0) != 0) { 1195 error = 1; 1196 break; 1197 } 1198 1199 timeout = (1000/*ms*/ * 100/*us*/ * TWA_REQUEST_TIMEOUT_PERIOD); 1200 1201 microtime(&t1); 1202 1203 timeout += t1.tv_usec; 1204 1205 do { 1206 s = splbio(); 1207 twa_done(tr->tr_sc); 1208 splx(s); 1209 if (tr->tr_status != TWA_CMD_BUSY) 1210 break; 1211 microtime(&t1); 1212 } while (t1.tv_usec <= timeout); 1213 1214 if (tr->tr_status != TWA_CMD_COMPLETE) { 1215 error = ETIMEDOUT; 1216 break; 1217 } 1218 1219 if ((error = tr->tr_command->command.cmd_pkt_9k.status)) 1220 break; 1221 1222 cmd_hdr = (struct twa_command_header *)(tr->tr_data); 1223 if ((cmd_hdr->status_block.error) /* aen_code */ 1224 == TWA_AEN_QUEUE_EMPTY) 1225 break; 1226 (void)twa_enqueue_aen(sc, cmd_hdr); 1227 1228 free(tr->tr_data, M_DEVBUF); 1229 twa_release_request(tr); 1230 } 1231 out: 1232 if (tr) { 1233 if (tr->tr_data) 1234 free(tr->tr_data, M_DEVBUF); 1235 1236 twa_release_request(tr); 1237 } 1238 return(error); 1239 } 1240 1241 1242 #ifdef DIAGNOSTIC 1243 static void 1244 twa_check_response_q(struct twa_request *tr, int clear) 1245 { 1246 int j; 1247 static int i = 0; 1248 static struct twa_request *req = 0; 1249 static struct buf *hist[255]; 1250 1251 1252 if (clear) { 1253 i = 0; 1254 for (j = 0; j < 255; j++) 1255 hist[j] = 0; 1256 return; 1257 } 1258 1259 if (req == 0) 1260 req = tr; 1261 1262 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_EXTERNAL) != 0) { 1263 if (req->tr_request_id == tr->tr_request_id) 1264 panic("req id: %d on controller queue twice", 1265 tr->tr_request_id); 1266 1267 for (j = 0; j < i; j++) 1268 if (tr->bp == hist[j]) 1269 panic("req id: %d buf found twice", 1270 tr->tr_request_id); 1271 } 1272 req = tr; 1273 1274 hist[i++] = req->bp; 1275 } 1276 #endif 1277 1278 static int 1279 twa_done(struct twa_softc *sc) 1280 { 1281 union twa_response_queue rq; 1282 struct twa_request *tr; 1283 int rv = 0; 1284 uint32_t status_reg; 1285 1286 for (;;) { 1287 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1288 if ((rv = twa_check_ctlr_state(sc, status_reg))) 1289 break; 1290 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1291 break; 1292 /* Response queue is not empty. */ 1293 rq = (union twa_response_queue)twa_inl(sc, 1294 TWA_RESPONSE_QUEUE_OFFSET); 1295 tr = sc->sc_twa_request + rq.u.response_id; 1296 #ifdef DIAGNOSTIC 1297 twa_check_response_q(tr, 0); 1298 #endif 1299 /* Unmap the command packet, and any associated data buffer. */ 1300 twa_unmap_request(tr); 1301 1302 tr->tr_status = TWA_CMD_COMPLETE; 1303 TAILQ_REMOVE(&tr->tr_sc->twa_busy, tr, tr_link); 1304 1305 if (tr->tr_callback) 1306 tr->tr_callback(tr); 1307 } 1308 (void)twa_drain_pending_queue(sc); 1309 1310 #ifdef DIAGNOSTIC 1311 twa_check_response_q(NULL, 1); 1312 #endif 1313 return(rv); 1314 } 1315 1316 /* 1317 * Function name: twa_init_ctlr 1318 * Description: Establishes a logical connection with the controller. 1319 * If bundled with firmware, determines whether or not 1320 * to flash firmware, based on arch_id, fw SRL (Spec. 1321 * Revision Level), branch & build #'s. Also determines 1322 * whether or not the driver is compatible with the 1323 * firmware on the controller, before proceeding to work 1324 * with it. 1325 * 1326 * Input: sc -- ptr to per ctlr structure 1327 * Output: None 1328 * Return value: 0 -- success 1329 * non-zero-- failure 1330 */ 1331 static int 1332 twa_init_ctlr(struct twa_softc *sc) 1333 { 1334 uint16_t fw_on_ctlr_srl = 0; 1335 uint16_t fw_on_ctlr_arch_id = 0; 1336 uint16_t fw_on_ctlr_branch = 0; 1337 uint16_t fw_on_ctlr_build = 0; 1338 uint32_t init_connect_result = 0; 1339 int error = 0; 1340 #if 0 1341 int8_t fw_flashed = FALSE; 1342 int8_t fw_flash_failed = FALSE; 1343 #endif 1344 1345 /* Wait for the controller to become ready. */ 1346 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY, 1347 TWA_REQUEST_TIMEOUT_PERIOD)) { 1348 return(ENXIO); 1349 } 1350 /* Drain the response queue. */ 1351 if (twa_drain_response_queue(sc)) 1352 return(1); 1353 1354 /* Establish a logical connection with the controller. */ 1355 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 1356 TWA_EXTENDED_INIT_CONNECT, TWA_CURRENT_FW_SRL, 1357 TWA_9000_ARCH_ID, TWA_CURRENT_FW_BRANCH, 1358 TWA_CURRENT_FW_BUILD, &fw_on_ctlr_srl, 1359 &fw_on_ctlr_arch_id, &fw_on_ctlr_branch, 1360 &fw_on_ctlr_build, &init_connect_result))) { 1361 return(error); 1362 } 1363 #if 0 1364 if ((init_connect_result & TWA_BUNDLED_FW_SAFE_TO_FLASH) && 1365 (init_connect_result & TWA_CTLR_FW_RECOMMENDS_FLASH)) { 1366 /* 1367 * The bundled firmware is safe to flash, and the firmware 1368 * on the controller recommends a flash. So, flash! 1369 */ 1370 printf("%s: flashing bundled firmware...\n", 1371 sc->twa_dv.dv_xname); 1372 1373 if ((error = twa_flash_firmware(sc))) { 1374 fw_flash_failed = TRUE; 1375 1376 printf("%s: unable to flash bundled firmware.\n", 1377 sc->twa_dv.dv_xname); 1378 } else { 1379 printf("%s: successfully flashed bundled firmware.\n", 1380 sc->twa_dv.dv_xname); 1381 fw_flashed = TRUE; 1382 } 1383 } 1384 if (fw_flashed) { 1385 /* The firmware was flashed. Have the new image loaded */ 1386 error = twa_hard_reset(sc); 1387 if (error == 0) 1388 error = twa_init_ctlr(sc); 1389 /* 1390 * If hard reset of controller failed, we need to return. 1391 * Otherwise, the above recursive call to twa_init_ctlr will 1392 * have completed the rest of the initialization (starting 1393 * from twa_drain_aen_queue below). Don't do it again. 1394 * Just return. 1395 */ 1396 return(error); 1397 } else { 1398 /* 1399 * Either we are not bundled with a firmware image, or 1400 * the bundled firmware is not safe to flash, 1401 * or flash failed for some reason. See if we can at 1402 * least work with the firmware on the controller in the 1403 * current mode. 1404 */ 1405 if (init_connect_result & TWA_CTLR_FW_COMPATIBLE) { 1406 /* Yes, we can. Make note of the operating mode. */ 1407 sc->working_srl = TWA_CURRENT_FW_SRL; 1408 sc->working_branch = TWA_CURRENT_FW_BRANCH; 1409 sc->working_build = TWA_CURRENT_FW_BUILD; 1410 } else { 1411 /* 1412 * No, we can't. See if we can at least work with 1413 * it in the base mode. We should never come here 1414 * if firmware has just been flashed. 1415 */ 1416 printf("%s: Driver/Firmware mismatch. Negotiating " 1417 "for base level.\n", sc->twa_dv.dv_xname); 1418 if ((error = twa_init_connection(sc, 1419 TWA_INIT_MESSAGE_CREDITS, 1420 TWA_EXTENDED_INIT_CONNECT, TWA_BASE_FW_SRL, 1421 TWA_9000_ARCH_ID, TWA_BASE_FW_BRANCH, 1422 TWA_BASE_FW_BUILD, &fw_on_ctlr_srl, 1423 &fw_on_ctlr_arch_id, &fw_on_ctlr_branch, 1424 &fw_on_ctlr_build, &init_connect_result))) { 1425 printf("%s: can't initialize connection in " 1426 "base mode.\n", sc->twa_dv.dv_xname); 1427 return(error); 1428 } 1429 if (!(init_connect_result & TWA_CTLR_FW_COMPATIBLE)) { 1430 /* 1431 * The firmware on the controller is not even 1432 * compatible with our base mode. We cannot 1433 * work with it. Bail... 1434 */ 1435 printf("Incompatible firmware on controller\n"); 1436 #ifdef TWA_FLASH_FIRMWARE 1437 if (fw_flash_failed) 1438 printf("...and could not flash bundled " 1439 "firmware.\n"); 1440 else 1441 printf("...and bundled firmware not " 1442 "safe to flash.\n"); 1443 #endif /* TWA_FLASH_FIRMWARE */ 1444 return(1); 1445 } 1446 /* 1447 * We can work with this firmware, but only in 1448 * base mode. 1449 */ 1450 sc->working_srl = TWA_BASE_FW_SRL; 1451 sc->working_branch = TWA_BASE_FW_BRANCH; 1452 sc->working_build = TWA_BASE_FW_BUILD; 1453 sc->twa_operating_mode = TWA_BASE_MODE; 1454 } 1455 } 1456 #endif 1457 twa_drain_aen_queue(sc); 1458 1459 /* Set controller state to initialized. */ 1460 sc->twa_state &= ~TWA_STATE_SHUTDOWN; 1461 return(0); 1462 } 1463 1464 static int 1465 twa_setup(struct twa_softc *sc) 1466 { 1467 struct tw_cl_event_packet *aen_queue; 1468 uint32_t i = 0; 1469 int error = 0; 1470 1471 /* Initialize request queues. */ 1472 TAILQ_INIT(&sc->twa_free); 1473 TAILQ_INIT(&sc->twa_busy); 1474 TAILQ_INIT(&sc->twa_pending); 1475 1476 sc->sc_nunits = 0; 1477 sc->twa_sc_flags = 0; 1478 1479 if (twa_alloc_req_pkts(sc, TWA_Q_LENGTH)) { 1480 1481 return(ENOMEM); 1482 } 1483 1484 /* Allocate memory for the AEN queue. */ 1485 if ((aen_queue = malloc(sizeof(struct tw_cl_event_packet) * 1486 TWA_Q_LENGTH, M_DEVBUF, M_WAITOK)) == NULL) { 1487 /* 1488 * This should not cause us to return error. We will only be 1489 * unable to support AEN's. But then, we will have to check 1490 * time and again to see if we can support AEN's, if we 1491 * continue. So, we will just return error. 1492 */ 1493 return (ENOMEM); 1494 } 1495 /* Initialize the aen queue. */ 1496 memset(aen_queue, 0, sizeof(struct tw_cl_event_packet) * TWA_Q_LENGTH); 1497 1498 for (i = 0; i < TWA_Q_LENGTH; i++) 1499 sc->twa_aen_queue[i] = &(aen_queue[i]); 1500 1501 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1502 TWA_CONTROL_DISABLE_INTERRUPTS); 1503 1504 /* Initialize the controller. */ 1505 if ((error = twa_init_ctlr(sc))) { 1506 /* Soft reset the controller, and try one more time. */ 1507 1508 printf("%s: controller initialization failed. " 1509 "Retrying initialization\n", sc->twa_dv.dv_xname); 1510 1511 if ((error = twa_soft_reset(sc)) == 0) 1512 error = twa_init_ctlr(sc); 1513 } 1514 1515 twa_describe_controller(sc); 1516 1517 error = twa_request_bus_scan(sc); 1518 1519 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1520 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 1521 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 1522 TWA_CONTROL_ENABLE_INTERRUPTS); 1523 1524 return (error); 1525 } 1526 1527 void *twa_sdh; 1528 1529 static void 1530 twa_attach(struct device *parent, struct device *self, void *aux) 1531 { 1532 struct pci_attach_args *pa; 1533 struct twa_softc *sc; 1534 pci_chipset_tag_t pc; 1535 pcireg_t csr; 1536 pci_intr_handle_t ih; 1537 const char *intrstr; 1538 struct ctlname ctlnames[] = CTL_NAMES; 1539 const struct sysctlnode *node; 1540 int i; 1541 1542 sc = (struct twa_softc *)self; 1543 1544 pa = aux; 1545 pc = pa->pa_pc; 1546 sc->pc = pa->pa_pc; 1547 sc->tag = pa->pa_tag; 1548 sc->twa_dma_tag = pa->pa_dmat; 1549 1550 aprint_naive(": RAID controller\n"); 1551 aprint_normal(": 3ware Apache\n"); 1552 1553 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9000) { 1554 if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0, 1555 &sc->twa_bus_iot, &sc->twa_bus_ioh, NULL, NULL)) { 1556 aprint_error("%s: can't map i/o space\n", 1557 sc->twa_dv.dv_xname); 1558 return; 1559 } 1560 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9550) { 1561 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1562 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1563 &sc->twa_bus_ioh, NULL, NULL)) { 1564 aprint_error("%s: can't map mem space\n", 1565 sc->twa_dv.dv_xname); 1566 return; 1567 } 1568 } else { 1569 aprint_error("%s: product id 0x%02x not recognized\n", 1570 sc->twa_dv.dv_xname, PCI_PRODUCT(pa->pa_id)); 1571 return; 1572 } 1573 /* Enable the device. */ 1574 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 1575 1576 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 1577 csr | PCI_COMMAND_MASTER_ENABLE); 1578 1579 /* Map and establish the interrupt. */ 1580 if (pci_intr_map(pa, &ih)) { 1581 aprint_error("%s: can't map interrupt\n", sc->twa_dv.dv_xname); 1582 return; 1583 } 1584 intrstr = pci_intr_string(pc, ih); 1585 1586 sc->twa_ih = pci_intr_establish(pc, ih, IPL_BIO, twa_intr, sc); 1587 if (sc->twa_ih == NULL) { 1588 aprint_error("%s: can't establish interrupt%s%s\n", 1589 sc->twa_dv.dv_xname, 1590 (intrstr) ? " at " : "", 1591 (intrstr) ? intrstr : ""); 1592 return; 1593 } 1594 1595 if (intrstr != NULL) 1596 aprint_normal("%s: interrupting at %s\n", 1597 sc->twa_dv.dv_xname, intrstr); 1598 1599 twa_setup(sc); 1600 1601 if (twa_sdh == NULL) 1602 twa_sdh = shutdownhook_establish(twa_shutdown, NULL); 1603 1604 /* sysctl set-up for 3ware cli */ 1605 if (sysctl_createv(NULL, 0, NULL, NULL, 1606 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", 1607 NULL, NULL, 0, NULL, 0, 1608 CTL_HW, CTL_EOL) != 0) { 1609 printf("%s: could not create %s sysctl node\n", 1610 sc->twa_dv.dv_xname, ctlnames[CTL_HW].ctl_name); 1611 return; 1612 } 1613 if (sysctl_createv(NULL, 0, NULL, &node, 1614 0, CTLTYPE_NODE, sc->twa_dv.dv_xname, 1615 SYSCTL_DESCR("twa driver information"), 1616 NULL, 0, NULL, 0, 1617 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 1618 printf("%s: could not create %s.%s sysctl node\n", 1619 sc->twa_dv.dv_xname, ctlnames[CTL_HW].ctl_name, 1620 sc->twa_dv.dv_xname); 1621 return; 1622 } 1623 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 1624 0, CTLTYPE_STRING, "driver_version", 1625 SYSCTL_DESCR("twa driver version"), 1626 NULL, 0, &twaver, 0, 1627 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 1628 != 0) { 1629 printf("%s: could not create %s.%s.driver_version sysctl\n", 1630 sc->twa_dv.dv_xname, ctlnames[CTL_HW].ctl_name, 1631 sc->twa_dv.dv_xname); 1632 return; 1633 } 1634 1635 return; 1636 } 1637 1638 static void 1639 twa_shutdown(void *arg) 1640 { 1641 extern struct cfdriver twa_cd; 1642 struct twa_softc *sc; 1643 int i, rv, unit; 1644 1645 for (i = 0; i < twa_cd.cd_ndevs; i++) { 1646 if ((sc = device_lookup(&twa_cd, i)) == NULL) 1647 continue; 1648 1649 for (unit = 0; unit < TWA_MAX_UNITS; unit++) 1650 if (sc->sc_units[unit].td_dev != NULL) 1651 (void) config_detach(sc->sc_units[unit].td_dev, 1652 DETACH_FORCE | DETACH_QUIET); 1653 1654 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1655 TWA_CONTROL_DISABLE_INTERRUPTS); 1656 1657 /* Let the controller know that we are going down. */ 1658 rv = twa_init_connection(sc, TWA_SHUTDOWN_MESSAGE_CREDITS, 1659 0, 0, 0, 0, 0, 1660 NULL, NULL, NULL, NULL, NULL); 1661 } 1662 } 1663 1664 void 1665 twa_register_callbacks(struct twa_softc *sc, int unit, 1666 const struct twa_callbacks *tcb) 1667 { 1668 1669 sc->sc_units[unit].td_callbacks = tcb; 1670 } 1671 1672 /* 1673 * Print autoconfiguration message for a sub-device 1674 */ 1675 static int 1676 twa_print(void *aux, const char *pnp) 1677 { 1678 struct twa_attach_args *twaa; 1679 1680 twaa = aux; 1681 1682 if (pnp !=NULL) 1683 aprint_normal("block device at %s\n", pnp); 1684 aprint_normal(" unit %d\n", twaa->twaa_unit); 1685 return (UNCONF); 1686 } 1687 1688 static void 1689 twa_fillin_sgl(struct twa_sg *sgl, bus_dma_segment_t *segs, int nsegments) 1690 { 1691 int i; 1692 for (i = 0; i < nsegments; i++) { 1693 sgl[i].address = segs[i].ds_addr; 1694 sgl[i].length = (uint32_t)(segs[i].ds_len); 1695 } 1696 } 1697 1698 static int 1699 twa_submit_io(struct twa_request *tr) 1700 { 1701 int error; 1702 1703 if ((error = twa_start(tr))) { 1704 if (error == EBUSY) 1705 error = 0; /* request is in the pending queue */ 1706 else { 1707 tr->tr_error = error; 1708 } 1709 } 1710 return(error); 1711 } 1712 1713 /* 1714 * Function name: twa_setup_data_dmamap 1715 * Description: Callback of bus_dmamap_load for the buffer associated 1716 * with data. Updates the cmd pkt (size/sgl_entries 1717 * fields, as applicable) to reflect the number of sg 1718 * elements. 1719 * 1720 * Input: arg -- ptr to request pkt 1721 * segs -- ptr to a list of segment descriptors 1722 * nsegments--# of segments 1723 * error -- 0 if no errors encountered before callback, 1724 * non-zero if errors were encountered 1725 * Output: None 1726 * Return value: None 1727 */ 1728 static int 1729 twa_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, 1730 int error) 1731 { 1732 struct twa_request *tr = (struct twa_request *)arg; 1733 struct twa_command_packet *cmdpkt = tr->tr_command; 1734 struct twa_command_9k *cmd9k; 1735 union twa_command_7k *cmd7k; 1736 uint8_t sgl_offset; 1737 1738 if (error == EFBIG) { 1739 tr->tr_error = error; 1740 goto out; 1741 } 1742 1743 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) { 1744 cmd9k = &(cmdpkt->command.cmd_pkt_9k); 1745 twa_fillin_sgl(&(cmd9k->sg_list[0]), segs, nsegments); 1746 cmd9k->sgl_entries += nsegments - 1; 1747 } else { 1748 /* It's a 7000 command packet. */ 1749 cmd7k = &(cmdpkt->command.cmd_pkt_7k); 1750 if ((sgl_offset = cmdpkt->command.cmd_pkt_7k.generic.sgl_offset)) 1751 twa_fillin_sgl((struct twa_sg *) 1752 (((uint32_t *)cmd7k) + sgl_offset), 1753 segs, nsegments); 1754 /* Modify the size field, based on sg address size. */ 1755 cmd7k->generic.size += 1756 ((TWA_64BIT_ADDRESSES ? 3 : 2) * nsegments); 1757 } 1758 1759 if (tr->tr_flags & TWA_CMD_DATA_IN) 1760 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1761 tr->tr_length, BUS_DMASYNC_PREREAD); 1762 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 1763 /* 1764 * If we're using an alignment buffer, and we're 1765 * writing data, copy the real data out. 1766 */ 1767 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 1768 memcpy(tr->tr_data, tr->tr_real_data, 1769 tr->tr_real_length); 1770 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1771 tr->tr_length, BUS_DMASYNC_PREWRITE); 1772 } 1773 error = twa_submit_io(tr); 1774 1775 out: 1776 if (error) { 1777 twa_unmap_request(tr); 1778 /* 1779 * If the caller had been returned EINPROGRESS, and he has 1780 * registered a callback for handling completion, the callback 1781 * will never get called because we were unable to submit the 1782 * request. So, free up the request right here. 1783 */ 1784 if ((tr->tr_flags & TWA_CMD_IN_PROGRESS) && (tr->tr_callback)) 1785 twa_release_request(tr); 1786 } 1787 return (error); 1788 } 1789 1790 /* 1791 * Function name: twa_map_request 1792 * Description: Maps a cmd pkt and data associated with it, into 1793 * DMA'able memory. 1794 * 1795 * Input: tr -- ptr to request pkt 1796 * Output: None 1797 * Return value: 0 -- success 1798 * non-zero-- failure 1799 */ 1800 int 1801 twa_map_request(struct twa_request *tr) 1802 { 1803 struct twa_softc *sc = tr->tr_sc; 1804 int s, rv, error = 0; 1805 1806 /* If the command involves data, map that too. */ 1807 if (tr->tr_data != NULL) { 1808 1809 if (((u_long)tr->tr_data & (511)) != 0) { 1810 tr->tr_flags |= TWA_CMD_DATA_COPY_NEEDED; 1811 tr->tr_real_data = tr->tr_data; 1812 tr->tr_real_length = tr->tr_length; 1813 s = splvm(); 1814 tr->tr_data = (void *)uvm_km_alloc(kmem_map, 1815 tr->tr_length, 512, UVM_KMF_NOWAIT|UVM_KMF_WIRED); 1816 splx(s); 1817 1818 if (tr->tr_data == NULL) { 1819 tr->tr_data = tr->tr_real_data; 1820 tr->tr_length = tr->tr_real_length; 1821 return(ENOMEM); 1822 } 1823 if ((tr->tr_flags & TWA_CMD_DATA_IN) != 0) 1824 memcpy(tr->tr_data, tr->tr_real_data, 1825 tr->tr_length); 1826 } 1827 1828 /* 1829 * Map the data buffer into bus space and build the S/G list. 1830 */ 1831 rv = bus_dmamap_load(sc->twa_dma_tag, tr->tr_dma_map, 1832 tr->tr_data, tr->tr_length, NULL, BUS_DMA_NOWAIT | 1833 BUS_DMA_STREAMING | (tr->tr_flags & TWA_CMD_DATA_OUT) ? 1834 BUS_DMA_READ : BUS_DMA_WRITE); 1835 1836 if (rv != 0) { 1837 if ((tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) != 0) { 1838 s = splvm(); 1839 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 1840 tr->tr_length, UVM_KMF_WIRED); 1841 splx(s); 1842 } 1843 return (rv); 1844 } 1845 1846 if ((rv = twa_setup_data_dmamap(tr, 1847 tr->tr_dma_map->dm_segs, 1848 tr->tr_dma_map->dm_nsegs, error))) { 1849 1850 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 1851 s = splvm(); 1852 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 1853 tr->tr_length, UVM_KMF_WIRED); 1854 splx(s); 1855 tr->tr_data = tr->tr_real_data; 1856 tr->tr_length = tr->tr_real_length; 1857 } 1858 } else 1859 error = tr->tr_error; 1860 1861 } else 1862 if ((rv = twa_submit_io(tr))) 1863 twa_unmap_request(tr); 1864 1865 return (rv); 1866 } 1867 1868 #if 0 1869 /* 1870 * Function name: twa_flash_firmware 1871 * Description: Flashes bundled firmware image onto controller. 1872 * 1873 * Input: sc -- ptr to per ctlr structure 1874 * Output: None 1875 * Return value: 0 -- success 1876 * non-zero-- failure 1877 */ 1878 static int 1879 twa_flash_firmware(struct twa_softc *sc) 1880 { 1881 struct twa_request *tr; 1882 struct twa_command_download_firmware *cmd; 1883 uint32_t count; 1884 uint32_t fw_img_chunk_size; 1885 uint32_t this_chunk_size = 0; 1886 uint32_t remaining_img_size = 0; 1887 int s, error = 0; 1888 int i; 1889 1890 if ((tr = twa_get_request(sc, 0)) == NULL) { 1891 /* No free request packets available. Can't proceed. */ 1892 error = EIO; 1893 goto out; 1894 } 1895 1896 count = (twa_fw_img_size / 65536); 1897 1898 count += ((twa_fw_img_size % 65536) != 0) ? 1 : 0; 1899 1900 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 1901 /* Allocate sufficient memory to hold a chunk of the firmware image. */ 1902 fw_img_chunk_size = ((twa_fw_img_size / count) + 511) & ~511; 1903 1904 s = splvm(); 1905 tr->tr_data = (void *)uvm_km_alloc(kmem_map, fw_img_chunk_size, 512, 1906 UVM_KMF_WIRED); 1907 splx(s); 1908 1909 if (tr->tr_data == NULL) { 1910 error = ENOMEM; 1911 goto out; 1912 } 1913 1914 remaining_img_size = twa_fw_img_size; 1915 cmd = &(tr->tr_command->command.cmd_pkt_7k.download_fw); 1916 1917 for (i = 0; i < count; i++) { 1918 /* Build a cmd pkt for downloading firmware. */ 1919 memset(tr->tr_command, 0, sizeof(struct twa_command_packet)); 1920 1921 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 1922 1923 cmd->opcode = TWA_OP_DOWNLOAD_FIRMWARE; 1924 cmd->sgl_offset = 2; /* offset in dwords, to the beginning 1925 of sg list */ 1926 cmd->size = 2; /* this field will be updated at data 1927 map time */ 1928 cmd->request_id = tr->tr_request_id; 1929 cmd->unit = 0; 1930 cmd->status = 0; 1931 cmd->flags = 0; 1932 cmd->param = 8; /* prom image */ 1933 1934 if (i != (count - 1)) 1935 this_chunk_size = fw_img_chunk_size; 1936 else /* last chunk */ 1937 this_chunk_size = remaining_img_size; 1938 1939 remaining_img_size -= this_chunk_size; 1940 1941 memset(tr->tr_data, 0, fw_img_chunk_size); 1942 1943 memcpy(tr->tr_data, twa_fw_img + (i * fw_img_chunk_size), 1944 this_chunk_size); 1945 /* 1946 * The next line will effect only the last chunk. 1947 */ 1948 tr->tr_length = (this_chunk_size + 511) & ~511; 1949 1950 tr->tr_flags |= TWA_CMD_DATA_OUT; 1951 1952 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 1953 1954 if (error) { 1955 if (error == ETIMEDOUT) 1956 /* clean-up done by twa_immediate_request */ 1957 return(error); 1958 break; 1959 } 1960 error = cmd->status; 1961 1962 if (i != (count - 1)) { 1963 1964 /* 1965 * XXX FreeBSD code doesn't check for no error condition 1966 * but based on observation, error seems to return 0 1967 */ 1968 if ((error = 1969 tr->tr_command->cmd_hdr.status_block.error) == 0) { 1970 continue; 1971 } else if ((error = 1972 tr->tr_command->cmd_hdr.status_block.error) == 1973 TWA_ERROR_MORE_DATA) { 1974 continue; 1975 } else { 1976 twa_hard_reset(sc); 1977 break; 1978 } 1979 } else /* last chunk */ 1980 if (error) { 1981 printf("%s: firmware flash request failed. " 1982 "error = 0x%x\n", sc->twa_dv.dv_xname, 1983 error); 1984 twa_hard_reset(sc); 1985 } 1986 } 1987 1988 if (tr->tr_data) { 1989 s = splvm(); 1990 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 1991 fw_img_chunk_size, UVM_KMF_WIRED); 1992 splx(s); 1993 } 1994 out: 1995 if (tr) 1996 twa_release_request(tr); 1997 return(error); 1998 } 1999 2000 /* 2001 * Function name: twa_hard_reset 2002 * Description: Hard reset the controller. 2003 * 2004 * Input: sc -- ptr to per ctlr structure 2005 * Output: None 2006 * Return value: 0 -- success 2007 * non-zero-- failure 2008 */ 2009 static int 2010 twa_hard_reset(struct twa_softc *sc) 2011 { 2012 struct twa_request *tr; 2013 struct twa_command_reset_firmware *cmd; 2014 int error; 2015 2016 if ((tr = twa_get_request(sc, 0)) == NULL) 2017 return(EIO); 2018 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2019 /* Build a cmd pkt for sending down the hard reset command. */ 2020 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2021 2022 cmd = &(tr->tr_command->command.cmd_pkt_7k.reset_fw); 2023 cmd->opcode = TWA_OP_RESET_FIRMWARE; 2024 cmd->size = 2; /* this field will be updated at data map time */ 2025 cmd->request_id = tr->tr_request_id; 2026 cmd->unit = 0; 2027 cmd->status = 0; 2028 cmd->flags = 0; 2029 cmd->param = 0; /* don't reload FPGA logic */ 2030 2031 tr->tr_data = NULL; 2032 tr->tr_length = 0; 2033 2034 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2035 if (error) { 2036 printf("%s: hard reset request could not be posted. " 2037 "error = 0x%x\n", sc->twa_dv.dv_xname, error); 2038 if (error == ETIMEDOUT) 2039 /* clean-up done by twa_immediate_request */ 2040 return(error); 2041 goto out; 2042 } 2043 if ((error = cmd->status)) { 2044 printf("%s: hard reset request failed. error = 0x%x\n", 2045 sc->twa_dv.dv_xname, error); 2046 } 2047 2048 out: 2049 if (tr) 2050 twa_release_request(tr); 2051 return(error); 2052 } 2053 #endif 2054 2055 /* 2056 * Function name: twa_intr 2057 * Description: Interrupt handler. Determines the kind of interrupt, 2058 * and calls the appropriate handler. 2059 * 2060 * Input: sc -- ptr to per ctlr structure 2061 * Output: None 2062 * Return value: None 2063 */ 2064 2065 static int 2066 twa_intr(void *arg) 2067 { 2068 int caught, s, rv; 2069 struct twa_softc *sc; 2070 uint32_t status_reg; 2071 sc = (struct twa_softc *)arg; 2072 2073 caught = 0; 2074 /* Collect current interrupt status. */ 2075 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2076 if (twa_check_ctlr_state(sc, status_reg)) { 2077 caught = 1; 2078 goto bail; 2079 } 2080 /* Dispatch based on the kind of interrupt. */ 2081 if (status_reg & TWA_STATUS_HOST_INTERRUPT) { 2082 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2083 TWA_CONTROL_CLEAR_HOST_INTERRUPT); 2084 caught = 1; 2085 } 2086 if ((status_reg & TWA_STATUS_ATTENTION_INTERRUPT) != 0) { 2087 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2088 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 2089 rv = twa_fetch_aen(sc); 2090 #ifdef DIAGNOSTIC 2091 if (rv != 0) 2092 printf("%s: unable to retrieve AEN (%d)\n", 2093 sc->twa_dv.dv_xname, rv); 2094 #endif 2095 caught = 1; 2096 } 2097 if (status_reg & TWA_STATUS_COMMAND_INTERRUPT) { 2098 /* Start any requests that might be in the pending queue. */ 2099 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2100 TWA_CONTROL_MASK_COMMAND_INTERRUPT); 2101 (void)twa_drain_pending_queue(sc); 2102 caught = 1; 2103 } 2104 if (status_reg & TWA_STATUS_RESPONSE_INTERRUPT) { 2105 s = splbio(); 2106 twa_done(sc); 2107 splx(s); 2108 caught = 1; 2109 } 2110 bail: 2111 return (caught); 2112 } 2113 2114 /* 2115 * Accept an open operation on the control device. 2116 */ 2117 static int 2118 twaopen(dev_t dev, int flag, int mode, struct lwp *l) 2119 { 2120 struct twa_softc *twa; 2121 2122 if ((twa = device_lookup(&twa_cd, minor(dev))) == NULL) 2123 return (ENXIO); 2124 2125 twa->twa_sc_flags |= TWA_STATE_OPEN; 2126 2127 return (0); 2128 } 2129 2130 /* 2131 * Accept the last close on the control device. 2132 */ 2133 static int 2134 twaclose(dev_t dev, int flag, int mode, 2135 struct lwp *l) 2136 { 2137 struct twa_softc *twa; 2138 2139 twa = device_lookup(&twa_cd, minor(dev)); 2140 twa->twa_sc_flags &= ~TWA_STATE_OPEN; 2141 return (0); 2142 } 2143 2144 /* 2145 * Function name: twaioctl 2146 * Description: ioctl handler. 2147 * 2148 * Input: sc -- ptr to per ctlr structure 2149 * cmd -- ioctl cmd 2150 * buf -- ptr to buffer in kernel memory, which is 2151 * a copy of the input buffer in user-space 2152 * Output: buf -- ptr to buffer in kernel memory, which will 2153 * be copied of the output buffer in user-space 2154 * Return value: 0 -- success 2155 * non-zero-- failure 2156 */ 2157 static int 2158 twaioctl(dev_t dev, u_long cmd, void *data, int flag, 2159 struct lwp *l) 2160 { 2161 struct twa_softc *sc; 2162 struct twa_ioctl_9k *user_buf = (struct twa_ioctl_9k *)data; 2163 struct tw_cl_event_packet event_buf; 2164 struct twa_request *tr = 0; 2165 int32_t event_index = 0; 2166 int32_t start_index; 2167 int s, error = 0; 2168 2169 sc = device_lookup(&twa_cd, minor(dev)); 2170 2171 switch (cmd) { 2172 case TW_OSL_IOCTL_FIRMWARE_PASS_THROUGH: 2173 { 2174 struct twa_command_packet *cmdpkt; 2175 uint32_t data_buf_size_adjusted; 2176 2177 /* Get a request packet */ 2178 tr = twa_get_request_wait(sc, 0); 2179 KASSERT(tr != NULL); 2180 /* 2181 * Make sure that the data buffer sent to firmware is a 2182 * 512 byte multiple in size. 2183 */ 2184 data_buf_size_adjusted = 2185 (user_buf->twa_drvr_pkt.buffer_length + 511) & ~511; 2186 2187 if ((tr->tr_length = data_buf_size_adjusted)) { 2188 if ((tr->tr_data = malloc(data_buf_size_adjusted, 2189 M_DEVBUF, M_WAITOK)) == NULL) { 2190 error = ENOMEM; 2191 goto fw_passthru_done; 2192 } 2193 /* Copy the payload. */ 2194 if ((error = copyin((void *) (user_buf->pdata), 2195 (void *) (tr->tr_data), 2196 user_buf->twa_drvr_pkt.buffer_length)) != 0) { 2197 goto fw_passthru_done; 2198 } 2199 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2200 } 2201 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_IOCTL; 2202 cmdpkt = tr->tr_command; 2203 2204 /* Copy the command packet. */ 2205 memcpy(cmdpkt, &(user_buf->twa_cmd_pkt), 2206 sizeof(struct twa_command_packet)); 2207 cmdpkt->command.cmd_pkt_7k.generic.request_id = 2208 tr->tr_request_id; 2209 2210 /* Send down the request, and wait for it to complete. */ 2211 if ((error = twa_wait_request(tr, TWA_REQUEST_TIMEOUT_PERIOD))) { 2212 if (error == ETIMEDOUT) 2213 break; /* clean-up done by twa_wait_request */ 2214 goto fw_passthru_done; 2215 } 2216 2217 /* Copy the command packet back into user space. */ 2218 memcpy(&user_buf->twa_cmd_pkt, cmdpkt, 2219 sizeof(struct twa_command_packet)); 2220 2221 /* If there was a payload, copy it back too. */ 2222 if (tr->tr_length) 2223 error = copyout(tr->tr_data, user_buf->pdata, 2224 user_buf->twa_drvr_pkt.buffer_length); 2225 fw_passthru_done: 2226 /* Free resources. */ 2227 if (tr->tr_data) 2228 free(tr->tr_data, M_DEVBUF); 2229 2230 if (tr) 2231 twa_release_request(tr); 2232 break; 2233 } 2234 2235 case TW_OSL_IOCTL_SCAN_BUS: 2236 twa_request_bus_scan(sc); 2237 break; 2238 2239 case TW_CL_IOCTL_GET_FIRST_EVENT: 2240 if (sc->twa_aen_queue_wrapped) { 2241 if (sc->twa_aen_queue_overflow) { 2242 /* 2243 * The aen queue has wrapped, even before some 2244 * events have been retrieved. Let the caller 2245 * know that he missed out on some AEN's. 2246 */ 2247 user_buf->twa_drvr_pkt.status = 2248 TWA_ERROR_AEN_OVERFLOW; 2249 sc->twa_aen_queue_overflow = FALSE; 2250 } else 2251 user_buf->twa_drvr_pkt.status = 0; 2252 event_index = sc->twa_aen_head; 2253 } else { 2254 if (sc->twa_aen_head == sc->twa_aen_tail) { 2255 user_buf->twa_drvr_pkt.status = 2256 TWA_ERROR_AEN_NO_EVENTS; 2257 break; 2258 } 2259 user_buf->twa_drvr_pkt.status = 0; 2260 event_index = sc->twa_aen_tail; /* = 0 */ 2261 } 2262 if ((error = copyout(sc->twa_aen_queue[event_index], 2263 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2264 (sc->twa_aen_queue[event_index])->retrieved = 2265 TWA_AEN_RETRIEVED; 2266 break; 2267 2268 case TW_CL_IOCTL_GET_LAST_EVENT: 2269 if (sc->twa_aen_queue_wrapped) { 2270 if (sc->twa_aen_queue_overflow) { 2271 /* 2272 * The aen queue has wrapped, even before some 2273 * events have been retrieved. Let the caller 2274 * know that he missed out on some AEN's. 2275 */ 2276 user_buf->twa_drvr_pkt.status = 2277 TWA_ERROR_AEN_OVERFLOW; 2278 sc->twa_aen_queue_overflow = FALSE; 2279 } else 2280 user_buf->twa_drvr_pkt.status = 0; 2281 } else { 2282 if (sc->twa_aen_head == sc->twa_aen_tail) { 2283 user_buf->twa_drvr_pkt.status = 2284 TWA_ERROR_AEN_NO_EVENTS; 2285 break; 2286 } 2287 user_buf->twa_drvr_pkt.status = 0; 2288 } 2289 event_index = 2290 (sc->twa_aen_head - 1 + TWA_Q_LENGTH) % TWA_Q_LENGTH; 2291 if ((error = copyout(sc->twa_aen_queue[event_index], 2292 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2293 (sc->twa_aen_queue[event_index])->retrieved = 2294 TWA_AEN_RETRIEVED; 2295 break; 2296 2297 case TW_CL_IOCTL_GET_NEXT_EVENT: 2298 user_buf->twa_drvr_pkt.status = 0; 2299 if (sc->twa_aen_queue_wrapped) { 2300 2301 if (sc->twa_aen_queue_overflow) { 2302 /* 2303 * The aen queue has wrapped, even before some 2304 * events have been retrieved. Let the caller 2305 * know that he missed out on some AEN's. 2306 */ 2307 user_buf->twa_drvr_pkt.status = 2308 TWA_ERROR_AEN_OVERFLOW; 2309 sc->twa_aen_queue_overflow = FALSE; 2310 } 2311 start_index = sc->twa_aen_head; 2312 } else { 2313 if (sc->twa_aen_head == sc->twa_aen_tail) { 2314 user_buf->twa_drvr_pkt.status = 2315 TWA_ERROR_AEN_NO_EVENTS; 2316 break; 2317 } 2318 start_index = sc->twa_aen_tail; /* = 0 */ 2319 } 2320 error = copyin(user_buf->pdata, &event_buf, 2321 sizeof(struct tw_cl_event_packet)); 2322 2323 event_index = (start_index + event_buf.sequence_id - 2324 (sc->twa_aen_queue[start_index])->sequence_id + 1) 2325 % TWA_Q_LENGTH; 2326 2327 if (!((sc->twa_aen_queue[event_index])->sequence_id > 2328 event_buf.sequence_id)) { 2329 if (user_buf->twa_drvr_pkt.status == 2330 TWA_ERROR_AEN_OVERFLOW) 2331 /* so we report the overflow next time */ 2332 sc->twa_aen_queue_overflow = TRUE; 2333 user_buf->twa_drvr_pkt.status = TWA_ERROR_AEN_NO_EVENTS; 2334 break; 2335 } 2336 if ((error = copyout(sc->twa_aen_queue[event_index], 2337 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2338 (sc->twa_aen_queue[event_index])->retrieved = 2339 TWA_AEN_RETRIEVED; 2340 break; 2341 2342 case TW_CL_IOCTL_GET_PREVIOUS_EVENT: 2343 user_buf->twa_drvr_pkt.status = 0; 2344 if (sc->twa_aen_queue_wrapped) { 2345 if (sc->twa_aen_queue_overflow) { 2346 /* 2347 * The aen queue has wrapped, even before some 2348 * events have been retrieved. Let the caller 2349 * know that he missed out on some AEN's. 2350 */ 2351 user_buf->twa_drvr_pkt.status = 2352 TWA_ERROR_AEN_OVERFLOW; 2353 sc->twa_aen_queue_overflow = FALSE; 2354 } 2355 start_index = sc->twa_aen_head; 2356 } else { 2357 if (sc->twa_aen_head == sc->twa_aen_tail) { 2358 user_buf->twa_drvr_pkt.status = 2359 TWA_ERROR_AEN_NO_EVENTS; 2360 break; 2361 } 2362 start_index = sc->twa_aen_tail; /* = 0 */ 2363 } 2364 if ((error = copyin(user_buf->pdata, &event_buf, 2365 sizeof(struct tw_cl_event_packet))) != 0) 2366 2367 event_index = (start_index + event_buf.sequence_id - 2368 (sc->twa_aen_queue[start_index])->sequence_id - 1) 2369 % TWA_Q_LENGTH; 2370 if (!((sc->twa_aen_queue[event_index])->sequence_id < 2371 event_buf.sequence_id)) { 2372 if (user_buf->twa_drvr_pkt.status == 2373 TWA_ERROR_AEN_OVERFLOW) 2374 /* so we report the overflow next time */ 2375 sc->twa_aen_queue_overflow = TRUE; 2376 user_buf->twa_drvr_pkt.status = 2377 TWA_ERROR_AEN_NO_EVENTS; 2378 break; 2379 } 2380 if ((error = copyout(sc->twa_aen_queue [event_index], 2381 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2382 aprint_error("%s: get_previous: Could not copyout to " 2383 "event_buf. error = %x\n", sc->twa_dv.dv_xname, 2384 error); 2385 (sc->twa_aen_queue[event_index])->retrieved = TWA_AEN_RETRIEVED; 2386 break; 2387 2388 case TW_CL_IOCTL_GET_LOCK: 2389 { 2390 struct tw_cl_lock_packet twa_lock; 2391 2392 copyin(user_buf->pdata, &twa_lock, 2393 sizeof(struct tw_cl_lock_packet)); 2394 s = splbio(); 2395 if ((sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) || 2396 (twa_lock.force_flag) || 2397 (time_second >= sc->twa_ioctl_lock.timeout)) { 2398 2399 sc->twa_ioctl_lock.lock = TWA_LOCK_HELD; 2400 sc->twa_ioctl_lock.timeout = time_second + 2401 (twa_lock.timeout_msec / 1000); 2402 twa_lock.time_remaining_msec = twa_lock.timeout_msec; 2403 user_buf->twa_drvr_pkt.status = 0; 2404 } else { 2405 twa_lock.time_remaining_msec = 2406 (sc->twa_ioctl_lock.timeout - time_second) * 2407 1000; 2408 user_buf->twa_drvr_pkt.status = 2409 TWA_ERROR_IOCTL_LOCK_ALREADY_HELD; 2410 } 2411 splx(s); 2412 copyout(&twa_lock, user_buf->pdata, 2413 sizeof(struct tw_cl_lock_packet)); 2414 break; 2415 } 2416 2417 case TW_CL_IOCTL_RELEASE_LOCK: 2418 s = splbio(); 2419 if (sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) { 2420 user_buf->twa_drvr_pkt.status = 2421 TWA_ERROR_IOCTL_LOCK_NOT_HELD; 2422 } else { 2423 sc->twa_ioctl_lock.lock = TWA_LOCK_FREE; 2424 user_buf->twa_drvr_pkt.status = 0; 2425 } 2426 splx(s); 2427 break; 2428 2429 case TW_CL_IOCTL_GET_COMPATIBILITY_INFO: 2430 { 2431 struct tw_cl_compatibility_packet comp_pkt; 2432 2433 memcpy(comp_pkt.driver_version, TWA_DRIVER_VERSION_STRING, 2434 sizeof(TWA_DRIVER_VERSION_STRING)); 2435 comp_pkt.working_srl = sc->working_srl; 2436 comp_pkt.working_branch = sc->working_branch; 2437 comp_pkt.working_build = sc->working_build; 2438 user_buf->twa_drvr_pkt.status = 0; 2439 2440 /* Copy compatibility information to user space. */ 2441 copyout(&comp_pkt, user_buf->pdata, 2442 min(sizeof(struct tw_cl_compatibility_packet), 2443 user_buf->twa_drvr_pkt.buffer_length)); 2444 break; 2445 } 2446 2447 case TWA_IOCTL_GET_UNITNAME: /* WASABI EXTENSION */ 2448 { 2449 struct twa_unitname *tn; 2450 struct twa_drive *tdr; 2451 2452 tn = (struct twa_unitname *)data; 2453 /* XXX mutex */ 2454 if (tn->tn_unit < 0 || tn->tn_unit >= TWA_MAX_UNITS) 2455 return (EINVAL); 2456 tdr = &sc->sc_units[tn->tn_unit]; 2457 if (tdr->td_dev == NULL) 2458 tn->tn_name[0] = '\0'; 2459 else 2460 strlcpy(tn->tn_name, tdr->td_dev->dv_xname, 2461 sizeof(tn->tn_name)); 2462 return (0); 2463 } 2464 2465 default: 2466 /* Unknown opcode. */ 2467 error = ENOTTY; 2468 } 2469 2470 return(error); 2471 } 2472 2473 const struct cdevsw twa_cdevsw = { 2474 twaopen, twaclose, noread, nowrite, twaioctl, 2475 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER, 2476 }; 2477 2478 /* 2479 * Function name: twa_get_param 2480 * Description: Get a firmware parameter. 2481 * 2482 * Input: sc -- ptr to per ctlr structure 2483 * table_id -- parameter table # 2484 * param_id -- index of the parameter in the table 2485 * param_size -- size of the parameter in bytes 2486 * callback -- ptr to function, if any, to be called 2487 * back on completion; NULL if no callback. 2488 * Output: None 2489 * Return value: ptr to param structure -- success 2490 * NULL -- failure 2491 */ 2492 static int 2493 twa_get_param(struct twa_softc *sc, int table_id, int param_id, 2494 size_t param_size, void (* callback)(struct twa_request *tr), 2495 struct twa_param_9k **param) 2496 { 2497 int rv = 0; 2498 struct twa_request *tr; 2499 union twa_command_7k *cmd; 2500 2501 /* Get a request packet. */ 2502 if ((tr = twa_get_request(sc, 0)) == NULL) { 2503 rv = EAGAIN; 2504 goto out; 2505 } 2506 2507 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2508 2509 /* Allocate memory to read data into. */ 2510 if ((*param = (struct twa_param_9k *) 2511 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) { 2512 rv = ENOMEM; 2513 goto out; 2514 } 2515 2516 memset(*param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2517 tr->tr_data = *param; 2518 tr->tr_length = TWA_SECTOR_SIZE; 2519 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2520 2521 /* Build the cmd pkt. */ 2522 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2523 2524 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2525 2526 cmd->param.opcode = TWA_OP_GET_PARAM; 2527 cmd->param.sgl_offset = 2; 2528 cmd->param.size = 2; 2529 cmd->param.request_id = tr->tr_request_id; 2530 cmd->param.unit = 0; 2531 cmd->param.param_count = 1; 2532 2533 /* Specify which parameter we need. */ 2534 (*param)->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2535 (*param)->parameter_id = param_id; 2536 (*param)->parameter_size_bytes = param_size; 2537 2538 /* Submit the command. */ 2539 if (callback == NULL) { 2540 /* There's no call back; wait till the command completes. */ 2541 rv = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2542 2543 if (rv != 0) 2544 goto out; 2545 2546 if ((rv = cmd->param.status) != 0) { 2547 /* twa_drain_complete_queue will have done the unmapping */ 2548 goto out; 2549 } 2550 twa_release_request(tr); 2551 return (rv); 2552 } else { 2553 /* There's a call back. Simply submit the command. */ 2554 tr->tr_callback = callback; 2555 rv = twa_map_request(tr); 2556 return (rv); 2557 } 2558 out: 2559 if (tr) 2560 twa_release_request(tr); 2561 return(rv); 2562 } 2563 2564 /* 2565 * Function name: twa_set_param 2566 * Description: Set a firmware parameter. 2567 * 2568 * Input: sc -- ptr to per ctlr structure 2569 * table_id -- parameter table # 2570 * param_id -- index of the parameter in the table 2571 * param_size -- size of the parameter in bytes 2572 * callback -- ptr to function, if any, to be called 2573 * back on completion; NULL if no callback. 2574 * Output: None 2575 * Return value: 0 -- success 2576 * non-zero-- failure 2577 */ 2578 static int 2579 twa_set_param(struct twa_softc *sc, int table_id, int param_id, int param_size, 2580 void *data, void (* callback)(struct twa_request *tr)) 2581 { 2582 struct twa_request *tr; 2583 union twa_command_7k *cmd; 2584 struct twa_param_9k *param = NULL; 2585 int error = ENOMEM; 2586 2587 tr = twa_get_request(sc, 0); 2588 if (tr == NULL) 2589 return (EAGAIN); 2590 2591 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2592 2593 /* Allocate memory to send data using. */ 2594 if ((param = (struct twa_param_9k *) 2595 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) 2596 goto out; 2597 memset(param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2598 tr->tr_data = param; 2599 tr->tr_length = TWA_SECTOR_SIZE; 2600 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2601 2602 /* Build the cmd pkt. */ 2603 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2604 2605 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2606 2607 cmd->param.opcode = TWA_OP_SET_PARAM; 2608 cmd->param.sgl_offset = 2; 2609 cmd->param.size = 2; 2610 cmd->param.request_id = tr->tr_request_id; 2611 cmd->param.unit = 0; 2612 cmd->param.param_count = 1; 2613 2614 /* Specify which parameter we want to set. */ 2615 param->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2616 param->parameter_id = param_id; 2617 param->parameter_size_bytes = param_size; 2618 memcpy(param->data, data, param_size); 2619 2620 /* Submit the command. */ 2621 if (callback == NULL) { 2622 /* There's no call back; wait till the command completes. */ 2623 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2624 if (error == ETIMEDOUT) 2625 /* clean-up done by twa_immediate_request */ 2626 return(error); 2627 if (error) 2628 goto out; 2629 if ((error = cmd->param.status)) { 2630 /* 2631 * twa_drain_complete_queue will have done the 2632 * unmapping. 2633 */ 2634 goto out; 2635 } 2636 free(param, M_DEVBUF); 2637 twa_release_request(tr); 2638 return(error); 2639 } else { 2640 /* There's a call back. Simply submit the command. */ 2641 tr->tr_callback = callback; 2642 if ((error = twa_map_request(tr))) 2643 goto out; 2644 2645 return (0); 2646 } 2647 out: 2648 if (param) 2649 free(param, M_DEVBUF); 2650 if (tr) 2651 twa_release_request(tr); 2652 return(error); 2653 } 2654 2655 /* 2656 * Function name: twa_init_connection 2657 * Description: Send init_connection cmd to firmware 2658 * 2659 * Input: sc -- ptr to per ctlr structure 2660 * message_credits -- max # of requests that we might send 2661 * down simultaneously. This will be 2662 * typically set to 256 at init-time or 2663 * after a reset, and to 1 at shutdown-time 2664 * set_features -- indicates if we intend to use 64-bit 2665 * sg, also indicates if we want to do a 2666 * basic or an extended init_connection; 2667 * 2668 * Note: The following input/output parameters are valid, only in case of an 2669 * extended init_connection: 2670 * 2671 * current_fw_srl -- srl of fw we are bundled 2672 * with, if any; 0 otherwise 2673 * current_fw_arch_id -- arch_id of fw we are bundled 2674 * with, if any; 0 otherwise 2675 * current_fw_branch -- branch # of fw we are bundled 2676 * with, if any; 0 otherwise 2677 * current_fw_build -- build # of fw we are bundled 2678 * with, if any; 0 otherwise 2679 * Output: fw_on_ctlr_srl -- srl of fw on ctlr 2680 * fw_on_ctlr_arch_id -- arch_id of fw on ctlr 2681 * fw_on_ctlr_branch -- branch # of fw on ctlr 2682 * fw_on_ctlr_build -- build # of fw on ctlr 2683 * init_connect_result -- result bitmap of fw response 2684 * Return value: 0 -- success 2685 * non-zero-- failure 2686 */ 2687 static int 2688 twa_init_connection(struct twa_softc *sc, uint16_t message_credits, 2689 uint32_t set_features, uint16_t current_fw_srl, 2690 uint16_t current_fw_arch_id, uint16_t current_fw_branch, 2691 uint16_t current_fw_build, uint16_t *fw_on_ctlr_srl, 2692 uint16_t *fw_on_ctlr_arch_id, uint16_t *fw_on_ctlr_branch, 2693 uint16_t *fw_on_ctlr_build, uint32_t *init_connect_result) 2694 { 2695 struct twa_request *tr; 2696 struct twa_command_init_connect *init_connect; 2697 int error = 1; 2698 2699 /* Get a request packet. */ 2700 if ((tr = twa_get_request(sc, 0)) == NULL) 2701 goto out; 2702 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2703 /* Build the cmd pkt. */ 2704 init_connect = &(tr->tr_command->command.cmd_pkt_7k.init_connect); 2705 2706 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2707 2708 init_connect->opcode = TWA_OP_INIT_CONNECTION; 2709 init_connect->request_id = tr->tr_request_id; 2710 init_connect->message_credits = message_credits; 2711 init_connect->features = set_features; 2712 if (TWA_64BIT_ADDRESSES) { 2713 printf("64 bit addressing supported for scatter/gather list\n"); 2714 init_connect->features |= TWA_64BIT_SG_ADDRESSES; 2715 } 2716 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2717 /* 2718 * Fill in the extra fields needed for 2719 * an extended init_connect. 2720 */ 2721 init_connect->size = 6; 2722 init_connect->fw_srl = current_fw_srl; 2723 init_connect->fw_arch_id = current_fw_arch_id; 2724 init_connect->fw_branch = current_fw_branch; 2725 } else 2726 init_connect->size = 3; 2727 2728 /* Submit the command, and wait for it to complete. */ 2729 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2730 if (error == ETIMEDOUT) 2731 return(error); /* clean-up done by twa_immediate_request */ 2732 if (error) 2733 goto out; 2734 if ((error = init_connect->status)) { 2735 /* twa_drain_complete_queue will have done the unmapping */ 2736 goto out; 2737 } 2738 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2739 *fw_on_ctlr_srl = init_connect->fw_srl; 2740 *fw_on_ctlr_arch_id = init_connect->fw_arch_id; 2741 *fw_on_ctlr_branch = init_connect->fw_branch; 2742 *fw_on_ctlr_build = init_connect->fw_build; 2743 *init_connect_result = init_connect->result; 2744 } 2745 twa_release_request(tr); 2746 return(error); 2747 2748 out: 2749 if (tr) 2750 twa_release_request(tr); 2751 return(error); 2752 } 2753 2754 static int 2755 twa_reset(struct twa_softc *sc) 2756 { 2757 int s; 2758 int error = 0; 2759 2760 /* 2761 * Disable interrupts from the controller, and mask any 2762 * accidental entry into our interrupt handler. 2763 */ 2764 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2765 TWA_CONTROL_DISABLE_INTERRUPTS); 2766 2767 s = splbio(); 2768 2769 /* Soft reset the controller. */ 2770 if ((error = twa_soft_reset(sc))) 2771 goto out; 2772 2773 /* Re-establish logical connection with the controller. */ 2774 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 2775 0, 0, 0, 0, 0, 2776 NULL, NULL, NULL, NULL, NULL))) { 2777 goto out; 2778 } 2779 /* 2780 * Complete all requests in the complete queue; error back all requests 2781 * in the busy queue. Any internal requests will be simply freed. 2782 * Re-submit any requests in the pending queue. 2783 */ 2784 twa_drain_busy_queue(sc); 2785 2786 out: 2787 splx(s); 2788 /* 2789 * Enable interrupts, and also clear attention and response interrupts. 2790 */ 2791 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2792 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2793 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 2794 TWA_CONTROL_ENABLE_INTERRUPTS); 2795 return(error); 2796 } 2797 2798 static int 2799 twa_soft_reset(struct twa_softc *sc) 2800 { 2801 uint32_t status_reg; 2802 2803 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2804 TWA_CONTROL_ISSUE_SOFT_RESET | 2805 TWA_CONTROL_CLEAR_HOST_INTERRUPT | 2806 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2807 TWA_CONTROL_MASK_COMMAND_INTERRUPT | 2808 TWA_CONTROL_MASK_RESPONSE_INTERRUPT | 2809 TWA_CONTROL_DISABLE_INTERRUPTS); 2810 2811 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY | 2812 TWA_STATUS_ATTENTION_INTERRUPT, 30)) { 2813 aprint_error("%s: no attention interrupt after reset.\n", 2814 sc->twa_dv.dv_xname); 2815 return(1); 2816 } 2817 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2818 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 2819 2820 if (twa_drain_response_queue(sc)) { 2821 aprint_error("%s: cannot drain response queue.\n", 2822 sc->twa_dv.dv_xname); 2823 return(1); 2824 } 2825 if (twa_drain_aen_queue(sc)) { 2826 aprint_error("%s: cannot drain AEN queue.\n", 2827 sc->twa_dv.dv_xname); 2828 return(1); 2829 } 2830 if (twa_find_aen(sc, TWA_AEN_SOFT_RESET)) { 2831 aprint_error("%s: reset not reported by controller.\n", 2832 sc->twa_dv.dv_xname); 2833 return(1); 2834 } 2835 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2836 if (TWA_STATUS_ERRORS(status_reg) || 2837 twa_check_ctlr_state(sc, status_reg)) { 2838 aprint_error("%s: controller errors detected.\n", 2839 sc->twa_dv.dv_xname); 2840 return(1); 2841 } 2842 return(0); 2843 } 2844 2845 static int 2846 twa_wait_status(struct twa_softc *sc, uint32_t status, uint32_t timeout) 2847 { 2848 struct timeval t1; 2849 time_t end_time; 2850 uint32_t status_reg; 2851 2852 timeout = (timeout * 1000 * 100); 2853 2854 microtime(&t1); 2855 2856 end_time = t1.tv_usec + timeout; 2857 2858 do { 2859 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2860 /* got the required bit(s)? */ 2861 if ((status_reg & status) == status) 2862 return(0); 2863 DELAY(100000); 2864 microtime(&t1); 2865 } while (t1.tv_usec <= end_time); 2866 2867 return(1); 2868 } 2869 2870 static int 2871 twa_fetch_aen(struct twa_softc *sc) 2872 { 2873 struct twa_request *tr; 2874 int s, error = 0; 2875 2876 s = splbio(); 2877 2878 if ((tr = twa_get_request(sc, TWA_CMD_AEN)) == NULL) { 2879 splx(s); 2880 return(EIO); 2881 } 2882 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2883 tr->tr_callback = twa_aen_callback; 2884 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 2885 if (twa_request_sense(tr, 0) != 0) { 2886 if (tr->tr_data) 2887 free(tr->tr_data, M_DEVBUF); 2888 twa_release_request(tr); 2889 error = 1; 2890 } 2891 splx(s); 2892 2893 return(error); 2894 } 2895 2896 /* 2897 * Function name: twa_aen_callback 2898 * Description: Callback for requests to fetch AEN's. 2899 * 2900 * Input: tr -- ptr to completed request pkt 2901 * Output: None 2902 * Return value: None 2903 */ 2904 static void 2905 twa_aen_callback(struct twa_request *tr) 2906 { 2907 int i; 2908 int fetch_more_aens = 0; 2909 struct twa_softc *sc = tr->tr_sc; 2910 struct twa_command_header *cmd_hdr = 2911 (struct twa_command_header *)(tr->tr_data); 2912 struct twa_command_9k *cmd = 2913 &(tr->tr_command->command.cmd_pkt_9k); 2914 2915 if (! cmd->status) { 2916 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) && 2917 (cmd->cdb[0] == 0x3 /* REQUEST_SENSE */)) 2918 if (twa_enqueue_aen(sc, cmd_hdr) 2919 != TWA_AEN_QUEUE_EMPTY) 2920 fetch_more_aens = 1; 2921 } else { 2922 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2923 for (i = 0; i < 18; i++) 2924 printf("%x\t", tr->tr_command->cmd_hdr.sense_data[i]); 2925 2926 printf(""); /* print new line */ 2927 2928 for (i = 0; i < 128; i++) 2929 printf("%x\t", ((int8_t *)(tr->tr_data))[i]); 2930 } 2931 if (tr->tr_data) 2932 free(tr->tr_data, M_DEVBUF); 2933 twa_release_request(tr); 2934 2935 if (fetch_more_aens) 2936 twa_fetch_aen(sc); 2937 } 2938 2939 /* 2940 * Function name: twa_enqueue_aen 2941 * Description: Queues AEN's to be supplied to user-space tools on request. 2942 * 2943 * Input: sc -- ptr to per ctlr structure 2944 * cmd_hdr -- ptr to hdr of fw cmd pkt, from where the AEN 2945 * details can be retrieved. 2946 * Output: None 2947 * Return value: None 2948 */ 2949 static uint16_t 2950 twa_enqueue_aen(struct twa_softc *sc, struct twa_command_header *cmd_hdr) 2951 { 2952 int rv, s; 2953 struct tw_cl_event_packet *event; 2954 uint16_t aen_code; 2955 unsigned long sync_time; 2956 2957 s = splbio(); 2958 aen_code = cmd_hdr->status_block.error; 2959 2960 switch (aen_code) { 2961 case TWA_AEN_SYNC_TIME_WITH_HOST: 2962 2963 sync_time = (time_second - (3 * 86400)) % 604800; 2964 rv = twa_set_param(sc, TWA_PARAM_TIME_TABLE, 2965 TWA_PARAM_TIME_SchedulerTime, 4, 2966 &sync_time, twa_aen_callback); 2967 #ifdef DIAGNOSTIC 2968 if (rv != 0) 2969 printf("%s: unable to sync time with ctlr\n", 2970 sc->twa_dv.dv_xname); 2971 #endif 2972 break; 2973 2974 case TWA_AEN_QUEUE_EMPTY: 2975 break; 2976 2977 default: 2978 /* Queue the event. */ 2979 event = sc->twa_aen_queue[sc->twa_aen_head]; 2980 if (event->retrieved == TWA_AEN_NOT_RETRIEVED) 2981 sc->twa_aen_queue_overflow = TRUE; 2982 event->severity = 2983 cmd_hdr->status_block.substatus_block.severity; 2984 event->time_stamp_sec = time_second; 2985 event->aen_code = aen_code; 2986 event->retrieved = TWA_AEN_NOT_RETRIEVED; 2987 event->sequence_id = ++(sc->twa_current_sequence_id); 2988 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2989 event->parameter_len = strlen(cmd_hdr->err_specific_desc); 2990 memcpy(event->parameter_data, cmd_hdr->err_specific_desc, 2991 event->parameter_len); 2992 2993 if (event->severity < TWA_AEN_SEVERITY_DEBUG) { 2994 printf("%s: AEN 0x%04X: %s: %s: %s\n", 2995 sc->twa_dv.dv_xname, 2996 aen_code, 2997 twa_aen_severity_table[event->severity], 2998 twa_find_msg_string(twa_aen_table, aen_code), 2999 event->parameter_data); 3000 } 3001 3002 if ((sc->twa_aen_head + 1) == TWA_Q_LENGTH) 3003 sc->twa_aen_queue_wrapped = TRUE; 3004 sc->twa_aen_head = (sc->twa_aen_head + 1) % TWA_Q_LENGTH; 3005 break; 3006 } /* switch */ 3007 splx(s); 3008 3009 return (aen_code); 3010 } 3011 3012 /* 3013 * Function name: twa_find_aen 3014 * Description: Reports whether a given AEN ever occurred. 3015 * 3016 * Input: sc -- ptr to per ctlr structure 3017 * aen_code-- AEN to look for 3018 * Output: None 3019 * Return value: 0 -- success 3020 * non-zero-- failure 3021 */ 3022 static int 3023 twa_find_aen(struct twa_softc *sc, uint16_t aen_code) 3024 { 3025 uint32_t last_index; 3026 int s; 3027 int i; 3028 3029 s = splbio(); 3030 3031 if (sc->twa_aen_queue_wrapped) 3032 last_index = sc->twa_aen_head; 3033 else 3034 last_index = 0; 3035 3036 i = sc->twa_aen_head; 3037 do { 3038 i = (i + TWA_Q_LENGTH - 1) % TWA_Q_LENGTH; 3039 if ((sc->twa_aen_queue[i])->aen_code == aen_code) { 3040 splx(s); 3041 return(0); 3042 } 3043 } while (i != last_index); 3044 3045 splx(s); 3046 return(1); 3047 } 3048 3049 static inline void 3050 twa_request_init(struct twa_request *tr, int flags) 3051 { 3052 tr->tr_data = NULL; 3053 tr->tr_real_data = NULL; 3054 tr->tr_length = 0; 3055 tr->tr_real_length = 0; 3056 tr->tr_status = TWA_CMD_SETUP;/* command is in setup phase */ 3057 tr->tr_flags = flags; 3058 tr->tr_error = 0; 3059 tr->tr_callback = NULL; 3060 tr->tr_cmd_pkt_type = 0; 3061 tr->bp = 0; 3062 3063 /* 3064 * Look at the status field in the command packet to see how 3065 * it completed the last time it was used, and zero out only 3066 * the portions that might have changed. Note that we don't 3067 * care to zero out the sglist. 3068 */ 3069 if (tr->tr_command->command.cmd_pkt_9k.status) 3070 memset(tr->tr_command, 0, 3071 sizeof(struct twa_command_header) + 28); 3072 else 3073 memset(&(tr->tr_command->command), 0, 28); 3074 } 3075 3076 struct twa_request * 3077 twa_get_request_wait(struct twa_softc *sc, int flags) 3078 { 3079 struct twa_request *tr; 3080 int s; 3081 3082 KASSERT((flags & TWA_CMD_AEN) == 0); 3083 3084 s = splbio(); 3085 while ((tr = TAILQ_FIRST(&sc->twa_free)) == NULL) { 3086 sc->twa_sc_flags |= TWA_STATE_REQUEST_WAIT; 3087 (void) tsleep(&sc->twa_free, PRIBIO, "twaccb", hz); 3088 } 3089 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 3090 3091 splx(s); 3092 3093 twa_request_init(tr, flags); 3094 3095 return(tr); 3096 } 3097 3098 struct twa_request * 3099 twa_get_request(struct twa_softc *sc, int flags) 3100 { 3101 int s; 3102 struct twa_request *tr; 3103 3104 /* Get a free request packet. */ 3105 s = splbio(); 3106 if (__predict_false((flags & TWA_CMD_AEN) != 0)) { 3107 3108 if ((sc->sc_twa_request->tr_flags & TWA_CMD_AEN_BUSY) == 0) { 3109 tr = sc->sc_twa_request; 3110 flags |= TWA_CMD_AEN_BUSY; 3111 } else { 3112 splx(s); 3113 return (NULL); 3114 } 3115 } else { 3116 if (__predict_false((tr = 3117 TAILQ_FIRST(&sc->twa_free)) == NULL)) { 3118 splx(s); 3119 return (NULL); 3120 } 3121 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 3122 } 3123 splx(s); 3124 3125 twa_request_init(tr, flags); 3126 3127 return(tr); 3128 } 3129 3130 /* 3131 * Print some information about the controller 3132 */ 3133 static void 3134 twa_describe_controller(struct twa_softc *sc) 3135 { 3136 struct twa_param_9k *p[10]; 3137 int i, rv = 0; 3138 uint32_t dsize; 3139 uint8_t ports; 3140 3141 memset(p, sizeof(struct twa_param_9k *), 10); 3142 3143 /* Get the port count. */ 3144 rv |= twa_get_param(sc, TWA_PARAM_CONTROLLER, 3145 TWA_PARAM_CONTROLLER_PortCount, 1, NULL, &p[0]); 3146 3147 /* get version strings */ 3148 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_FW, 3149 16, NULL, &p[1]); 3150 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_BIOS, 3151 16, NULL, &p[2]); 3152 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_Mon, 3153 16, NULL, &p[3]); 3154 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCBA, 3155 8, NULL, &p[4]); 3156 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_ATA, 3157 8, NULL, &p[5]); 3158 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCI, 3159 8, NULL, &p[6]); 3160 rv |= twa_get_param(sc, TWA_PARAM_DRIVESUMMARY, TWA_PARAM_DRIVESTATUS, 3161 16, NULL, &p[7]); 3162 3163 if (rv) { 3164 /* some error occurred */ 3165 aprint_error("%s: failed to fetch version information\n", 3166 sc->twa_dv.dv_xname); 3167 goto bail; 3168 } 3169 3170 ports = *(uint8_t *)(p[0]->data); 3171 3172 aprint_normal("%s: %d ports, Firmware %.16s, BIOS %.16s\n", 3173 sc->twa_dv.dv_xname, ports, 3174 p[1]->data, p[2]->data); 3175 3176 aprint_verbose("%s: Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 3177 sc->twa_dv.dv_xname, 3178 p[3]->data, p[4]->data, 3179 p[5]->data, p[6]->data); 3180 3181 for (i = 0; i < ports; i++) { 3182 3183 if ((*((char *)(p[7]->data + i)) & TWA_DRIVE_DETECTED) == 0) 3184 continue; 3185 3186 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 3187 TWA_PARAM_DRIVEMODELINDEX, 3188 TWA_PARAM_DRIVEMODEL_LENGTH, NULL, &p[8]); 3189 3190 if (rv != 0) { 3191 aprint_error("%s: unable to get drive model for port" 3192 " %d\n", sc->twa_dv.dv_xname, i); 3193 continue; 3194 } 3195 3196 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 3197 TWA_PARAM_DRIVESIZEINDEX, 3198 TWA_PARAM_DRIVESIZE_LENGTH, NULL, &p[9]); 3199 3200 if (rv != 0) { 3201 aprint_error("%s: unable to get drive size" 3202 " for port %d\n", sc->twa_dv.dv_xname, 3203 i); 3204 free(p[8], M_DEVBUF); 3205 continue; 3206 } 3207 3208 dsize = *(uint32_t *)(p[9]->data); 3209 3210 aprint_verbose("%s: port %d: %.40s %d MB\n", 3211 sc->twa_dv.dv_xname, i, p[8]->data, dsize / 2048); 3212 3213 if (p[8]) 3214 free(p[8], M_DEVBUF); 3215 if (p[9]) 3216 free(p[9], M_DEVBUF); 3217 } 3218 bail: 3219 if (p[0]) 3220 free(p[0], M_DEVBUF); 3221 if (p[1]) 3222 free(p[1], M_DEVBUF); 3223 if (p[2]) 3224 free(p[2], M_DEVBUF); 3225 if (p[3]) 3226 free(p[3], M_DEVBUF); 3227 if (p[4]) 3228 free(p[4], M_DEVBUF); 3229 if (p[5]) 3230 free(p[5], M_DEVBUF); 3231 if (p[6]) 3232 free(p[6], M_DEVBUF); 3233 } 3234 3235 /* 3236 * Function name: twa_check_ctlr_state 3237 * Description: Makes sure that the fw status register reports a 3238 * proper status. 3239 * 3240 * Input: sc -- ptr to per ctlr structure 3241 * status_reg -- value in the status register 3242 * Output: None 3243 * Return value: 0 -- no errors 3244 * non-zero-- errors 3245 */ 3246 static int 3247 twa_check_ctlr_state(struct twa_softc *sc, uint32_t status_reg) 3248 { 3249 int result = 0; 3250 struct timeval t1; 3251 static time_t last_warning[2] = {0, 0}; 3252 3253 /* Check if the 'micro-controller ready' bit is not set. */ 3254 if ((status_reg & TWA_STATUS_EXPECTED_BITS) != 3255 TWA_STATUS_EXPECTED_BITS) { 3256 3257 microtime(&t1); 3258 3259 last_warning[0] += (5 * 1000 * 100); 3260 3261 if (t1.tv_usec > last_warning[0]) { 3262 microtime(&t1); 3263 last_warning[0] = t1.tv_usec; 3264 } 3265 result = 1; 3266 } 3267 3268 /* Check if any error bits are set. */ 3269 if ((status_reg & TWA_STATUS_UNEXPECTED_BITS) != 0) { 3270 3271 microtime(&t1); 3272 last_warning[1] += (5 * 1000 * 100); 3273 if (t1.tv_usec > last_warning[1]) { 3274 microtime(&t1); 3275 last_warning[1] = t1.tv_usec; 3276 } 3277 if (status_reg & TWA_STATUS_PCI_PARITY_ERROR_INTERRUPT) { 3278 aprint_error("%s: clearing PCI parity error " 3279 "re-seat/move/replace card.\n", 3280 sc->twa_dv.dv_xname); 3281 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3282 TWA_CONTROL_CLEAR_PARITY_ERROR); 3283 pci_conf_write(sc->pc, sc->tag, 3284 PCI_COMMAND_STATUS_REG, 3285 TWA_PCI_CONFIG_CLEAR_PARITY_ERROR); 3286 result = 1; 3287 } 3288 if (status_reg & TWA_STATUS_PCI_ABORT_INTERRUPT) { 3289 aprint_error("%s: clearing PCI abort\n", 3290 sc->twa_dv.dv_xname); 3291 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3292 TWA_CONTROL_CLEAR_PCI_ABORT); 3293 pci_conf_write(sc->pc, sc->tag, 3294 PCI_COMMAND_STATUS_REG, 3295 TWA_PCI_CONFIG_CLEAR_PCI_ABORT); 3296 result = 1; 3297 } 3298 if (status_reg & TWA_STATUS_QUEUE_ERROR_INTERRUPT) { 3299 aprint_error("%s: clearing controller queue error\n", 3300 sc->twa_dv.dv_xname); 3301 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3302 TWA_CONTROL_CLEAR_PCI_ABORT); 3303 result = 1; 3304 } 3305 if (status_reg & TWA_STATUS_SBUF_WRITE_ERROR) { 3306 aprint_error("%s: clearing SBUF write error\n", 3307 sc->twa_dv.dv_xname); 3308 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3309 TWA_CONTROL_CLEAR_SBUF_WRITE_ERROR); 3310 result = 1; 3311 } 3312 if (status_reg & TWA_STATUS_MICROCONTROLLER_ERROR) { 3313 aprint_error("%s: micro-controller error\n", 3314 sc->twa_dv.dv_xname); 3315 result = 1; 3316 } 3317 } 3318 return(result); 3319 } 3320