1 /* $NetBSD: twa.c,v 1.43 2012/11/02 14:59:11 chs Exp $ */ 2 /* $wasabi: twa.c,v 1.27 2006/07/28 18:17:21 wrstuden Exp $ */ 3 4 /*- 5 * Copyright (c) 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jordan Rhody of Wasabi Systems, Inc. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /*- 34 * Copyright (c) 2003-04 3ware, Inc. 35 * Copyright (c) 2000 Michael Smith 36 * Copyright (c) 2000 BSDi 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 48 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 49 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 50 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 51 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 52 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 53 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 54 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 55 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 56 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 57 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 58 * SUCH DAMAGE. 59 * 60 * $FreeBSD: src/sys/dev/twa/twa.c,v 1.2 2004/04/02 15:09:57 des Exp $ 61 */ 62 63 /* 64 * 3ware driver for 9000 series storage controllers. 65 * 66 * Author: Vinod Kashyap 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: twa.c,v 1.43 2012/11/02 14:59:11 chs Exp $"); 71 72 //#define TWA_DEBUG 73 74 #include <sys/param.h> 75 #include <sys/systm.h> 76 #include <sys/kernel.h> 77 #include <sys/device.h> 78 #include <sys/queue.h> 79 #include <sys/proc.h> 80 #include <sys/bswap.h> 81 #include <sys/buf.h> 82 #include <sys/bufq.h> 83 #include <sys/endian.h> 84 #include <sys/malloc.h> 85 #include <sys/conf.h> 86 #include <sys/disk.h> 87 #include <sys/sysctl.h> 88 #include <sys/syslog.h> 89 90 #include <sys/bus.h> 91 92 #include <dev/pci/pcireg.h> 93 #include <dev/pci/pcivar.h> 94 #include <dev/pci/pcidevs.h> 95 #include <dev/pci/twareg.h> 96 #include <dev/pci/twavar.h> 97 #include <dev/pci/twaio.h> 98 99 #include <dev/scsipi/scsipi_all.h> 100 #include <dev/scsipi/scsipi_disk.h> 101 #include <dev/scsipi/scsipiconf.h> 102 #include <dev/scsipi/scsi_spc.h> 103 104 #include <dev/ldvar.h> 105 106 #include "locators.h" 107 108 #define PCI_CBIO 0x10 109 110 static int twa_fetch_aen(struct twa_softc *); 111 static void twa_aen_callback(struct twa_request *); 112 static int twa_find_aen(struct twa_softc *sc, uint16_t); 113 static uint16_t twa_enqueue_aen(struct twa_softc *sc, 114 struct twa_command_header *); 115 116 static void twa_attach(device_t, device_t, void *); 117 static void twa_shutdown(void *); 118 static int twa_init_connection(struct twa_softc *, uint16_t, uint32_t, 119 uint16_t, uint16_t, uint16_t, uint16_t, uint16_t *, 120 uint16_t *, uint16_t *, uint16_t *, uint32_t *); 121 static int twa_intr(void *); 122 static int twa_match(device_t, cfdata_t, void *); 123 static int twa_reset(struct twa_softc *); 124 125 static int twa_print(void *, const char *); 126 static int twa_soft_reset(struct twa_softc *); 127 128 static int twa_check_ctlr_state(struct twa_softc *, uint32_t); 129 static int twa_get_param(struct twa_softc *, int, int, size_t, 130 void (* callback)(struct twa_request *), 131 struct twa_param_9k **); 132 static int twa_set_param(struct twa_softc *, int, int, int, void *, 133 void (* callback)(struct twa_request *)); 134 static void twa_describe_controller(struct twa_softc *); 135 static int twa_wait_status(struct twa_softc *, uint32_t, uint32_t); 136 static int twa_done(struct twa_softc *); 137 138 extern struct cfdriver twa_cd; 139 extern uint32_t twa_fw_img_size; 140 extern uint8_t twa_fw_img[]; 141 142 CFATTACH_DECL_NEW(twa, sizeof(struct twa_softc), 143 twa_match, twa_attach, NULL, NULL); 144 145 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 146 const char twaver[] = "1.50.01.002"; 147 148 /* AEN messages. */ 149 static const struct twa_message twa_aen_table[] = { 150 {0x0000, "AEN queue empty"}, 151 {0x0001, "Controller reset occurred"}, 152 {0x0002, "Degraded unit detected"}, 153 {0x0003, "Controller error occured"}, 154 {0x0004, "Background rebuild failed"}, 155 {0x0005, "Background rebuild done"}, 156 {0x0006, "Incomplete unit detected"}, 157 {0x0007, "Background initialize done"}, 158 {0x0008, "Unclean shutdown detected"}, 159 {0x0009, "Drive timeout detected"}, 160 {0x000A, "Drive error detected"}, 161 {0x000B, "Rebuild started"}, 162 {0x000C, "Background initialize started"}, 163 {0x000D, "Entire logical unit was deleted"}, 164 {0x000E, "Background initialize failed"}, 165 {0x000F, "SMART attribute exceeded threshold"}, 166 {0x0010, "Power supply reported AC under range"}, 167 {0x0011, "Power supply reported DC out of range"}, 168 {0x0012, "Power supply reported a malfunction"}, 169 {0x0013, "Power supply predicted malfunction"}, 170 {0x0014, "Battery charge is below threshold"}, 171 {0x0015, "Fan speed is below threshold"}, 172 {0x0016, "Temperature sensor is above threshold"}, 173 {0x0017, "Power supply was removed"}, 174 {0x0018, "Power supply was inserted"}, 175 {0x0019, "Drive was removed from a bay"}, 176 {0x001A, "Drive was inserted into a bay"}, 177 {0x001B, "Drive bay cover door was opened"}, 178 {0x001C, "Drive bay cover door was closed"}, 179 {0x001D, "Product case was opened"}, 180 {0x0020, "Prepare for shutdown (power-off)"}, 181 {0x0021, "Downgrade UDMA mode to lower speed"}, 182 {0x0022, "Upgrade UDMA mode to higher speed"}, 183 {0x0023, "Sector repair completed"}, 184 {0x0024, "Sbuf memory test failed"}, 185 {0x0025, "Error flushing cached write data to disk"}, 186 {0x0026, "Drive reported data ECC error"}, 187 {0x0027, "DCB has checksum error"}, 188 {0x0028, "DCB version is unsupported"}, 189 {0x0029, "Background verify started"}, 190 {0x002A, "Background verify failed"}, 191 {0x002B, "Background verify done"}, 192 {0x002C, "Bad sector overwritten during rebuild"}, 193 {0x002D, "Source drive error occurred"}, 194 {0x002E, "Replace failed because replacement drive too small"}, 195 {0x002F, "Verify failed because array was never initialized"}, 196 {0x0030, "Unsupported ATA drive"}, 197 {0x0031, "Synchronize host/controller time"}, 198 {0x0032, "Spare capacity is inadequate for some units"}, 199 {0x0033, "Background migration started"}, 200 {0x0034, "Background migration failed"}, 201 {0x0035, "Background migration done"}, 202 {0x0036, "Verify detected and fixed data/parity mismatch"}, 203 {0x0037, "SO-DIMM incompatible"}, 204 {0x0038, "SO-DIMM not detected"}, 205 {0x0039, "Corrected Sbuf ECC error"}, 206 {0x003A, "Drive power on reset detected"}, 207 {0x003B, "Background rebuild paused"}, 208 {0x003C, "Background initialize paused"}, 209 {0x003D, "Background verify paused"}, 210 {0x003E, "Background migration paused"}, 211 {0x003F, "Corrupt flash file system detected"}, 212 {0x0040, "Flash file system repaired"}, 213 {0x0041, "Unit number assignments were lost"}, 214 {0x0042, "Error during read of primary DCB"}, 215 {0x0043, "Latent error found in backup DCB"}, 216 {0x0044, "Battery voltage is normal"}, 217 {0x0045, "Battery voltage is low"}, 218 {0x0046, "Battery voltage is high"}, 219 {0x0047, "Battery voltage is too low"}, 220 {0x0048, "Battery voltage is too high"}, 221 {0x0049, "Battery temperature is normal"}, 222 {0x004A, "Battery temperature is low"}, 223 {0x004B, "Battery temperature is high"}, 224 {0x004C, "Battery temperature is too low"}, 225 {0x004D, "Battery temperature is too high"}, 226 {0x004E, "Battery capacity test started"}, 227 {0x004F, "Cache synchronization skipped"}, 228 {0x0050, "Battery capacity test completed"}, 229 {0x0051, "Battery health check started"}, 230 {0x0052, "Battery health check completed"}, 231 {0x0053, "Battery capacity test needed"}, 232 {0x0054, "Battery charge termination voltage is at high level"}, 233 {0x0055, "Battery charging started"}, 234 {0x0056, "Battery charging completed"}, 235 {0x0057, "Battery charging fault"}, 236 {0x0058, "Battery capacity is below warning level"}, 237 {0x0059, "Battery capacity is below error level"}, 238 {0x005A, "Battery is present"}, 239 {0x005B, "Battery is not present"}, 240 {0x005C, "Battery is weak"}, 241 {0x005D, "Battery health check failed"}, 242 {0x005E, "Cache synchronized after power fail"}, 243 {0x005F, "Cache synchronization failed; some data lost"}, 244 {0x0060, "Bad cache meta data checksum"}, 245 {0x0061, "Bad cache meta data signature"}, 246 {0x0062, "Cache meta data restore failed"}, 247 {0x0063, "BBU not found after power fail"}, 248 {0x00FC, "Recovered/finished array membership update"}, 249 {0x00FD, "Handler lockup"}, 250 {0x00FE, "Retrying PCI transfer"}, 251 {0x00FF, "AEN queue is full"}, 252 {0xFFFFFFFF, NULL} 253 }; 254 255 /* AEN severity table. */ 256 static const char *twa_aen_severity_table[] = { 257 "None", 258 "ERROR", 259 "WARNING", 260 "INFO", 261 "DEBUG", 262 NULL 263 }; 264 265 /* Error messages. */ 266 static const struct twa_message twa_error_table[] = { 267 {0x0100, "SGL entry contains zero data"}, 268 {0x0101, "Invalid command opcode"}, 269 {0x0102, "SGL entry has unaligned address"}, 270 {0x0103, "SGL size does not match command"}, 271 {0x0104, "SGL entry has illegal length"}, 272 {0x0105, "Command packet is not aligned"}, 273 {0x0106, "Invalid request ID"}, 274 {0x0107, "Duplicate request ID"}, 275 {0x0108, "ID not locked"}, 276 {0x0109, "LBA out of range"}, 277 {0x010A, "Logical unit not supported"}, 278 {0x010B, "Parameter table does not exist"}, 279 {0x010C, "Parameter index does not exist"}, 280 {0x010D, "Invalid field in CDB"}, 281 {0x010E, "Specified port has invalid drive"}, 282 {0x010F, "Parameter item size mismatch"}, 283 {0x0110, "Failed memory allocation"}, 284 {0x0111, "Memory request too large"}, 285 {0x0112, "Out of memory segments"}, 286 {0x0113, "Invalid address to deallocate"}, 287 {0x0114, "Out of memory"}, 288 {0x0115, "Out of heap"}, 289 {0x0120, "Double degrade"}, 290 {0x0121, "Drive not degraded"}, 291 {0x0122, "Reconstruct error"}, 292 {0x0123, "Replace not accepted"}, 293 {0x0124, "Replace drive capacity too small"}, 294 {0x0125, "Sector count not allowed"}, 295 {0x0126, "No spares left"}, 296 {0x0127, "Reconstruct error"}, 297 {0x0128, "Unit is offline"}, 298 {0x0129, "Cannot update status to DCB"}, 299 {0x0130, "Invalid stripe handle"}, 300 {0x0131, "Handle that was not locked"}, 301 {0x0132, "Handle that was not empy"}, 302 {0x0133, "Handle has different owner"}, 303 {0x0140, "IPR has parent"}, 304 {0x0150, "Illegal Pbuf address alignment"}, 305 {0x0151, "Illegal Pbuf transfer length"}, 306 {0x0152, "Illegal Sbuf address alignment"}, 307 {0x0153, "Illegal Sbuf transfer length"}, 308 {0x0160, "Command packet too large"}, 309 {0x0161, "SGL exceeds maximum length"}, 310 {0x0162, "SGL has too many entries"}, 311 {0x0170, "Insufficient resources for rebuilder"}, 312 {0x0171, "Verify error (data != parity)"}, 313 {0x0180, "Requested segment not in directory of this DCB"}, 314 {0x0181, "DCB segment has unsupported version"}, 315 {0x0182, "DCB segment has checksum error"}, 316 {0x0183, "DCB support (settings) segment invalid"}, 317 {0x0184, "DCB UDB (unit descriptor block) segment invalid"}, 318 {0x0185, "DCB GUID (globally unique identifier) segment invalid"}, 319 {0x01A0, "Could not clear Sbuf"}, 320 {0x01C0, "Flash identify failed"}, 321 {0x01C1, "Flash out of bounds"}, 322 {0x01C2, "Flash verify error"}, 323 {0x01C3, "Flash file object not found"}, 324 {0x01C4, "Flash file already present"}, 325 {0x01C5, "Flash file system full"}, 326 {0x01C6, "Flash file not present"}, 327 {0x01C7, "Flash file size error"}, 328 {0x01C8, "Bad flash file checksum"}, 329 {0x01CA, "Corrupt flash file system detected"}, 330 {0x01D0, "Invalid field in parameter list"}, 331 {0x01D1, "Parameter list length error"}, 332 {0x01D2, "Parameter item is not changeable"}, 333 {0x01D3, "Parameter item is not saveable"}, 334 {0x0200, "UDMA CRC error"}, 335 {0x0201, "Internal CRC error"}, 336 {0x0202, "Data ECC error"}, 337 {0x0203, "ADP level 1 error"}, 338 {0x0204, "Port timeout"}, 339 {0x0205, "Drive power on reset"}, 340 {0x0206, "ADP level 2 error"}, 341 {0x0207, "Soft reset failed"}, 342 {0x0208, "Drive not ready"}, 343 {0x0209, "Unclassified port error"}, 344 {0x020A, "Drive aborted command"}, 345 {0x0210, "Internal CRC error"}, 346 {0x0211, "Host PCI bus abort"}, 347 {0x0212, "Host PCI parity error"}, 348 {0x0213, "Port handler error"}, 349 {0x0214, "Token interrupt count error"}, 350 {0x0215, "Timeout waiting for PCI transfer"}, 351 {0x0216, "Corrected buffer ECC"}, 352 {0x0217, "Uncorrected buffer ECC"}, 353 {0x0230, "Unsupported command during flash recovery"}, 354 {0x0231, "Next image buffer expected"}, 355 {0x0232, "Binary image architecture incompatible"}, 356 {0x0233, "Binary image has no signature"}, 357 {0x0234, "Binary image has bad checksum"}, 358 {0x0235, "Image downloaded overflowed buffer"}, 359 {0x0240, "I2C device not found"}, 360 {0x0241, "I2C transaction aborted"}, 361 {0x0242, "SO-DIMM parameter(s) incompatible using defaults"}, 362 {0x0243, "SO-DIMM unsupported"}, 363 {0x0248, "SPI transfer status error"}, 364 {0x0249, "SPI transfer timeout error"}, 365 {0x0250, "Invalid unit descriptor size in CreateUnit"}, 366 {0x0251, "Unit descriptor size exceeds data buffer in CreateUnit"}, 367 {0x0252, "Invalid value in CreateUnit descriptor"}, 368 {0x0253, "Inadequate disk space to support descriptor in CreateUnit"}, 369 {0x0254, "Unable to create data channel for this unit descriptor"}, 370 {0x0255, "CreateUnit descriptor specifies a drive already in use"}, 371 {0x0256, "Unable to write configuration to all disks during CreateUnit"}, 372 {0x0257, "CreateUnit does not support this descriptor version"}, 373 {0x0258, "Invalid subunit for RAID 0 or 5 in CreateUnit"}, 374 {0x0259, "Too many descriptors in CreateUnit"}, 375 {0x025A, "Invalid configuration specified in CreateUnit descriptor"}, 376 {0x025B, "Invalid LBA offset specified in CreateUnit descriptor"}, 377 {0x025C, "Invalid stripelet size specified in CreateUnit descriptor"}, 378 {0x0260, "SMART attribute exceeded threshold"}, 379 {0xFFFFFFFF, NULL} 380 }; 381 382 struct twa_pci_identity { 383 uint32_t vendor_id; 384 uint32_t product_id; 385 const char *name; 386 }; 387 388 static const struct twa_pci_identity twa_pci_products[] = { 389 { PCI_VENDOR_3WARE, 390 PCI_PRODUCT_3WARE_9000, 391 "3ware 9000 series", 392 }, 393 { PCI_VENDOR_3WARE, 394 PCI_PRODUCT_3WARE_9550, 395 "3ware 9550SX series", 396 }, 397 { PCI_VENDOR_3WARE, 398 PCI_PRODUCT_3WARE_9650, 399 "3ware 9650SE series", 400 }, 401 { PCI_VENDOR_3WARE, 402 PCI_PRODUCT_3WARE_9690, 403 "3ware 9690 series", 404 }, 405 { 0, 406 0, 407 NULL, 408 }, 409 }; 410 411 412 static inline void 413 twa_outl(struct twa_softc *sc, int off, uint32_t val) 414 { 415 416 bus_space_write_4(sc->twa_bus_iot, sc->twa_bus_ioh, off, val); 417 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 418 BUS_SPACE_BARRIER_WRITE); 419 } 420 421 static inline uint32_t twa_inl(struct twa_softc *sc, int off) 422 { 423 424 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 425 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 426 return (bus_space_read_4(sc->twa_bus_iot, sc->twa_bus_ioh, off)); 427 } 428 429 void 430 twa_request_wait_handler(struct twa_request *tr) 431 { 432 433 wakeup(tr); 434 } 435 436 static const struct twa_pci_identity * 437 twa_lookup(pcireg_t id) 438 { 439 const struct twa_pci_identity *entry; 440 int i; 441 442 for (i = 0; i < __arraycount(twa_pci_products); i++) { 443 entry = &twa_pci_products[i]; 444 if (entry->vendor_id == PCI_VENDOR(id) && 445 entry->product_id == PCI_PRODUCT(id)) { 446 return entry; 447 } 448 } 449 return NULL; 450 } 451 452 static int 453 twa_match(device_t parent, cfdata_t cfdata, void *aux) 454 { 455 struct pci_attach_args *pa = aux; 456 const struct twa_pci_identity *entry; 457 458 entry = twa_lookup(pa->pa_id); 459 if (entry != NULL) { 460 return 1; 461 } 462 return (0); 463 } 464 465 static const char * 466 twa_find_msg_string(const struct twa_message *table, uint16_t code) 467 { 468 int i; 469 470 for (i = 0; table[i].message != NULL; i++) 471 if (table[i].code == code) 472 return(table[i].message); 473 474 return(table[i].message); 475 } 476 477 void 478 twa_release_request(struct twa_request *tr) 479 { 480 int s; 481 struct twa_softc *sc; 482 483 sc = tr->tr_sc; 484 485 if ((tr->tr_flags & TWA_CMD_AEN) == 0) { 486 s = splbio(); 487 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_free, tr, tr_link); 488 splx(s); 489 if (__predict_false((tr->tr_sc->twa_sc_flags & 490 TWA_STATE_REQUEST_WAIT) != 0)) { 491 tr->tr_sc->twa_sc_flags &= ~TWA_STATE_REQUEST_WAIT; 492 wakeup(&sc->twa_free); 493 } 494 } else 495 tr->tr_flags &= ~TWA_CMD_AEN_BUSY; 496 } 497 498 static void 499 twa_unmap_request(struct twa_request *tr) 500 { 501 struct twa_softc *sc = tr->tr_sc; 502 uint8_t cmd_status; 503 int s; 504 505 /* If the command involved data, unmap that too. */ 506 if (tr->tr_data != NULL) { 507 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) 508 cmd_status = tr->tr_command->command.cmd_pkt_9k.status; 509 else 510 cmd_status = 511 tr->tr_command->command.cmd_pkt_7k.generic.status; 512 513 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 514 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 515 0, tr->tr_length, BUS_DMASYNC_POSTREAD); 516 /* 517 * If we are using a bounce buffer, and we are reading 518 * data, copy the real data in. 519 */ 520 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 521 if (cmd_status == 0) 522 memcpy(tr->tr_real_data, tr->tr_data, 523 tr->tr_real_length); 524 } 525 if (tr->tr_flags & TWA_CMD_DATA_IN) 526 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 527 0, tr->tr_length, BUS_DMASYNC_POSTWRITE); 528 529 bus_dmamap_unload(sc->twa_dma_tag, tr->tr_dma_map); 530 } 531 532 /* Free alignment buffer if it was used. */ 533 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 534 s = splvm(); 535 uvm_km_kmem_free(kmem_va_arena, (vaddr_t)tr->tr_data, 536 tr->tr_length); 537 splx(s); 538 tr->tr_data = tr->tr_real_data; 539 tr->tr_length = tr->tr_real_length; 540 } 541 } 542 543 /* 544 * Function name: twa_wait_request 545 * Description: Sends down a firmware cmd, and waits for the completion, 546 * but NOT in a tight loop. 547 * 548 * Input: tr -- ptr to request pkt 549 * timeout -- max # of seconds to wait before giving up 550 * Output: None 551 * Return value: 0 -- success 552 * non-zero-- failure 553 */ 554 static int 555 twa_wait_request(struct twa_request *tr, uint32_t timeout) 556 { 557 time_t end_time; 558 struct timeval t1; 559 int s, rv; 560 561 tr->tr_flags |= TWA_CMD_SLEEP_ON_REQUEST; 562 tr->tr_callback = twa_request_wait_handler; 563 tr->tr_status = TWA_CMD_BUSY; 564 565 rv = twa_map_request(tr); 566 567 if (rv != 0) 568 return (rv); 569 570 microtime(&t1); 571 end_time = t1.tv_usec + 572 (timeout * 1000 * 100); 573 574 while (tr->tr_status != TWA_CMD_COMPLETE) { 575 rv = tr->tr_error; 576 if (rv != 0) 577 return(rv); 578 if ((rv = tsleep(tr, PRIBIO, "twawait", timeout * hz)) == 0) 579 break; 580 581 if (rv == EWOULDBLOCK) { 582 /* 583 * We will reset the controller only if the request has 584 * already been submitted, so as to not lose the 585 * request packet. If a busy request timed out, the 586 * reset will take care of freeing resources. If a 587 * pending request timed out, we will free resources 588 * for that request, right here. So, the caller is 589 * expected to NOT cleanup when ETIMEDOUT is returned. 590 */ 591 if (tr->tr_status == TWA_CMD_BUSY) 592 twa_reset(tr->tr_sc); 593 else { 594 /* Request was never submitted. Clean up. */ 595 s = splbio(); 596 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, 597 tr_link); 598 splx(s); 599 600 twa_unmap_request(tr); 601 if (tr->tr_data) 602 free(tr->tr_data, M_DEVBUF); 603 604 twa_release_request(tr); 605 } 606 return(ETIMEDOUT); 607 } 608 /* 609 * Either the request got completed, or we were woken up by a 610 * signal. Calculate the new timeout, in case it was the 611 * latter. 612 */ 613 microtime(&t1); 614 615 timeout = (end_time - t1.tv_usec) / (1000 * 100); 616 } 617 return(rv); 618 } 619 620 /* 621 * Function name: twa_immediate_request 622 * Description: Sends down a firmware cmd, and waits for the completion 623 * in a tight loop. 624 * 625 * Input: tr -- ptr to request pkt 626 * timeout -- max # of seconds to wait before giving up 627 * Output: None 628 * Return value: 0 -- success 629 * non-zero-- failure 630 */ 631 static int 632 twa_immediate_request(struct twa_request *tr, uint32_t timeout) 633 { 634 struct timeval t1; 635 int s = 0, rv = 0; 636 637 rv = twa_map_request(tr); 638 639 if (rv != 0) 640 return(rv); 641 642 timeout = (timeout * 10000 * 10); 643 644 microtime(&t1); 645 646 timeout += t1.tv_usec; 647 648 do { 649 rv = tr->tr_error; 650 if (rv != 0) 651 return(rv); 652 s = splbio(); 653 twa_done(tr->tr_sc); 654 splx(s); 655 if (tr->tr_status == TWA_CMD_COMPLETE) 656 return(rv); 657 microtime(&t1); 658 } while (t1.tv_usec <= timeout); 659 660 /* 661 * We will reset the controller only if the request has 662 * already been submitted, so as to not lose the 663 * request packet. If a busy request timed out, the 664 * reset will take care of freeing resources. If a 665 * pending request timed out, we will free resources 666 * for that request, right here. So, the caller is 667 * expected to NOT cleanup when ETIMEDOUT is returned. 668 */ 669 rv = ETIMEDOUT; 670 671 if (tr->tr_status == TWA_CMD_BUSY) 672 twa_reset(tr->tr_sc); 673 else { 674 /* Request was never submitted. Clean up. */ 675 s = splbio(); 676 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, tr_link); 677 splx(s); 678 twa_unmap_request(tr); 679 if (tr->tr_data) 680 free(tr->tr_data, M_DEVBUF); 681 682 twa_release_request(tr); 683 } 684 return (rv); 685 } 686 687 static int 688 twa_inquiry(struct twa_request *tr, int lunid) 689 { 690 int error; 691 struct twa_command_9k *tr_9k_cmd; 692 693 if (tr->tr_data == NULL) 694 return (ENOMEM); 695 696 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 697 698 tr->tr_length = TWA_SECTOR_SIZE; 699 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 700 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 701 702 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 703 704 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 705 tr_9k_cmd->unit = lunid; 706 tr_9k_cmd->request_id = tr->tr_request_id; 707 tr_9k_cmd->status = 0; 708 tr_9k_cmd->sgl_offset = 16; 709 tr_9k_cmd->sgl_entries = 1; 710 /* create the CDB here */ 711 tr_9k_cmd->cdb[0] = INQUIRY; 712 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 713 tr_9k_cmd->cdb[4] = 255; 714 715 /* XXXX setup page data no lun device 716 * it seems 9000 series does not indicate 717 * NOTPRESENT - need more investigation 718 */ 719 ((struct scsipi_inquiry_data *)tr->tr_data)->device = 720 SID_QUAL_LU_NOTPRESENT; 721 722 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 723 if (error != 0) 724 return (error); 725 726 if (((struct scsipi_inquiry_data *)tr->tr_data)->device == 727 SID_QUAL_LU_NOTPRESENT) 728 error = 1; 729 730 return (error); 731 } 732 733 static int 734 twa_print_inquiry_data(struct twa_softc *sc, struct scsipi_inquiry_data *scsipi) 735 { 736 737 printf("%s: %s\n", device_xname(sc->twa_dv), scsipi->vendor); 738 739 return (1); 740 } 741 742 743 static uint64_t 744 twa_read_capacity(struct twa_request *tr, int lunid) 745 { 746 int error; 747 struct twa_command_9k *tr_9k_cmd; 748 uint64_t array_size = 0LL; 749 750 if (tr->tr_data == NULL) 751 return (ENOMEM); 752 753 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 754 755 tr->tr_length = TWA_SECTOR_SIZE; 756 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 757 tr->tr_flags |= TWA_CMD_DATA_OUT; 758 759 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 760 761 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 762 tr_9k_cmd->unit = lunid; 763 tr_9k_cmd->request_id = tr->tr_request_id; 764 tr_9k_cmd->status = 0; 765 tr_9k_cmd->sgl_offset = 16; 766 tr_9k_cmd->sgl_entries = 1; 767 /* create the CDB here */ 768 tr_9k_cmd->cdb[0] = READ_CAPACITY_16; 769 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e) | SRC16_SERVICE_ACTION; 770 771 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 772 773 if (error == 0) { 774 #if BYTE_ORDER == BIG_ENDIAN 775 array_size = bswap64(_8btol( 776 ((struct scsipi_read_capacity_16_data *)tr->tr_data->addr) + 1); 777 #else 778 array_size = _8btol(((struct scsipi_read_capacity_16_data *) 779 tr->tr_data)->addr) + 1; 780 #endif 781 } 782 return (array_size); 783 } 784 785 static int 786 twa_request_sense(struct twa_request *tr, int lunid) 787 { 788 int error = 1; 789 struct twa_command_9k *tr_9k_cmd; 790 791 if (tr->tr_data == NULL) 792 return (error); 793 794 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 795 796 tr->tr_length = TWA_SECTOR_SIZE; 797 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 798 tr->tr_flags |= TWA_CMD_DATA_OUT; 799 800 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 801 802 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 803 tr_9k_cmd->unit = lunid; 804 tr_9k_cmd->request_id = tr->tr_request_id; 805 tr_9k_cmd->status = 0; 806 tr_9k_cmd->sgl_offset = 16; 807 tr_9k_cmd->sgl_entries = 1; 808 /* create the CDB here */ 809 tr_9k_cmd->cdb[0] = SCSI_REQUEST_SENSE; 810 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 811 tr_9k_cmd->cdb[4] = 255; 812 813 /*XXX AEN notification called in interrupt context 814 * so just queue the request. Return as quickly 815 * as possible from interrupt 816 */ 817 if ((tr->tr_flags & TWA_CMD_AEN) != 0) 818 error = twa_map_request(tr); 819 else 820 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 821 822 return (error); 823 } 824 825 static int 826 twa_alloc_req_pkts(struct twa_softc *sc, int num_reqs) 827 { 828 struct twa_request *tr; 829 struct twa_command_packet *tc; 830 bus_dma_segment_t seg; 831 size_t max_segs, max_xfer; 832 int i, rv, rseg, size; 833 834 if ((sc->sc_units = malloc(sc->sc_nunits * 835 sizeof(struct twa_drive), M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL) 836 return(ENOMEM); 837 838 if ((sc->twa_req_buf = malloc(num_reqs * sizeof(struct twa_request), 839 M_DEVBUF, M_NOWAIT)) == NULL) 840 return(ENOMEM); 841 842 size = num_reqs * sizeof(struct twa_command_packet); 843 844 /* Allocate memory for cmd pkts. */ 845 if ((rv = bus_dmamem_alloc(sc->twa_dma_tag, 846 size, PAGE_SIZE, 0, &seg, 847 1, &rseg, BUS_DMA_NOWAIT)) != 0){ 848 aprint_error_dev(sc->twa_dv, "unable to allocate " 849 "command packets, rv = %d\n", rv); 850 return (ENOMEM); 851 } 852 853 if ((rv = bus_dmamem_map(sc->twa_dma_tag, 854 &seg, rseg, size, (void **)&sc->twa_cmds, 855 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 856 aprint_error_dev(sc->twa_dv, "unable to map commands, rv = %d\n", rv); 857 return (1); 858 } 859 860 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 861 size, num_reqs, size, 862 0, BUS_DMA_NOWAIT, &sc->twa_cmd_map)) != 0) { 863 aprint_error_dev(sc->twa_dv, "unable to create command DMA map, " 864 "rv = %d\n", rv); 865 return (ENOMEM); 866 } 867 868 if ((rv = bus_dmamap_load(sc->twa_dma_tag, sc->twa_cmd_map, 869 sc->twa_cmds, size, NULL, 870 BUS_DMA_NOWAIT)) != 0) { 871 aprint_error_dev(sc->twa_dv, "unable to load command DMA map, " 872 "rv = %d\n", rv); 873 return (1); 874 } 875 876 if ((uintptr_t)sc->twa_cmds % TWA_ALIGNMENT) { 877 aprint_error_dev(sc->twa_dv, "DMA map memory not aligned on %d boundary\n", TWA_ALIGNMENT); 878 879 return (1); 880 } 881 tc = sc->twa_cmd_pkt_buf = (struct twa_command_packet *)sc->twa_cmds; 882 sc->twa_cmd_pkt_phys = sc->twa_cmd_map->dm_segs[0].ds_addr; 883 884 memset(sc->twa_req_buf, 0, num_reqs * sizeof(struct twa_request)); 885 memset(sc->twa_cmd_pkt_buf, 0, 886 num_reqs * sizeof(struct twa_command_packet)); 887 888 sc->sc_twa_request = sc->twa_req_buf; 889 max_segs = twa_get_maxsegs(); 890 max_xfer = twa_get_maxxfer(max_segs); 891 892 for (i = 0; i < num_reqs; i++, tc++) { 893 tr = &(sc->twa_req_buf[i]); 894 tr->tr_command = tc; 895 tr->tr_cmd_phys = sc->twa_cmd_pkt_phys + 896 (i * sizeof(struct twa_command_packet)); 897 tr->tr_request_id = i; 898 tr->tr_sc = sc; 899 900 /* 901 * Create a map for data buffers. maxsize (256 * 1024) used in 902 * bus_dma_tag_create above should suffice the bounce page needs 903 * for data buffers, since the max I/O size we support is 128KB. 904 * If we supported I/O's bigger than 256KB, we would have to 905 * create a second dma_tag, with the appropriate maxsize. 906 */ 907 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 908 max_xfer, max_segs, 1, 0, BUS_DMA_NOWAIT, 909 &tr->tr_dma_map)) != 0) { 910 aprint_error_dev(sc->twa_dv, "unable to create command " 911 "DMA map, rv = %d\n", rv); 912 return (ENOMEM); 913 } 914 /* Insert request into the free queue. */ 915 if (i != 0) { 916 sc->twa_lookup[i] = tr; 917 twa_release_request(tr); 918 } else 919 tr->tr_flags |= TWA_CMD_AEN; 920 } 921 return(0); 922 } 923 924 static void 925 twa_recompute_openings(struct twa_softc *sc) 926 { 927 struct twa_drive *td; 928 int unit; 929 int openings; 930 uint64_t total_size; 931 932 total_size = 0; 933 for (unit = 0; unit < sc->sc_nunits; unit++) { 934 td = &sc->sc_units[unit]; 935 total_size += td->td_size; 936 } 937 938 for (unit = 0; unit < sc->sc_nunits; unit++) { 939 td = &sc->sc_units[unit]; 940 /* 941 * In theory, TWA_Q_LENGTH - 1 should be usable, but 942 * keep one additional ccb for internal commands. 943 * This makes the controller more reliable under load. 944 */ 945 if (total_size > 0) { 946 openings = (TWA_Q_LENGTH - 2) * td->td_size / total_size; 947 } else 948 openings = 0; 949 950 if (openings == td->td_openings) 951 continue; 952 td->td_openings = openings; 953 954 #ifdef TWA_DEBUG 955 printf("%s: unit %d openings %d\n", 956 device_xname(sc->twa_dv), unit, openings); 957 #endif 958 if (td->td_dev != NULL) 959 (*td->td_callbacks->tcb_openings)(td->td_dev, td->td_openings); 960 } 961 } 962 963 static int 964 twa_request_bus_scan(struct twa_softc *sc) 965 { 966 struct twa_drive *td; 967 struct twa_request *tr; 968 struct twa_attach_args twaa; 969 int locs[TWACF_NLOCS]; 970 int s, unit; 971 972 s = splbio(); 973 for (unit = 0; unit < sc->sc_nunits; unit++) { 974 975 if ((tr = twa_get_request(sc, 0)) == NULL) { 976 splx(s); 977 return (EIO); 978 } 979 980 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 981 982 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 983 984 if (tr->tr_data == NULL) { 985 twa_release_request(tr); 986 splx(s); 987 return (ENOMEM); 988 } 989 td = &sc->sc_units[unit]; 990 991 if (twa_inquiry(tr, unit) == 0) { 992 if (td->td_dev == NULL) { 993 twa_print_inquiry_data(sc, 994 ((struct scsipi_inquiry_data *)tr->tr_data)); 995 996 sc->sc_units[unit].td_size = 997 twa_read_capacity(tr, unit); 998 999 twaa.twaa_unit = unit; 1000 1001 twa_recompute_openings(sc); 1002 1003 locs[TWACF_UNIT] = unit; 1004 1005 sc->sc_units[unit].td_dev = 1006 config_found_sm_loc(sc->twa_dv, "twa", 1007 locs, &twaa, twa_print, config_stdsubmatch); 1008 } 1009 } else { 1010 if (td->td_dev != NULL) { 1011 (void) config_detach(td->td_dev, DETACH_FORCE); 1012 td->td_dev = NULL; 1013 td->td_size = 0; 1014 1015 twa_recompute_openings(sc); 1016 } 1017 } 1018 free(tr->tr_data, M_DEVBUF); 1019 1020 twa_release_request(tr); 1021 } 1022 splx(s); 1023 1024 return (0); 1025 } 1026 1027 1028 #ifdef DIAGNOSTIC 1029 static inline void 1030 twa_check_busy_q(struct twa_request *tr) 1031 { 1032 struct twa_request *rq; 1033 struct twa_softc *sc = tr->tr_sc; 1034 1035 TAILQ_FOREACH(rq, &sc->twa_busy, tr_link) { 1036 if (tr->tr_request_id == rq->tr_request_id) { 1037 panic("cannot submit same request more than once"); 1038 } else if (tr->bp == rq->bp && tr->bp != 0) { 1039 /* XXX A check for 0 for the buf ptr is needed to 1040 * guard against ioctl requests with a buf ptr of 1041 * 0 and also aen notifications. Looking for 1042 * external cmds only. 1043 */ 1044 panic("cannot submit same buf more than once"); 1045 } else { 1046 /* Empty else statement */ 1047 } 1048 } 1049 } 1050 #endif 1051 1052 static int 1053 twa_start(struct twa_request *tr) 1054 { 1055 struct twa_softc *sc = tr->tr_sc; 1056 uint32_t status_reg; 1057 int s; 1058 int error; 1059 1060 s = splbio(); 1061 1062 /* 1063 * The 9650 and 9690 have a bug in the detection of the full queue 1064 * condition. 1065 * 1066 * If a write operation has filled the queue and is directly followed 1067 * by a status read, it sometimes doesn't return the correct result. 1068 * To work around this, the upper 32bit are written first. 1069 * This effectively serialises the hardware, but does not change 1070 * the state of the queue. 1071 */ 1072 if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) { 1073 /* Write lower 32 bits of address */ 1074 TWA_WRITE_COMMAND_QUEUE_LOW(sc, tr->tr_cmd_phys + 1075 sizeof(struct twa_command_header)); 1076 } 1077 1078 /* Check to see if we can post a command. */ 1079 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1080 if ((error = twa_check_ctlr_state(sc, status_reg))) 1081 goto out; 1082 1083 if (status_reg & TWA_STATUS_COMMAND_QUEUE_FULL) { 1084 if (tr->tr_status != TWA_CMD_PENDING) { 1085 tr->tr_status = TWA_CMD_PENDING; 1086 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_pending, 1087 tr, tr_link); 1088 } 1089 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1090 TWA_CONTROL_UNMASK_COMMAND_INTERRUPT); 1091 error = EBUSY; 1092 } else { 1093 bus_dmamap_sync(sc->twa_dma_tag, sc->twa_cmd_map, 1094 (char *)tr->tr_command - (char *)sc->twa_cmds, 1095 sizeof(struct twa_command_packet), 1096 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1097 1098 if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) { 1099 /* 1100 * Cmd queue is not full. Post the command 1101 * by writing upper 32 bits of address. 1102 */ 1103 TWA_WRITE_COMMAND_QUEUE_HIGH(sc, tr->tr_cmd_phys + 1104 sizeof(struct twa_command_header)); 1105 } else { 1106 /* Cmd queue is not full. Post the command. */ 1107 TWA_WRITE_COMMAND_QUEUE(sc, tr->tr_cmd_phys + 1108 sizeof(struct twa_command_header)); 1109 } 1110 1111 /* Mark the request as currently being processed. */ 1112 tr->tr_status = TWA_CMD_BUSY; 1113 1114 #ifdef DIAGNOSTIC 1115 twa_check_busy_q(tr); 1116 #endif 1117 1118 /* Move the request into the busy queue. */ 1119 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_busy, tr, tr_link); 1120 } 1121 out: 1122 splx(s); 1123 return(error); 1124 } 1125 1126 static int 1127 twa_drain_response_queue(struct twa_softc *sc) 1128 { 1129 union twa_response_queue rq; 1130 uint32_t status_reg; 1131 1132 for (;;) { 1133 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1134 if (twa_check_ctlr_state(sc, status_reg)) 1135 return(1); 1136 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1137 return(0); /* no more response queue entries */ 1138 rq.value = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1139 } 1140 } 1141 1142 /* 1143 * twa_drain_response_queue_large: 1144 * 1145 * specific to the 9550 and 9650 controller to remove requests. 1146 * 1147 * Removes all requests from "large" response queue on the 9550 controller. 1148 * This procedure is called as part of the 9550 controller reset sequence. 1149 */ 1150 static int 1151 twa_drain_response_queue_large(struct twa_softc *sc, uint32_t timeout) 1152 { 1153 uint32_t start_time = 0, end_time; 1154 uint32_t response = 0; 1155 1156 if (sc->sc_product_id == PCI_PRODUCT_3WARE_9550 || 1157 sc->sc_product_id == PCI_PRODUCT_3WARE_9650 ) { 1158 start_time = 0; 1159 end_time = (timeout * TWA_MICROSECOND); 1160 1161 while ((response & 1162 TWA_9550SX_DRAIN_COMPLETE) != TWA_9550SX_DRAIN_COMPLETE) { 1163 response = twa_inl(sc, TWA_RESPONSE_QUEUE_LARGE_OFFSET); 1164 if (start_time >= end_time) 1165 return (1); 1166 DELAY(1); 1167 start_time++; 1168 } 1169 /* P-chip delay */ 1170 DELAY(500000); 1171 } 1172 return (0); 1173 } 1174 1175 static void 1176 twa_drain_busy_queue(struct twa_softc *sc) 1177 { 1178 struct twa_request *tr; 1179 1180 /* Walk the busy queue. */ 1181 1182 while ((tr = TAILQ_FIRST(&sc->twa_busy)) != NULL) { 1183 TAILQ_REMOVE(&sc->twa_busy, tr, tr_link); 1184 1185 twa_unmap_request(tr); 1186 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_INTERNAL) || 1187 (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_IOCTL)) { 1188 /* It's an internal/ioctl request. Simply free it. */ 1189 if (tr->tr_data) 1190 free(tr->tr_data, M_DEVBUF); 1191 twa_release_request(tr); 1192 } else { 1193 /* It's a SCSI request. Complete it. */ 1194 tr->tr_command->command.cmd_pkt_9k.status = EIO; 1195 if (tr->tr_callback) 1196 tr->tr_callback(tr); 1197 } 1198 } 1199 } 1200 1201 static int 1202 twa_drain_pending_queue(struct twa_softc *sc) 1203 { 1204 struct twa_request *tr; 1205 int s, error = 0; 1206 1207 /* 1208 * Pull requests off the pending queue, and submit them. 1209 */ 1210 s = splbio(); 1211 while ((tr = TAILQ_FIRST(&sc->twa_pending)) != NULL) { 1212 TAILQ_REMOVE(&sc->twa_pending, tr, tr_link); 1213 1214 if ((error = twa_start(tr))) { 1215 if (error == EBUSY) { 1216 tr->tr_status = TWA_CMD_PENDING; 1217 1218 /* queue at the head */ 1219 TAILQ_INSERT_HEAD(&tr->tr_sc->twa_pending, 1220 tr, tr_link); 1221 error = 0; 1222 break; 1223 } else { 1224 if (tr->tr_flags & TWA_CMD_SLEEP_ON_REQUEST) { 1225 tr->tr_error = error; 1226 tr->tr_callback(tr); 1227 error = EIO; 1228 } 1229 } 1230 } 1231 } 1232 splx(s); 1233 1234 return(error); 1235 } 1236 1237 static int 1238 twa_drain_aen_queue(struct twa_softc *sc) 1239 { 1240 int s, error = 0; 1241 struct twa_request *tr; 1242 struct twa_command_header *cmd_hdr; 1243 struct timeval t1; 1244 uint32_t timeout; 1245 1246 for (;;) { 1247 if ((tr = twa_get_request(sc, 0)) == NULL) { 1248 error = EIO; 1249 break; 1250 } 1251 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 1252 tr->tr_callback = NULL; 1253 1254 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1255 1256 if (tr->tr_data == NULL) { 1257 error = 1; 1258 goto out; 1259 } 1260 1261 if (twa_request_sense(tr, 0) != 0) { 1262 error = 1; 1263 break; 1264 } 1265 1266 timeout = (1000/*ms*/ * 100/*us*/ * TWA_REQUEST_TIMEOUT_PERIOD); 1267 1268 microtime(&t1); 1269 1270 timeout += t1.tv_usec; 1271 1272 do { 1273 s = splbio(); 1274 twa_done(tr->tr_sc); 1275 splx(s); 1276 if (tr->tr_status != TWA_CMD_BUSY) 1277 break; 1278 microtime(&t1); 1279 } while (t1.tv_usec <= timeout); 1280 1281 if (tr->tr_status != TWA_CMD_COMPLETE) { 1282 error = ETIMEDOUT; 1283 break; 1284 } 1285 1286 if ((error = tr->tr_command->command.cmd_pkt_9k.status)) 1287 break; 1288 1289 cmd_hdr = (struct twa_command_header *)(tr->tr_data); 1290 if ((cmd_hdr->status_block.error) /* aen_code */ 1291 == TWA_AEN_QUEUE_EMPTY) 1292 break; 1293 (void)twa_enqueue_aen(sc, cmd_hdr); 1294 1295 free(tr->tr_data, M_DEVBUF); 1296 twa_release_request(tr); 1297 } 1298 out: 1299 if (tr) { 1300 if (tr->tr_data) 1301 free(tr->tr_data, M_DEVBUF); 1302 1303 twa_release_request(tr); 1304 } 1305 return(error); 1306 } 1307 1308 1309 #if 0 1310 static void 1311 twa_check_response_q(struct twa_request *tr, int clear) 1312 { 1313 int j; 1314 static int i = 0; 1315 static struct twa_request *req = 0; 1316 static struct buf *hist[255]; 1317 1318 1319 if (clear) { 1320 i = 0; 1321 for (j = 0; j < 255; j++) 1322 hist[j] = 0; 1323 return; 1324 } 1325 1326 if (req == 0) 1327 req = tr; 1328 1329 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_EXTERNAL) != 0) { 1330 /* XXX this is bogus ! req can't be anything else but tr ! */ 1331 if (req->tr_request_id == tr->tr_request_id) 1332 panic("req id: %d on controller queue twice", 1333 tr->tr_request_id); 1334 1335 for (j = 0; j < i; j++) 1336 if (tr->bp == hist[j]) 1337 panic("req id: %d buf found twice", 1338 tr->tr_request_id); 1339 } 1340 req = tr; 1341 1342 hist[i++] = req->bp; 1343 } 1344 #endif 1345 1346 static int 1347 twa_done(struct twa_softc *sc) 1348 { 1349 union twa_response_queue rq; 1350 struct twa_request *tr; 1351 int rv = 0; 1352 uint32_t status_reg; 1353 1354 for (;;) { 1355 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1356 if ((rv = twa_check_ctlr_state(sc, status_reg))) 1357 break; 1358 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1359 break; 1360 /* Response queue is not empty. */ 1361 rq.value = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1362 tr = sc->sc_twa_request + rq.u.response_id; 1363 #if 0 1364 twa_check_response_q(tr, 0); 1365 #endif 1366 /* Unmap the command packet, and any associated data buffer. */ 1367 twa_unmap_request(tr); 1368 1369 tr->tr_status = TWA_CMD_COMPLETE; 1370 TAILQ_REMOVE(&tr->tr_sc->twa_busy, tr, tr_link); 1371 1372 if (tr->tr_callback) 1373 tr->tr_callback(tr); 1374 } 1375 (void)twa_drain_pending_queue(sc); 1376 1377 #if 0 1378 twa_check_response_q(NULL, 1); 1379 #endif 1380 return(rv); 1381 } 1382 1383 /* 1384 * Function name: twa_init_ctlr 1385 * Description: Establishes a logical connection with the controller. 1386 * If bundled with firmware, determines whether or not 1387 * the driver is compatible with the firmware on the 1388 * controller, before proceeding to work with it. 1389 * 1390 * Input: sc -- ptr to per ctlr structure 1391 * Output: None 1392 * Return value: 0 -- success 1393 * non-zero-- failure 1394 */ 1395 static int 1396 twa_init_ctlr(struct twa_softc *sc) 1397 { 1398 uint16_t fw_on_ctlr_srl = 0; 1399 uint16_t fw_on_ctlr_arch_id = 0; 1400 uint16_t fw_on_ctlr_branch = 0; 1401 uint16_t fw_on_ctlr_build = 0; 1402 uint32_t init_connect_result = 0; 1403 int error = 0; 1404 1405 /* Wait for the controller to become ready. */ 1406 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY, 1407 TWA_REQUEST_TIMEOUT_PERIOD)) { 1408 return(ENXIO); 1409 } 1410 /* Drain the response queue. */ 1411 if (twa_drain_response_queue(sc)) 1412 return(1); 1413 1414 /* Establish a logical connection with the controller. */ 1415 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 1416 TWA_EXTENDED_INIT_CONNECT, TWA_CURRENT_FW_SRL, 1417 TWA_9000_ARCH_ID, TWA_CURRENT_FW_BRANCH, 1418 TWA_CURRENT_FW_BUILD, &fw_on_ctlr_srl, 1419 &fw_on_ctlr_arch_id, &fw_on_ctlr_branch, 1420 &fw_on_ctlr_build, &init_connect_result))) { 1421 return(error); 1422 } 1423 twa_drain_aen_queue(sc); 1424 1425 /* Set controller state to initialized. */ 1426 sc->twa_state &= ~TWA_STATE_SHUTDOWN; 1427 return(0); 1428 } 1429 1430 static int 1431 twa_setup(struct twa_softc *sc) 1432 { 1433 struct tw_cl_event_packet *aen_queue; 1434 uint32_t i = 0; 1435 int error = 0; 1436 1437 /* Initialize request queues. */ 1438 TAILQ_INIT(&sc->twa_free); 1439 TAILQ_INIT(&sc->twa_busy); 1440 TAILQ_INIT(&sc->twa_pending); 1441 1442 sc->twa_sc_flags = 0; 1443 1444 if (twa_alloc_req_pkts(sc, TWA_Q_LENGTH)) { 1445 1446 return(ENOMEM); 1447 } 1448 1449 /* Allocate memory for the AEN queue. */ 1450 if ((aen_queue = malloc(sizeof(struct tw_cl_event_packet) * 1451 TWA_Q_LENGTH, M_DEVBUF, M_WAITOK)) == NULL) { 1452 /* 1453 * This should not cause us to return error. We will only be 1454 * unable to support AEN's. But then, we will have to check 1455 * time and again to see if we can support AEN's, if we 1456 * continue. So, we will just return error. 1457 */ 1458 return (ENOMEM); 1459 } 1460 /* Initialize the aen queue. */ 1461 memset(aen_queue, 0, sizeof(struct tw_cl_event_packet) * TWA_Q_LENGTH); 1462 1463 for (i = 0; i < TWA_Q_LENGTH; i++) 1464 sc->twa_aen_queue[i] = &(aen_queue[i]); 1465 1466 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1467 TWA_CONTROL_DISABLE_INTERRUPTS); 1468 1469 /* Initialize the controller. */ 1470 if ((error = twa_init_ctlr(sc))) { 1471 /* Soft reset the controller, and try one more time. */ 1472 1473 printf("%s: controller initialization failed. " 1474 "Retrying initialization\n", device_xname(sc->twa_dv)); 1475 1476 if ((error = twa_soft_reset(sc)) == 0) 1477 error = twa_init_ctlr(sc); 1478 } 1479 1480 twa_describe_controller(sc); 1481 1482 error = twa_request_bus_scan(sc); 1483 1484 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1485 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 1486 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 1487 TWA_CONTROL_ENABLE_INTERRUPTS); 1488 1489 return (error); 1490 } 1491 1492 void *twa_sdh; 1493 1494 static void 1495 twa_attach(device_t parent, device_t self, void *aux) 1496 { 1497 struct pci_attach_args *pa; 1498 struct twa_softc *sc; 1499 pci_chipset_tag_t pc; 1500 pcireg_t csr; 1501 pci_intr_handle_t ih; 1502 const char *intrstr; 1503 const struct sysctlnode *node; 1504 const struct twa_pci_identity *entry; 1505 int i; 1506 bool use_64bit; 1507 1508 sc = device_private(self); 1509 1510 sc->twa_dv = self; 1511 1512 pa = aux; 1513 pc = pa->pa_pc; 1514 sc->pc = pa->pa_pc; 1515 sc->tag = pa->pa_tag; 1516 1517 entry = twa_lookup(pa->pa_id); 1518 pci_aprint_devinfo_fancy(pa, "RAID controller", entry->name, 1); 1519 1520 sc->sc_quirks = 0; 1521 1522 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9000) { 1523 sc->sc_nunits = TWA_MAX_UNITS; 1524 use_64bit = false; 1525 if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0, 1526 &sc->twa_bus_iot, &sc->twa_bus_ioh, NULL, NULL)) { 1527 aprint_error_dev(sc->twa_dv, "can't map i/o space\n"); 1528 return; 1529 } 1530 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9550) { 1531 sc->sc_nunits = TWA_MAX_UNITS; 1532 use_64bit = true; 1533 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1534 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1535 &sc->twa_bus_ioh, NULL, NULL)) { 1536 aprint_error_dev(sc->twa_dv, "can't map mem space\n"); 1537 return; 1538 } 1539 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9650) { 1540 sc->sc_nunits = TWA_9650_MAX_UNITS; 1541 use_64bit = true; 1542 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1543 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1544 &sc->twa_bus_ioh, NULL, NULL)) { 1545 aprint_error_dev(sc->twa_dv, "can't map mem space\n"); 1546 return; 1547 } 1548 sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG; 1549 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9690) { 1550 sc->sc_nunits = TWA_9690_MAX_UNITS; 1551 use_64bit = true; 1552 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1553 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1554 &sc->twa_bus_ioh, NULL, NULL)) { 1555 aprint_error_dev(sc->twa_dv, "can't map mem space\n"); 1556 return; 1557 } 1558 sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG; 1559 } else { 1560 sc->sc_nunits = 0; 1561 use_64bit = false; 1562 aprint_error_dev(sc->twa_dv, "product id 0x%02x not recognized\n", 1563 PCI_PRODUCT(pa->pa_id)); 1564 return; 1565 } 1566 1567 if (pci_dma64_available(pa) && use_64bit) { 1568 aprint_verbose_dev(self, "64-bit DMA addressing active\n"); 1569 sc->twa_dma_tag = pa->pa_dmat64; 1570 } else { 1571 sc->twa_dma_tag = pa->pa_dmat; 1572 } 1573 1574 sc->sc_product_id = PCI_PRODUCT(pa->pa_id); 1575 /* Enable the device. */ 1576 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 1577 1578 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 1579 csr | PCI_COMMAND_MASTER_ENABLE); 1580 1581 /* Map and establish the interrupt. */ 1582 if (pci_intr_map(pa, &ih)) { 1583 aprint_error_dev(sc->twa_dv, "can't map interrupt\n"); 1584 return; 1585 } 1586 intrstr = pci_intr_string(pc, ih); 1587 1588 sc->twa_ih = pci_intr_establish(pc, ih, IPL_BIO, twa_intr, sc); 1589 if (sc->twa_ih == NULL) { 1590 aprint_error_dev(sc->twa_dv, "can't establish interrupt%s%s\n", 1591 (intrstr) ? " at " : "", 1592 (intrstr) ? intrstr : ""); 1593 return; 1594 } 1595 1596 if (intrstr != NULL) 1597 aprint_normal_dev(sc->twa_dv, "interrupting at %s\n", 1598 intrstr); 1599 1600 twa_setup(sc); 1601 1602 if (twa_sdh == NULL) 1603 twa_sdh = shutdownhook_establish(twa_shutdown, NULL); 1604 1605 /* sysctl set-up for 3ware cli */ 1606 if (sysctl_createv(NULL, 0, NULL, NULL, 1607 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", 1608 NULL, NULL, 0, NULL, 0, 1609 CTL_HW, CTL_EOL) != 0) { 1610 aprint_error_dev(sc->twa_dv, "could not create %s sysctl node\n", 1611 "hw"); 1612 return; 1613 } 1614 if (sysctl_createv(NULL, 0, NULL, &node, 1615 0, CTLTYPE_NODE, device_xname(sc->twa_dv), 1616 SYSCTL_DESCR("twa driver information"), 1617 NULL, 0, NULL, 0, 1618 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 1619 aprint_error_dev(sc->twa_dv, "could not create %s.%s sysctl node\n", 1620 "hw", 1621 device_xname(sc->twa_dv)); 1622 return; 1623 } 1624 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 1625 0, CTLTYPE_STRING, "driver_version", 1626 SYSCTL_DESCR("twa driver version"), 1627 NULL, 0, __UNCONST(&twaver), 0, 1628 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 1629 != 0) { 1630 aprint_error_dev(sc->twa_dv, "could not create %s.%s.driver_version sysctl\n", 1631 "hw", 1632 device_xname(sc->twa_dv)); 1633 return; 1634 } 1635 1636 return; 1637 } 1638 1639 static void 1640 twa_shutdown(void *arg) 1641 { 1642 extern struct cfdriver twa_cd; 1643 struct twa_softc *sc; 1644 int i, rv, unit; 1645 1646 for (i = 0; i < twa_cd.cd_ndevs; i++) { 1647 if ((sc = device_lookup_private(&twa_cd, i)) == NULL) 1648 continue; 1649 1650 for (unit = 0; unit < sc->sc_nunits; unit++) 1651 if (sc->sc_units[unit].td_dev != NULL) 1652 (void) config_detach(sc->sc_units[unit].td_dev, 1653 DETACH_FORCE | DETACH_QUIET); 1654 1655 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1656 TWA_CONTROL_DISABLE_INTERRUPTS); 1657 1658 /* Let the controller know that we are going down. */ 1659 rv = twa_init_connection(sc, TWA_SHUTDOWN_MESSAGE_CREDITS, 1660 0, 0, 0, 0, 0, 1661 NULL, NULL, NULL, NULL, NULL); 1662 } 1663 } 1664 1665 void 1666 twa_register_callbacks(struct twa_softc *sc, int unit, 1667 const struct twa_callbacks *tcb) 1668 { 1669 1670 sc->sc_units[unit].td_callbacks = tcb; 1671 } 1672 1673 /* 1674 * Print autoconfiguration message for a sub-device 1675 */ 1676 static int 1677 twa_print(void *aux, const char *pnp) 1678 { 1679 struct twa_attach_args *twaa; 1680 1681 twaa = aux; 1682 1683 if (pnp !=NULL) 1684 aprint_normal("block device at %s\n", pnp); 1685 aprint_normal(" unit %d\n", twaa->twaa_unit); 1686 return (UNCONF); 1687 } 1688 1689 static void 1690 twa_fillin_sgl(struct twa_sg *sgl, bus_dma_segment_t *segs, int nsegments) 1691 { 1692 int i; 1693 for (i = 0; i < nsegments; i++) { 1694 sgl[i].address = segs[i].ds_addr; 1695 sgl[i].length = (uint32_t)(segs[i].ds_len); 1696 } 1697 } 1698 1699 static int 1700 twa_submit_io(struct twa_request *tr) 1701 { 1702 int error; 1703 1704 if ((error = twa_start(tr))) { 1705 if (error == EBUSY) 1706 error = 0; /* request is in the pending queue */ 1707 else { 1708 tr->tr_error = error; 1709 } 1710 } 1711 return(error); 1712 } 1713 1714 /* 1715 * Function name: twa_setup_data_dmamap 1716 * Description: Callback of bus_dmamap_load for the buffer associated 1717 * with data. Updates the cmd pkt (size/sgl_entries 1718 * fields, as applicable) to reflect the number of sg 1719 * elements. 1720 * 1721 * Input: arg -- ptr to request pkt 1722 * segs -- ptr to a list of segment descriptors 1723 * nsegments--# of segments 1724 * error -- 0 if no errors encountered before callback, 1725 * non-zero if errors were encountered 1726 * Output: None 1727 * Return value: None 1728 */ 1729 static int 1730 twa_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments) 1731 { 1732 struct twa_request *tr = (struct twa_request *)arg; 1733 struct twa_command_packet *cmdpkt = tr->tr_command; 1734 struct twa_command_9k *cmd9k; 1735 union twa_command_7k *cmd7k; 1736 uint8_t sgl_offset; 1737 int error; 1738 1739 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) { 1740 cmd9k = &(cmdpkt->command.cmd_pkt_9k); 1741 twa_fillin_sgl(&(cmd9k->sg_list[0]), segs, nsegments); 1742 cmd9k->sgl_entries += nsegments - 1; 1743 } else { 1744 /* It's a 7000 command packet. */ 1745 cmd7k = &(cmdpkt->command.cmd_pkt_7k); 1746 if ((sgl_offset = cmdpkt->command.cmd_pkt_7k.generic.sgl_offset)) 1747 twa_fillin_sgl((struct twa_sg *) 1748 (((uint32_t *)cmd7k) + sgl_offset), 1749 segs, nsegments); 1750 /* Modify the size field, based on sg address size. */ 1751 cmd7k->generic.size += 1752 ((TWA_64BIT_ADDRESSES ? 3 : 2) * nsegments); 1753 } 1754 if (tr->tr_flags & TWA_CMD_DATA_IN) 1755 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1756 tr->tr_length, BUS_DMASYNC_PREWRITE); 1757 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 1758 /* 1759 * If we're using an alignment buffer, and we're 1760 * writing data, copy the real data out. 1761 */ 1762 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 1763 memcpy(tr->tr_data, tr->tr_real_data, 1764 tr->tr_real_length); 1765 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1766 tr->tr_length, BUS_DMASYNC_PREREAD); 1767 } 1768 error = twa_submit_io(tr); 1769 1770 if (error) { 1771 twa_unmap_request(tr); 1772 /* 1773 * If the caller had been returned EINPROGRESS, and he has 1774 * registered a callback for handling completion, the callback 1775 * will never get called because we were unable to submit the 1776 * request. So, free up the request right here. 1777 */ 1778 if (tr->tr_callback) 1779 twa_release_request(tr); 1780 } 1781 return (error); 1782 } 1783 1784 /* 1785 * Function name: twa_map_request 1786 * Description: Maps a cmd pkt and data associated with it, into 1787 * DMA'able memory. 1788 * 1789 * Input: tr -- ptr to request pkt 1790 * Output: None 1791 * Return value: 0 -- success 1792 * non-zero-- failure 1793 */ 1794 int 1795 twa_map_request(struct twa_request *tr) 1796 { 1797 struct twa_softc *sc = tr->tr_sc; 1798 int s, rv, rc; 1799 1800 /* If the command involves data, map that too. */ 1801 if (tr->tr_data != NULL) { 1802 1803 if (((u_long)tr->tr_data & (511)) != 0) { 1804 tr->tr_flags |= TWA_CMD_DATA_COPY_NEEDED; 1805 tr->tr_real_data = tr->tr_data; 1806 tr->tr_real_length = tr->tr_length; 1807 s = splvm(); 1808 rc = uvm_km_kmem_alloc(kmem_va_arena, 1809 tr->tr_length, (VM_NOSLEEP | VM_INSTANTFIT), 1810 (vmem_addr_t *)&tr->tr_data); 1811 splx(s); 1812 1813 if (rc != 0) { 1814 tr->tr_data = tr->tr_real_data; 1815 tr->tr_length = tr->tr_real_length; 1816 return(ENOMEM); 1817 } 1818 if ((tr->tr_flags & TWA_CMD_DATA_IN) != 0) 1819 memcpy(tr->tr_data, tr->tr_real_data, 1820 tr->tr_length); 1821 } 1822 1823 /* 1824 * Map the data buffer into bus space and build the S/G list. 1825 */ 1826 rv = bus_dmamap_load(sc->twa_dma_tag, tr->tr_dma_map, 1827 tr->tr_data, tr->tr_length, NULL, 1828 BUS_DMA_NOWAIT | BUS_DMA_STREAMING); 1829 1830 if (rv != 0) { 1831 if ((tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) != 0) { 1832 s = splvm(); 1833 uvm_km_kmem_free(kmem_va_arena, 1834 (vaddr_t)tr->tr_data, 1835 tr->tr_length); 1836 splx(s); 1837 } 1838 return (rv); 1839 } 1840 1841 if ((rv = twa_setup_data_dmamap(tr, 1842 tr->tr_dma_map->dm_segs, 1843 tr->tr_dma_map->dm_nsegs))) { 1844 1845 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 1846 s = splvm(); 1847 uvm_km_kmem_free(kmem_va_arena, (vaddr_t)tr->tr_data, 1848 tr->tr_length); 1849 splx(s); 1850 tr->tr_data = tr->tr_real_data; 1851 tr->tr_length = tr->tr_real_length; 1852 } 1853 } 1854 1855 } else 1856 if ((rv = twa_submit_io(tr))) 1857 twa_unmap_request(tr); 1858 1859 return (rv); 1860 } 1861 1862 /* 1863 * Function name: twa_intr 1864 * Description: Interrupt handler. Determines the kind of interrupt, 1865 * and calls the appropriate handler. 1866 * 1867 * Input: sc -- ptr to per ctlr structure 1868 * Output: None 1869 * Return value: None 1870 */ 1871 1872 static int 1873 twa_intr(void *arg) 1874 { 1875 int caught, s, rv; 1876 struct twa_softc *sc; 1877 uint32_t status_reg; 1878 sc = (struct twa_softc *)arg; 1879 1880 caught = 0; 1881 /* Collect current interrupt status. */ 1882 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1883 if (twa_check_ctlr_state(sc, status_reg)) { 1884 caught = 1; 1885 goto bail; 1886 } 1887 /* Dispatch based on the kind of interrupt. */ 1888 if (status_reg & TWA_STATUS_HOST_INTERRUPT) { 1889 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1890 TWA_CONTROL_CLEAR_HOST_INTERRUPT); 1891 caught = 1; 1892 } 1893 if ((status_reg & TWA_STATUS_ATTENTION_INTERRUPT) != 0) { 1894 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1895 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 1896 rv = twa_fetch_aen(sc); 1897 #ifdef DIAGNOSTIC 1898 if (rv != 0) 1899 printf("%s: unable to retrieve AEN (%d)\n", 1900 device_xname(sc->twa_dv), rv); 1901 #endif 1902 caught = 1; 1903 } 1904 if (status_reg & TWA_STATUS_COMMAND_INTERRUPT) { 1905 /* Start any requests that might be in the pending queue. */ 1906 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1907 TWA_CONTROL_MASK_COMMAND_INTERRUPT); 1908 (void)twa_drain_pending_queue(sc); 1909 caught = 1; 1910 } 1911 if (status_reg & TWA_STATUS_RESPONSE_INTERRUPT) { 1912 s = splbio(); 1913 twa_done(sc); 1914 splx(s); 1915 caught = 1; 1916 } 1917 bail: 1918 return (caught); 1919 } 1920 1921 /* 1922 * Accept an open operation on the control device. 1923 */ 1924 static int 1925 twaopen(dev_t dev, int flag, int mode, struct lwp *l) 1926 { 1927 struct twa_softc *twa; 1928 1929 if ((twa = device_lookup_private(&twa_cd, minor(dev))) == NULL) 1930 return (ENXIO); 1931 if ((twa->twa_sc_flags & TWA_STATE_OPEN) != 0) 1932 return (EBUSY); 1933 1934 twa->twa_sc_flags |= TWA_STATE_OPEN; 1935 1936 return (0); 1937 } 1938 1939 /* 1940 * Accept the last close on the control device. 1941 */ 1942 static int 1943 twaclose(dev_t dev, int flag, int mode, 1944 struct lwp *l) 1945 { 1946 struct twa_softc *twa; 1947 1948 twa = device_lookup_private(&twa_cd, minor(dev)); 1949 twa->twa_sc_flags &= ~TWA_STATE_OPEN; 1950 return (0); 1951 } 1952 1953 /* 1954 * Function name: twaioctl 1955 * Description: ioctl handler. 1956 * 1957 * Input: sc -- ptr to per ctlr structure 1958 * cmd -- ioctl cmd 1959 * buf -- ptr to buffer in kernel memory, which is 1960 * a copy of the input buffer in user-space 1961 * Output: buf -- ptr to buffer in kernel memory, which will 1962 * be copied of the output buffer in user-space 1963 * Return value: 0 -- success 1964 * non-zero-- failure 1965 */ 1966 static int 1967 twaioctl(dev_t dev, u_long cmd, void *data, int flag, 1968 struct lwp *l) 1969 { 1970 struct twa_softc *sc; 1971 struct twa_ioctl_9k *user_buf = (struct twa_ioctl_9k *)data; 1972 struct tw_cl_event_packet event_buf; 1973 struct twa_request *tr = 0; 1974 int32_t event_index = 0; 1975 int32_t start_index; 1976 int s, error = 0; 1977 1978 sc = device_lookup_private(&twa_cd, minor(dev)); 1979 1980 switch (cmd) { 1981 case TW_OSL_IOCTL_FIRMWARE_PASS_THROUGH: 1982 { 1983 struct twa_command_packet *cmdpkt; 1984 uint32_t data_buf_size_adjusted; 1985 1986 /* Get a request packet */ 1987 tr = twa_get_request_wait(sc, 0); 1988 KASSERT(tr != NULL); 1989 /* 1990 * Make sure that the data buffer sent to firmware is a 1991 * 512 byte multiple in size. 1992 */ 1993 data_buf_size_adjusted = 1994 (user_buf->twa_drvr_pkt.buffer_length + 511) & ~511; 1995 1996 if ((tr->tr_length = data_buf_size_adjusted)) { 1997 if ((tr->tr_data = malloc(data_buf_size_adjusted, 1998 M_DEVBUF, M_WAITOK)) == NULL) { 1999 error = ENOMEM; 2000 goto fw_passthru_done; 2001 } 2002 /* Copy the payload. */ 2003 if ((error = copyin((void *) (user_buf->pdata), 2004 (void *) (tr->tr_data), 2005 user_buf->twa_drvr_pkt.buffer_length)) != 0) { 2006 goto fw_passthru_done; 2007 } 2008 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2009 } 2010 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_IOCTL; 2011 cmdpkt = tr->tr_command; 2012 2013 /* Copy the command packet. */ 2014 memcpy(cmdpkt, &(user_buf->twa_cmd_pkt), 2015 sizeof(struct twa_command_packet)); 2016 cmdpkt->command.cmd_pkt_7k.generic.request_id = 2017 tr->tr_request_id; 2018 2019 /* Send down the request, and wait for it to complete. */ 2020 if ((error = twa_wait_request(tr, TWA_REQUEST_TIMEOUT_PERIOD))) { 2021 if (error == ETIMEDOUT) 2022 break; /* clean-up done by twa_wait_request */ 2023 goto fw_passthru_done; 2024 } 2025 2026 /* Copy the command packet back into user space. */ 2027 memcpy(&user_buf->twa_cmd_pkt, cmdpkt, 2028 sizeof(struct twa_command_packet)); 2029 2030 /* If there was a payload, copy it back too. */ 2031 if (tr->tr_length) 2032 error = copyout(tr->tr_data, user_buf->pdata, 2033 user_buf->twa_drvr_pkt.buffer_length); 2034 fw_passthru_done: 2035 /* Free resources. */ 2036 if (tr->tr_data) 2037 free(tr->tr_data, M_DEVBUF); 2038 2039 if (tr) 2040 twa_release_request(tr); 2041 break; 2042 } 2043 2044 case TW_OSL_IOCTL_SCAN_BUS: 2045 twa_request_bus_scan(sc); 2046 break; 2047 2048 case TW_CL_IOCTL_GET_FIRST_EVENT: 2049 if (sc->twa_aen_queue_wrapped) { 2050 if (sc->twa_aen_queue_overflow) { 2051 /* 2052 * The aen queue has wrapped, even before some 2053 * events have been retrieved. Let the caller 2054 * know that he missed out on some AEN's. 2055 */ 2056 user_buf->twa_drvr_pkt.status = 2057 TWA_ERROR_AEN_OVERFLOW; 2058 sc->twa_aen_queue_overflow = FALSE; 2059 } else 2060 user_buf->twa_drvr_pkt.status = 0; 2061 event_index = sc->twa_aen_head; 2062 } else { 2063 if (sc->twa_aen_head == sc->twa_aen_tail) { 2064 user_buf->twa_drvr_pkt.status = 2065 TWA_ERROR_AEN_NO_EVENTS; 2066 break; 2067 } 2068 user_buf->twa_drvr_pkt.status = 0; 2069 event_index = sc->twa_aen_tail; /* = 0 */ 2070 } 2071 if ((error = copyout(sc->twa_aen_queue[event_index], 2072 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2073 (sc->twa_aen_queue[event_index])->retrieved = 2074 TWA_AEN_RETRIEVED; 2075 break; 2076 2077 case TW_CL_IOCTL_GET_LAST_EVENT: 2078 if (sc->twa_aen_queue_wrapped) { 2079 if (sc->twa_aen_queue_overflow) { 2080 /* 2081 * The aen queue has wrapped, even before some 2082 * events have been retrieved. Let the caller 2083 * know that he missed out on some AEN's. 2084 */ 2085 user_buf->twa_drvr_pkt.status = 2086 TWA_ERROR_AEN_OVERFLOW; 2087 sc->twa_aen_queue_overflow = FALSE; 2088 } else 2089 user_buf->twa_drvr_pkt.status = 0; 2090 } else { 2091 if (sc->twa_aen_head == sc->twa_aen_tail) { 2092 user_buf->twa_drvr_pkt.status = 2093 TWA_ERROR_AEN_NO_EVENTS; 2094 break; 2095 } 2096 user_buf->twa_drvr_pkt.status = 0; 2097 } 2098 event_index = 2099 (sc->twa_aen_head - 1 + TWA_Q_LENGTH) % TWA_Q_LENGTH; 2100 if ((error = copyout(sc->twa_aen_queue[event_index], 2101 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2102 (sc->twa_aen_queue[event_index])->retrieved = 2103 TWA_AEN_RETRIEVED; 2104 break; 2105 2106 case TW_CL_IOCTL_GET_NEXT_EVENT: 2107 user_buf->twa_drvr_pkt.status = 0; 2108 if (sc->twa_aen_queue_wrapped) { 2109 2110 if (sc->twa_aen_queue_overflow) { 2111 /* 2112 * The aen queue has wrapped, even before some 2113 * events have been retrieved. Let the caller 2114 * know that he missed out on some AEN's. 2115 */ 2116 user_buf->twa_drvr_pkt.status = 2117 TWA_ERROR_AEN_OVERFLOW; 2118 sc->twa_aen_queue_overflow = FALSE; 2119 } 2120 start_index = sc->twa_aen_head; 2121 } else { 2122 if (sc->twa_aen_head == sc->twa_aen_tail) { 2123 user_buf->twa_drvr_pkt.status = 2124 TWA_ERROR_AEN_NO_EVENTS; 2125 break; 2126 } 2127 start_index = sc->twa_aen_tail; /* = 0 */ 2128 } 2129 error = copyin(user_buf->pdata, &event_buf, 2130 sizeof(struct tw_cl_event_packet)); 2131 2132 event_index = (start_index + event_buf.sequence_id - 2133 (sc->twa_aen_queue[start_index])->sequence_id + 1) 2134 % TWA_Q_LENGTH; 2135 2136 if (!((sc->twa_aen_queue[event_index])->sequence_id > 2137 event_buf.sequence_id)) { 2138 if (user_buf->twa_drvr_pkt.status == 2139 TWA_ERROR_AEN_OVERFLOW) 2140 /* so we report the overflow next time */ 2141 sc->twa_aen_queue_overflow = TRUE; 2142 user_buf->twa_drvr_pkt.status = TWA_ERROR_AEN_NO_EVENTS; 2143 break; 2144 } 2145 if ((error = copyout(sc->twa_aen_queue[event_index], 2146 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2147 (sc->twa_aen_queue[event_index])->retrieved = 2148 TWA_AEN_RETRIEVED; 2149 break; 2150 2151 case TW_CL_IOCTL_GET_PREVIOUS_EVENT: 2152 user_buf->twa_drvr_pkt.status = 0; 2153 if (sc->twa_aen_queue_wrapped) { 2154 if (sc->twa_aen_queue_overflow) { 2155 /* 2156 * The aen queue has wrapped, even before some 2157 * events have been retrieved. Let the caller 2158 * know that he missed out on some AEN's. 2159 */ 2160 user_buf->twa_drvr_pkt.status = 2161 TWA_ERROR_AEN_OVERFLOW; 2162 sc->twa_aen_queue_overflow = FALSE; 2163 } 2164 start_index = sc->twa_aen_head; 2165 } else { 2166 if (sc->twa_aen_head == sc->twa_aen_tail) { 2167 user_buf->twa_drvr_pkt.status = 2168 TWA_ERROR_AEN_NO_EVENTS; 2169 break; 2170 } 2171 start_index = sc->twa_aen_tail; /* = 0 */ 2172 } 2173 if ((error = copyin(user_buf->pdata, &event_buf, 2174 sizeof(struct tw_cl_event_packet))) != 0) 2175 2176 event_index = (start_index + event_buf.sequence_id - 2177 (sc->twa_aen_queue[start_index])->sequence_id - 1) 2178 % TWA_Q_LENGTH; 2179 if (!((sc->twa_aen_queue[event_index])->sequence_id < 2180 event_buf.sequence_id)) { 2181 if (user_buf->twa_drvr_pkt.status == 2182 TWA_ERROR_AEN_OVERFLOW) 2183 /* so we report the overflow next time */ 2184 sc->twa_aen_queue_overflow = TRUE; 2185 user_buf->twa_drvr_pkt.status = 2186 TWA_ERROR_AEN_NO_EVENTS; 2187 break; 2188 } 2189 if ((error = copyout(sc->twa_aen_queue [event_index], 2190 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2191 aprint_error_dev(sc->twa_dv, "get_previous: Could not copyout to " 2192 "event_buf. error = %x\n", 2193 error); 2194 (sc->twa_aen_queue[event_index])->retrieved = TWA_AEN_RETRIEVED; 2195 break; 2196 2197 case TW_CL_IOCTL_GET_LOCK: 2198 { 2199 struct tw_cl_lock_packet twa_lock; 2200 2201 copyin(user_buf->pdata, &twa_lock, 2202 sizeof(struct tw_cl_lock_packet)); 2203 s = splbio(); 2204 if ((sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) || 2205 (twa_lock.force_flag) || 2206 (time_second >= sc->twa_ioctl_lock.timeout)) { 2207 2208 sc->twa_ioctl_lock.lock = TWA_LOCK_HELD; 2209 sc->twa_ioctl_lock.timeout = time_second + 2210 (twa_lock.timeout_msec / 1000); 2211 twa_lock.time_remaining_msec = twa_lock.timeout_msec; 2212 user_buf->twa_drvr_pkt.status = 0; 2213 } else { 2214 twa_lock.time_remaining_msec = 2215 (sc->twa_ioctl_lock.timeout - time_second) * 2216 1000; 2217 user_buf->twa_drvr_pkt.status = 2218 TWA_ERROR_IOCTL_LOCK_ALREADY_HELD; 2219 } 2220 splx(s); 2221 copyout(&twa_lock, user_buf->pdata, 2222 sizeof(struct tw_cl_lock_packet)); 2223 break; 2224 } 2225 2226 case TW_CL_IOCTL_RELEASE_LOCK: 2227 s = splbio(); 2228 if (sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) { 2229 user_buf->twa_drvr_pkt.status = 2230 TWA_ERROR_IOCTL_LOCK_NOT_HELD; 2231 } else { 2232 sc->twa_ioctl_lock.lock = TWA_LOCK_FREE; 2233 user_buf->twa_drvr_pkt.status = 0; 2234 } 2235 splx(s); 2236 break; 2237 2238 case TW_CL_IOCTL_GET_COMPATIBILITY_INFO: 2239 { 2240 struct tw_cl_compatibility_packet comp_pkt; 2241 2242 memcpy(comp_pkt.driver_version, TWA_DRIVER_VERSION_STRING, 2243 sizeof(TWA_DRIVER_VERSION_STRING)); 2244 comp_pkt.working_srl = sc->working_srl; 2245 comp_pkt.working_branch = sc->working_branch; 2246 comp_pkt.working_build = sc->working_build; 2247 user_buf->twa_drvr_pkt.status = 0; 2248 2249 /* Copy compatibility information to user space. */ 2250 copyout(&comp_pkt, user_buf->pdata, 2251 min(sizeof(struct tw_cl_compatibility_packet), 2252 user_buf->twa_drvr_pkt.buffer_length)); 2253 break; 2254 } 2255 2256 case TWA_IOCTL_GET_UNITNAME: /* WASABI EXTENSION */ 2257 { 2258 struct twa_unitname *tn; 2259 struct twa_drive *tdr; 2260 2261 tn = (struct twa_unitname *)data; 2262 /* XXX mutex */ 2263 if (tn->tn_unit < 0 || tn->tn_unit >= sc->sc_nunits) 2264 return (EINVAL); 2265 tdr = &sc->sc_units[tn->tn_unit]; 2266 if (tdr->td_dev == NULL) 2267 tn->tn_name[0] = '\0'; 2268 else 2269 strlcpy(tn->tn_name, device_xname(tdr->td_dev), 2270 sizeof(tn->tn_name)); 2271 return (0); 2272 } 2273 2274 default: 2275 /* Unknown opcode. */ 2276 error = ENOTTY; 2277 } 2278 2279 return(error); 2280 } 2281 2282 const struct cdevsw twa_cdevsw = { 2283 twaopen, twaclose, noread, nowrite, twaioctl, 2284 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER, 2285 }; 2286 2287 /* 2288 * Function name: twa_get_param 2289 * Description: Get a firmware parameter. 2290 * 2291 * Input: sc -- ptr to per ctlr structure 2292 * table_id -- parameter table # 2293 * param_id -- index of the parameter in the table 2294 * param_size -- size of the parameter in bytes 2295 * callback -- ptr to function, if any, to be called 2296 * back on completion; NULL if no callback. 2297 * Output: None 2298 * Return value: ptr to param structure -- success 2299 * NULL -- failure 2300 */ 2301 static int 2302 twa_get_param(struct twa_softc *sc, int table_id, int param_id, 2303 size_t param_size, void (* callback)(struct twa_request *tr), 2304 struct twa_param_9k **param) 2305 { 2306 int rv = 0; 2307 struct twa_request *tr; 2308 union twa_command_7k *cmd; 2309 2310 /* Get a request packet. */ 2311 if ((tr = twa_get_request(sc, 0)) == NULL) { 2312 rv = EAGAIN; 2313 goto out; 2314 } 2315 2316 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2317 2318 /* Allocate memory to read data into. */ 2319 if ((*param = (struct twa_param_9k *) 2320 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) { 2321 rv = ENOMEM; 2322 goto out; 2323 } 2324 2325 memset(*param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2326 tr->tr_data = *param; 2327 tr->tr_length = TWA_SECTOR_SIZE; 2328 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2329 2330 /* Build the cmd pkt. */ 2331 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2332 2333 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2334 2335 cmd->param.opcode = TWA_OP_GET_PARAM; 2336 cmd->param.sgl_offset = 2; 2337 cmd->param.size = 2; 2338 cmd->param.request_id = tr->tr_request_id; 2339 cmd->param.unit = 0; 2340 cmd->param.param_count = 1; 2341 2342 /* Specify which parameter we need. */ 2343 (*param)->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2344 (*param)->parameter_id = param_id; 2345 (*param)->parameter_size_bytes = param_size; 2346 2347 /* Submit the command. */ 2348 if (callback == NULL) { 2349 /* There's no call back; wait till the command completes. */ 2350 rv = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2351 2352 if (rv != 0) 2353 goto out; 2354 2355 if ((rv = cmd->param.status) != 0) { 2356 /* twa_drain_complete_queue will have done the unmapping */ 2357 goto out; 2358 } 2359 twa_release_request(tr); 2360 return (rv); 2361 } else { 2362 /* There's a call back. Simply submit the command. */ 2363 tr->tr_callback = callback; 2364 rv = twa_map_request(tr); 2365 return (rv); 2366 } 2367 out: 2368 if (tr) 2369 twa_release_request(tr); 2370 return(rv); 2371 } 2372 2373 /* 2374 * Function name: twa_set_param 2375 * Description: Set a firmware parameter. 2376 * 2377 * Input: sc -- ptr to per ctlr structure 2378 * table_id -- parameter table # 2379 * param_id -- index of the parameter in the table 2380 * param_size -- size of the parameter in bytes 2381 * callback -- ptr to function, if any, to be called 2382 * back on completion; NULL if no callback. 2383 * Output: None 2384 * Return value: 0 -- success 2385 * non-zero-- failure 2386 */ 2387 static int 2388 twa_set_param(struct twa_softc *sc, int table_id, int param_id, int param_size, 2389 void *data, void (* callback)(struct twa_request *tr)) 2390 { 2391 struct twa_request *tr; 2392 union twa_command_7k *cmd; 2393 struct twa_param_9k *param = NULL; 2394 int error = ENOMEM; 2395 2396 tr = twa_get_request(sc, 0); 2397 if (tr == NULL) 2398 return (EAGAIN); 2399 2400 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2401 2402 /* Allocate memory to send data using. */ 2403 if ((param = (struct twa_param_9k *) 2404 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) 2405 goto out; 2406 memset(param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2407 tr->tr_data = param; 2408 tr->tr_length = TWA_SECTOR_SIZE; 2409 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2410 2411 /* Build the cmd pkt. */ 2412 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2413 2414 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2415 2416 cmd->param.opcode = TWA_OP_SET_PARAM; 2417 cmd->param.sgl_offset = 2; 2418 cmd->param.size = 2; 2419 cmd->param.request_id = tr->tr_request_id; 2420 cmd->param.unit = 0; 2421 cmd->param.param_count = 1; 2422 2423 /* Specify which parameter we want to set. */ 2424 param->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2425 param->parameter_id = param_id; 2426 param->parameter_size_bytes = param_size; 2427 memcpy(param->data, data, param_size); 2428 2429 /* Submit the command. */ 2430 if (callback == NULL) { 2431 /* There's no call back; wait till the command completes. */ 2432 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2433 if (error == ETIMEDOUT) 2434 /* clean-up done by twa_immediate_request */ 2435 return(error); 2436 if (error) 2437 goto out; 2438 if ((error = cmd->param.status)) { 2439 /* 2440 * twa_drain_complete_queue will have done the 2441 * unmapping. 2442 */ 2443 goto out; 2444 } 2445 free(param, M_DEVBUF); 2446 twa_release_request(tr); 2447 return(error); 2448 } else { 2449 /* There's a call back. Simply submit the command. */ 2450 tr->tr_callback = callback; 2451 if ((error = twa_map_request(tr))) 2452 goto out; 2453 2454 return (0); 2455 } 2456 out: 2457 if (param) 2458 free(param, M_DEVBUF); 2459 if (tr) 2460 twa_release_request(tr); 2461 return(error); 2462 } 2463 2464 /* 2465 * Function name: twa_init_connection 2466 * Description: Send init_connection cmd to firmware 2467 * 2468 * Input: sc -- ptr to per ctlr structure 2469 * message_credits -- max # of requests that we might send 2470 * down simultaneously. This will be 2471 * typically set to 256 at init-time or 2472 * after a reset, and to 1 at shutdown-time 2473 * set_features -- indicates if we intend to use 64-bit 2474 * sg, also indicates if we want to do a 2475 * basic or an extended init_connection; 2476 * 2477 * Note: The following input/output parameters are valid, only in case of an 2478 * extended init_connection: 2479 * 2480 * current_fw_srl -- srl of fw we are bundled 2481 * with, if any; 0 otherwise 2482 * current_fw_arch_id -- arch_id of fw we are bundled 2483 * with, if any; 0 otherwise 2484 * current_fw_branch -- branch # of fw we are bundled 2485 * with, if any; 0 otherwise 2486 * current_fw_build -- build # of fw we are bundled 2487 * with, if any; 0 otherwise 2488 * Output: fw_on_ctlr_srl -- srl of fw on ctlr 2489 * fw_on_ctlr_arch_id -- arch_id of fw on ctlr 2490 * fw_on_ctlr_branch -- branch # of fw on ctlr 2491 * fw_on_ctlr_build -- build # of fw on ctlr 2492 * init_connect_result -- result bitmap of fw response 2493 * Return value: 0 -- success 2494 * non-zero-- failure 2495 */ 2496 static int 2497 twa_init_connection(struct twa_softc *sc, uint16_t message_credits, 2498 uint32_t set_features, uint16_t current_fw_srl, 2499 uint16_t current_fw_arch_id, uint16_t current_fw_branch, 2500 uint16_t current_fw_build, uint16_t *fw_on_ctlr_srl, 2501 uint16_t *fw_on_ctlr_arch_id, uint16_t *fw_on_ctlr_branch, 2502 uint16_t *fw_on_ctlr_build, uint32_t *init_connect_result) 2503 { 2504 struct twa_request *tr; 2505 struct twa_command_init_connect *init_connect; 2506 int error = 1; 2507 2508 /* Get a request packet. */ 2509 if ((tr = twa_get_request(sc, 0)) == NULL) 2510 goto out; 2511 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2512 /* Build the cmd pkt. */ 2513 init_connect = &(tr->tr_command->command.cmd_pkt_7k.init_connect); 2514 2515 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2516 2517 init_connect->opcode = TWA_OP_INIT_CONNECTION; 2518 init_connect->request_id = tr->tr_request_id; 2519 init_connect->message_credits = message_credits; 2520 init_connect->features = set_features; 2521 if (TWA_64BIT_ADDRESSES) 2522 init_connect->features |= TWA_64BIT_SG_ADDRESSES; 2523 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2524 /* 2525 * Fill in the extra fields needed for 2526 * an extended init_connect. 2527 */ 2528 init_connect->size = 6; 2529 init_connect->fw_srl = current_fw_srl; 2530 init_connect->fw_arch_id = current_fw_arch_id; 2531 init_connect->fw_branch = current_fw_branch; 2532 } else 2533 init_connect->size = 3; 2534 2535 /* Submit the command, and wait for it to complete. */ 2536 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2537 if (error == ETIMEDOUT) 2538 return(error); /* clean-up done by twa_immediate_request */ 2539 if (error) 2540 goto out; 2541 if ((error = init_connect->status)) { 2542 /* twa_drain_complete_queue will have done the unmapping */ 2543 goto out; 2544 } 2545 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2546 *fw_on_ctlr_srl = init_connect->fw_srl; 2547 *fw_on_ctlr_arch_id = init_connect->fw_arch_id; 2548 *fw_on_ctlr_branch = init_connect->fw_branch; 2549 *fw_on_ctlr_build = init_connect->fw_build; 2550 *init_connect_result = init_connect->result; 2551 } 2552 twa_release_request(tr); 2553 return(error); 2554 2555 out: 2556 if (tr) 2557 twa_release_request(tr); 2558 return(error); 2559 } 2560 2561 static int 2562 twa_reset(struct twa_softc *sc) 2563 { 2564 int s; 2565 int error = 0; 2566 2567 /* Set the 'in reset' flag. */ 2568 sc->twa_sc_flags |= TWA_STATE_IN_RESET; 2569 2570 /* 2571 * Disable interrupts from the controller, and mask any 2572 * accidental entry into our interrupt handler. 2573 */ 2574 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2575 TWA_CONTROL_DISABLE_INTERRUPTS); 2576 2577 s = splbio(); 2578 2579 /* Soft reset the controller. */ 2580 if ((error = twa_soft_reset(sc))) 2581 goto out; 2582 2583 /* Re-establish logical connection with the controller. */ 2584 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 2585 0, 0, 0, 0, 0, 2586 NULL, NULL, NULL, NULL, NULL))) { 2587 goto out; 2588 } 2589 /* 2590 * Complete all requests in the complete queue; error back all requests 2591 * in the busy queue. Any internal requests will be simply freed. 2592 * Re-submit any requests in the pending queue. 2593 */ 2594 twa_drain_busy_queue(sc); 2595 2596 out: 2597 splx(s); 2598 /* 2599 * Enable interrupts, and also clear attention and response interrupts. 2600 */ 2601 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2602 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2603 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 2604 TWA_CONTROL_ENABLE_INTERRUPTS); 2605 2606 /* Clear the 'in reset' flag. */ 2607 sc->twa_sc_flags &= ~TWA_STATE_IN_RESET; 2608 2609 return(error); 2610 } 2611 2612 static int 2613 twa_soft_reset(struct twa_softc *sc) 2614 { 2615 uint32_t status_reg; 2616 2617 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2618 TWA_CONTROL_ISSUE_SOFT_RESET | 2619 TWA_CONTROL_CLEAR_HOST_INTERRUPT | 2620 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2621 TWA_CONTROL_MASK_COMMAND_INTERRUPT | 2622 TWA_CONTROL_MASK_RESPONSE_INTERRUPT | 2623 TWA_CONTROL_DISABLE_INTERRUPTS); 2624 2625 if (twa_drain_response_queue_large(sc, 30) != 0) { 2626 aprint_error_dev(sc->twa_dv, 2627 "response queue not empty after reset.\n"); 2628 return(1); 2629 } 2630 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY | 2631 TWA_STATUS_ATTENTION_INTERRUPT, 30)) { 2632 aprint_error_dev(sc->twa_dv, "no attention interrupt after reset.\n"); 2633 return(1); 2634 } 2635 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2636 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 2637 2638 if (twa_drain_response_queue(sc)) { 2639 aprint_error_dev(sc->twa_dv, "cannot drain response queue.\n"); 2640 return(1); 2641 } 2642 if (twa_drain_aen_queue(sc)) { 2643 aprint_error_dev(sc->twa_dv, "cannot drain AEN queue.\n"); 2644 return(1); 2645 } 2646 if (twa_find_aen(sc, TWA_AEN_SOFT_RESET)) { 2647 aprint_error_dev(sc->twa_dv, "reset not reported by controller.\n"); 2648 return(1); 2649 } 2650 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2651 if (TWA_STATUS_ERRORS(status_reg) || 2652 twa_check_ctlr_state(sc, status_reg)) { 2653 aprint_error_dev(sc->twa_dv, "controller errors detected.\n"); 2654 return(1); 2655 } 2656 return(0); 2657 } 2658 2659 static int 2660 twa_wait_status(struct twa_softc *sc, uint32_t status, uint32_t timeout) 2661 { 2662 struct timeval t1; 2663 time_t end_time; 2664 uint32_t status_reg; 2665 2666 timeout = (timeout * 1000 * 100); 2667 2668 microtime(&t1); 2669 2670 end_time = t1.tv_usec + timeout; 2671 2672 do { 2673 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2674 /* got the required bit(s)? */ 2675 if ((status_reg & status) == status) 2676 return(0); 2677 DELAY(100000); 2678 microtime(&t1); 2679 } while (t1.tv_usec <= end_time); 2680 2681 return(1); 2682 } 2683 2684 static int 2685 twa_fetch_aen(struct twa_softc *sc) 2686 { 2687 struct twa_request *tr; 2688 int s, error = 0; 2689 2690 s = splbio(); 2691 2692 if ((tr = twa_get_request(sc, TWA_CMD_AEN)) == NULL) { 2693 splx(s); 2694 return(EIO); 2695 } 2696 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2697 tr->tr_callback = twa_aen_callback; 2698 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 2699 if (twa_request_sense(tr, 0) != 0) { 2700 if (tr->tr_data) 2701 free(tr->tr_data, M_DEVBUF); 2702 twa_release_request(tr); 2703 error = 1; 2704 } 2705 splx(s); 2706 2707 return(error); 2708 } 2709 2710 /* 2711 * Function name: twa_aen_callback 2712 * Description: Callback for requests to fetch AEN's. 2713 * 2714 * Input: tr -- ptr to completed request pkt 2715 * Output: None 2716 * Return value: None 2717 */ 2718 static void 2719 twa_aen_callback(struct twa_request *tr) 2720 { 2721 int i; 2722 int fetch_more_aens = 0; 2723 struct twa_softc *sc = tr->tr_sc; 2724 struct twa_command_header *cmd_hdr = 2725 (struct twa_command_header *)(tr->tr_data); 2726 struct twa_command_9k *cmd = 2727 &(tr->tr_command->command.cmd_pkt_9k); 2728 2729 if (! cmd->status) { 2730 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) && 2731 (cmd->cdb[0] == 0x3 /* REQUEST_SENSE */)) 2732 if (twa_enqueue_aen(sc, cmd_hdr) 2733 != TWA_AEN_QUEUE_EMPTY) 2734 fetch_more_aens = 1; 2735 } else { 2736 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2737 for (i = 0; i < 18; i++) 2738 printf("%x\t", tr->tr_command->cmd_hdr.sense_data[i]); 2739 2740 printf(""); /* print new line */ 2741 2742 for (i = 0; i < 128; i++) 2743 printf("%x\t", ((int8_t *)(tr->tr_data))[i]); 2744 } 2745 if (tr->tr_data) 2746 free(tr->tr_data, M_DEVBUF); 2747 twa_release_request(tr); 2748 2749 if (fetch_more_aens) 2750 twa_fetch_aen(sc); 2751 } 2752 2753 /* 2754 * Function name: twa_enqueue_aen 2755 * Description: Queues AEN's to be supplied to user-space tools on request. 2756 * 2757 * Input: sc -- ptr to per ctlr structure 2758 * cmd_hdr -- ptr to hdr of fw cmd pkt, from where the AEN 2759 * details can be retrieved. 2760 * Output: None 2761 * Return value: None 2762 */ 2763 static uint16_t 2764 twa_enqueue_aen(struct twa_softc *sc, struct twa_command_header *cmd_hdr) 2765 { 2766 int rv, s; 2767 struct tw_cl_event_packet *event; 2768 uint16_t aen_code; 2769 unsigned long sync_time; 2770 2771 s = splbio(); 2772 aen_code = cmd_hdr->status_block.error; 2773 2774 switch (aen_code) { 2775 case TWA_AEN_SYNC_TIME_WITH_HOST: 2776 2777 sync_time = (time_second - (3 * 86400)) % 604800; 2778 rv = twa_set_param(sc, TWA_PARAM_TIME_TABLE, 2779 TWA_PARAM_TIME_SchedulerTime, 4, 2780 &sync_time, twa_aen_callback); 2781 #ifdef DIAGNOSTIC 2782 if (rv != 0) 2783 aprint_error_dev(sc->twa_dv, "unable to sync time with ctlr\n"); 2784 #endif 2785 break; 2786 2787 case TWA_AEN_QUEUE_EMPTY: 2788 break; 2789 2790 default: 2791 /* Queue the event. */ 2792 event = sc->twa_aen_queue[sc->twa_aen_head]; 2793 if (event->retrieved == TWA_AEN_NOT_RETRIEVED) 2794 sc->twa_aen_queue_overflow = TRUE; 2795 event->severity = 2796 cmd_hdr->status_block.substatus_block.severity; 2797 event->time_stamp_sec = time_second; 2798 event->aen_code = aen_code; 2799 event->retrieved = TWA_AEN_NOT_RETRIEVED; 2800 event->sequence_id = ++(sc->twa_current_sequence_id); 2801 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2802 event->parameter_len = strlen(cmd_hdr->err_specific_desc); 2803 memcpy(event->parameter_data, cmd_hdr->err_specific_desc, 2804 event->parameter_len); 2805 2806 if (event->severity < TWA_AEN_SEVERITY_DEBUG) { 2807 printf("%s: AEN 0x%04X: %s: %s: %s\n", 2808 device_xname(sc->twa_dv), 2809 aen_code, 2810 twa_aen_severity_table[event->severity], 2811 twa_find_msg_string(twa_aen_table, aen_code), 2812 event->parameter_data); 2813 } 2814 2815 if ((sc->twa_aen_head + 1) == TWA_Q_LENGTH) 2816 sc->twa_aen_queue_wrapped = TRUE; 2817 sc->twa_aen_head = (sc->twa_aen_head + 1) % TWA_Q_LENGTH; 2818 break; 2819 } /* switch */ 2820 splx(s); 2821 2822 return (aen_code); 2823 } 2824 2825 /* 2826 * Function name: twa_find_aen 2827 * Description: Reports whether a given AEN ever occurred. 2828 * 2829 * Input: sc -- ptr to per ctlr structure 2830 * aen_code-- AEN to look for 2831 * Output: None 2832 * Return value: 0 -- success 2833 * non-zero-- failure 2834 */ 2835 static int 2836 twa_find_aen(struct twa_softc *sc, uint16_t aen_code) 2837 { 2838 uint32_t last_index; 2839 int s; 2840 int i; 2841 2842 s = splbio(); 2843 2844 if (sc->twa_aen_queue_wrapped) 2845 last_index = sc->twa_aen_head; 2846 else 2847 last_index = 0; 2848 2849 i = sc->twa_aen_head; 2850 do { 2851 i = (i + TWA_Q_LENGTH - 1) % TWA_Q_LENGTH; 2852 if ((sc->twa_aen_queue[i])->aen_code == aen_code) { 2853 splx(s); 2854 return(0); 2855 } 2856 } while (i != last_index); 2857 2858 splx(s); 2859 return(1); 2860 } 2861 2862 static inline void 2863 twa_request_init(struct twa_request *tr, int flags) 2864 { 2865 tr->tr_data = NULL; 2866 tr->tr_real_data = NULL; 2867 tr->tr_length = 0; 2868 tr->tr_real_length = 0; 2869 tr->tr_status = TWA_CMD_SETUP;/* command is in setup phase */ 2870 tr->tr_flags = flags; 2871 tr->tr_error = 0; 2872 tr->tr_callback = NULL; 2873 tr->tr_cmd_pkt_type = 0; 2874 tr->bp = 0; 2875 2876 /* 2877 * Look at the status field in the command packet to see how 2878 * it completed the last time it was used, and zero out only 2879 * the portions that might have changed. Note that we don't 2880 * care to zero out the sglist. 2881 */ 2882 if (tr->tr_command->command.cmd_pkt_9k.status) 2883 memset(tr->tr_command, 0, 2884 sizeof(struct twa_command_header) + 28); 2885 else 2886 memset(&(tr->tr_command->command), 0, 28); 2887 } 2888 2889 struct twa_request * 2890 twa_get_request_wait(struct twa_softc *sc, int flags) 2891 { 2892 struct twa_request *tr; 2893 int s; 2894 2895 KASSERT((flags & TWA_CMD_AEN) == 0); 2896 2897 s = splbio(); 2898 while ((tr = TAILQ_FIRST(&sc->twa_free)) == NULL) { 2899 sc->twa_sc_flags |= TWA_STATE_REQUEST_WAIT; 2900 (void) tsleep(&sc->twa_free, PRIBIO, "twaccb", hz); 2901 } 2902 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2903 2904 splx(s); 2905 2906 twa_request_init(tr, flags); 2907 2908 return(tr); 2909 } 2910 2911 struct twa_request * 2912 twa_get_request(struct twa_softc *sc, int flags) 2913 { 2914 int s; 2915 struct twa_request *tr; 2916 2917 /* Get a free request packet. */ 2918 s = splbio(); 2919 if (__predict_false((flags & TWA_CMD_AEN) != 0)) { 2920 2921 if ((sc->sc_twa_request->tr_flags & TWA_CMD_AEN_BUSY) == 0) { 2922 tr = sc->sc_twa_request; 2923 flags |= TWA_CMD_AEN_BUSY; 2924 } else { 2925 splx(s); 2926 return (NULL); 2927 } 2928 } else { 2929 if (__predict_false((tr = 2930 TAILQ_FIRST(&sc->twa_free)) == NULL)) { 2931 splx(s); 2932 return (NULL); 2933 } 2934 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2935 } 2936 splx(s); 2937 2938 twa_request_init(tr, flags); 2939 2940 return(tr); 2941 } 2942 2943 /* 2944 * Print some information about the controller 2945 */ 2946 static void 2947 twa_describe_controller(struct twa_softc *sc) 2948 { 2949 struct twa_param_9k *p[10]; 2950 int i, rv = 0; 2951 uint32_t dsize; 2952 uint8_t ports; 2953 2954 memset(p, sizeof(struct twa_param_9k *), 10); 2955 2956 /* Get the port count. */ 2957 rv |= twa_get_param(sc, TWA_PARAM_CONTROLLER, 2958 TWA_PARAM_CONTROLLER_PortCount, 1, NULL, &p[0]); 2959 2960 /* get version strings */ 2961 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_FW, 2962 16, NULL, &p[1]); 2963 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_BIOS, 2964 16, NULL, &p[2]); 2965 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_Mon, 2966 16, NULL, &p[3]); 2967 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCBA, 2968 8, NULL, &p[4]); 2969 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_ATA, 2970 8, NULL, &p[5]); 2971 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCI, 2972 8, NULL, &p[6]); 2973 rv |= twa_get_param(sc, TWA_PARAM_DRIVESUMMARY, TWA_PARAM_DRIVESTATUS, 2974 16, NULL, &p[7]); 2975 2976 if (rv) { 2977 /* some error occurred */ 2978 aprint_error_dev(sc->twa_dv, "failed to fetch version information\n"); 2979 goto bail; 2980 } 2981 2982 ports = *(uint8_t *)(p[0]->data); 2983 2984 aprint_normal_dev(sc->twa_dv, "%d ports, Firmware %.16s, BIOS %.16s\n", 2985 ports, p[1]->data, p[2]->data); 2986 2987 aprint_verbose_dev(sc->twa_dv, "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 2988 p[3]->data, p[4]->data, 2989 p[5]->data, p[6]->data); 2990 2991 for (i = 0; i < ports; i++) { 2992 2993 if ((*((char *)(p[7]->data + i)) & TWA_DRIVE_DETECTED) == 0) 2994 continue; 2995 2996 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 2997 TWA_PARAM_DRIVEMODELINDEX, 2998 TWA_PARAM_DRIVEMODEL_LENGTH, NULL, &p[8]); 2999 3000 if (rv != 0) { 3001 aprint_error_dev(sc->twa_dv, "unable to get drive model for port" 3002 " %d\n", i); 3003 continue; 3004 } 3005 3006 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 3007 TWA_PARAM_DRIVESIZEINDEX, 3008 TWA_PARAM_DRIVESIZE_LENGTH, NULL, &p[9]); 3009 3010 if (rv != 0) { 3011 aprint_error_dev(sc->twa_dv, "unable to get drive size" 3012 " for port %d\n", i); 3013 free(p[8], M_DEVBUF); 3014 continue; 3015 } 3016 3017 dsize = *(uint32_t *)(p[9]->data); 3018 3019 aprint_verbose_dev(sc->twa_dv, "port %d: %.40s %d MB\n", 3020 i, p[8]->data, dsize / 2048); 3021 3022 if (p[8]) 3023 free(p[8], M_DEVBUF); 3024 if (p[9]) 3025 free(p[9], M_DEVBUF); 3026 } 3027 bail: 3028 if (p[0]) 3029 free(p[0], M_DEVBUF); 3030 if (p[1]) 3031 free(p[1], M_DEVBUF); 3032 if (p[2]) 3033 free(p[2], M_DEVBUF); 3034 if (p[3]) 3035 free(p[3], M_DEVBUF); 3036 if (p[4]) 3037 free(p[4], M_DEVBUF); 3038 if (p[5]) 3039 free(p[5], M_DEVBUF); 3040 if (p[6]) 3041 free(p[6], M_DEVBUF); 3042 } 3043 3044 /* 3045 * Function name: twa_check_ctlr_state 3046 * Description: Makes sure that the fw status register reports a 3047 * proper status. 3048 * 3049 * Input: sc -- ptr to per ctlr structure 3050 * status_reg -- value in the status register 3051 * Output: None 3052 * Return value: 0 -- no errors 3053 * non-zero-- errors 3054 */ 3055 static int 3056 twa_check_ctlr_state(struct twa_softc *sc, uint32_t status_reg) 3057 { 3058 int result = 0; 3059 struct timeval t1; 3060 static time_t last_warning[2] = {0, 0}; 3061 3062 /* Check if the 'micro-controller ready' bit is not set. */ 3063 if ((status_reg & TWA_STATUS_EXPECTED_BITS) != 3064 TWA_STATUS_EXPECTED_BITS) { 3065 3066 microtime(&t1); 3067 3068 last_warning[0] += (5 * 1000 * 100); 3069 3070 if (t1.tv_usec > last_warning[0]) { 3071 microtime(&t1); 3072 last_warning[0] = t1.tv_usec; 3073 } 3074 result = 1; 3075 } 3076 3077 /* Check if any error bits are set. */ 3078 if ((status_reg & TWA_STATUS_UNEXPECTED_BITS) != 0) { 3079 3080 microtime(&t1); 3081 last_warning[1] += (5 * 1000 * 100); 3082 if (t1.tv_usec > last_warning[1]) { 3083 microtime(&t1); 3084 last_warning[1] = t1.tv_usec; 3085 } 3086 if (status_reg & TWA_STATUS_PCI_PARITY_ERROR_INTERRUPT) { 3087 aprint_error_dev(sc->twa_dv, "clearing PCI parity error " 3088 "re-seat/move/replace card.\n"); 3089 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3090 TWA_CONTROL_CLEAR_PARITY_ERROR); 3091 pci_conf_write(sc->pc, sc->tag, 3092 PCI_COMMAND_STATUS_REG, 3093 TWA_PCI_CONFIG_CLEAR_PARITY_ERROR); 3094 } 3095 if (status_reg & TWA_STATUS_PCI_ABORT_INTERRUPT) { 3096 aprint_error_dev(sc->twa_dv, "clearing PCI abort\n"); 3097 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3098 TWA_CONTROL_CLEAR_PCI_ABORT); 3099 pci_conf_write(sc->pc, sc->tag, 3100 PCI_COMMAND_STATUS_REG, 3101 TWA_PCI_CONFIG_CLEAR_PCI_ABORT); 3102 } 3103 if (status_reg & TWA_STATUS_QUEUE_ERROR_INTERRUPT) { 3104 /* 3105 * As documented by 3ware, the 9650 erroneously 3106 * flags queue errors during resets. 3107 * Just ignore them during the reset instead of 3108 * bothering the console. 3109 */ 3110 if ((sc->sc_product_id != PCI_PRODUCT_3WARE_9650) || 3111 ((sc->twa_sc_flags & TWA_STATE_IN_RESET) == 0)) { 3112 aprint_error_dev(sc->twa_dv, 3113 "clearing controller queue error\n"); 3114 } 3115 3116 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3117 TWA_CONTROL_CLEAR_QUEUE_ERROR); 3118 } 3119 if (status_reg & TWA_STATUS_MICROCONTROLLER_ERROR) { 3120 aprint_error_dev(sc->twa_dv, "micro-controller error\n"); 3121 result = 1; 3122 } 3123 } 3124 return(result); 3125 } 3126