xref: /netbsd-src/sys/dev/pci/twa.c (revision cbf5c65aff7a9fb3766c02a179c5c934c4485837)
1*cbf5c65aSandvar /*	$NetBSD: twa.c,v 1.61 2021/12/10 20:36:04 andvar Exp $ */
27cfa6f22Swrstuden /*	$wasabi: twa.c,v 1.27 2006/07/28 18:17:21 wrstuden Exp $	*/
3a4dd1e26Swrstuden 
4a4dd1e26Swrstuden /*-
5a4dd1e26Swrstuden  * Copyright (c) 2004 The NetBSD Foundation, Inc.
6a4dd1e26Swrstuden  * All rights reserved.
7a4dd1e26Swrstuden  *
8a4dd1e26Swrstuden  * This code is derived from software contributed to The NetBSD Foundation
9a4dd1e26Swrstuden  * by Jordan Rhody of Wasabi Systems, Inc.
10a4dd1e26Swrstuden  *
11a4dd1e26Swrstuden  * Redistribution and use in source and binary forms, with or without
12a4dd1e26Swrstuden  * modification, are permitted provided that the following conditions
13a4dd1e26Swrstuden  * are met:
14a4dd1e26Swrstuden  * 1. Redistributions of source code must retain the above copyright
15a4dd1e26Swrstuden  *    notice, this list of conditions and the following disclaimer.
16a4dd1e26Swrstuden  * 2. Redistributions in binary form must reproduce the above copyright
17a4dd1e26Swrstuden  *    notice, this list of conditions and the following disclaimer in the
18a4dd1e26Swrstuden  *    documentation and/or other materials provided with the distribution.
19a4dd1e26Swrstuden  *
20a4dd1e26Swrstuden  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21a4dd1e26Swrstuden  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22a4dd1e26Swrstuden  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23a4dd1e26Swrstuden  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24a4dd1e26Swrstuden  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25a4dd1e26Swrstuden  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26a4dd1e26Swrstuden  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27a4dd1e26Swrstuden  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28a4dd1e26Swrstuden  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29a4dd1e26Swrstuden  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30a4dd1e26Swrstuden  * POSSIBILITY OF SUCH DAMAGE.
31a4dd1e26Swrstuden  */
32a4dd1e26Swrstuden 
33a4dd1e26Swrstuden /*-
34a4dd1e26Swrstuden  * Copyright (c) 2003-04 3ware, Inc.
35a4dd1e26Swrstuden  * Copyright (c) 2000 Michael Smith
36a4dd1e26Swrstuden  * Copyright (c) 2000 BSDi
37a4dd1e26Swrstuden  * All rights reserved.
38a4dd1e26Swrstuden  *
39a4dd1e26Swrstuden  * Redistribution and use in source and binary forms, with or without
40a4dd1e26Swrstuden  * modification, are permitted provided that the following conditions
41a4dd1e26Swrstuden  * are met:
42a4dd1e26Swrstuden  * 1. Redistributions of source code must retain the above copyright
43a4dd1e26Swrstuden  *    notice, this list of conditions and the following disclaimer.
44a4dd1e26Swrstuden  * 2. Redistributions in binary form must reproduce the above copyright
45a4dd1e26Swrstuden  *    notice, this list of conditions and the following disclaimer in the
46a4dd1e26Swrstuden  *    documentation and/or other materials provided with the distribution.
47a4dd1e26Swrstuden  *
48a4dd1e26Swrstuden  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
49a4dd1e26Swrstuden  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
50a4dd1e26Swrstuden  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
51a4dd1e26Swrstuden  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
52a4dd1e26Swrstuden  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
53a4dd1e26Swrstuden  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
54a4dd1e26Swrstuden  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
55a4dd1e26Swrstuden  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
56a4dd1e26Swrstuden  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
57a4dd1e26Swrstuden  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
58a4dd1e26Swrstuden  * SUCH DAMAGE.
59a4dd1e26Swrstuden  *
60a4dd1e26Swrstuden  *	$FreeBSD: src/sys/dev/twa/twa.c,v 1.2 2004/04/02 15:09:57 des Exp $
61a4dd1e26Swrstuden  */
62a4dd1e26Swrstuden 
63a4dd1e26Swrstuden /*
64a4dd1e26Swrstuden  * 3ware driver for 9000 series storage controllers.
65a4dd1e26Swrstuden  *
66a4dd1e26Swrstuden  * Author: Vinod Kashyap
67a4dd1e26Swrstuden  */
68a4dd1e26Swrstuden 
69a4dd1e26Swrstuden #include <sys/cdefs.h>
70*cbf5c65aSandvar __KERNEL_RCSID(0, "$NetBSD: twa.c,v 1.61 2021/12/10 20:36:04 andvar Exp $");
71d1934bddSjakllsch 
724dcc9e2fSmatt //#define TWA_DEBUG
73a4dd1e26Swrstuden 
74a4dd1e26Swrstuden #include <sys/param.h>
75a4dd1e26Swrstuden #include <sys/systm.h>
76a4dd1e26Swrstuden #include <sys/kernel.h>
77a4dd1e26Swrstuden #include <sys/device.h>
78a4dd1e26Swrstuden #include <sys/queue.h>
79a4dd1e26Swrstuden #include <sys/proc.h>
80b949192dSwrstuden #include <sys/bswap.h>
81a4dd1e26Swrstuden #include <sys/buf.h>
82a4dd1e26Swrstuden #include <sys/bufq.h>
83a4dd1e26Swrstuden #include <sys/endian.h>
84a4dd1e26Swrstuden #include <sys/malloc.h>
85a4dd1e26Swrstuden #include <sys/conf.h>
86a4dd1e26Swrstuden #include <sys/disk.h>
87e057d5fcSmanu #include <sys/sysctl.h>
88a4dd1e26Swrstuden #include <sys/syslog.h>
89916bdfa5Spgoyette #include <sys/module.h>
90a2a38285Sad #include <sys/bus.h>
91a4dd1e26Swrstuden 
92a4dd1e26Swrstuden #include <dev/pci/pcireg.h>
93a4dd1e26Swrstuden #include <dev/pci/pcivar.h>
94a4dd1e26Swrstuden #include <dev/pci/pcidevs.h>
95a4dd1e26Swrstuden #include <dev/pci/twareg.h>
96a4dd1e26Swrstuden #include <dev/pci/twavar.h>
97a4dd1e26Swrstuden #include <dev/pci/twaio.h>
98a4dd1e26Swrstuden 
99a4dd1e26Swrstuden #include <dev/scsipi/scsipi_all.h>
100a4dd1e26Swrstuden #include <dev/scsipi/scsipi_disk.h>
101a4dd1e26Swrstuden #include <dev/scsipi/scsipiconf.h>
102a4dd1e26Swrstuden #include <dev/scsipi/scsi_spc.h>
103a4dd1e26Swrstuden 
104a4dd1e26Swrstuden #include <dev/ldvar.h>
105a4dd1e26Swrstuden 
106a4dd1e26Swrstuden #include "locators.h"
107916bdfa5Spgoyette #include "ioconf.h"
108a4dd1e26Swrstuden 
109a4dd1e26Swrstuden #define	PCI_CBIO	0x10
110a4dd1e26Swrstuden 
111a4dd1e26Swrstuden static int	twa_fetch_aen(struct twa_softc *);
112a4dd1e26Swrstuden static void	twa_aen_callback(struct twa_request *);
1138c670781Ssimonb static int	twa_find_aen(struct twa_softc *sc, uint16_t);
114a4dd1e26Swrstuden static uint16_t	twa_enqueue_aen(struct twa_softc *sc,
115a4dd1e26Swrstuden 			struct twa_command_header *);
116a4dd1e26Swrstuden 
117a591bc88Scegger static void	twa_attach(device_t, device_t, void *);
118916bdfa5Spgoyette static int	twa_request_bus_scan(device_t, const char *, const int *);
119a4dd1e26Swrstuden static void	twa_shutdown(void *);
1208c670781Ssimonb static int	twa_init_connection(struct twa_softc *, uint16_t, uint32_t,
1218bc54e5bSmsaitoh 					uint16_t, uint16_t, uint16_t, uint16_t,
1228bc54e5bSmsaitoh 					uint16_t *, uint16_t *, uint16_t *,
1238bc54e5bSmsaitoh 					uint16_t *, uint32_t *);
124a4dd1e26Swrstuden static int	twa_intr(void *);
125a591bc88Scegger static int 	twa_match(device_t, cfdata_t, void *);
126a4dd1e26Swrstuden static int	twa_reset(struct twa_softc *);
127a4dd1e26Swrstuden 
128a4dd1e26Swrstuden static int	twa_print(void *, const char *);
129a4dd1e26Swrstuden static int	twa_soft_reset(struct twa_softc *);
130a4dd1e26Swrstuden 
1318c670781Ssimonb static int	twa_check_ctlr_state(struct twa_softc *, uint32_t);
132a4dd1e26Swrstuden static int	twa_get_param(struct twa_softc *, int, int, size_t,
133a4dd1e26Swrstuden 				void (* callback)(struct twa_request *),
134a4dd1e26Swrstuden 				struct twa_param_9k **);
135a4dd1e26Swrstuden static int 	twa_set_param(struct twa_softc *, int, int, int, void *,
136a4dd1e26Swrstuden 				void (* callback)(struct twa_request *));
137a4dd1e26Swrstuden static void	twa_describe_controller(struct twa_softc *);
1388c670781Ssimonb static int	twa_wait_status(struct twa_softc *, uint32_t, uint32_t);
139a4dd1e26Swrstuden static int	twa_done(struct twa_softc *);
140a4dd1e26Swrstuden 
141a4dd1e26Swrstuden extern struct	cfdriver twa_cd;
142a4dd1e26Swrstuden extern uint32_t twa_fw_img_size;
143a4dd1e26Swrstuden extern uint8_t	twa_fw_img[];
144a4dd1e26Swrstuden 
145916bdfa5Spgoyette CFATTACH_DECL3_NEW(twa, sizeof(struct twa_softc),
146916bdfa5Spgoyette     twa_match, twa_attach, NULL, NULL, twa_request_bus_scan, NULL, 0);
147a4dd1e26Swrstuden 
148e057d5fcSmanu /* FreeBSD driver revision for sysctl expected by the 3ware cli */
149e057d5fcSmanu const char twaver[] = "1.50.01.002";
150e057d5fcSmanu 
151a4dd1e26Swrstuden /* AEN messages. */
152a4dd1e26Swrstuden static const struct twa_message	twa_aen_table[] = {
153a4dd1e26Swrstuden 	{0x0000, "AEN queue empty"},
154a4dd1e26Swrstuden 	{0x0001, "Controller reset occurred"},
155a4dd1e26Swrstuden 	{0x0002, "Degraded unit detected"},
156*cbf5c65aSandvar 	{0x0003, "Controller error occurred"},
157a4dd1e26Swrstuden 	{0x0004, "Background rebuild failed"},
158a4dd1e26Swrstuden 	{0x0005, "Background rebuild done"},
159a4dd1e26Swrstuden 	{0x0006, "Incomplete unit detected"},
160a4dd1e26Swrstuden 	{0x0007, "Background initialize done"},
161a4dd1e26Swrstuden 	{0x0008, "Unclean shutdown detected"},
162a4dd1e26Swrstuden 	{0x0009, "Drive timeout detected"},
163a4dd1e26Swrstuden 	{0x000A, "Drive error detected"},
164a4dd1e26Swrstuden 	{0x000B, "Rebuild started"},
165a4dd1e26Swrstuden 	{0x000C, "Background initialize started"},
166a4dd1e26Swrstuden 	{0x000D, "Entire logical unit was deleted"},
167a4dd1e26Swrstuden 	{0x000E, "Background initialize failed"},
168a4dd1e26Swrstuden 	{0x000F, "SMART attribute exceeded threshold"},
169a4dd1e26Swrstuden 	{0x0010, "Power supply reported AC under range"},
170a4dd1e26Swrstuden 	{0x0011, "Power supply reported DC out of range"},
171a4dd1e26Swrstuden 	{0x0012, "Power supply reported a malfunction"},
172a4dd1e26Swrstuden 	{0x0013, "Power supply predicted malfunction"},
173a4dd1e26Swrstuden 	{0x0014, "Battery charge is below threshold"},
174a4dd1e26Swrstuden 	{0x0015, "Fan speed is below threshold"},
175a4dd1e26Swrstuden 	{0x0016, "Temperature sensor is above threshold"},
176a4dd1e26Swrstuden 	{0x0017, "Power supply was removed"},
177a4dd1e26Swrstuden 	{0x0018, "Power supply was inserted"},
178a4dd1e26Swrstuden 	{0x0019, "Drive was removed from a bay"},
179a4dd1e26Swrstuden 	{0x001A, "Drive was inserted into a bay"},
180a4dd1e26Swrstuden 	{0x001B, "Drive bay cover door was opened"},
181a4dd1e26Swrstuden 	{0x001C, "Drive bay cover door was closed"},
182a4dd1e26Swrstuden 	{0x001D, "Product case was opened"},
183a4dd1e26Swrstuden 	{0x0020, "Prepare for shutdown (power-off)"},
184a4dd1e26Swrstuden 	{0x0021, "Downgrade UDMA mode to lower speed"},
185a4dd1e26Swrstuden 	{0x0022, "Upgrade UDMA mode to higher speed"},
186a4dd1e26Swrstuden 	{0x0023, "Sector repair completed"},
187a4dd1e26Swrstuden 	{0x0024, "Sbuf memory test failed"},
188a4dd1e26Swrstuden 	{0x0025, "Error flushing cached write data to disk"},
189a4dd1e26Swrstuden 	{0x0026, "Drive reported data ECC error"},
190a4dd1e26Swrstuden 	{0x0027, "DCB has checksum error"},
191a4dd1e26Swrstuden 	{0x0028, "DCB version is unsupported"},
192a4dd1e26Swrstuden 	{0x0029, "Background verify started"},
193a4dd1e26Swrstuden 	{0x002A, "Background verify failed"},
194a4dd1e26Swrstuden 	{0x002B, "Background verify done"},
195a4dd1e26Swrstuden 	{0x002C, "Bad sector overwritten during rebuild"},
196d72a9bc7Sjoerg 	{0x002D, "Source drive error occurred"},
197a4dd1e26Swrstuden 	{0x002E, "Replace failed because replacement drive too small"},
198a4dd1e26Swrstuden 	{0x002F, "Verify failed because array was never initialized"},
199a4dd1e26Swrstuden 	{0x0030, "Unsupported ATA drive"},
200a4dd1e26Swrstuden 	{0x0031, "Synchronize host/controller time"},
201a4dd1e26Swrstuden 	{0x0032, "Spare capacity is inadequate for some units"},
202a4dd1e26Swrstuden 	{0x0033, "Background migration started"},
203a4dd1e26Swrstuden 	{0x0034, "Background migration failed"},
204a4dd1e26Swrstuden 	{0x0035, "Background migration done"},
205a4dd1e26Swrstuden 	{0x0036, "Verify detected and fixed data/parity mismatch"},
206a4dd1e26Swrstuden 	{0x0037, "SO-DIMM incompatible"},
207a4dd1e26Swrstuden 	{0x0038, "SO-DIMM not detected"},
208a4dd1e26Swrstuden 	{0x0039, "Corrected Sbuf ECC error"},
209a4dd1e26Swrstuden 	{0x003A, "Drive power on reset detected"},
210a4dd1e26Swrstuden 	{0x003B, "Background rebuild paused"},
211a4dd1e26Swrstuden 	{0x003C, "Background initialize paused"},
212a4dd1e26Swrstuden 	{0x003D, "Background verify paused"},
213a4dd1e26Swrstuden 	{0x003E, "Background migration paused"},
214a4dd1e26Swrstuden 	{0x003F, "Corrupt flash file system detected"},
215a4dd1e26Swrstuden 	{0x0040, "Flash file system repaired"},
216a4dd1e26Swrstuden 	{0x0041, "Unit number assignments were lost"},
217a4dd1e26Swrstuden 	{0x0042, "Error during read of primary DCB"},
218a4dd1e26Swrstuden 	{0x0043, "Latent error found in backup DCB"},
219a4dd1e26Swrstuden 	{0x0044, "Battery voltage is normal"},
220a4dd1e26Swrstuden 	{0x0045, "Battery voltage is low"},
221a4dd1e26Swrstuden 	{0x0046, "Battery voltage is high"},
222a4dd1e26Swrstuden 	{0x0047, "Battery voltage is too low"},
223a4dd1e26Swrstuden 	{0x0048, "Battery voltage is too high"},
224a4dd1e26Swrstuden 	{0x0049, "Battery temperature is normal"},
225a4dd1e26Swrstuden 	{0x004A, "Battery temperature is low"},
226a4dd1e26Swrstuden 	{0x004B, "Battery temperature is high"},
227a4dd1e26Swrstuden 	{0x004C, "Battery temperature is too low"},
228a4dd1e26Swrstuden 	{0x004D, "Battery temperature is too high"},
229a4dd1e26Swrstuden 	{0x004E, "Battery capacity test started"},
230a4dd1e26Swrstuden 	{0x004F, "Cache synchronization skipped"},
231a4dd1e26Swrstuden 	{0x0050, "Battery capacity test completed"},
232a4dd1e26Swrstuden 	{0x0051, "Battery health check started"},
233a4dd1e26Swrstuden 	{0x0052, "Battery health check completed"},
234d72a9bc7Sjoerg 	{0x0053, "Battery capacity test needed"},
235d72a9bc7Sjoerg 	{0x0054, "Battery charge termination voltage is at high level"},
236a4dd1e26Swrstuden 	{0x0055, "Battery charging started"},
237a4dd1e26Swrstuden 	{0x0056, "Battery charging completed"},
238a4dd1e26Swrstuden 	{0x0057, "Battery charging fault"},
239a4dd1e26Swrstuden 	{0x0058, "Battery capacity is below warning level"},
240a4dd1e26Swrstuden 	{0x0059, "Battery capacity is below error level"},
241a4dd1e26Swrstuden 	{0x005A, "Battery is present"},
242a4dd1e26Swrstuden 	{0x005B, "Battery is not present"},
243a4dd1e26Swrstuden 	{0x005C, "Battery is weak"},
244a4dd1e26Swrstuden 	{0x005D, "Battery health check failed"},
245a4dd1e26Swrstuden 	{0x005E, "Cache synchronized after power fail"},
246a4dd1e26Swrstuden 	{0x005F, "Cache synchronization failed; some data lost"},
247a4dd1e26Swrstuden 	{0x0060, "Bad cache meta data checksum"},
248a4dd1e26Swrstuden 	{0x0061, "Bad cache meta data signature"},
249a4dd1e26Swrstuden 	{0x0062, "Cache meta data restore failed"},
250a4dd1e26Swrstuden 	{0x0063, "BBU not found after power fail"},
251a4dd1e26Swrstuden 	{0x00FC, "Recovered/finished array membership update"},
252a4dd1e26Swrstuden 	{0x00FD, "Handler lockup"},
253a4dd1e26Swrstuden 	{0x00FE, "Retrying PCI transfer"},
254a4dd1e26Swrstuden 	{0x00FF, "AEN queue is full"},
2557f3d4048Splunky 	{0xFFFFFFFF, NULL}
256a4dd1e26Swrstuden };
257a4dd1e26Swrstuden 
258a4dd1e26Swrstuden /* AEN severity table. */
259a4dd1e26Swrstuden static const char	*twa_aen_severity_table[] = {
260a4dd1e26Swrstuden 	"None",
261a4dd1e26Swrstuden 	"ERROR",
262a4dd1e26Swrstuden 	"WARNING",
263a4dd1e26Swrstuden 	"INFO",
264a4dd1e26Swrstuden 	"DEBUG",
2657f3d4048Splunky 	NULL
266a4dd1e26Swrstuden };
267a4dd1e26Swrstuden 
268b3e3b5bdSjoerg #if 0
269a4dd1e26Swrstuden /* Error messages. */
270a4dd1e26Swrstuden static const struct twa_message	twa_error_table[] = {
271a4dd1e26Swrstuden 	{0x0100, "SGL entry contains zero data"},
272a4dd1e26Swrstuden 	{0x0101, "Invalid command opcode"},
273a4dd1e26Swrstuden 	{0x0102, "SGL entry has unaligned address"},
274a4dd1e26Swrstuden 	{0x0103, "SGL size does not match command"},
275a4dd1e26Swrstuden 	{0x0104, "SGL entry has illegal length"},
276a4dd1e26Swrstuden 	{0x0105, "Command packet is not aligned"},
277a4dd1e26Swrstuden 	{0x0106, "Invalid request ID"},
278a4dd1e26Swrstuden 	{0x0107, "Duplicate request ID"},
279a4dd1e26Swrstuden 	{0x0108, "ID not locked"},
280a4dd1e26Swrstuden 	{0x0109, "LBA out of range"},
281a4dd1e26Swrstuden 	{0x010A, "Logical unit not supported"},
282a4dd1e26Swrstuden 	{0x010B, "Parameter table does not exist"},
283a4dd1e26Swrstuden 	{0x010C, "Parameter index does not exist"},
284a4dd1e26Swrstuden 	{0x010D, "Invalid field in CDB"},
285a4dd1e26Swrstuden 	{0x010E, "Specified port has invalid drive"},
286a4dd1e26Swrstuden 	{0x010F, "Parameter item size mismatch"},
287a4dd1e26Swrstuden 	{0x0110, "Failed memory allocation"},
288a4dd1e26Swrstuden 	{0x0111, "Memory request too large"},
289a4dd1e26Swrstuden 	{0x0112, "Out of memory segments"},
290a4dd1e26Swrstuden 	{0x0113, "Invalid address to deallocate"},
291a4dd1e26Swrstuden 	{0x0114, "Out of memory"},
292a4dd1e26Swrstuden 	{0x0115, "Out of heap"},
293a4dd1e26Swrstuden 	{0x0120, "Double degrade"},
294a4dd1e26Swrstuden 	{0x0121, "Drive not degraded"},
295a4dd1e26Swrstuden 	{0x0122, "Reconstruct error"},
296a4dd1e26Swrstuden 	{0x0123, "Replace not accepted"},
297a4dd1e26Swrstuden 	{0x0124, "Replace drive capacity too small"},
298a4dd1e26Swrstuden 	{0x0125, "Sector count not allowed"},
299a4dd1e26Swrstuden 	{0x0126, "No spares left"},
300a4dd1e26Swrstuden 	{0x0127, "Reconstruct error"},
301a4dd1e26Swrstuden 	{0x0128, "Unit is offline"},
302a4dd1e26Swrstuden 	{0x0129, "Cannot update status to DCB"},
303a4dd1e26Swrstuden 	{0x0130, "Invalid stripe handle"},
304a4dd1e26Swrstuden 	{0x0131, "Handle that was not locked"},
305a4dd1e26Swrstuden 	{0x0132, "Handle that was not empy"},
306a4dd1e26Swrstuden 	{0x0133, "Handle has different owner"},
307a4dd1e26Swrstuden 	{0x0140, "IPR has parent"},
308a4dd1e26Swrstuden 	{0x0150, "Illegal Pbuf address alignment"},
309a4dd1e26Swrstuden 	{0x0151, "Illegal Pbuf transfer length"},
310a4dd1e26Swrstuden 	{0x0152, "Illegal Sbuf address alignment"},
311a4dd1e26Swrstuden 	{0x0153, "Illegal Sbuf transfer length"},
312a4dd1e26Swrstuden 	{0x0160, "Command packet too large"},
313a4dd1e26Swrstuden 	{0x0161, "SGL exceeds maximum length"},
314a4dd1e26Swrstuden 	{0x0162, "SGL has too many entries"},
315a4dd1e26Swrstuden 	{0x0170, "Insufficient resources for rebuilder"},
316a4dd1e26Swrstuden 	{0x0171, "Verify error (data != parity)"},
317a4dd1e26Swrstuden 	{0x0180, "Requested segment not in directory of this DCB"},
318a4dd1e26Swrstuden 	{0x0181, "DCB segment has unsupported version"},
319a4dd1e26Swrstuden 	{0x0182, "DCB segment has checksum error"},
320a4dd1e26Swrstuden 	{0x0183, "DCB support (settings) segment invalid"},
321a4dd1e26Swrstuden 	{0x0184, "DCB UDB (unit descriptor block) segment invalid"},
322a4dd1e26Swrstuden 	{0x0185, "DCB GUID (globally unique identifier) segment invalid"},
323a4dd1e26Swrstuden 	{0x01A0, "Could not clear Sbuf"},
324a4dd1e26Swrstuden 	{0x01C0, "Flash identify failed"},
325a4dd1e26Swrstuden 	{0x01C1, "Flash out of bounds"},
326a4dd1e26Swrstuden 	{0x01C2, "Flash verify error"},
327a4dd1e26Swrstuden 	{0x01C3, "Flash file object not found"},
328a4dd1e26Swrstuden 	{0x01C4, "Flash file already present"},
329a4dd1e26Swrstuden 	{0x01C5, "Flash file system full"},
330a4dd1e26Swrstuden 	{0x01C6, "Flash file not present"},
331a4dd1e26Swrstuden 	{0x01C7, "Flash file size error"},
332a4dd1e26Swrstuden 	{0x01C8, "Bad flash file checksum"},
333a4dd1e26Swrstuden 	{0x01CA, "Corrupt flash file system detected"},
334a4dd1e26Swrstuden 	{0x01D0, "Invalid field in parameter list"},
335a4dd1e26Swrstuden 	{0x01D1, "Parameter list length error"},
336a4dd1e26Swrstuden 	{0x01D2, "Parameter item is not changeable"},
337a4dd1e26Swrstuden 	{0x01D3, "Parameter item is not saveable"},
338a4dd1e26Swrstuden 	{0x0200, "UDMA CRC error"},
339a4dd1e26Swrstuden 	{0x0201, "Internal CRC error"},
340a4dd1e26Swrstuden 	{0x0202, "Data ECC error"},
341a4dd1e26Swrstuden 	{0x0203, "ADP level 1 error"},
342a4dd1e26Swrstuden 	{0x0204, "Port timeout"},
343a4dd1e26Swrstuden 	{0x0205, "Drive power on reset"},
344a4dd1e26Swrstuden 	{0x0206, "ADP level 2 error"},
345a4dd1e26Swrstuden 	{0x0207, "Soft reset failed"},
346a4dd1e26Swrstuden 	{0x0208, "Drive not ready"},
347a4dd1e26Swrstuden 	{0x0209, "Unclassified port error"},
348a4dd1e26Swrstuden 	{0x020A, "Drive aborted command"},
349a4dd1e26Swrstuden 	{0x0210, "Internal CRC error"},
350a4dd1e26Swrstuden 	{0x0211, "Host PCI bus abort"},
351a4dd1e26Swrstuden 	{0x0212, "Host PCI parity error"},
352a4dd1e26Swrstuden 	{0x0213, "Port handler error"},
353a4dd1e26Swrstuden 	{0x0214, "Token interrupt count error"},
354a4dd1e26Swrstuden 	{0x0215, "Timeout waiting for PCI transfer"},
355a4dd1e26Swrstuden 	{0x0216, "Corrected buffer ECC"},
356a4dd1e26Swrstuden 	{0x0217, "Uncorrected buffer ECC"},
357a4dd1e26Swrstuden 	{0x0230, "Unsupported command during flash recovery"},
358a4dd1e26Swrstuden 	{0x0231, "Next image buffer expected"},
359a4dd1e26Swrstuden 	{0x0232, "Binary image architecture incompatible"},
360a4dd1e26Swrstuden 	{0x0233, "Binary image has no signature"},
361a4dd1e26Swrstuden 	{0x0234, "Binary image has bad checksum"},
362a4dd1e26Swrstuden 	{0x0235, "Image downloaded overflowed buffer"},
363a4dd1e26Swrstuden 	{0x0240, "I2C device not found"},
364a4dd1e26Swrstuden 	{0x0241, "I2C transaction aborted"},
365a4dd1e26Swrstuden 	{0x0242, "SO-DIMM parameter(s) incompatible using defaults"},
366a4dd1e26Swrstuden 	{0x0243, "SO-DIMM unsupported"},
367a4dd1e26Swrstuden 	{0x0248, "SPI transfer status error"},
368a4dd1e26Swrstuden 	{0x0249, "SPI transfer timeout error"},
369a4dd1e26Swrstuden 	{0x0250, "Invalid unit descriptor size in CreateUnit"},
370a4dd1e26Swrstuden 	{0x0251, "Unit descriptor size exceeds data buffer in CreateUnit"},
371a4dd1e26Swrstuden 	{0x0252, "Invalid value in CreateUnit descriptor"},
372a4dd1e26Swrstuden 	{0x0253, "Inadequate disk space to support descriptor in CreateUnit"},
373a4dd1e26Swrstuden 	{0x0254, "Unable to create data channel for this unit descriptor"},
374a4dd1e26Swrstuden 	{0x0255, "CreateUnit descriptor specifies a drive already in use"},
375a4dd1e26Swrstuden 	{0x0256, "Unable to write configuration to all disks during CreateUnit"},
376a4dd1e26Swrstuden 	{0x0257, "CreateUnit does not support this descriptor version"},
377a4dd1e26Swrstuden 	{0x0258, "Invalid subunit for RAID 0 or 5 in CreateUnit"},
378a4dd1e26Swrstuden 	{0x0259, "Too many descriptors in CreateUnit"},
379a4dd1e26Swrstuden 	{0x025A, "Invalid configuration specified in CreateUnit descriptor"},
380a4dd1e26Swrstuden 	{0x025B, "Invalid LBA offset specified in CreateUnit descriptor"},
381a4dd1e26Swrstuden 	{0x025C, "Invalid stripelet size specified in CreateUnit descriptor"},
382a4dd1e26Swrstuden 	{0x0260, "SMART attribute exceeded threshold"},
3837f3d4048Splunky 	{0xFFFFFFFF, NULL}
384a4dd1e26Swrstuden };
385b3e3b5bdSjoerg #endif
386a4dd1e26Swrstuden 
387a4dd1e26Swrstuden struct twa_pci_identity {
388a4dd1e26Swrstuden 	uint32_t	vendor_id;
389a4dd1e26Swrstuden 	uint32_t	product_id;
390a4dd1e26Swrstuden 	const char	*name;
391a4dd1e26Swrstuden };
392a4dd1e26Swrstuden 
3937433c417Schs static const struct twa_pci_identity twa_pci_products[] = {
394a4dd1e26Swrstuden 	{ PCI_VENDOR_3WARE,
395a4dd1e26Swrstuden 	  PCI_PRODUCT_3WARE_9000,
396a4dd1e26Swrstuden 	  "3ware 9000 series",
397a4dd1e26Swrstuden 	},
398a4dd1e26Swrstuden 	{ PCI_VENDOR_3WARE,
399a4dd1e26Swrstuden 	  PCI_PRODUCT_3WARE_9550,
400a4dd1e26Swrstuden 	  "3ware 9550SX series",
401a4dd1e26Swrstuden 	},
4021fe12cbbSjoerg 	{ PCI_VENDOR_3WARE,
4031fe12cbbSjoerg 	  PCI_PRODUCT_3WARE_9650,
4041fe12cbbSjoerg 	  "3ware 9650SE series",
4051fe12cbbSjoerg 	},
4061fe12cbbSjoerg 	{ PCI_VENDOR_3WARE,
4071fe12cbbSjoerg 	  PCI_PRODUCT_3WARE_9690,
4081fe12cbbSjoerg 	  "3ware 9690 series",
4091fe12cbbSjoerg 	},
410a4dd1e26Swrstuden 	{ 0,
411a4dd1e26Swrstuden 	  0,
412a4dd1e26Swrstuden 	  NULL,
413a4dd1e26Swrstuden 	},
414a4dd1e26Swrstuden };
415a4dd1e26Swrstuden 
416a4dd1e26Swrstuden 
417a4dd1e26Swrstuden static inline void
twa_outl(struct twa_softc * sc,int off,uint32_t val)4188c670781Ssimonb twa_outl(struct twa_softc *sc, int off, uint32_t val)
419a4dd1e26Swrstuden {
420f0b22f96Ssimonb 
421a4dd1e26Swrstuden 	bus_space_write_4(sc->twa_bus_iot, sc->twa_bus_ioh, off, val);
422a4dd1e26Swrstuden 	bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4,
423a4dd1e26Swrstuden 	    BUS_SPACE_BARRIER_WRITE);
424a4dd1e26Swrstuden }
425a4dd1e26Swrstuden 
twa_inl(struct twa_softc * sc,int off)4268c670781Ssimonb static inline uint32_t	twa_inl(struct twa_softc *sc, int off)
427a4dd1e26Swrstuden {
428f0b22f96Ssimonb 
429a4dd1e26Swrstuden 	bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4,
430a4dd1e26Swrstuden 	    BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ);
431a4dd1e26Swrstuden 	return (bus_space_read_4(sc->twa_bus_iot, sc->twa_bus_ioh, off));
432a4dd1e26Swrstuden }
433a4dd1e26Swrstuden 
434a4dd1e26Swrstuden void
twa_request_wait_handler(struct twa_request * tr)435a4dd1e26Swrstuden twa_request_wait_handler(struct twa_request *tr)
436a4dd1e26Swrstuden {
437f0b22f96Ssimonb 
438a4dd1e26Swrstuden 	wakeup(tr);
439a4dd1e26Swrstuden }
440a4dd1e26Swrstuden 
4417433c417Schs static const struct twa_pci_identity *
twa_lookup(pcireg_t id)4427433c417Schs twa_lookup(pcireg_t id)
443a4dd1e26Swrstuden {
4447433c417Schs 	const struct twa_pci_identity *entry;
445a4dd1e26Swrstuden 	int i;
446a4dd1e26Swrstuden 
4477433c417Schs 	for (i = 0; i < __arraycount(twa_pci_products); i++) {
4487433c417Schs 		entry = &twa_pci_products[i];
4497433c417Schs 		if (entry->vendor_id == PCI_VENDOR(id) &&
4507433c417Schs 		    entry->product_id == PCI_PRODUCT(id)) {
4517433c417Schs 			return entry;
452a4dd1e26Swrstuden 		}
453a4dd1e26Swrstuden 	}
4547433c417Schs 	return NULL;
4557433c417Schs }
4567433c417Schs 
4577433c417Schs static int
twa_match(device_t parent,cfdata_t cfdata,void * aux)4587433c417Schs twa_match(device_t parent, cfdata_t cfdata, void *aux)
4597433c417Schs {
4607433c417Schs 	struct pci_attach_args *pa = aux;
4617433c417Schs 	const struct twa_pci_identity *entry;
4627433c417Schs 
4637433c417Schs 	entry = twa_lookup(pa->pa_id);
4647433c417Schs 	if (entry != NULL) {
4657433c417Schs 		return 1;
466a4dd1e26Swrstuden 	}
467a4dd1e26Swrstuden 	return (0);
468a4dd1e26Swrstuden }
469a4dd1e26Swrstuden 
470a4dd1e26Swrstuden static const char *
twa_find_msg_string(const struct twa_message * table,uint16_t code)4718c670781Ssimonb twa_find_msg_string(const struct twa_message *table, uint16_t code)
472a4dd1e26Swrstuden {
473a4dd1e26Swrstuden 	int	i;
474a4dd1e26Swrstuden 
475a4dd1e26Swrstuden 	for (i = 0; table[i].message != NULL; i++)
476a4dd1e26Swrstuden 		if (table[i].code == code)
477a4dd1e26Swrstuden 			return(table[i].message);
478a4dd1e26Swrstuden 
479a4dd1e26Swrstuden 	return(table[i].message);
480a4dd1e26Swrstuden }
481a4dd1e26Swrstuden 
482a4dd1e26Swrstuden void
twa_release_request(struct twa_request * tr)483a4dd1e26Swrstuden twa_release_request(struct twa_request *tr)
484a4dd1e26Swrstuden {
485a4dd1e26Swrstuden 	int s;
486a4dd1e26Swrstuden 	struct twa_softc *sc;
487a4dd1e26Swrstuden 
488a4dd1e26Swrstuden 	sc = tr->tr_sc;
489a4dd1e26Swrstuden 
490a4dd1e26Swrstuden 	if ((tr->tr_flags & TWA_CMD_AEN) == 0) {
491a4dd1e26Swrstuden 		s = splbio();
492a4dd1e26Swrstuden 		TAILQ_INSERT_TAIL(&tr->tr_sc->twa_free, tr, tr_link);
493a4dd1e26Swrstuden 		splx(s);
494a4dd1e26Swrstuden 		if (__predict_false((tr->tr_sc->twa_sc_flags &
495a4dd1e26Swrstuden 		    TWA_STATE_REQUEST_WAIT) != 0)) {
496a4dd1e26Swrstuden 			tr->tr_sc->twa_sc_flags &= ~TWA_STATE_REQUEST_WAIT;
497a4dd1e26Swrstuden 			wakeup(&sc->twa_free);
498a4dd1e26Swrstuden 		}
499a4dd1e26Swrstuden 	} else
500a4dd1e26Swrstuden 		tr->tr_flags &= ~TWA_CMD_AEN_BUSY;
501a4dd1e26Swrstuden }
502a4dd1e26Swrstuden 
503a4dd1e26Swrstuden static void
twa_unmap_request(struct twa_request * tr)504a4dd1e26Swrstuden twa_unmap_request(struct twa_request *tr)
505a4dd1e26Swrstuden {
506a4dd1e26Swrstuden 	struct twa_softc	*sc = tr->tr_sc;
5078c670781Ssimonb 	uint8_t			cmd_status;
508ae11e465Sbouyer 	int s;
509a4dd1e26Swrstuden 
510a4dd1e26Swrstuden 	/* If the command involved data, unmap that too. */
511a4dd1e26Swrstuden 	if (tr->tr_data != NULL) {
512a4dd1e26Swrstuden 		if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K)
513a4dd1e26Swrstuden 			cmd_status = tr->tr_command->command.cmd_pkt_9k.status;
514a4dd1e26Swrstuden 		else
515a4dd1e26Swrstuden 			cmd_status =
516a4dd1e26Swrstuden 			      tr->tr_command->command.cmd_pkt_7k.generic.status;
517a4dd1e26Swrstuden 
518a4dd1e26Swrstuden 		if (tr->tr_flags & TWA_CMD_DATA_OUT) {
519a4dd1e26Swrstuden 			bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map,
520a4dd1e26Swrstuden 				0, tr->tr_length, BUS_DMASYNC_POSTREAD);
521a4dd1e26Swrstuden 			/*
522a4dd1e26Swrstuden 			 * If we are using a bounce buffer, and we are reading
523a4dd1e26Swrstuden 			 * data, copy the real data in.
524a4dd1e26Swrstuden 			 */
525a4dd1e26Swrstuden 			if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED)
526a4dd1e26Swrstuden 				if (cmd_status == 0)
527a4dd1e26Swrstuden 					memcpy(tr->tr_real_data, tr->tr_data,
528a4dd1e26Swrstuden 						tr->tr_real_length);
529a4dd1e26Swrstuden 		}
530a4dd1e26Swrstuden 		if (tr->tr_flags & TWA_CMD_DATA_IN)
531a4dd1e26Swrstuden 			bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map,
532a4dd1e26Swrstuden 				0, tr->tr_length, BUS_DMASYNC_POSTWRITE);
533a4dd1e26Swrstuden 
534a4dd1e26Swrstuden 		bus_dmamap_unload(sc->twa_dma_tag, tr->tr_dma_map);
535a4dd1e26Swrstuden 	}
536a4dd1e26Swrstuden 
537a4dd1e26Swrstuden 	/* Free alignment buffer if it was used. */
538a4dd1e26Swrstuden 	if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) {
539ae11e465Sbouyer 		s = splvm();
540e62ee4d4Spara 		uvm_km_kmem_free(kmem_va_arena, (vaddr_t)tr->tr_data,
541e62ee4d4Spara 		    tr->tr_length);
542ae11e465Sbouyer 		splx(s);
543a4dd1e26Swrstuden 		tr->tr_data = tr->tr_real_data;
544a4dd1e26Swrstuden 		tr->tr_length = tr->tr_real_length;
545a4dd1e26Swrstuden 	}
546a4dd1e26Swrstuden }
547a4dd1e26Swrstuden 
548a4dd1e26Swrstuden /*
549a4dd1e26Swrstuden  * Function name:	twa_wait_request
550a4dd1e26Swrstuden  * Description:		Sends down a firmware cmd, and waits for the completion,
551a4dd1e26Swrstuden  *			but NOT in a tight loop.
552a4dd1e26Swrstuden  *
553a4dd1e26Swrstuden  * Input:		tr	-- ptr to request pkt
554a4dd1e26Swrstuden  *			timeout -- max # of seconds to wait before giving up
555a4dd1e26Swrstuden  * Output:		None
556a4dd1e26Swrstuden  * Return value:	0	-- success
557a4dd1e26Swrstuden  *			non-zero-- failure
558a4dd1e26Swrstuden  */
559a4dd1e26Swrstuden static int
twa_wait_request(struct twa_request * tr,uint32_t timeout)5608c670781Ssimonb twa_wait_request(struct twa_request *tr, uint32_t timeout)
561a4dd1e26Swrstuden {
562a4dd1e26Swrstuden 	time_t	end_time;
563a4dd1e26Swrstuden 	struct timeval	t1;
5647cfa6f22Swrstuden 	int	s, rv;
565a4dd1e26Swrstuden 
566a4dd1e26Swrstuden 	tr->tr_flags |= TWA_CMD_SLEEP_ON_REQUEST;
567a4dd1e26Swrstuden 	tr->tr_callback = twa_request_wait_handler;
568a4dd1e26Swrstuden 	tr->tr_status = TWA_CMD_BUSY;
569a4dd1e26Swrstuden 
5707cfa6f22Swrstuden 	rv = twa_map_request(tr);
5717cfa6f22Swrstuden 
5727cfa6f22Swrstuden 	if (rv != 0)
5737cfa6f22Swrstuden 		return (rv);
574a4dd1e26Swrstuden 
575a4dd1e26Swrstuden 	microtime(&t1);
576a4dd1e26Swrstuden 	end_time = t1.tv_usec +
577a4dd1e26Swrstuden 		(timeout * 1000 * 100);
578a4dd1e26Swrstuden 
579a4dd1e26Swrstuden 	while (tr->tr_status != TWA_CMD_COMPLETE) {
5807cfa6f22Swrstuden 		rv = tr->tr_error;
5817cfa6f22Swrstuden 		if (rv != 0)
5827cfa6f22Swrstuden 			return(rv);
5837cfa6f22Swrstuden 		if ((rv = tsleep(tr, PRIBIO, "twawait", timeout * hz)) == 0)
584a4dd1e26Swrstuden 			break;
5857cfa6f22Swrstuden 
5867cfa6f22Swrstuden 		if (rv == EWOULDBLOCK) {
587a4dd1e26Swrstuden 			/*
588a4dd1e26Swrstuden 			 * We will reset the controller only if the request has
589a4dd1e26Swrstuden 			 * already been submitted, so as to not lose the
590a4dd1e26Swrstuden 			 * request packet.  If a busy request timed out, the
591a4dd1e26Swrstuden 			 * reset will take care of freeing resources.  If a
592a4dd1e26Swrstuden 			 * pending request timed out, we will free resources
593a4dd1e26Swrstuden 			 * for that request, right here.  So, the caller is
594a4dd1e26Swrstuden 			 * expected to NOT cleanup when ETIMEDOUT is returned.
595a4dd1e26Swrstuden 			 */
5967cfa6f22Swrstuden 			if (tr->tr_status == TWA_CMD_BUSY)
597a4dd1e26Swrstuden 				twa_reset(tr->tr_sc);
598a4dd1e26Swrstuden 			else {
599a4dd1e26Swrstuden 				/* Request was never submitted.  Clean up. */
600a4dd1e26Swrstuden 				s = splbio();
601f0b22f96Ssimonb 				TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr,
602f0b22f96Ssimonb 				    tr_link);
603a4dd1e26Swrstuden 				splx(s);
604a4dd1e26Swrstuden 
605a4dd1e26Swrstuden 				twa_unmap_request(tr);
606a4dd1e26Swrstuden 				if (tr->tr_data)
607a4dd1e26Swrstuden 					free(tr->tr_data, M_DEVBUF);
608a4dd1e26Swrstuden 
609a4dd1e26Swrstuden 				twa_release_request(tr);
610a4dd1e26Swrstuden 			}
611a4dd1e26Swrstuden 			return(ETIMEDOUT);
612a4dd1e26Swrstuden 		}
613a4dd1e26Swrstuden 		/*
614a4dd1e26Swrstuden 		 * Either the request got completed, or we were woken up by a
615f0b22f96Ssimonb 		 * signal. Calculate the new timeout, in case it was the
616f0b22f96Ssimonb 		 * latter.
617a4dd1e26Swrstuden 		 */
618a4dd1e26Swrstuden 		microtime(&t1);
619a4dd1e26Swrstuden 
620a4dd1e26Swrstuden 		timeout = (end_time - t1.tv_usec) / (1000 * 100);
621a4dd1e26Swrstuden 	}
6227cfa6f22Swrstuden 	return(rv);
623a4dd1e26Swrstuden }
624a4dd1e26Swrstuden 
625a4dd1e26Swrstuden /*
626a4dd1e26Swrstuden  * Function name:	twa_immediate_request
627a4dd1e26Swrstuden  * Description:		Sends down a firmware cmd, and waits for the completion
628a4dd1e26Swrstuden  *			in a tight loop.
629a4dd1e26Swrstuden  *
630a4dd1e26Swrstuden  * Input:		tr	-- ptr to request pkt
631a4dd1e26Swrstuden  *			timeout -- max # of seconds to wait before giving up
632a4dd1e26Swrstuden  * Output:		None
633a4dd1e26Swrstuden  * Return value:	0	-- success
634a4dd1e26Swrstuden  *			non-zero-- failure
635a4dd1e26Swrstuden  */
636a4dd1e26Swrstuden static int
twa_immediate_request(struct twa_request * tr,uint32_t timeout)6378c670781Ssimonb twa_immediate_request(struct twa_request *tr, uint32_t timeout)
638a4dd1e26Swrstuden {
639a4dd1e26Swrstuden 	struct timeval t1;
6407cfa6f22Swrstuden 	int	s = 0, rv = 0;
641a4dd1e26Swrstuden 
6427cfa6f22Swrstuden 	rv = twa_map_request(tr);
6437cfa6f22Swrstuden 
6447cfa6f22Swrstuden 	if (rv != 0)
6457cfa6f22Swrstuden 		return(rv);
646a4dd1e26Swrstuden 
647a4dd1e26Swrstuden 	timeout = (timeout * 10000 * 10);
648a4dd1e26Swrstuden 
649a4dd1e26Swrstuden 	microtime(&t1);
650a4dd1e26Swrstuden 
651a4dd1e26Swrstuden 	timeout += t1.tv_usec;
652a4dd1e26Swrstuden 
653a4dd1e26Swrstuden 	do {
6547cfa6f22Swrstuden 		rv = tr->tr_error;
6557cfa6f22Swrstuden 		if (rv != 0)
6567cfa6f22Swrstuden 			return(rv);
6577cfa6f22Swrstuden 		s = splbio();
658a4dd1e26Swrstuden 		twa_done(tr->tr_sc);
6597cfa6f22Swrstuden 		splx(s);
6607cfa6f22Swrstuden 		if (tr->tr_status == TWA_CMD_COMPLETE)
6617cfa6f22Swrstuden 			return(rv);
662a4dd1e26Swrstuden 		microtime(&t1);
663a4dd1e26Swrstuden 	} while (t1.tv_usec <= timeout);
664a4dd1e26Swrstuden 
665a4dd1e26Swrstuden 	/*
666a4dd1e26Swrstuden 	 * We will reset the controller only if the request has
667a4dd1e26Swrstuden 	 * already been submitted, so as to not lose the
668a4dd1e26Swrstuden 	 * request packet.  If a busy request timed out, the
669a4dd1e26Swrstuden 	 * reset will take care of freeing resources.  If a
670a4dd1e26Swrstuden 	 * pending request timed out, we will free resources
671a4dd1e26Swrstuden 	 * for that request, right here.  So, the caller is
672a4dd1e26Swrstuden 	 * expected to NOT cleanup when ETIMEDOUT is returned.
673a4dd1e26Swrstuden 	 */
6747cfa6f22Swrstuden 	rv = ETIMEDOUT;
6757cfa6f22Swrstuden 
6767cfa6f22Swrstuden 	if (tr->tr_status == TWA_CMD_BUSY)
677a4dd1e26Swrstuden 		twa_reset(tr->tr_sc);
678a4dd1e26Swrstuden 	else {
679a4dd1e26Swrstuden 		/* Request was never submitted.  Clean up. */
680a4dd1e26Swrstuden 		s = splbio();
681a4dd1e26Swrstuden 		TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, tr_link);
682a4dd1e26Swrstuden 		splx(s);
683a4dd1e26Swrstuden 		twa_unmap_request(tr);
684a4dd1e26Swrstuden 		if (tr->tr_data)
685a4dd1e26Swrstuden 			free(tr->tr_data, M_DEVBUF);
686a4dd1e26Swrstuden 
687a4dd1e26Swrstuden 		twa_release_request(tr);
688a4dd1e26Swrstuden 	}
6897cfa6f22Swrstuden 	return (rv);
690a4dd1e26Swrstuden }
691a4dd1e26Swrstuden 
692a4dd1e26Swrstuden static int
twa_inquiry(struct twa_request * tr,int lunid)693a4dd1e26Swrstuden twa_inquiry(struct twa_request *tr, int lunid)
694a4dd1e26Swrstuden {
695a4dd1e26Swrstuden 	int error;
696a4dd1e26Swrstuden 	struct twa_command_9k *tr_9k_cmd;
697a4dd1e26Swrstuden 
698a4dd1e26Swrstuden 	if (tr->tr_data == NULL)
699a4dd1e26Swrstuden 		return (ENOMEM);
700a4dd1e26Swrstuden 
701a4dd1e26Swrstuden 	memset(tr->tr_data, 0, TWA_SECTOR_SIZE);
702a4dd1e26Swrstuden 
703a4dd1e26Swrstuden 	tr->tr_length = TWA_SECTOR_SIZE;
704a4dd1e26Swrstuden 	tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K;
7051fe12cbbSjoerg 	tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT;
706a4dd1e26Swrstuden 
707a4dd1e26Swrstuden 	tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k;
708a4dd1e26Swrstuden 
709a4dd1e26Swrstuden 	tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND;
710a4dd1e26Swrstuden 	tr_9k_cmd->unit = lunid;
711a4dd1e26Swrstuden 	tr_9k_cmd->request_id = tr->tr_request_id;
712a4dd1e26Swrstuden 	tr_9k_cmd->status = 0;
713a4dd1e26Swrstuden 	tr_9k_cmd->sgl_offset = 16;
714a4dd1e26Swrstuden 	tr_9k_cmd->sgl_entries = 1;
715a4dd1e26Swrstuden 	/* create the CDB here */
716a4dd1e26Swrstuden 	tr_9k_cmd->cdb[0] = INQUIRY;
717a4dd1e26Swrstuden 	tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e);
718a4dd1e26Swrstuden 	tr_9k_cmd->cdb[4] = 255;
719a4dd1e26Swrstuden 
720a4dd1e26Swrstuden 	/* XXXX setup page data no lun device
721a4dd1e26Swrstuden 	 * it seems 9000 series does not indicate
722a4dd1e26Swrstuden 	 * NOTPRESENT - need more investigation
723a4dd1e26Swrstuden 	 */
724a4dd1e26Swrstuden 	((struct scsipi_inquiry_data *)tr->tr_data)->device =
725a4dd1e26Swrstuden 		SID_QUAL_LU_NOTPRESENT;
726a4dd1e26Swrstuden 
727a4dd1e26Swrstuden 	error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD);
7287cfa6f22Swrstuden 	if (error != 0)
7297cfa6f22Swrstuden 		return (error);
7307cfa6f22Swrstuden 
731a4dd1e26Swrstuden 	if (((struct scsipi_inquiry_data *)tr->tr_data)->device ==
732a4dd1e26Swrstuden 		SID_QUAL_LU_NOTPRESENT)
733a4dd1e26Swrstuden 		error = 1;
734a4dd1e26Swrstuden 
735a4dd1e26Swrstuden 	return (error);
736a4dd1e26Swrstuden }
737a4dd1e26Swrstuden 
738a4dd1e26Swrstuden static int
twa_print_inquiry_data(struct twa_softc * sc,struct scsipi_inquiry_data * scsipi)739f0b22f96Ssimonb twa_print_inquiry_data(struct twa_softc *sc, struct scsipi_inquiry_data *scsipi)
740a4dd1e26Swrstuden {
741f0b22f96Ssimonb 
742d1934bddSjakllsch     printf("%s: %s\n", device_xname(sc->twa_dv), scsipi->vendor);
743a4dd1e26Swrstuden 
744a4dd1e26Swrstuden     return (1);
745a4dd1e26Swrstuden }
746a4dd1e26Swrstuden 
747a4dd1e26Swrstuden 
748a4dd1e26Swrstuden static uint64_t
twa_read_capacity(struct twa_request * tr,int lunid)749a4dd1e26Swrstuden twa_read_capacity(struct twa_request *tr, int lunid)
750a4dd1e26Swrstuden {
751a4dd1e26Swrstuden 	int error;
752a4dd1e26Swrstuden 	struct twa_command_9k *tr_9k_cmd;
753a4dd1e26Swrstuden 	uint64_t array_size = 0LL;
754a4dd1e26Swrstuden 
755a4dd1e26Swrstuden 	if (tr->tr_data == NULL)
756a4dd1e26Swrstuden 		return (ENOMEM);
757a4dd1e26Swrstuden 
758a4dd1e26Swrstuden 	memset(tr->tr_data, 0, TWA_SECTOR_SIZE);
759a4dd1e26Swrstuden 
760a4dd1e26Swrstuden 	tr->tr_length = TWA_SECTOR_SIZE;
761a4dd1e26Swrstuden 	tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K;
762a4dd1e26Swrstuden 	tr->tr_flags |= TWA_CMD_DATA_OUT;
763a4dd1e26Swrstuden 
764a4dd1e26Swrstuden 	tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k;
765a4dd1e26Swrstuden 
766a4dd1e26Swrstuden 	tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND;
767a4dd1e26Swrstuden 	tr_9k_cmd->unit = lunid;
768a4dd1e26Swrstuden 	tr_9k_cmd->request_id = tr->tr_request_id;
769a4dd1e26Swrstuden 	tr_9k_cmd->status = 0;
770a4dd1e26Swrstuden 	tr_9k_cmd->sgl_offset = 16;
771a4dd1e26Swrstuden 	tr_9k_cmd->sgl_entries = 1;
772a4dd1e26Swrstuden 	/* create the CDB here */
773a4dd1e26Swrstuden 	tr_9k_cmd->cdb[0] = READ_CAPACITY_16;
774a4dd1e26Swrstuden 	tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e) | SRC16_SERVICE_ACTION;
775a4dd1e26Swrstuden 
776a4dd1e26Swrstuden 	error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD);
7777cfa6f22Swrstuden 
7787cfa6f22Swrstuden 	if (error == 0) {
779a4dd1e26Swrstuden #if BYTE_ORDER == BIG_ENDIAN
7807cfa6f22Swrstuden 		array_size = bswap64(_8btol(
781e31cf58eSpgoyette 		    ((struct scsipi_read_capacity_16_data *)tr->tr_data)->addr) + 1);
782a4dd1e26Swrstuden #else
783a4dd1e26Swrstuden 		array_size = _8btol(((struct scsipi_read_capacity_16_data *)
784a4dd1e26Swrstuden 				tr->tr_data)->addr) + 1;
785a4dd1e26Swrstuden #endif
7867cfa6f22Swrstuden 	}
787a4dd1e26Swrstuden 	return (array_size);
788a4dd1e26Swrstuden }
789a4dd1e26Swrstuden 
790a4dd1e26Swrstuden static int
twa_request_sense(struct twa_request * tr,int lunid)791a4dd1e26Swrstuden twa_request_sense(struct twa_request *tr, int lunid)
792a4dd1e26Swrstuden {
793a4dd1e26Swrstuden 	int error = 1;
794a4dd1e26Swrstuden 	struct twa_command_9k *tr_9k_cmd;
795a4dd1e26Swrstuden 
796a4dd1e26Swrstuden 	if (tr->tr_data == NULL)
797a4dd1e26Swrstuden 		return (error);
798a4dd1e26Swrstuden 
799a4dd1e26Swrstuden 	memset(tr->tr_data, 0, TWA_SECTOR_SIZE);
800a4dd1e26Swrstuden 
801a4dd1e26Swrstuden 	tr->tr_length = TWA_SECTOR_SIZE;
802a4dd1e26Swrstuden 	tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K;
803a4dd1e26Swrstuden 	tr->tr_flags |= TWA_CMD_DATA_OUT;
804a4dd1e26Swrstuden 
805a4dd1e26Swrstuden 	tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k;
806a4dd1e26Swrstuden 
807a4dd1e26Swrstuden 	tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND;
808a4dd1e26Swrstuden 	tr_9k_cmd->unit = lunid;
809a4dd1e26Swrstuden 	tr_9k_cmd->request_id = tr->tr_request_id;
810a4dd1e26Swrstuden 	tr_9k_cmd->status = 0;
811a4dd1e26Swrstuden 	tr_9k_cmd->sgl_offset = 16;
812a4dd1e26Swrstuden 	tr_9k_cmd->sgl_entries = 1;
813a4dd1e26Swrstuden 	/* create the CDB here */
814a4dd1e26Swrstuden 	tr_9k_cmd->cdb[0] = SCSI_REQUEST_SENSE;
815a4dd1e26Swrstuden 	tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e);
816a4dd1e26Swrstuden 	tr_9k_cmd->cdb[4] = 255;
817a4dd1e26Swrstuden 
818a4dd1e26Swrstuden 	/*XXX AEN notification called in interrupt context
819a4dd1e26Swrstuden 	 * so just queue the request. Return as quickly
820a4dd1e26Swrstuden 	 * as possible from interrupt
821a4dd1e26Swrstuden 	 */
822a4dd1e26Swrstuden 	if ((tr->tr_flags & TWA_CMD_AEN) != 0)
823a4dd1e26Swrstuden 		error = twa_map_request(tr);
824a4dd1e26Swrstuden  	else
825a4dd1e26Swrstuden 		error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD);
826a4dd1e26Swrstuden 
827a4dd1e26Swrstuden 	return (error);
828a4dd1e26Swrstuden }
829a4dd1e26Swrstuden 
830a4dd1e26Swrstuden static int
twa_alloc_req_pkts(struct twa_softc * sc,int num_reqs)831a4dd1e26Swrstuden twa_alloc_req_pkts(struct twa_softc *sc, int num_reqs)
832a4dd1e26Swrstuden {
833a4dd1e26Swrstuden 	struct twa_request	*tr;
834a4dd1e26Swrstuden 	struct twa_command_packet *tc;
835a4dd1e26Swrstuden 	bus_dma_segment_t	seg;
836a4dd1e26Swrstuden 	size_t max_segs, max_xfer;
837a4dd1e26Swrstuden 	int	i, rv, rseg, size;
838a4dd1e26Swrstuden 
839d47bcd29Schs 	sc->sc_units = malloc(sc->sc_nunits *
840d47bcd29Schs 	    sizeof(struct twa_drive), M_DEVBUF, M_WAITOK | M_ZERO);
841d47bcd29Schs 	sc->twa_req_buf = malloc(num_reqs * sizeof(struct twa_request),
842d47bcd29Schs 	    M_DEVBUF, M_WAITOK);
843a4dd1e26Swrstuden 
844a4dd1e26Swrstuden 	size = num_reqs * sizeof(struct twa_command_packet);
845a4dd1e26Swrstuden 
846a4dd1e26Swrstuden 	/* Allocate memory for cmd pkts. */
847a4dd1e26Swrstuden 	if ((rv = bus_dmamem_alloc(sc->twa_dma_tag,
848a4dd1e26Swrstuden 		size, PAGE_SIZE, 0, &seg,
849a4dd1e26Swrstuden 		1, &rseg, BUS_DMA_NOWAIT)) != 0){
850d1934bddSjakllsch 			aprint_error_dev(sc->twa_dv, "unable to allocate "
8519d57c800Scegger 				"command packets, rv = %d\n", rv);
852a4dd1e26Swrstuden 			return (ENOMEM);
853a4dd1e26Swrstuden 	}
854a4dd1e26Swrstuden 
855a4dd1e26Swrstuden 	if ((rv = bus_dmamem_map(sc->twa_dma_tag,
85653524e44Schristos 		&seg, rseg, size, (void **)&sc->twa_cmds,
857a4dd1e26Swrstuden 		BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
8588bc54e5bSmsaitoh 			aprint_error_dev(sc->twa_dv,
8598bc54e5bSmsaitoh 			    "unable to map commands, rv = %d\n", rv);
860a4dd1e26Swrstuden 			return (1);
861a4dd1e26Swrstuden 	}
862a4dd1e26Swrstuden 
863a4dd1e26Swrstuden 	if ((rv = bus_dmamap_create(sc->twa_dma_tag,
864a4dd1e26Swrstuden 		size, num_reqs, size,
865a4dd1e26Swrstuden 		0, BUS_DMA_NOWAIT, &sc->twa_cmd_map)) != 0) {
8668bc54e5bSmsaitoh 			aprint_error_dev(sc->twa_dv,
8678bc54e5bSmsaitoh 			    "unable to create command DMA map, "
8689d57c800Scegger 				"rv = %d\n", rv);
869a4dd1e26Swrstuden 			return (ENOMEM);
870a4dd1e26Swrstuden 	}
871a4dd1e26Swrstuden 
872a4dd1e26Swrstuden 	if ((rv = bus_dmamap_load(sc->twa_dma_tag, sc->twa_cmd_map,
873a4dd1e26Swrstuden 		sc->twa_cmds, size, NULL,
874a4dd1e26Swrstuden 		BUS_DMA_NOWAIT)) != 0) {
8758bc54e5bSmsaitoh 			aprint_error_dev(sc->twa_dv,
8768bc54e5bSmsaitoh 			    "unable to load command DMA map, rv = %d\n", rv);
877a4dd1e26Swrstuden 			return (1);
878a4dd1e26Swrstuden 	}
879a4dd1e26Swrstuden 
880a4dd1e26Swrstuden 	if ((uintptr_t)sc->twa_cmds % TWA_ALIGNMENT) {
8818bc54e5bSmsaitoh 		aprint_error_dev(sc->twa_dv,
8828bc54e5bSmsaitoh 		    "DMA map memory not aligned on %d boundary\n",
8838bc54e5bSmsaitoh 		    TWA_ALIGNMENT);
884a4dd1e26Swrstuden 
885a4dd1e26Swrstuden 		return (1);
886a4dd1e26Swrstuden 	}
887a4dd1e26Swrstuden 	tc = sc->twa_cmd_pkt_buf = (struct twa_command_packet *)sc->twa_cmds;
888a4dd1e26Swrstuden 	sc->twa_cmd_pkt_phys = sc->twa_cmd_map->dm_segs[0].ds_addr;
889a4dd1e26Swrstuden 
890a4dd1e26Swrstuden 	memset(sc->twa_req_buf, 0, num_reqs * sizeof(struct twa_request));
891a4dd1e26Swrstuden 	memset(sc->twa_cmd_pkt_buf, 0,
892a4dd1e26Swrstuden 		num_reqs * sizeof(struct twa_command_packet));
893a4dd1e26Swrstuden 
894a4dd1e26Swrstuden 	sc->sc_twa_request = sc->twa_req_buf;
895a4dd1e26Swrstuden 	max_segs = twa_get_maxsegs();
896a4dd1e26Swrstuden 	max_xfer = twa_get_maxxfer(max_segs);
897a4dd1e26Swrstuden 
898a4dd1e26Swrstuden 	for (i = 0; i < num_reqs; i++, tc++) {
899a4dd1e26Swrstuden 		tr = &(sc->twa_req_buf[i]);
900a4dd1e26Swrstuden 		tr->tr_command = tc;
901a4dd1e26Swrstuden 		tr->tr_cmd_phys = sc->twa_cmd_pkt_phys +
902a4dd1e26Swrstuden 				(i * sizeof(struct twa_command_packet));
903a4dd1e26Swrstuden 		tr->tr_request_id = i;
904a4dd1e26Swrstuden 		tr->tr_sc = sc;
905a4dd1e26Swrstuden 
906a4dd1e26Swrstuden 		/*
907a4dd1e26Swrstuden 		 * Create a map for data buffers.  maxsize (256 * 1024) used in
908a4dd1e26Swrstuden 		 * bus_dma_tag_create above should suffice the bounce page needs
909a4dd1e26Swrstuden 		 * for data buffers, since the max I/O size we support is 128KB.
910a4dd1e26Swrstuden 		 * If we supported I/O's bigger than 256KB, we would have to
911a4dd1e26Swrstuden 		 * create a second dma_tag, with the appropriate maxsize.
912a4dd1e26Swrstuden 		 */
913a4dd1e26Swrstuden 		if ((rv = bus_dmamap_create(sc->twa_dma_tag,
914a4dd1e26Swrstuden 			max_xfer, max_segs, 1, 0, BUS_DMA_NOWAIT,
915a4dd1e26Swrstuden 			&tr->tr_dma_map)) != 0) {
9168bc54e5bSmsaitoh 				aprint_error_dev(sc->twa_dv,
9178bc54e5bSmsaitoh 				    "unable to create command DMA map, "
9188bc54e5bSmsaitoh 				    "rv = %d\n", rv);
919a4dd1e26Swrstuden 				return (ENOMEM);
920a4dd1e26Swrstuden 		}
921a4dd1e26Swrstuden 		/* Insert request into the free queue. */
922a4dd1e26Swrstuden 		if (i != 0) {
923a4dd1e26Swrstuden 			sc->twa_lookup[i] = tr;
924a4dd1e26Swrstuden 			twa_release_request(tr);
925a4dd1e26Swrstuden 		} else
926a4dd1e26Swrstuden 			tr->tr_flags |= TWA_CMD_AEN;
927a4dd1e26Swrstuden 	}
928a4dd1e26Swrstuden 	return(0);
929a4dd1e26Swrstuden }
930a4dd1e26Swrstuden 
931a4dd1e26Swrstuden static void
twa_recompute_openings(struct twa_softc * sc)932a4dd1e26Swrstuden twa_recompute_openings(struct twa_softc *sc)
933a4dd1e26Swrstuden {
934a4dd1e26Swrstuden 	struct twa_drive *td;
935a4dd1e26Swrstuden 	int unit;
936a4dd1e26Swrstuden 	int openings;
937d72a9bc7Sjoerg 	uint64_t total_size;
938a4dd1e26Swrstuden 
939d72a9bc7Sjoerg 	total_size = 0;
940d72a9bc7Sjoerg 	for (unit = 0; unit < sc->sc_nunits; unit++) {
941d72a9bc7Sjoerg 		td = &sc->sc_units[unit];
942d72a9bc7Sjoerg 		total_size += td->td_size;
943d72a9bc7Sjoerg 	}
944d72a9bc7Sjoerg 
945d72a9bc7Sjoerg 	for (unit = 0; unit < sc->sc_nunits; unit++) {
946d72a9bc7Sjoerg 		td = &sc->sc_units[unit];
947d72a9bc7Sjoerg 		/*
948d72a9bc7Sjoerg 		 * In theory, TWA_Q_LENGTH - 1 should be usable, but
949d72a9bc7Sjoerg 		 * keep one additional ccb for internal commands.
950d72a9bc7Sjoerg 		 * This makes the controller more reliable under load.
951d72a9bc7Sjoerg 		 */
952d72a9bc7Sjoerg 		if (total_size > 0) {
9538bc54e5bSmsaitoh 			openings = (TWA_Q_LENGTH - 2) * td->td_size
9548bc54e5bSmsaitoh 			    / total_size;
955d72a9bc7Sjoerg 		} else
956a4dd1e26Swrstuden 			openings = 0;
957d72a9bc7Sjoerg 
958d72a9bc7Sjoerg 		if (openings == td->td_openings)
959d72a9bc7Sjoerg 			continue;
960d72a9bc7Sjoerg 		td->td_openings = openings;
961a4dd1e26Swrstuden 
962a4dd1e26Swrstuden #ifdef TWA_DEBUG
963d72a9bc7Sjoerg 		printf("%s: unit %d openings %d\n",
964d1934bddSjakllsch 				device_xname(sc->twa_dv), unit, openings);
965a4dd1e26Swrstuden #endif
966a4dd1e26Swrstuden 		if (td->td_dev != NULL)
9678bc54e5bSmsaitoh 			(*td->td_callbacks->tcb_openings)(td->td_dev,
9688bc54e5bSmsaitoh 			    td->td_openings);
969a4dd1e26Swrstuden 	}
970a4dd1e26Swrstuden }
971a4dd1e26Swrstuden 
972916bdfa5Spgoyette /* ARGSUSED */
973a4dd1e26Swrstuden static int
twa_request_bus_scan(device_t self,const char * attr,const int * flags)974916bdfa5Spgoyette twa_request_bus_scan(device_t self, const char *attr, const int *flags)
975a4dd1e26Swrstuden {
976916bdfa5Spgoyette 	struct twa_softc *sc = device_private(self);
977a4dd1e26Swrstuden 	struct twa_drive *td;
978a4dd1e26Swrstuden 	struct twa_request *tr;
979a4dd1e26Swrstuden 	struct twa_attach_args twaa;
980b949192dSwrstuden 	int locs[TWACF_NLOCS];
981a4dd1e26Swrstuden 	int s, unit;
982a4dd1e26Swrstuden 
983a4dd1e26Swrstuden 	s = splbio();
984d72a9bc7Sjoerg 	for (unit = 0; unit < sc->sc_nunits; unit++) {
985a4dd1e26Swrstuden 
986a4dd1e26Swrstuden 		if ((tr = twa_get_request(sc, 0)) == NULL) {
987a4dd1e26Swrstuden 			splx(s);
988a4dd1e26Swrstuden 			return (EIO);
989a4dd1e26Swrstuden 		}
990a4dd1e26Swrstuden 
991a4dd1e26Swrstuden 		tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL;
992a4dd1e26Swrstuden 
993d47bcd29Schs 		tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_WAITOK);
994a4dd1e26Swrstuden 
995a4dd1e26Swrstuden 		td = &sc->sc_units[unit];
996a4dd1e26Swrstuden 
997a4dd1e26Swrstuden 		if (twa_inquiry(tr, unit) == 0) {
998a4dd1e26Swrstuden 			if (td->td_dev == NULL) {
999a4dd1e26Swrstuden 	    			twa_print_inquiry_data(sc,
1000a4dd1e26Swrstuden 				   ((struct scsipi_inquiry_data *)tr->tr_data));
1001a4dd1e26Swrstuden 
1002a4dd1e26Swrstuden 				sc->sc_units[unit].td_size =
1003a4dd1e26Swrstuden 					twa_read_capacity(tr, unit);
1004a4dd1e26Swrstuden 
1005a4dd1e26Swrstuden 				twaa.twaa_unit = unit;
1006a4dd1e26Swrstuden 
1007a4dd1e26Swrstuden 				twa_recompute_openings(sc);
1008a4dd1e26Swrstuden 
1009b949192dSwrstuden 				locs[TWACF_UNIT] = unit;
1010b949192dSwrstuden 
1011a4dd1e26Swrstuden 				sc->sc_units[unit].td_dev =
10122685996bSthorpej 				    config_found(sc->twa_dv, &twaa, twa_print,
1013c7fb772bSthorpej 				    CFARGS(.submatch = config_stdsubmatch,
1014c7fb772bSthorpej 					   .iattr = attr,
1015c7fb772bSthorpej 					   .locators = locs));
1016a4dd1e26Swrstuden 			}
1017a4dd1e26Swrstuden 		} else {
1018a4dd1e26Swrstuden 			if (td->td_dev != NULL) {
1019a4dd1e26Swrstuden 				(void) config_detach(td->td_dev, DETACH_FORCE);
1020a4dd1e26Swrstuden 				td->td_dev = NULL;
1021a4dd1e26Swrstuden 				td->td_size = 0;
1022a4dd1e26Swrstuden 
1023a4dd1e26Swrstuden 				twa_recompute_openings(sc);
1024a4dd1e26Swrstuden 			}
1025a4dd1e26Swrstuden 		}
1026a4dd1e26Swrstuden 		free(tr->tr_data, M_DEVBUF);
1027a4dd1e26Swrstuden 
1028a4dd1e26Swrstuden 		twa_release_request(tr);
1029a4dd1e26Swrstuden 	}
1030a4dd1e26Swrstuden 	splx(s);
1031a4dd1e26Swrstuden 
1032a4dd1e26Swrstuden 	return (0);
1033a4dd1e26Swrstuden }
1034a4dd1e26Swrstuden 
10357cfa6f22Swrstuden 
10367cfa6f22Swrstuden #ifdef	DIAGNOSTIC
10377cfa6f22Swrstuden static inline void
twa_check_busy_q(struct twa_request * tr)10387cfa6f22Swrstuden twa_check_busy_q(struct twa_request *tr)
10397cfa6f22Swrstuden {
10407cfa6f22Swrstuden 	struct twa_request *rq;
10417cfa6f22Swrstuden 	struct twa_softc *sc = tr->tr_sc;
10427cfa6f22Swrstuden 
10437cfa6f22Swrstuden 	TAILQ_FOREACH(rq, &sc->twa_busy, tr_link) {
10447cfa6f22Swrstuden 		if (tr->tr_request_id == rq->tr_request_id) {
10457cfa6f22Swrstuden 			panic("cannot submit same request more than once");
10467cfa6f22Swrstuden 		} else if (tr->bp == rq->bp && tr->bp != 0) {
10477cfa6f22Swrstuden 			/* XXX A check for 0 for the buf ptr is needed to
10487cfa6f22Swrstuden 			 * guard against ioctl requests with a buf ptr of
10497cfa6f22Swrstuden 			 * 0 and also aen notifications. Looking for
10507cfa6f22Swrstuden 			 * external cmds only.
10517cfa6f22Swrstuden 			 */
10527cfa6f22Swrstuden 			panic("cannot submit same buf more than once");
10537cfa6f22Swrstuden 		} else {
10547cfa6f22Swrstuden 			/* Empty else statement */
10557cfa6f22Swrstuden 		}
10567cfa6f22Swrstuden 	}
10577cfa6f22Swrstuden }
10587cfa6f22Swrstuden #endif
10597cfa6f22Swrstuden 
1060a4dd1e26Swrstuden static int
twa_start(struct twa_request * tr)1061a4dd1e26Swrstuden twa_start(struct twa_request *tr)
1062a4dd1e26Swrstuden {
1063a4dd1e26Swrstuden 	struct twa_softc	*sc = tr->tr_sc;
10648c670781Ssimonb 	uint32_t		status_reg;
1065a4dd1e26Swrstuden 	int			s;
1066a4dd1e26Swrstuden 	int			error;
1067a4dd1e26Swrstuden 
1068a4dd1e26Swrstuden 	s = splbio();
10691fe12cbbSjoerg 
10701fe12cbbSjoerg 	/*
1071a8d4826eSdholland 	 * The 9650 and 9690 have a bug in the detection of the full queue
1072a8d4826eSdholland 	 * condition.
1073a8d4826eSdholland 	 *
10741fe12cbbSjoerg 	 * If a write operation has filled the queue and is directly followed
10751fe12cbbSjoerg 	 * by a status read, it sometimes doesn't return the correct result.
10761fe12cbbSjoerg 	 * To work around this, the upper 32bit are written first.
10771fe12cbbSjoerg 	 * This effectively serialises the hardware, but does not change
10781fe12cbbSjoerg 	 * the state of the queue.
10791fe12cbbSjoerg 	 */
1080a8d4826eSdholland 	if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) {
10811fe12cbbSjoerg 		/* Write lower 32 bits of address */
1082a8d4826eSdholland 		TWA_WRITE_COMMAND_QUEUE_LOW(sc, tr->tr_cmd_phys +
10831fe12cbbSjoerg 			sizeof(struct twa_command_header));
10841fe12cbbSjoerg 	}
10851fe12cbbSjoerg 
1086a4dd1e26Swrstuden 	/* Check to see if we can post a command. */
1087a4dd1e26Swrstuden 	status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
1088a4dd1e26Swrstuden 	if ((error = twa_check_ctlr_state(sc, status_reg)))
1089a4dd1e26Swrstuden 		goto out;
1090a4dd1e26Swrstuden 
1091a4dd1e26Swrstuden 	if (status_reg & TWA_STATUS_COMMAND_QUEUE_FULL) {
1092a4dd1e26Swrstuden 			if (tr->tr_status != TWA_CMD_PENDING) {
1093a4dd1e26Swrstuden 				tr->tr_status = TWA_CMD_PENDING;
1094a4dd1e26Swrstuden 				TAILQ_INSERT_TAIL(&tr->tr_sc->twa_pending,
1095a4dd1e26Swrstuden 					tr, tr_link);
1096a4dd1e26Swrstuden 			}
1097a4dd1e26Swrstuden 			twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1098a4dd1e26Swrstuden 					TWA_CONTROL_UNMASK_COMMAND_INTERRUPT);
1099a4dd1e26Swrstuden 			error = EBUSY;
1100a4dd1e26Swrstuden 	} else {
1101a4dd1e26Swrstuden 	   	bus_dmamap_sync(sc->twa_dma_tag, sc->twa_cmd_map,
110253524e44Schristos 			(char *)tr->tr_command - (char *)sc->twa_cmds,
1103a4dd1e26Swrstuden 			sizeof(struct twa_command_packet),
1104a4dd1e26Swrstuden 			BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1105a4dd1e26Swrstuden 
1106a8d4826eSdholland 		if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) {
11071fe12cbbSjoerg 			/*
1108a8d4826eSdholland 			 * Cmd queue is not full.  Post the command
11091fe12cbbSjoerg 			 * by writing upper 32 bits of address.
11101fe12cbbSjoerg 			 */
1111a8d4826eSdholland 			TWA_WRITE_COMMAND_QUEUE_HIGH(sc, tr->tr_cmd_phys +
11121fe12cbbSjoerg 				sizeof(struct twa_command_header));
11131fe12cbbSjoerg 		} else {
1114a4dd1e26Swrstuden 			/* Cmd queue is not full.  Post the command. */
1115a4dd1e26Swrstuden 			TWA_WRITE_COMMAND_QUEUE(sc, tr->tr_cmd_phys +
1116a4dd1e26Swrstuden 				sizeof(struct twa_command_header));
11171fe12cbbSjoerg 		}
1118a4dd1e26Swrstuden 
1119a4dd1e26Swrstuden 		/* Mark the request as currently being processed. */
1120a4dd1e26Swrstuden 		tr->tr_status = TWA_CMD_BUSY;
11217cfa6f22Swrstuden 
11227cfa6f22Swrstuden #ifdef	DIAGNOSTIC
11237cfa6f22Swrstuden 		twa_check_busy_q(tr);
11247cfa6f22Swrstuden #endif
11257cfa6f22Swrstuden 
1126a4dd1e26Swrstuden 		/* Move the request into the busy queue. */
1127a4dd1e26Swrstuden 		TAILQ_INSERT_TAIL(&tr->tr_sc->twa_busy, tr, tr_link);
1128a4dd1e26Swrstuden 	}
1129a4dd1e26Swrstuden out:
1130a4dd1e26Swrstuden 	splx(s);
1131a4dd1e26Swrstuden 	return(error);
1132a4dd1e26Swrstuden }
1133a4dd1e26Swrstuden 
1134a4dd1e26Swrstuden static int
twa_drain_response_queue(struct twa_softc * sc)1135a4dd1e26Swrstuden twa_drain_response_queue(struct twa_softc *sc)
1136a4dd1e26Swrstuden {
11378c670781Ssimonb 	uint32_t			status_reg;
1138a4dd1e26Swrstuden 
1139a4dd1e26Swrstuden 	for (;;) {
1140a4dd1e26Swrstuden 		status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
1141a4dd1e26Swrstuden 		if (twa_check_ctlr_state(sc, status_reg))
1142a4dd1e26Swrstuden 			return(1);
1143a4dd1e26Swrstuden 		if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY)
1144a4dd1e26Swrstuden 			return(0); /* no more response queue entries */
1145d64c5a36Schristos 		(void)twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET);
1146a4dd1e26Swrstuden 	}
1147a4dd1e26Swrstuden }
1148a4dd1e26Swrstuden 
1149d72a9bc7Sjoerg /*
1150d72a9bc7Sjoerg  * twa_drain_response_queue_large:
1151d72a9bc7Sjoerg  *
11521fe12cbbSjoerg  * specific to the 9550 and 9650 controller to remove requests.
1153d72a9bc7Sjoerg  *
1154d72a9bc7Sjoerg  * Removes all requests from "large" response queue on the 9550 controller.
1155d72a9bc7Sjoerg  * This procedure is called as part of the 9550 controller reset sequence.
1156d72a9bc7Sjoerg  */
1157d72a9bc7Sjoerg static int
twa_drain_response_queue_large(struct twa_softc * sc,uint32_t timeout)1158d72a9bc7Sjoerg twa_drain_response_queue_large(struct twa_softc *sc, uint32_t timeout)
1159d72a9bc7Sjoerg {
1160d72a9bc7Sjoerg 	uint32_t	start_time = 0, end_time;
1161d72a9bc7Sjoerg 	uint32_t	response = 0;
1162499a932aSgmcgarry 
11631fe12cbbSjoerg 	if (sc->sc_product_id == PCI_PRODUCT_3WARE_9550 ||
11641fe12cbbSjoerg 	    sc->sc_product_id == PCI_PRODUCT_3WARE_9650 ) {
1165d72a9bc7Sjoerg 	       start_time = 0;
1166d72a9bc7Sjoerg 	       end_time = (timeout * TWA_MICROSECOND);
1167d72a9bc7Sjoerg 
1168d72a9bc7Sjoerg 	       while ((response &
1169d72a9bc7Sjoerg 		   TWA_9550SX_DRAIN_COMPLETE) != TWA_9550SX_DRAIN_COMPLETE) {
1170d72a9bc7Sjoerg 			response = twa_inl(sc, TWA_RESPONSE_QUEUE_LARGE_OFFSET);
1171d72a9bc7Sjoerg 			if (start_time >= end_time)
1172d72a9bc7Sjoerg 			       return (1);
1173d72a9bc7Sjoerg 			DELAY(1);
1174d72a9bc7Sjoerg 			start_time++;
1175d72a9bc7Sjoerg 	       }
1176d72a9bc7Sjoerg 	       /* P-chip delay */
1177d72a9bc7Sjoerg 	       DELAY(500000);
1178d72a9bc7Sjoerg        }
1179d72a9bc7Sjoerg        return (0);
1180d72a9bc7Sjoerg }
1181d72a9bc7Sjoerg 
1182a4dd1e26Swrstuden static void
twa_drain_busy_queue(struct twa_softc * sc)1183a4dd1e26Swrstuden twa_drain_busy_queue(struct twa_softc *sc)
1184a4dd1e26Swrstuden {
1185a4dd1e26Swrstuden 	struct twa_request	*tr;
1186a4dd1e26Swrstuden 
1187a4dd1e26Swrstuden 	/* Walk the busy queue. */
1188a4dd1e26Swrstuden 
1189a4dd1e26Swrstuden 	while ((tr = TAILQ_FIRST(&sc->twa_busy)) != NULL) {
1190a4dd1e26Swrstuden 		TAILQ_REMOVE(&sc->twa_busy, tr, tr_link);
1191a4dd1e26Swrstuden 
1192a4dd1e26Swrstuden 		twa_unmap_request(tr);
1193a4dd1e26Swrstuden 		if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_INTERNAL) ||
1194a4dd1e26Swrstuden 			(tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_IOCTL)) {
1195a4dd1e26Swrstuden 			/* It's an internal/ioctl request.  Simply free it. */
1196a4dd1e26Swrstuden 			if (tr->tr_data)
1197a4dd1e26Swrstuden 				free(tr->tr_data, M_DEVBUF);
1198a4dd1e26Swrstuden 			twa_release_request(tr);
1199a4dd1e26Swrstuden 		} else {
1200a4dd1e26Swrstuden 			/* It's a SCSI request.  Complete it. */
1201a4dd1e26Swrstuden 			tr->tr_command->command.cmd_pkt_9k.status = EIO;
1202a4dd1e26Swrstuden 			if (tr->tr_callback)
1203a4dd1e26Swrstuden 				tr->tr_callback(tr);
1204a4dd1e26Swrstuden 		}
1205a4dd1e26Swrstuden 	}
1206a4dd1e26Swrstuden }
1207a4dd1e26Swrstuden 
1208a4dd1e26Swrstuden static int
twa_drain_pending_queue(struct twa_softc * sc)1209a4dd1e26Swrstuden twa_drain_pending_queue(struct twa_softc *sc)
1210a4dd1e26Swrstuden {
1211a4dd1e26Swrstuden 	struct twa_request	*tr;
1212a4dd1e26Swrstuden 	int			s, error = 0;
1213a4dd1e26Swrstuden 
1214a4dd1e26Swrstuden 	/*
1215a4dd1e26Swrstuden 	 * Pull requests off the pending queue, and submit them.
1216a4dd1e26Swrstuden 	 */
1217a4dd1e26Swrstuden 	s = splbio();
1218a4dd1e26Swrstuden 	while ((tr = TAILQ_FIRST(&sc->twa_pending)) != NULL) {
1219a4dd1e26Swrstuden 		TAILQ_REMOVE(&sc->twa_pending, tr, tr_link);
1220a4dd1e26Swrstuden 
1221a4dd1e26Swrstuden 		if ((error = twa_start(tr))) {
1222a4dd1e26Swrstuden 			if (error == EBUSY) {
1223a4dd1e26Swrstuden 				tr->tr_status = TWA_CMD_PENDING;
1224a4dd1e26Swrstuden 
1225a4dd1e26Swrstuden 				/* queue at the head */
1226a4dd1e26Swrstuden 				TAILQ_INSERT_HEAD(&tr->tr_sc->twa_pending,
1227a4dd1e26Swrstuden 					tr, tr_link);
1228a4dd1e26Swrstuden 				error = 0;
1229a4dd1e26Swrstuden 				break;
1230a4dd1e26Swrstuden 			} else {
1231a4dd1e26Swrstuden 				if (tr->tr_flags & TWA_CMD_SLEEP_ON_REQUEST) {
1232a4dd1e26Swrstuden 					tr->tr_error = error;
1233a4dd1e26Swrstuden 					tr->tr_callback(tr);
1234a4dd1e26Swrstuden 					error = EIO;
1235a4dd1e26Swrstuden 				}
1236a4dd1e26Swrstuden 			}
1237a4dd1e26Swrstuden 		}
1238a4dd1e26Swrstuden 	}
1239a4dd1e26Swrstuden 	splx(s);
1240a4dd1e26Swrstuden 
1241a4dd1e26Swrstuden 	return(error);
1242a4dd1e26Swrstuden }
1243a4dd1e26Swrstuden 
1244a4dd1e26Swrstuden static int
twa_drain_aen_queue(struct twa_softc * sc)1245a4dd1e26Swrstuden twa_drain_aen_queue(struct twa_softc *sc)
1246a4dd1e26Swrstuden {
12477cfa6f22Swrstuden 	int				s, error = 0;
1248a4dd1e26Swrstuden 	struct twa_request		*tr;
1249a4dd1e26Swrstuden 	struct twa_command_header	*cmd_hdr;
1250a4dd1e26Swrstuden 	struct timeval	t1;
12518c670781Ssimonb 	uint32_t		timeout;
1252a4dd1e26Swrstuden 
1253a4dd1e26Swrstuden 	for (;;) {
1254a4dd1e26Swrstuden 		if ((tr = twa_get_request(sc, 0)) == NULL) {
1255a4dd1e26Swrstuden 			error = EIO;
1256a4dd1e26Swrstuden 			break;
1257a4dd1e26Swrstuden 		}
1258a4dd1e26Swrstuden 		tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL;
1259a4dd1e26Swrstuden 		tr->tr_callback = NULL;
1260a4dd1e26Swrstuden 
1261a4dd1e26Swrstuden 		tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT);
1262a4dd1e26Swrstuden 
1263a4dd1e26Swrstuden 		if (tr->tr_data == NULL) {
1264a4dd1e26Swrstuden 			error = 1;
1265a4dd1e26Swrstuden 			goto out;
1266a4dd1e26Swrstuden 		}
1267a4dd1e26Swrstuden 
1268a4dd1e26Swrstuden 		if (twa_request_sense(tr, 0) != 0) {
1269a4dd1e26Swrstuden 			error = 1;
1270a4dd1e26Swrstuden 			break;
1271a4dd1e26Swrstuden 		}
1272a4dd1e26Swrstuden 
1273a4dd1e26Swrstuden 		timeout = (1000/*ms*/ * 100/*us*/ * TWA_REQUEST_TIMEOUT_PERIOD);
1274a4dd1e26Swrstuden 
1275a4dd1e26Swrstuden 		microtime(&t1);
1276a4dd1e26Swrstuden 
1277a4dd1e26Swrstuden 		timeout += t1.tv_usec;
1278a4dd1e26Swrstuden 
1279a4dd1e26Swrstuden 		do {
12807cfa6f22Swrstuden 			s = splbio();
1281a4dd1e26Swrstuden 			twa_done(tr->tr_sc);
12827cfa6f22Swrstuden 			splx(s);
1283a4dd1e26Swrstuden 			if (tr->tr_status != TWA_CMD_BUSY)
1284a4dd1e26Swrstuden 				break;
1285a4dd1e26Swrstuden 			microtime(&t1);
1286a4dd1e26Swrstuden 		} while (t1.tv_usec <= timeout);
1287a4dd1e26Swrstuden 
1288a4dd1e26Swrstuden 		if (tr->tr_status != TWA_CMD_COMPLETE) {
1289a4dd1e26Swrstuden 			error = ETIMEDOUT;
1290a4dd1e26Swrstuden 			break;
1291a4dd1e26Swrstuden 		}
1292a4dd1e26Swrstuden 
1293a4dd1e26Swrstuden 		if ((error = tr->tr_command->command.cmd_pkt_9k.status))
1294a4dd1e26Swrstuden 			break;
1295a4dd1e26Swrstuden 
1296a4dd1e26Swrstuden 		cmd_hdr = (struct twa_command_header *)(tr->tr_data);
1297a4dd1e26Swrstuden 		if ((cmd_hdr->status_block.error) /* aen_code */
1298a4dd1e26Swrstuden 				== TWA_AEN_QUEUE_EMPTY)
1299a4dd1e26Swrstuden 			break;
1300a4dd1e26Swrstuden 		(void)twa_enqueue_aen(sc, cmd_hdr);
1301a4dd1e26Swrstuden 
1302a4dd1e26Swrstuden 		free(tr->tr_data, M_DEVBUF);
1303a4dd1e26Swrstuden 		twa_release_request(tr);
1304a4dd1e26Swrstuden 	}
1305a4dd1e26Swrstuden out:
1306a4dd1e26Swrstuden 	if (tr) {
1307a4dd1e26Swrstuden 		if (tr->tr_data)
1308a4dd1e26Swrstuden 			free(tr->tr_data, M_DEVBUF);
1309a4dd1e26Swrstuden 
1310a4dd1e26Swrstuden 		twa_release_request(tr);
1311a4dd1e26Swrstuden 	}
1312a4dd1e26Swrstuden 	return(error);
1313a4dd1e26Swrstuden }
1314a4dd1e26Swrstuden 
13157cfa6f22Swrstuden 
13167693ded0Sbouyer #if 0
13177cfa6f22Swrstuden static void
13187cfa6f22Swrstuden twa_check_response_q(struct twa_request *tr, int clear)
13197cfa6f22Swrstuden {
13207cfa6f22Swrstuden 	int j;
13217cfa6f22Swrstuden 	static int i = 0;
13227cfa6f22Swrstuden 	static struct twa_request	*req = 0;
13237cfa6f22Swrstuden 	static struct buf		*hist[255];
13247cfa6f22Swrstuden 
13257cfa6f22Swrstuden 
13267cfa6f22Swrstuden 	if (clear) {
13277cfa6f22Swrstuden 		i = 0;
13287cfa6f22Swrstuden 		for (j = 0; j < 255; j++)
13297cfa6f22Swrstuden 			hist[j] = 0;
13307cfa6f22Swrstuden 		return;
13317cfa6f22Swrstuden 	}
13327cfa6f22Swrstuden 
13337cfa6f22Swrstuden 	if (req == 0)
13347cfa6f22Swrstuden 		req = tr;
13357cfa6f22Swrstuden 
13367cfa6f22Swrstuden 	if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_EXTERNAL) != 0) {
1337c8bb344cSdrochner 		/* XXX this is bogus ! req can't be anything else but tr ! */
13387cfa6f22Swrstuden 		if (req->tr_request_id == tr->tr_request_id)
13397cfa6f22Swrstuden 			panic("req id: %d on controller queue twice",
13407cfa6f22Swrstuden 		    	    tr->tr_request_id);
13417cfa6f22Swrstuden 
13427cfa6f22Swrstuden 		for (j = 0; j < i; j++)
13437cfa6f22Swrstuden 			if (tr->bp == hist[j])
13447cfa6f22Swrstuden 				panic("req id: %d buf found twice",
13457cfa6f22Swrstuden 		    	    	    tr->tr_request_id);
13467cfa6f22Swrstuden 		}
13477cfa6f22Swrstuden 	req = tr;
13487cfa6f22Swrstuden 
13497cfa6f22Swrstuden 	hist[i++] = req->bp;
13507cfa6f22Swrstuden }
13517cfa6f22Swrstuden #endif
13527cfa6f22Swrstuden 
1353a4dd1e26Swrstuden static int
twa_done(struct twa_softc * sc)1354a4dd1e26Swrstuden twa_done(struct twa_softc *sc)
1355a4dd1e26Swrstuden {
1356a4dd1e26Swrstuden 	union twa_response_queue	rq;
1357a4dd1e26Swrstuden 	struct twa_request		*tr;
13587cfa6f22Swrstuden 	int				rv = 0;
13598c670781Ssimonb 	uint32_t			status_reg;
1360a4dd1e26Swrstuden 
1361a4dd1e26Swrstuden 	for (;;) {
1362a4dd1e26Swrstuden 		status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
13637cfa6f22Swrstuden 		if ((rv = twa_check_ctlr_state(sc, status_reg)))
1364a4dd1e26Swrstuden 			break;
1365a4dd1e26Swrstuden 		if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY)
1366a4dd1e26Swrstuden 			break;
1367a4dd1e26Swrstuden 		/* Response queue is not empty. */
13680528da67Sjoerg 		rq.value = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET);
1369a4dd1e26Swrstuden 		tr = sc->sc_twa_request + rq.u.response_id;
13707693ded0Sbouyer #if 0
13717cfa6f22Swrstuden 		twa_check_response_q(tr, 0);
13727cfa6f22Swrstuden #endif
1373a4dd1e26Swrstuden 		/* Unmap the command packet, and any associated data buffer. */
1374a4dd1e26Swrstuden 		twa_unmap_request(tr);
1375a4dd1e26Swrstuden 
1376a4dd1e26Swrstuden 		tr->tr_status = TWA_CMD_COMPLETE;
1377a4dd1e26Swrstuden 		TAILQ_REMOVE(&tr->tr_sc->twa_busy, tr, tr_link);
1378a4dd1e26Swrstuden 
1379a4dd1e26Swrstuden 		if (tr->tr_callback)
1380a4dd1e26Swrstuden 			tr->tr_callback(tr);
1381a4dd1e26Swrstuden 	}
1382a4dd1e26Swrstuden 	(void)twa_drain_pending_queue(sc);
1383a4dd1e26Swrstuden 
13847693ded0Sbouyer #if 0
13857cfa6f22Swrstuden 	twa_check_response_q(NULL, 1);
13867cfa6f22Swrstuden #endif
13877cfa6f22Swrstuden 	return(rv);
1388a4dd1e26Swrstuden }
1389a4dd1e26Swrstuden 
1390a4dd1e26Swrstuden /*
1391a4dd1e26Swrstuden  * Function name:	twa_init_ctlr
1392a4dd1e26Swrstuden  * Description:		Establishes a logical connection with the controller.
1393a4dd1e26Swrstuden  *			If bundled with firmware, determines whether or not
139427acbcf9Sjoerg  *			the driver is compatible with the firmware on the
139527acbcf9Sjoerg  *			controller, before proceeding to work with it.
1396a4dd1e26Swrstuden  *
1397a4dd1e26Swrstuden  * Input:		sc	-- ptr to per ctlr structure
1398a4dd1e26Swrstuden  * Output:		None
1399a4dd1e26Swrstuden  * Return value:	0	-- success
1400a4dd1e26Swrstuden  *			non-zero-- failure
1401a4dd1e26Swrstuden  */
1402a4dd1e26Swrstuden static int
twa_init_ctlr(struct twa_softc * sc)1403a4dd1e26Swrstuden twa_init_ctlr(struct twa_softc *sc)
1404a4dd1e26Swrstuden {
14058c670781Ssimonb 	uint16_t	fw_on_ctlr_srl = 0;
14068c670781Ssimonb 	uint16_t	fw_on_ctlr_arch_id = 0;
14078c670781Ssimonb 	uint16_t	fw_on_ctlr_branch = 0;
14088c670781Ssimonb 	uint16_t	fw_on_ctlr_build = 0;
14098c670781Ssimonb 	uint32_t	init_connect_result = 0;
1410a4dd1e26Swrstuden 	int		error = 0;
1411a4dd1e26Swrstuden 
1412a4dd1e26Swrstuden 	/* Wait for the controller to become ready. */
1413a4dd1e26Swrstuden 	if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY,
1414a4dd1e26Swrstuden 					TWA_REQUEST_TIMEOUT_PERIOD)) {
1415a4dd1e26Swrstuden 		return(ENXIO);
1416a4dd1e26Swrstuden 	}
1417a4dd1e26Swrstuden 	/* Drain the response queue. */
1418a4dd1e26Swrstuden 	if (twa_drain_response_queue(sc))
1419a4dd1e26Swrstuden 		return(1);
1420a4dd1e26Swrstuden 
1421a4dd1e26Swrstuden 	/* Establish a logical connection with the controller. */
1422a4dd1e26Swrstuden 	if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS,
1423a4dd1e26Swrstuden 			TWA_EXTENDED_INIT_CONNECT, TWA_CURRENT_FW_SRL,
1424a4dd1e26Swrstuden 			TWA_9000_ARCH_ID, TWA_CURRENT_FW_BRANCH,
1425a4dd1e26Swrstuden 			TWA_CURRENT_FW_BUILD, &fw_on_ctlr_srl,
1426a4dd1e26Swrstuden 			&fw_on_ctlr_arch_id, &fw_on_ctlr_branch,
1427a4dd1e26Swrstuden 			&fw_on_ctlr_build, &init_connect_result))) {
1428a4dd1e26Swrstuden 		return(error);
1429a4dd1e26Swrstuden 	}
1430a4dd1e26Swrstuden 	twa_drain_aen_queue(sc);
1431a4dd1e26Swrstuden 
1432a4dd1e26Swrstuden 	/* Set controller state to initialized. */
1433a4dd1e26Swrstuden 	sc->twa_state &= ~TWA_STATE_SHUTDOWN;
1434a4dd1e26Swrstuden 	return(0);
1435a4dd1e26Swrstuden }
1436a4dd1e26Swrstuden 
1437a4dd1e26Swrstuden static int
twa_setup(device_t self)1438916bdfa5Spgoyette twa_setup(device_t self)
1439a4dd1e26Swrstuden {
1440916bdfa5Spgoyette 	struct twa_softc *sc;
1441a4dd1e26Swrstuden 	struct tw_cl_event_packet *aen_queue;
1442a4dd1e26Swrstuden 	uint32_t		i = 0;
1443a4dd1e26Swrstuden 	int			error = 0;
1444a4dd1e26Swrstuden 
1445916bdfa5Spgoyette 	sc = device_private(self);
1446916bdfa5Spgoyette 
1447a4dd1e26Swrstuden 	/* Initialize request queues. */
1448a4dd1e26Swrstuden 	TAILQ_INIT(&sc->twa_free);
1449a4dd1e26Swrstuden 	TAILQ_INIT(&sc->twa_busy);
1450a4dd1e26Swrstuden 	TAILQ_INIT(&sc->twa_pending);
1451a4dd1e26Swrstuden 
1452a4dd1e26Swrstuden 	sc->twa_sc_flags = 0;
1453a4dd1e26Swrstuden 
1454a4dd1e26Swrstuden 	if (twa_alloc_req_pkts(sc, TWA_Q_LENGTH)) {
1455a4dd1e26Swrstuden 
1456a4dd1e26Swrstuden 		return(ENOMEM);
1457a4dd1e26Swrstuden 	}
1458a4dd1e26Swrstuden 
1459a4dd1e26Swrstuden 	/* Allocate memory for the AEN queue. */
1460f0b22f96Ssimonb 	if ((aen_queue = malloc(sizeof(struct tw_cl_event_packet) *
1461f0b22f96Ssimonb 	    TWA_Q_LENGTH, M_DEVBUF, M_WAITOK)) == NULL) {
1462a4dd1e26Swrstuden 		/*
1463a4dd1e26Swrstuden 		 * This should not cause us to return error.  We will only be
1464a4dd1e26Swrstuden 		 * unable to support AEN's.  But then, we will have to check
1465a4dd1e26Swrstuden 		 * time and again to see if we can support AEN's, if we
1466a4dd1e26Swrstuden 		 * continue.  So, we will just return error.
1467a4dd1e26Swrstuden 		 */
1468a4dd1e26Swrstuden 		return (ENOMEM);
1469a4dd1e26Swrstuden 	}
1470a4dd1e26Swrstuden 	/* Initialize the aen queue. */
1471a4dd1e26Swrstuden 	memset(aen_queue, 0, sizeof(struct tw_cl_event_packet) * TWA_Q_LENGTH);
1472a4dd1e26Swrstuden 
1473a4dd1e26Swrstuden 	for (i = 0; i < TWA_Q_LENGTH; i++)
1474a4dd1e26Swrstuden 		sc->twa_aen_queue[i] = &(aen_queue[i]);
1475a4dd1e26Swrstuden 
1476a4dd1e26Swrstuden 	twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1477a4dd1e26Swrstuden 		TWA_CONTROL_DISABLE_INTERRUPTS);
1478a4dd1e26Swrstuden 
1479a4dd1e26Swrstuden 	/* Initialize the controller. */
1480a4dd1e26Swrstuden 	if ((error = twa_init_ctlr(sc))) {
1481a4dd1e26Swrstuden 		/* Soft reset the controller, and try one more time. */
1482a4dd1e26Swrstuden 
1483f0b22f96Ssimonb 		printf("%s: controller initialization failed. "
1484d1934bddSjakllsch 		    "Retrying initialization\n", device_xname(sc->twa_dv));
1485a4dd1e26Swrstuden 
1486a4dd1e26Swrstuden 		if ((error = twa_soft_reset(sc)) == 0)
1487a4dd1e26Swrstuden 			error = twa_init_ctlr(sc);
1488a4dd1e26Swrstuden 	}
1489a4dd1e26Swrstuden 
1490a4dd1e26Swrstuden 	twa_describe_controller(sc);
1491a4dd1e26Swrstuden 
14922685996bSthorpej 	error = twa_request_bus_scan(self, NULL, NULL);
1493a4dd1e26Swrstuden 
1494a4dd1e26Swrstuden 	twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1495a4dd1e26Swrstuden 		TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT |
1496a4dd1e26Swrstuden 		TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT |
1497a4dd1e26Swrstuden 		TWA_CONTROL_ENABLE_INTERRUPTS);
1498a4dd1e26Swrstuden 
1499a4dd1e26Swrstuden 	return (error);
1500a4dd1e26Swrstuden }
1501a4dd1e26Swrstuden 
1502a4dd1e26Swrstuden void *twa_sdh;
1503a4dd1e26Swrstuden 
1504a4dd1e26Swrstuden static void
twa_attach(device_t parent,device_t self,void * aux)1505a591bc88Scegger twa_attach(device_t parent, device_t self, void *aux)
1506a4dd1e26Swrstuden {
1507a4dd1e26Swrstuden 	struct pci_attach_args *pa;
1508a4dd1e26Swrstuden 	struct twa_softc *sc;
1509a4dd1e26Swrstuden 	pci_chipset_tag_t pc;
1510a4dd1e26Swrstuden 	pcireg_t csr;
1511a4dd1e26Swrstuden 	pci_intr_handle_t ih;
1512a4dd1e26Swrstuden 	const char *intrstr;
1513e057d5fcSmanu 	const struct sysctlnode *node;
15147433c417Schs 	const struct twa_pci_identity *entry;
1515e057d5fcSmanu 	int i;
15161fe12cbbSjoerg 	bool use_64bit;
1517e58a356cSchristos 	char intrbuf[PCI_INTRSTR_LEN];
1518a4dd1e26Swrstuden 
1519b8169823Scegger 	sc = device_private(self);
1520a4dd1e26Swrstuden 
1521d1934bddSjakllsch 	sc->twa_dv = self;
1522d1934bddSjakllsch 
1523a4dd1e26Swrstuden 	pa = aux;
1524a4dd1e26Swrstuden 	pc = pa->pa_pc;
1525a4dd1e26Swrstuden 	sc->pc = pa->pa_pc;
1526a4dd1e26Swrstuden 	sc->tag = pa->pa_tag;
1527a4dd1e26Swrstuden 
15287433c417Schs 	entry = twa_lookup(pa->pa_id);
15297433c417Schs 	pci_aprint_devinfo_fancy(pa, "RAID controller", entry->name, 1);
1530a4dd1e26Swrstuden 
1531a8d4826eSdholland 	sc->sc_quirks = 0;
1532a8d4826eSdholland 
1533a4dd1e26Swrstuden 	if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9000) {
1534d72a9bc7Sjoerg 		sc->sc_nunits = TWA_MAX_UNITS;
15351fe12cbbSjoerg 		use_64bit = false;
1536a4dd1e26Swrstuden 		if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0,
1537a4dd1e26Swrstuden 	    	    &sc->twa_bus_iot, &sc->twa_bus_ioh, NULL, NULL)) {
1538d1934bddSjakllsch 			aprint_error_dev(sc->twa_dv, "can't map i/o space\n");
1539a4dd1e26Swrstuden 			return;
1540a4dd1e26Swrstuden 		}
1541a4dd1e26Swrstuden 	} else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9550) {
1542d72a9bc7Sjoerg 		sc->sc_nunits = TWA_MAX_UNITS;
15431fe12cbbSjoerg 		use_64bit = true;
15441fe12cbbSjoerg 		if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08,
15451fe12cbbSjoerg 	    	    PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot,
15461fe12cbbSjoerg 		    &sc->twa_bus_ioh, NULL, NULL)) {
1547d1934bddSjakllsch 			aprint_error_dev(sc->twa_dv, "can't map mem space\n");
15481fe12cbbSjoerg 			return;
15491fe12cbbSjoerg 		}
15501fe12cbbSjoerg 	} else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9650) {
15511fe12cbbSjoerg 		sc->sc_nunits = TWA_9650_MAX_UNITS;
15521fe12cbbSjoerg 		use_64bit = true;
15531fe12cbbSjoerg 		if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08,
15541fe12cbbSjoerg 	    	    PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot,
15551fe12cbbSjoerg 		    &sc->twa_bus_ioh, NULL, NULL)) {
1556d1934bddSjakllsch 			aprint_error_dev(sc->twa_dv, "can't map mem space\n");
15571fe12cbbSjoerg 			return;
15581fe12cbbSjoerg 		}
1559a8d4826eSdholland 		sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG;
15601fe12cbbSjoerg 	} else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9690) {
15611fe12cbbSjoerg 		sc->sc_nunits = TWA_9690_MAX_UNITS;
15621fe12cbbSjoerg 		use_64bit = true;
1563a4dd1e26Swrstuden 		if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08,
1564a4dd1e26Swrstuden 	    	    PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot,
1565a4dd1e26Swrstuden 		    &sc->twa_bus_ioh, NULL, NULL)) {
1566d1934bddSjakllsch 			aprint_error_dev(sc->twa_dv, "can't map mem space\n");
1567a4dd1e26Swrstuden 			return;
1568a4dd1e26Swrstuden 		}
1569a8d4826eSdholland 		sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG;
1570a4dd1e26Swrstuden 	} else {
1571d72a9bc7Sjoerg 		sc->sc_nunits = 0;
15721fe12cbbSjoerg 		use_64bit = false;
15738bc54e5bSmsaitoh 		aprint_error_dev(sc->twa_dv,
15748bc54e5bSmsaitoh 		    "product id 0x%02x not recognized\n",
15759d57c800Scegger 		    PCI_PRODUCT(pa->pa_id));
1576a4dd1e26Swrstuden 		return;
1577a4dd1e26Swrstuden 	}
15781fe12cbbSjoerg 
1579d2768df2Sjoerg 	if (pci_dma64_available(pa) && use_64bit) {
1580d1934bddSjakllsch 		aprint_verbose_dev(self, "64-bit DMA addressing active\n");
15811fe12cbbSjoerg 		sc->twa_dma_tag = pa->pa_dmat64;
1582d2768df2Sjoerg 	} else {
15831fe12cbbSjoerg 		sc->twa_dma_tag = pa->pa_dmat;
1584d2768df2Sjoerg 	}
15851fe12cbbSjoerg 
1586d72a9bc7Sjoerg  	sc->sc_product_id = PCI_PRODUCT(pa->pa_id);
1587a4dd1e26Swrstuden 	/* Enable the device. */
1588a4dd1e26Swrstuden 	csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
1589a4dd1e26Swrstuden 
1590a4dd1e26Swrstuden 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
1591a4dd1e26Swrstuden 	    csr | PCI_COMMAND_MASTER_ENABLE);
1592a4dd1e26Swrstuden 
1593a4dd1e26Swrstuden 	/* Map and establish the interrupt. */
1594a4dd1e26Swrstuden 	if (pci_intr_map(pa, &ih)) {
1595d1934bddSjakllsch 		aprint_error_dev(sc->twa_dv, "can't map interrupt\n");
1596a4dd1e26Swrstuden 		return;
1597a4dd1e26Swrstuden 	}
1598e58a356cSchristos 	intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
1599a4dd1e26Swrstuden 
1600d3cda613Sjdolecek 	sc->twa_ih = pci_intr_establish_xname(pc, ih, IPL_BIO, twa_intr, sc,
1601d3cda613Sjdolecek 	    device_xname(self));
1602a4dd1e26Swrstuden 	if (sc->twa_ih == NULL) {
1603d1934bddSjakllsch 		aprint_error_dev(sc->twa_dv, "can't establish interrupt%s%s\n",
1604a4dd1e26Swrstuden 			(intrstr) ? " at " : "",
1605a4dd1e26Swrstuden 			(intrstr) ? intrstr : "");
1606a4dd1e26Swrstuden 		return;
1607a4dd1e26Swrstuden 	}
1608a4dd1e26Swrstuden 
1609a4dd1e26Swrstuden 	if (intrstr != NULL)
16108bc54e5bSmsaitoh 		aprint_normal_dev(sc->twa_dv, "interrupting at %s\n", intrstr);
1611a4dd1e26Swrstuden 
1612916bdfa5Spgoyette 	twa_setup(self);
1613a4dd1e26Swrstuden 
1614a4dd1e26Swrstuden 	if (twa_sdh == NULL)
1615a4dd1e26Swrstuden 		twa_sdh = shutdownhook_establish(twa_shutdown, NULL);
1616a4dd1e26Swrstuden 
1617e057d5fcSmanu 	/* sysctl set-up for 3ware cli */
1618e057d5fcSmanu 	if (sysctl_createv(NULL, 0, NULL, &node,
1619d1934bddSjakllsch 				0, CTLTYPE_NODE, device_xname(sc->twa_dv),
1620e057d5fcSmanu 				SYSCTL_DESCR("twa driver information"),
1621e057d5fcSmanu 				NULL, 0, NULL, 0,
1622e057d5fcSmanu 				CTL_HW, CTL_CREATE, CTL_EOL) != 0) {
16238bc54e5bSmsaitoh 		aprint_error_dev(sc->twa_dv,
16248bc54e5bSmsaitoh 		    "could not create %s.%s sysctl node\n",
16258bc54e5bSmsaitoh 		    "hw", device_xname(sc->twa_dv));
1626e057d5fcSmanu 		return;
1627e057d5fcSmanu 	}
1628e057d5fcSmanu 	if ((i = sysctl_createv(NULL, 0, NULL, NULL,
1629e057d5fcSmanu 				0, CTLTYPE_STRING, "driver_version",
1630e057d5fcSmanu 				SYSCTL_DESCR("twa driver version"),
1631dd579972Sjoerg 				NULL, 0, __UNCONST(&twaver), 0,
1632e057d5fcSmanu 				CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL))
1633e057d5fcSmanu 				!= 0) {
16348bc54e5bSmsaitoh 		aprint_error_dev(sc->twa_dv,
16358bc54e5bSmsaitoh 		    "could not create %s.%s.driver_version sysctl\n",
16368bc54e5bSmsaitoh 		    "hw", device_xname(sc->twa_dv));
1637e057d5fcSmanu 		return;
1638e057d5fcSmanu 	}
1639e057d5fcSmanu 
1640a4dd1e26Swrstuden 	return;
1641a4dd1e26Swrstuden }
1642a4dd1e26Swrstuden 
1643a4dd1e26Swrstuden static void
twa_shutdown(void * arg)1644168cd830Schristos twa_shutdown(void *arg)
1645a4dd1e26Swrstuden {
1646a4dd1e26Swrstuden 	extern struct cfdriver twa_cd;
1647a4dd1e26Swrstuden 	struct twa_softc *sc;
1648d64c5a36Schristos 	int i, unit;
1649a4dd1e26Swrstuden 
1650a4dd1e26Swrstuden 	for (i = 0; i < twa_cd.cd_ndevs; i++) {
16511f459d82Stsutsui 		if ((sc = device_lookup_private(&twa_cd, i)) == NULL)
1652a4dd1e26Swrstuden 			continue;
1653a4dd1e26Swrstuden 
1654d72a9bc7Sjoerg 		for (unit = 0; unit < sc->sc_nunits; unit++)
1655a4dd1e26Swrstuden 			if (sc->sc_units[unit].td_dev != NULL)
1656a4dd1e26Swrstuden 				(void) config_detach(sc->sc_units[unit].td_dev,
1657a4dd1e26Swrstuden 					DETACH_FORCE | DETACH_QUIET);
1658a4dd1e26Swrstuden 
1659a4dd1e26Swrstuden 		twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1660a4dd1e26Swrstuden 			TWA_CONTROL_DISABLE_INTERRUPTS);
1661a4dd1e26Swrstuden 
1662a4dd1e26Swrstuden 		/* Let the controller know that we are going down. */
1663d64c5a36Schristos 		(void)twa_init_connection(sc, TWA_SHUTDOWN_MESSAGE_CREDITS,
1664a4dd1e26Swrstuden 				0, 0, 0, 0, 0,
1665a4dd1e26Swrstuden 				NULL, NULL, NULL, NULL, NULL);
1666a4dd1e26Swrstuden 	}
1667a4dd1e26Swrstuden }
1668a4dd1e26Swrstuden 
1669a4dd1e26Swrstuden void
twa_register_callbacks(struct twa_softc * sc,int unit,const struct twa_callbacks * tcb)1670a4dd1e26Swrstuden twa_register_callbacks(struct twa_softc *sc, int unit,
1671a4dd1e26Swrstuden     const struct twa_callbacks *tcb)
1672a4dd1e26Swrstuden {
1673a4dd1e26Swrstuden 
1674a4dd1e26Swrstuden 	sc->sc_units[unit].td_callbacks = tcb;
1675a4dd1e26Swrstuden }
1676a4dd1e26Swrstuden 
1677a4dd1e26Swrstuden /*
1678a4dd1e26Swrstuden  * Print autoconfiguration message for a sub-device
1679a4dd1e26Swrstuden  */
1680a4dd1e26Swrstuden static int
twa_print(void * aux,const char * pnp)1681a4dd1e26Swrstuden twa_print(void *aux, const char *pnp)
1682a4dd1e26Swrstuden {
1683a4dd1e26Swrstuden 	struct twa_attach_args *twaa;
1684a4dd1e26Swrstuden 
1685a4dd1e26Swrstuden 	twaa = aux;
1686a4dd1e26Swrstuden 
1687a4dd1e26Swrstuden 	if (pnp !=NULL)
1688a4dd1e26Swrstuden 		aprint_normal("block device at %s\n", pnp);
1689a4dd1e26Swrstuden 	aprint_normal(" unit %d\n", twaa->twaa_unit);
1690a4dd1e26Swrstuden 	return (UNCONF);
1691a4dd1e26Swrstuden }
1692a4dd1e26Swrstuden 
1693a4dd1e26Swrstuden static void
twa_fillin_sgl(struct twa_sg * sgl,bus_dma_segment_t * segs,int nsegments)1694a4dd1e26Swrstuden twa_fillin_sgl(struct twa_sg *sgl, bus_dma_segment_t *segs, int nsegments)
1695a4dd1e26Swrstuden {
1696a4dd1e26Swrstuden 	int	i;
1697a4dd1e26Swrstuden 	for (i = 0; i < nsegments; i++) {
1698a4dd1e26Swrstuden 		sgl[i].address = segs[i].ds_addr;
16998c670781Ssimonb 		sgl[i].length = (uint32_t)(segs[i].ds_len);
1700a4dd1e26Swrstuden 	}
1701a4dd1e26Swrstuden }
1702a4dd1e26Swrstuden 
1703a4dd1e26Swrstuden static int
twa_submit_io(struct twa_request * tr)1704a4dd1e26Swrstuden twa_submit_io(struct twa_request *tr)
1705a4dd1e26Swrstuden {
1706a4dd1e26Swrstuden 	int	error;
1707a4dd1e26Swrstuden 
1708a4dd1e26Swrstuden 	if ((error = twa_start(tr))) {
1709a4dd1e26Swrstuden 		if (error == EBUSY)
1710a4dd1e26Swrstuden 			error = 0; /* request is in the pending queue */
1711a4dd1e26Swrstuden 		else {
1712a4dd1e26Swrstuden 			tr->tr_error = error;
1713a4dd1e26Swrstuden 		}
1714a4dd1e26Swrstuden 	}
1715a4dd1e26Swrstuden 	return(error);
1716a4dd1e26Swrstuden }
1717a4dd1e26Swrstuden 
1718a4dd1e26Swrstuden /*
1719a4dd1e26Swrstuden  * Function name:	twa_setup_data_dmamap
1720a4dd1e26Swrstuden  * Description:		Callback of bus_dmamap_load for the buffer associated
1721a4dd1e26Swrstuden  *			with data.  Updates the cmd pkt (size/sgl_entries
1722a4dd1e26Swrstuden  *			fields, as applicable) to reflect the number of sg
1723a4dd1e26Swrstuden  *			elements.
1724a4dd1e26Swrstuden  *
1725a4dd1e26Swrstuden  * Input:		arg	-- ptr to request pkt
1726a4dd1e26Swrstuden  *			segs	-- ptr to a list of segment descriptors
1727a4dd1e26Swrstuden  *			nsegments--# of segments
1728a4dd1e26Swrstuden  *			error	-- 0 if no errors encountered before callback,
1729a4dd1e26Swrstuden  *				   non-zero if errors were encountered
1730a4dd1e26Swrstuden  * Output:		None
1731a4dd1e26Swrstuden  * Return value:	None
1732a4dd1e26Swrstuden  */
1733a4dd1e26Swrstuden static int
twa_setup_data_dmamap(void * arg,bus_dma_segment_t * segs,int nsegments)1734d72a9bc7Sjoerg twa_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments)
1735a4dd1e26Swrstuden {
1736a4dd1e26Swrstuden 	struct twa_request		*tr = (struct twa_request *)arg;
1737a4dd1e26Swrstuden 	struct twa_command_packet	*cmdpkt = tr->tr_command;
1738a4dd1e26Swrstuden 	struct twa_command_9k		*cmd9k;
1739a4dd1e26Swrstuden 	union twa_command_7k		*cmd7k;
17408c670781Ssimonb 	uint8_t				sgl_offset;
1741d72a9bc7Sjoerg 	int				error;
1742a4dd1e26Swrstuden 
1743a4dd1e26Swrstuden 	if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) {
1744a4dd1e26Swrstuden 		cmd9k = &(cmdpkt->command.cmd_pkt_9k);
1745a4dd1e26Swrstuden 		twa_fillin_sgl(&(cmd9k->sg_list[0]), segs, nsegments);
1746a4dd1e26Swrstuden 		cmd9k->sgl_entries += nsegments - 1;
1747a4dd1e26Swrstuden 	} else {
1748a4dd1e26Swrstuden 		/* It's a 7000 command packet. */
1749a4dd1e26Swrstuden 		cmd7k = &(cmdpkt->command.cmd_pkt_7k);
1750a4dd1e26Swrstuden 		if ((sgl_offset = cmdpkt->command.cmd_pkt_7k.generic.sgl_offset))
1751a4dd1e26Swrstuden 			twa_fillin_sgl((struct twa_sg *)
17528c670781Ssimonb 					(((uint32_t *)cmd7k) + sgl_offset),
1753a4dd1e26Swrstuden 					segs, nsegments);
1754a4dd1e26Swrstuden 		/* Modify the size field, based on sg address size. */
1755a4dd1e26Swrstuden 		cmd7k->generic.size +=
1756a4dd1e26Swrstuden 			((TWA_64BIT_ADDRESSES ? 3 : 2) * nsegments);
1757a4dd1e26Swrstuden 	}
1758a4dd1e26Swrstuden 	if (tr->tr_flags & TWA_CMD_DATA_IN)
1759a4dd1e26Swrstuden 		bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0,
17601fe12cbbSjoerg 			tr->tr_length, BUS_DMASYNC_PREWRITE);
1761a4dd1e26Swrstuden 	if (tr->tr_flags & TWA_CMD_DATA_OUT) {
1762a4dd1e26Swrstuden 		/*
1763a4dd1e26Swrstuden 		 * If we're using an alignment buffer, and we're
1764a4dd1e26Swrstuden 		 * writing data, copy the real data out.
1765a4dd1e26Swrstuden 		 */
1766a4dd1e26Swrstuden 		if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED)
1767a4dd1e26Swrstuden 			memcpy(tr->tr_data, tr->tr_real_data,
1768a4dd1e26Swrstuden 				tr->tr_real_length);
1769a4dd1e26Swrstuden 		bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0,
17701fe12cbbSjoerg 			tr->tr_length, BUS_DMASYNC_PREREAD);
1771a4dd1e26Swrstuden 	}
1772a4dd1e26Swrstuden 	error = twa_submit_io(tr);
1773a4dd1e26Swrstuden 
1774a4dd1e26Swrstuden 	if (error) {
1775a4dd1e26Swrstuden 		twa_unmap_request(tr);
1776a4dd1e26Swrstuden 		/*
1777a4dd1e26Swrstuden 		 * If the caller had been returned EINPROGRESS, and he has
1778a4dd1e26Swrstuden 		 * registered a callback for handling completion, the callback
1779a4dd1e26Swrstuden 		 * will never get called because we were unable to submit the
1780a4dd1e26Swrstuden 		 * request.  So, free up the request right here.
1781a4dd1e26Swrstuden 		 */
1782d72a9bc7Sjoerg 		if (tr->tr_callback)
1783a4dd1e26Swrstuden 			twa_release_request(tr);
1784a4dd1e26Swrstuden 	}
1785a4dd1e26Swrstuden 	return (error);
1786a4dd1e26Swrstuden }
1787a4dd1e26Swrstuden 
1788a4dd1e26Swrstuden /*
1789a4dd1e26Swrstuden  * Function name:	twa_map_request
1790a4dd1e26Swrstuden  * Description:		Maps a cmd pkt and data associated with it, into
1791a4dd1e26Swrstuden  *			DMA'able memory.
1792a4dd1e26Swrstuden  *
1793a4dd1e26Swrstuden  * Input:		tr	-- ptr to request pkt
1794a4dd1e26Swrstuden  * Output:		None
1795a4dd1e26Swrstuden  * Return value:	0	-- success
1796a4dd1e26Swrstuden  *			non-zero-- failure
1797a4dd1e26Swrstuden  */
1798a4dd1e26Swrstuden int
twa_map_request(struct twa_request * tr)1799a4dd1e26Swrstuden twa_map_request(struct twa_request *tr)
1800a4dd1e26Swrstuden {
1801a4dd1e26Swrstuden 	struct twa_softc	*sc = tr->tr_sc;
1802e62ee4d4Spara 	int			 s, rv, rc;
1803a4dd1e26Swrstuden 
1804a4dd1e26Swrstuden 	/* If the command involves data, map that too. */
1805a4dd1e26Swrstuden 	if (tr->tr_data != NULL) {
1806a4dd1e26Swrstuden 
1807a4dd1e26Swrstuden 		if (((u_long)tr->tr_data & (511)) != 0) {
1808a4dd1e26Swrstuden 			tr->tr_flags |= TWA_CMD_DATA_COPY_NEEDED;
1809a4dd1e26Swrstuden 			tr->tr_real_data = tr->tr_data;
1810a4dd1e26Swrstuden 			tr->tr_real_length = tr->tr_length;
1811a4dd1e26Swrstuden 			s = splvm();
1812e62ee4d4Spara 			rc = uvm_km_kmem_alloc(kmem_va_arena,
1813e62ee4d4Spara 			    tr->tr_length, (VM_NOSLEEP | VM_INSTANTFIT),
1814e62ee4d4Spara 			    (vmem_addr_t *)&tr->tr_data);
1815a4dd1e26Swrstuden 			splx(s);
1816a4dd1e26Swrstuden 
1817e62ee4d4Spara 			if (rc != 0) {
1818a4dd1e26Swrstuden 				tr->tr_data = tr->tr_real_data;
1819a4dd1e26Swrstuden 				tr->tr_length = tr->tr_real_length;
1820a4dd1e26Swrstuden 				return(ENOMEM);
1821a4dd1e26Swrstuden 			}
1822a4dd1e26Swrstuden 			if ((tr->tr_flags & TWA_CMD_DATA_IN) != 0)
1823a4dd1e26Swrstuden 				memcpy(tr->tr_data, tr->tr_real_data,
1824a4dd1e26Swrstuden 					tr->tr_length);
1825a4dd1e26Swrstuden 		}
1826a4dd1e26Swrstuden 
1827a4dd1e26Swrstuden 		/*
1828a4dd1e26Swrstuden 		 * Map the data buffer into bus space and build the S/G list.
1829a4dd1e26Swrstuden 		 */
1830a4dd1e26Swrstuden 		rv = bus_dmamap_load(sc->twa_dma_tag, tr->tr_dma_map,
18311fe12cbbSjoerg 			tr->tr_data, tr->tr_length, NULL,
18321fe12cbbSjoerg 			BUS_DMA_NOWAIT | BUS_DMA_STREAMING);
1833a4dd1e26Swrstuden 
1834a4dd1e26Swrstuden 		if (rv != 0) {
1835a4dd1e26Swrstuden 			if ((tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) != 0) {
1836a4dd1e26Swrstuden 				s = splvm();
1837e62ee4d4Spara 				uvm_km_kmem_free(kmem_va_arena,
18388bc54e5bSmsaitoh 				    (vaddr_t)tr->tr_data, tr->tr_length);
1839a4dd1e26Swrstuden 				splx(s);
1840a4dd1e26Swrstuden 			}
1841a4dd1e26Swrstuden 			return (rv);
1842a4dd1e26Swrstuden 		}
1843a4dd1e26Swrstuden 
1844a4dd1e26Swrstuden 		if ((rv = twa_setup_data_dmamap(tr,
1845a4dd1e26Swrstuden 				tr->tr_dma_map->dm_segs,
1846d72a9bc7Sjoerg 				tr->tr_dma_map->dm_nsegs))) {
1847a4dd1e26Swrstuden 
1848a4dd1e26Swrstuden 			if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) {
1849ae11e465Sbouyer 				s = splvm();
18508bc54e5bSmsaitoh 				uvm_km_kmem_free(kmem_va_arena,
18518bc54e5bSmsaitoh 				    (vaddr_t)tr->tr_data, tr->tr_length);
1852ae11e465Sbouyer 				splx(s);
1853a4dd1e26Swrstuden 				tr->tr_data = tr->tr_real_data;
1854a4dd1e26Swrstuden 				tr->tr_length = tr->tr_real_length;
1855a4dd1e26Swrstuden 			}
1856d72a9bc7Sjoerg 		}
1857a4dd1e26Swrstuden 
1858a4dd1e26Swrstuden 	} else
1859a4dd1e26Swrstuden 		if ((rv = twa_submit_io(tr)))
1860a4dd1e26Swrstuden 			twa_unmap_request(tr);
1861a4dd1e26Swrstuden 
1862a4dd1e26Swrstuden 	return (rv);
1863a4dd1e26Swrstuden }
1864a4dd1e26Swrstuden 
1865a4dd1e26Swrstuden /*
1866a4dd1e26Swrstuden  * Function name:	twa_intr
1867a4dd1e26Swrstuden  * Description:		Interrupt handler.  Determines the kind of interrupt,
1868a4dd1e26Swrstuden  *			and calls the appropriate handler.
1869a4dd1e26Swrstuden  *
1870a4dd1e26Swrstuden  * Input:		sc	-- ptr to per ctlr structure
1871a4dd1e26Swrstuden  * Output:		None
1872a4dd1e26Swrstuden  * Return value:	None
1873a4dd1e26Swrstuden  */
1874a4dd1e26Swrstuden 
1875a4dd1e26Swrstuden static int
twa_intr(void * arg)1876a4dd1e26Swrstuden twa_intr(void *arg)
1877a4dd1e26Swrstuden {
1878073156cfShannken 	int	caught, s, rv __diagused;
1879a4dd1e26Swrstuden 	struct twa_softc *sc;
18808c670781Ssimonb 	uint32_t	status_reg;
1881a4dd1e26Swrstuden 	sc = (struct twa_softc *)arg;
1882a4dd1e26Swrstuden 
1883a4dd1e26Swrstuden 	caught = 0;
1884a4dd1e26Swrstuden 	/* Collect current interrupt status. */
1885a4dd1e26Swrstuden 	status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
1886a4dd1e26Swrstuden 	if (twa_check_ctlr_state(sc, status_reg)) {
1887a4dd1e26Swrstuden 		caught = 1;
1888a4dd1e26Swrstuden 		goto bail;
1889a4dd1e26Swrstuden 	}
1890a4dd1e26Swrstuden 	/* Dispatch based on the kind of interrupt. */
1891a4dd1e26Swrstuden 	if (status_reg & TWA_STATUS_HOST_INTERRUPT) {
1892a4dd1e26Swrstuden 		twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1893a4dd1e26Swrstuden 			TWA_CONTROL_CLEAR_HOST_INTERRUPT);
1894a4dd1e26Swrstuden 		caught = 1;
1895a4dd1e26Swrstuden 	}
1896a4dd1e26Swrstuden 	if ((status_reg & TWA_STATUS_ATTENTION_INTERRUPT) != 0) {
1897a4dd1e26Swrstuden 		twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1898a4dd1e26Swrstuden 			TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT);
1899a4dd1e26Swrstuden 		rv = twa_fetch_aen(sc);
1900a4dd1e26Swrstuden #ifdef DIAGNOSTIC
1901a4dd1e26Swrstuden 		if (rv != 0)
1902a4dd1e26Swrstuden 			printf("%s: unable to retrieve AEN (%d)\n",
1903d1934bddSjakllsch 				device_xname(sc->twa_dv), rv);
1904a4dd1e26Swrstuden #endif
1905a4dd1e26Swrstuden 		caught = 1;
1906a4dd1e26Swrstuden 	}
1907a4dd1e26Swrstuden 	if (status_reg & TWA_STATUS_COMMAND_INTERRUPT) {
1908a4dd1e26Swrstuden 		/* Start any requests that might be in the pending queue. */
1909a4dd1e26Swrstuden 		twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1910a4dd1e26Swrstuden 			TWA_CONTROL_MASK_COMMAND_INTERRUPT);
1911a4dd1e26Swrstuden 		(void)twa_drain_pending_queue(sc);
1912a4dd1e26Swrstuden 		caught = 1;
1913a4dd1e26Swrstuden 	}
1914a4dd1e26Swrstuden 	if (status_reg & TWA_STATUS_RESPONSE_INTERRUPT) {
19157cfa6f22Swrstuden 		s = splbio();
1916a4dd1e26Swrstuden 		twa_done(sc);
19177cfa6f22Swrstuden 		splx(s);
1918a4dd1e26Swrstuden 		caught = 1;
1919a4dd1e26Swrstuden 	}
1920a4dd1e26Swrstuden bail:
1921a4dd1e26Swrstuden 	return (caught);
1922a4dd1e26Swrstuden }
1923a4dd1e26Swrstuden 
1924a4dd1e26Swrstuden /*
1925a4dd1e26Swrstuden  * Accept an open operation on the control device.
1926a4dd1e26Swrstuden  */
1927b949192dSwrstuden static int
twaopen(dev_t dev,int flag,int mode,struct lwp * l)1928168cd830Schristos twaopen(dev_t dev, int flag, int mode, struct lwp *l)
1929a4dd1e26Swrstuden {
1930a4dd1e26Swrstuden 	struct twa_softc *twa;
1931a4dd1e26Swrstuden 
19321f459d82Stsutsui 	if ((twa = device_lookup_private(&twa_cd, minor(dev))) == NULL)
1933a4dd1e26Swrstuden 		return (ENXIO);
1934d72a9bc7Sjoerg 	if ((twa->twa_sc_flags & TWA_STATE_OPEN) != 0)
1935d72a9bc7Sjoerg 		return (EBUSY);
1936a4dd1e26Swrstuden 
1937a4dd1e26Swrstuden 	twa->twa_sc_flags |= TWA_STATE_OPEN;
1938a4dd1e26Swrstuden 
1939a4dd1e26Swrstuden 	return (0);
1940a4dd1e26Swrstuden }
1941a4dd1e26Swrstuden 
1942a4dd1e26Swrstuden /*
1943a4dd1e26Swrstuden  * Accept the last close on the control device.
1944a4dd1e26Swrstuden  */
1945b949192dSwrstuden static int
twaclose(dev_t dev,int flag,int mode,struct lwp * l)1946168cd830Schristos twaclose(dev_t dev, int flag, int mode,
1947168cd830Schristos     struct lwp *l)
1948a4dd1e26Swrstuden {
1949a4dd1e26Swrstuden 	struct twa_softc *twa;
1950a4dd1e26Swrstuden 
19511f459d82Stsutsui 	twa = device_lookup_private(&twa_cd, minor(dev));
1952a4dd1e26Swrstuden 	twa->twa_sc_flags &= ~TWA_STATE_OPEN;
1953a4dd1e26Swrstuden 	return (0);
1954a4dd1e26Swrstuden }
1955a4dd1e26Swrstuden 
1956a4dd1e26Swrstuden /*
1957a4dd1e26Swrstuden  * Function name:	twaioctl
1958a4dd1e26Swrstuden  * Description:		ioctl handler.
1959a4dd1e26Swrstuden  *
1960a4dd1e26Swrstuden  * Input:		sc	-- ptr to per ctlr structure
1961a4dd1e26Swrstuden  *			cmd	-- ioctl cmd
1962a4dd1e26Swrstuden  *			buf	-- ptr to buffer in kernel memory, which is
1963a4dd1e26Swrstuden  *				   a copy of the input buffer in user-space
1964a4dd1e26Swrstuden  * Output:		buf	-- ptr to buffer in kernel memory, which will
1965a4dd1e26Swrstuden  *				   be copied of the output buffer in user-space
1966a4dd1e26Swrstuden  * Return value:	0	-- success
1967a4dd1e26Swrstuden  *			non-zero-- failure
1968a4dd1e26Swrstuden  */
1969b949192dSwrstuden static int
twaioctl(dev_t dev,u_long cmd,void * data,int flag,struct lwp * l)197053524e44Schristos twaioctl(dev_t dev, u_long cmd, void *data, int flag,
1971168cd830Schristos     struct lwp *l)
1972a4dd1e26Swrstuden {
1973a4dd1e26Swrstuden 	struct twa_softc *sc;
1974a4dd1e26Swrstuden 	struct twa_ioctl_9k	*user_buf = (struct twa_ioctl_9k *)data;
1975a4dd1e26Swrstuden 	struct tw_cl_event_packet event_buf;
1976a4dd1e26Swrstuden 	struct twa_request 	*tr = 0;
1977a4dd1e26Swrstuden 	int32_t			event_index = 0;
1978a4dd1e26Swrstuden 	int32_t			start_index;
1979a4dd1e26Swrstuden 	int			s, error = 0;
1980a4dd1e26Swrstuden 
19811f459d82Stsutsui 	sc = device_lookup_private(&twa_cd, minor(dev));
1982a4dd1e26Swrstuden 
1983a4dd1e26Swrstuden 	switch (cmd) {
1984a4dd1e26Swrstuden 	case TW_OSL_IOCTL_FIRMWARE_PASS_THROUGH:
1985a4dd1e26Swrstuden 	{
1986a4dd1e26Swrstuden 		struct twa_command_packet	*cmdpkt;
19878c670781Ssimonb 		uint32_t			data_buf_size_adjusted;
1988a4dd1e26Swrstuden 
1989a4dd1e26Swrstuden 		/* Get a request packet */
1990a4dd1e26Swrstuden 		tr = twa_get_request_wait(sc, 0);
1991a4dd1e26Swrstuden 		KASSERT(tr != NULL);
1992a4dd1e26Swrstuden 		/*
1993a4dd1e26Swrstuden 		 * Make sure that the data buffer sent to firmware is a
1994a4dd1e26Swrstuden 		 * 512 byte multiple in size.
1995a4dd1e26Swrstuden 		 */
1996a4dd1e26Swrstuden 		data_buf_size_adjusted =
1997a4dd1e26Swrstuden 			(user_buf->twa_drvr_pkt.buffer_length + 511) & ~511;
1998a4dd1e26Swrstuden 
1999a4dd1e26Swrstuden 		if ((tr->tr_length = data_buf_size_adjusted)) {
2000a4dd1e26Swrstuden 			if ((tr->tr_data = malloc(data_buf_size_adjusted,
2001a4dd1e26Swrstuden 			    M_DEVBUF, M_WAITOK)) == NULL) {
2002a4dd1e26Swrstuden 				error = ENOMEM;
2003a4dd1e26Swrstuden 				goto fw_passthru_done;
2004a4dd1e26Swrstuden 			}
2005a4dd1e26Swrstuden 			/* Copy the payload. */
2006a4dd1e26Swrstuden 			if ((error = copyin((void *) (user_buf->pdata),
2007a4dd1e26Swrstuden 				(void *) (tr->tr_data),
2008a4dd1e26Swrstuden 				user_buf->twa_drvr_pkt.buffer_length)) != 0) {
2009a4dd1e26Swrstuden 					goto fw_passthru_done;
2010a4dd1e26Swrstuden 			}
2011a4dd1e26Swrstuden 			tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT;
2012a4dd1e26Swrstuden 		}
2013a4dd1e26Swrstuden 		tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_IOCTL;
2014a4dd1e26Swrstuden 		cmdpkt = tr->tr_command;
2015a4dd1e26Swrstuden 
2016a4dd1e26Swrstuden 		/* Copy the command packet. */
2017a4dd1e26Swrstuden 		memcpy(cmdpkt, &(user_buf->twa_cmd_pkt),
2018a4dd1e26Swrstuden 			sizeof(struct twa_command_packet));
2019a4dd1e26Swrstuden 		cmdpkt->command.cmd_pkt_7k.generic.request_id =
2020a4dd1e26Swrstuden 			tr->tr_request_id;
2021a4dd1e26Swrstuden 
2022a4dd1e26Swrstuden 		/* Send down the request, and wait for it to complete. */
2023a4dd1e26Swrstuden 		if ((error = twa_wait_request(tr, TWA_REQUEST_TIMEOUT_PERIOD))) 		{
2024a4dd1e26Swrstuden 			if (error == ETIMEDOUT)
2025a4dd1e26Swrstuden 				break; /* clean-up done by twa_wait_request */
2026a4dd1e26Swrstuden 			goto fw_passthru_done;
2027a4dd1e26Swrstuden 		}
2028a4dd1e26Swrstuden 
2029a4dd1e26Swrstuden 		/* Copy the command packet back into user space. */
2030a4dd1e26Swrstuden 		memcpy(&user_buf->twa_cmd_pkt, cmdpkt,
2031a4dd1e26Swrstuden 			sizeof(struct twa_command_packet));
2032a4dd1e26Swrstuden 
2033a4dd1e26Swrstuden 		/* If there was a payload, copy it back too. */
2034a4dd1e26Swrstuden 		if (tr->tr_length)
2035a4dd1e26Swrstuden 			error = copyout(tr->tr_data, user_buf->pdata,
2036a4dd1e26Swrstuden 					user_buf->twa_drvr_pkt.buffer_length);
2037a4dd1e26Swrstuden fw_passthru_done:
2038a4dd1e26Swrstuden 		/* Free resources. */
2039a4dd1e26Swrstuden 		if (tr->tr_data)
2040a4dd1e26Swrstuden 			free(tr->tr_data, M_DEVBUF);
2041a4dd1e26Swrstuden 
2042a4dd1e26Swrstuden 		if (tr)
2043a4dd1e26Swrstuden 			twa_release_request(tr);
2044a4dd1e26Swrstuden 		break;
2045a4dd1e26Swrstuden 	}
2046a4dd1e26Swrstuden 
2047a4dd1e26Swrstuden 	case TW_OSL_IOCTL_SCAN_BUS:
2048916bdfa5Spgoyette 		twa_request_bus_scan(sc->twa_dv, "twa", 0);
2049a4dd1e26Swrstuden 		break;
2050a4dd1e26Swrstuden 
2051a4dd1e26Swrstuden 	case TW_CL_IOCTL_GET_FIRST_EVENT:
2052a4dd1e26Swrstuden 		if (sc->twa_aen_queue_wrapped) {
2053a4dd1e26Swrstuden 			if (sc->twa_aen_queue_overflow) {
2054a4dd1e26Swrstuden 				/*
2055a4dd1e26Swrstuden 				 * The aen queue has wrapped, even before some
2056a4dd1e26Swrstuden 				 * events have been retrieved.  Let the caller
2057a4dd1e26Swrstuden 				 * know that he missed out on some AEN's.
2058a4dd1e26Swrstuden 				 */
2059a4dd1e26Swrstuden 				user_buf->twa_drvr_pkt.status =
2060a4dd1e26Swrstuden 					TWA_ERROR_AEN_OVERFLOW;
2061a4dd1e26Swrstuden 				sc->twa_aen_queue_overflow = FALSE;
2062a4dd1e26Swrstuden 			} else
2063a4dd1e26Swrstuden 				user_buf->twa_drvr_pkt.status = 0;
2064a4dd1e26Swrstuden 			event_index = sc->twa_aen_head;
2065a4dd1e26Swrstuden 		} else {
2066a4dd1e26Swrstuden 			if (sc->twa_aen_head == sc->twa_aen_tail) {
2067a4dd1e26Swrstuden 				user_buf->twa_drvr_pkt.status =
2068a4dd1e26Swrstuden 					TWA_ERROR_AEN_NO_EVENTS;
2069a4dd1e26Swrstuden 				break;
2070a4dd1e26Swrstuden 			}
2071a4dd1e26Swrstuden 			user_buf->twa_drvr_pkt.status = 0;
2072a4dd1e26Swrstuden 			event_index = sc->twa_aen_tail;	/* = 0 */
2073a4dd1e26Swrstuden 		}
2074a4dd1e26Swrstuden 		if ((error = copyout(sc->twa_aen_queue[event_index],
2075a4dd1e26Swrstuden 		    user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0)
2076a4dd1e26Swrstuden 			(sc->twa_aen_queue[event_index])->retrieved =
2077a4dd1e26Swrstuden 			    TWA_AEN_RETRIEVED;
2078a4dd1e26Swrstuden 		break;
2079a4dd1e26Swrstuden 
2080a4dd1e26Swrstuden 	case TW_CL_IOCTL_GET_LAST_EVENT:
2081a4dd1e26Swrstuden 		if (sc->twa_aen_queue_wrapped) {
2082a4dd1e26Swrstuden 			if (sc->twa_aen_queue_overflow) {
2083a4dd1e26Swrstuden 				/*
2084a4dd1e26Swrstuden 				 * The aen queue has wrapped, even before some
2085a4dd1e26Swrstuden 				 * events have been retrieved.  Let the caller
2086a4dd1e26Swrstuden 				 * know that he missed out on some AEN's.
2087a4dd1e26Swrstuden 				 */
2088a4dd1e26Swrstuden 				user_buf->twa_drvr_pkt.status =
2089a4dd1e26Swrstuden 					TWA_ERROR_AEN_OVERFLOW;
2090a4dd1e26Swrstuden 				sc->twa_aen_queue_overflow = FALSE;
2091a4dd1e26Swrstuden 			} else
2092a4dd1e26Swrstuden 				user_buf->twa_drvr_pkt.status = 0;
2093a4dd1e26Swrstuden 		} else {
2094a4dd1e26Swrstuden 			if (sc->twa_aen_head == sc->twa_aen_tail) {
2095a4dd1e26Swrstuden 				user_buf->twa_drvr_pkt.status =
2096a4dd1e26Swrstuden 					TWA_ERROR_AEN_NO_EVENTS;
2097a4dd1e26Swrstuden 				break;
2098a4dd1e26Swrstuden 			}
2099a4dd1e26Swrstuden 			user_buf->twa_drvr_pkt.status = 0;
2100a4dd1e26Swrstuden 		}
2101f0b22f96Ssimonb 		event_index =
2102f0b22f96Ssimonb 		    (sc->twa_aen_head - 1 + TWA_Q_LENGTH) % TWA_Q_LENGTH;
2103f0b22f96Ssimonb 		if ((error = copyout(sc->twa_aen_queue[event_index],
2104f0b22f96Ssimonb 		    user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0)
2105a4dd1e26Swrstuden 			(sc->twa_aen_queue[event_index])->retrieved =
2106a4dd1e26Swrstuden 			    TWA_AEN_RETRIEVED;
2107a4dd1e26Swrstuden 		break;
2108a4dd1e26Swrstuden 
2109a4dd1e26Swrstuden 	case TW_CL_IOCTL_GET_NEXT_EVENT:
2110a4dd1e26Swrstuden 		user_buf->twa_drvr_pkt.status = 0;
2111a4dd1e26Swrstuden 		if (sc->twa_aen_queue_wrapped) {
2112a4dd1e26Swrstuden 
2113a4dd1e26Swrstuden 			if (sc->twa_aen_queue_overflow) {
2114a4dd1e26Swrstuden 				/*
2115a4dd1e26Swrstuden 				 * The aen queue has wrapped, even before some
2116a4dd1e26Swrstuden 				 * events have been retrieved.  Let the caller
2117a4dd1e26Swrstuden 				 * know that he missed out on some AEN's.
2118a4dd1e26Swrstuden 				 */
2119a4dd1e26Swrstuden 				user_buf->twa_drvr_pkt.status =
2120a4dd1e26Swrstuden 					TWA_ERROR_AEN_OVERFLOW;
2121a4dd1e26Swrstuden 				sc->twa_aen_queue_overflow = FALSE;
2122a4dd1e26Swrstuden 			}
2123a4dd1e26Swrstuden 			start_index = sc->twa_aen_head;
2124a4dd1e26Swrstuden 		} else {
2125a4dd1e26Swrstuden 			if (sc->twa_aen_head == sc->twa_aen_tail) {
2126a4dd1e26Swrstuden 				user_buf->twa_drvr_pkt.status =
2127a4dd1e26Swrstuden 					TWA_ERROR_AEN_NO_EVENTS;
2128a4dd1e26Swrstuden 				break;
2129a4dd1e26Swrstuden 			}
2130a4dd1e26Swrstuden 			start_index = sc->twa_aen_tail;	/* = 0 */
2131a4dd1e26Swrstuden 		}
2132a4dd1e26Swrstuden 		error = copyin(user_buf->pdata, &event_buf,
2133a4dd1e26Swrstuden 				sizeof(struct tw_cl_event_packet));
2134a4dd1e26Swrstuden 
2135a4dd1e26Swrstuden 		event_index = (start_index + event_buf.sequence_id -
2136a4dd1e26Swrstuden 		    (sc->twa_aen_queue[start_index])->sequence_id + 1)
2137a4dd1e26Swrstuden 		    % TWA_Q_LENGTH;
2138a4dd1e26Swrstuden 
2139a4dd1e26Swrstuden 		if (!((sc->twa_aen_queue[event_index])->sequence_id >
2140a4dd1e26Swrstuden 		    event_buf.sequence_id)) {
2141f0b22f96Ssimonb 			if (user_buf->twa_drvr_pkt.status ==
2142f0b22f96Ssimonb 			    TWA_ERROR_AEN_OVERFLOW)
2143f0b22f96Ssimonb 				/* so we report the overflow next time */
2144f0b22f96Ssimonb 				sc->twa_aen_queue_overflow = TRUE;
2145f0b22f96Ssimonb 			user_buf->twa_drvr_pkt.status = TWA_ERROR_AEN_NO_EVENTS;
2146a4dd1e26Swrstuden 			break;
2147a4dd1e26Swrstuden 		}
2148f0b22f96Ssimonb 		if ((error = copyout(sc->twa_aen_queue[event_index],
2149f0b22f96Ssimonb 		    user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0)
2150a4dd1e26Swrstuden 			(sc->twa_aen_queue[event_index])->retrieved =
2151a4dd1e26Swrstuden 			    TWA_AEN_RETRIEVED;
2152a4dd1e26Swrstuden 		break;
2153a4dd1e26Swrstuden 
2154a4dd1e26Swrstuden 	case TW_CL_IOCTL_GET_PREVIOUS_EVENT:
2155a4dd1e26Swrstuden 		user_buf->twa_drvr_pkt.status = 0;
2156a4dd1e26Swrstuden 		if (sc->twa_aen_queue_wrapped) {
2157a4dd1e26Swrstuden 			if (sc->twa_aen_queue_overflow) {
2158a4dd1e26Swrstuden 				/*
2159a4dd1e26Swrstuden 				 * The aen queue has wrapped, even before some
2160a4dd1e26Swrstuden 				 * events have been retrieved.  Let the caller
2161a4dd1e26Swrstuden 				 * know that he missed out on some AEN's.
2162a4dd1e26Swrstuden 				 */
2163a4dd1e26Swrstuden 				user_buf->twa_drvr_pkt.status =
2164a4dd1e26Swrstuden 					TWA_ERROR_AEN_OVERFLOW;
2165a4dd1e26Swrstuden 				sc->twa_aen_queue_overflow = FALSE;
2166a4dd1e26Swrstuden 			}
2167a4dd1e26Swrstuden 			start_index = sc->twa_aen_head;
2168a4dd1e26Swrstuden 		} else {
2169a4dd1e26Swrstuden 			if (sc->twa_aen_head == sc->twa_aen_tail) {
2170a4dd1e26Swrstuden 				user_buf->twa_drvr_pkt.status =
2171a4dd1e26Swrstuden 					TWA_ERROR_AEN_NO_EVENTS;
2172a4dd1e26Swrstuden 				break;
2173a4dd1e26Swrstuden 			}
2174a4dd1e26Swrstuden 			start_index = sc->twa_aen_tail;	/* = 0 */
2175a4dd1e26Swrstuden 		}
2176a4dd1e26Swrstuden 		if ((error = copyin(user_buf->pdata, &event_buf,
2177a4dd1e26Swrstuden 				sizeof(struct tw_cl_event_packet))) != 0)
2178a4dd1e26Swrstuden 
2179a4dd1e26Swrstuden 		event_index = (start_index + event_buf.sequence_id -
2180f0b22f96Ssimonb 		    (sc->twa_aen_queue[start_index])->sequence_id - 1)
2181f0b22f96Ssimonb 		    % TWA_Q_LENGTH;
2182a4dd1e26Swrstuden 		if (!((sc->twa_aen_queue[event_index])->sequence_id <
2183a4dd1e26Swrstuden 		    event_buf.sequence_id)) {
2184f0b22f96Ssimonb 			if (user_buf->twa_drvr_pkt.status ==
2185f0b22f96Ssimonb 			    TWA_ERROR_AEN_OVERFLOW)
2186f0b22f96Ssimonb 				/* so we report the overflow next time */
2187f0b22f96Ssimonb 				sc->twa_aen_queue_overflow = TRUE;
2188a4dd1e26Swrstuden 			user_buf->twa_drvr_pkt.status =
2189a4dd1e26Swrstuden 				TWA_ERROR_AEN_NO_EVENTS;
2190a4dd1e26Swrstuden 			break;
2191a4dd1e26Swrstuden 		}
2192f0b22f96Ssimonb 		if ((error = copyout(sc->twa_aen_queue [event_index],
2193f0b22f96Ssimonb 		    user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0)
21948bc54e5bSmsaitoh 			aprint_error_dev(sc->twa_dv, "get_previous: Could not "
21958bc54e5bSmsaitoh 			    "copyout to event_buf. error = %x\n", error);
2196a4dd1e26Swrstuden 		(sc->twa_aen_queue[event_index])->retrieved = TWA_AEN_RETRIEVED;
2197a4dd1e26Swrstuden 		break;
2198a4dd1e26Swrstuden 
2199a4dd1e26Swrstuden 	case TW_CL_IOCTL_GET_LOCK:
2200a4dd1e26Swrstuden 	{
2201a4dd1e26Swrstuden 		struct tw_cl_lock_packet	twa_lock;
2202a4dd1e26Swrstuden 
2203a4dd1e26Swrstuden 		copyin(user_buf->pdata, &twa_lock,
2204a4dd1e26Swrstuden 				sizeof(struct tw_cl_lock_packet));
2205a4dd1e26Swrstuden 		s = splbio();
2206a4dd1e26Swrstuden 		if ((sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) ||
2207a4dd1e26Swrstuden 			(twa_lock.force_flag) ||
220852b60673Ssimonb 			(time_second >= sc->twa_ioctl_lock.timeout)) {
2209a4dd1e26Swrstuden 
2210a4dd1e26Swrstuden 			sc->twa_ioctl_lock.lock = TWA_LOCK_HELD;
221152b60673Ssimonb 			sc->twa_ioctl_lock.timeout = time_second +
2212a4dd1e26Swrstuden 				(twa_lock.timeout_msec / 1000);
2213a4dd1e26Swrstuden 			twa_lock.time_remaining_msec = twa_lock.timeout_msec;
2214a4dd1e26Swrstuden 			user_buf->twa_drvr_pkt.status = 0;
2215a4dd1e26Swrstuden 		} else {
2216a4dd1e26Swrstuden 			twa_lock.time_remaining_msec =
221752b60673Ssimonb 				(sc->twa_ioctl_lock.timeout - time_second) *
2218a4dd1e26Swrstuden 				1000;
2219a4dd1e26Swrstuden 			user_buf->twa_drvr_pkt.status =
2220a4dd1e26Swrstuden 					TWA_ERROR_IOCTL_LOCK_ALREADY_HELD;
2221a4dd1e26Swrstuden 		}
2222a4dd1e26Swrstuden 		splx(s);
2223a4dd1e26Swrstuden 		copyout(&twa_lock, user_buf->pdata,
2224a4dd1e26Swrstuden 				sizeof(struct tw_cl_lock_packet));
2225a4dd1e26Swrstuden 		break;
2226a4dd1e26Swrstuden 	}
2227a4dd1e26Swrstuden 
2228a4dd1e26Swrstuden 	case TW_CL_IOCTL_RELEASE_LOCK:
2229a4dd1e26Swrstuden 		s = splbio();
2230a4dd1e26Swrstuden 		if (sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) {
2231a4dd1e26Swrstuden 			user_buf->twa_drvr_pkt.status =
2232a4dd1e26Swrstuden 				TWA_ERROR_IOCTL_LOCK_NOT_HELD;
2233a4dd1e26Swrstuden 		} else {
2234a4dd1e26Swrstuden 			sc->twa_ioctl_lock.lock = TWA_LOCK_FREE;
2235a4dd1e26Swrstuden 			user_buf->twa_drvr_pkt.status = 0;
2236a4dd1e26Swrstuden 		}
2237a4dd1e26Swrstuden 		splx(s);
2238a4dd1e26Swrstuden 		break;
2239a4dd1e26Swrstuden 
2240a4dd1e26Swrstuden 	case TW_CL_IOCTL_GET_COMPATIBILITY_INFO:
2241a4dd1e26Swrstuden 	{
2242a4dd1e26Swrstuden 		struct tw_cl_compatibility_packet	comp_pkt;
2243a4dd1e26Swrstuden 
2244a4dd1e26Swrstuden 		memcpy(comp_pkt.driver_version, TWA_DRIVER_VERSION_STRING,
2245a4dd1e26Swrstuden 					sizeof(TWA_DRIVER_VERSION_STRING));
2246a4dd1e26Swrstuden 		comp_pkt.working_srl = sc->working_srl;
2247a4dd1e26Swrstuden 		comp_pkt.working_branch = sc->working_branch;
2248a4dd1e26Swrstuden 		comp_pkt.working_build = sc->working_build;
2249a4dd1e26Swrstuden 		user_buf->twa_drvr_pkt.status = 0;
2250a4dd1e26Swrstuden 
2251a4dd1e26Swrstuden 		/* Copy compatibility information to user space. */
2252a4dd1e26Swrstuden 		copyout(&comp_pkt, user_buf->pdata,
2253d1579b2dSriastradh 				uimin(sizeof(struct tw_cl_compatibility_packet),
2254a4dd1e26Swrstuden 					user_buf->twa_drvr_pkt.buffer_length));
2255a4dd1e26Swrstuden 		break;
2256a4dd1e26Swrstuden 	}
2257a4dd1e26Swrstuden 
2258a4dd1e26Swrstuden 	case TWA_IOCTL_GET_UNITNAME:	/* WASABI EXTENSION */
2259a4dd1e26Swrstuden 	{
2260a4dd1e26Swrstuden 		struct twa_unitname	*tn;
2261a4dd1e26Swrstuden 		struct twa_drive	*tdr;
2262a4dd1e26Swrstuden 
2263a4dd1e26Swrstuden 		tn = (struct twa_unitname *)data;
2264a4dd1e26Swrstuden 			/* XXX mutex */
2265d72a9bc7Sjoerg 		if (tn->tn_unit < 0 || tn->tn_unit >= sc->sc_nunits)
2266a4dd1e26Swrstuden 			return (EINVAL);
2267a4dd1e26Swrstuden 		tdr = &sc->sc_units[tn->tn_unit];
2268a4dd1e26Swrstuden 		if (tdr->td_dev == NULL)
2269a4dd1e26Swrstuden 			tn->tn_name[0] = '\0';
2270a4dd1e26Swrstuden 		else
22719d57c800Scegger 			strlcpy(tn->tn_name, device_xname(tdr->td_dev),
2272a4dd1e26Swrstuden 			    sizeof(tn->tn_name));
2273a4dd1e26Swrstuden 		return (0);
2274a4dd1e26Swrstuden 	}
2275a4dd1e26Swrstuden 
2276a4dd1e26Swrstuden 	default:
2277a4dd1e26Swrstuden 		/* Unknown opcode. */
2278a4dd1e26Swrstuden 		error = ENOTTY;
2279a4dd1e26Swrstuden 	}
2280a4dd1e26Swrstuden 
2281a4dd1e26Swrstuden 	return(error);
2282a4dd1e26Swrstuden }
2283a4dd1e26Swrstuden 
2284b949192dSwrstuden const struct cdevsw twa_cdevsw = {
2285a68f9396Sdholland 	.d_open = twaopen,
2286a68f9396Sdholland 	.d_close = twaclose,
2287a68f9396Sdholland 	.d_read = noread,
2288a68f9396Sdholland 	.d_write = nowrite,
2289a68f9396Sdholland 	.d_ioctl = twaioctl,
2290a68f9396Sdholland 	.d_stop = nostop,
2291a68f9396Sdholland 	.d_tty = notty,
2292a68f9396Sdholland 	.d_poll = nopoll,
2293a68f9396Sdholland 	.d_mmap = nommap,
2294a68f9396Sdholland 	.d_kqfilter = nokqfilter,
2295f9228f42Sdholland 	.d_discard = nodiscard,
2296a68f9396Sdholland 	.d_flag = D_OTHER
2297b949192dSwrstuden };
2298b949192dSwrstuden 
2299a4dd1e26Swrstuden /*
2300a4dd1e26Swrstuden  * Function name:	twa_get_param
2301a4dd1e26Swrstuden  * Description:		Get a firmware parameter.
2302a4dd1e26Swrstuden  *
2303a4dd1e26Swrstuden  * Input:		sc		-- ptr to per ctlr structure
2304a4dd1e26Swrstuden  *			table_id	-- parameter table #
2305a4dd1e26Swrstuden  *			param_id	-- index of the parameter in the table
2306a4dd1e26Swrstuden  *			param_size	-- size of the parameter in bytes
2307a4dd1e26Swrstuden  *			callback	-- ptr to function, if any, to be called
2308a4dd1e26Swrstuden  *					back on completion; NULL if no callback.
2309a4dd1e26Swrstuden  * Output:		None
2310a4dd1e26Swrstuden  * Return value:	ptr to param structure	-- success
2311a4dd1e26Swrstuden  *			NULL			-- failure
2312a4dd1e26Swrstuden  */
2313a4dd1e26Swrstuden static int
twa_get_param(struct twa_softc * sc,int table_id,int param_id,size_t param_size,void (* callback)(struct twa_request * tr),struct twa_param_9k ** param)2314a4dd1e26Swrstuden twa_get_param(struct twa_softc *sc, int table_id, int param_id,
2315a4dd1e26Swrstuden     size_t param_size, void (* callback)(struct twa_request *tr),
2316a4dd1e26Swrstuden     struct twa_param_9k **param)
2317a4dd1e26Swrstuden {
2318a4dd1e26Swrstuden 	int			rv = 0;
2319a4dd1e26Swrstuden 	struct twa_request	*tr;
2320a4dd1e26Swrstuden 	union twa_command_7k	*cmd;
2321a4dd1e26Swrstuden 
2322a4dd1e26Swrstuden 	/* Get a request packet. */
2323a4dd1e26Swrstuden 	if ((tr = twa_get_request(sc, 0)) == NULL) {
2324a4dd1e26Swrstuden 		rv = EAGAIN;
2325a4dd1e26Swrstuden 		goto out;
2326a4dd1e26Swrstuden 	}
2327a4dd1e26Swrstuden 
2328a4dd1e26Swrstuden 	tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL;
2329a4dd1e26Swrstuden 
2330a4dd1e26Swrstuden 	/* Allocate memory to read data into. */
2331a4dd1e26Swrstuden 	if ((*param = (struct twa_param_9k *)
2332a4dd1e26Swrstuden 		malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) {
2333a4dd1e26Swrstuden 		rv = ENOMEM;
2334a4dd1e26Swrstuden 		goto out;
2335a4dd1e26Swrstuden 	}
2336a4dd1e26Swrstuden 
2337a4dd1e26Swrstuden 	memset(*param, 0, sizeof(struct twa_param_9k) - 1 + param_size);
2338a4dd1e26Swrstuden 	tr->tr_data = *param;
2339a4dd1e26Swrstuden 	tr->tr_length = TWA_SECTOR_SIZE;
2340a4dd1e26Swrstuden 	tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT;
2341a4dd1e26Swrstuden 
2342a4dd1e26Swrstuden 	/* Build the cmd pkt. */
2343a4dd1e26Swrstuden 	cmd = &(tr->tr_command->command.cmd_pkt_7k);
2344a4dd1e26Swrstuden 
2345a4dd1e26Swrstuden 	tr->tr_command->cmd_hdr.header_desc.size_header = 128;
2346a4dd1e26Swrstuden 
2347a4dd1e26Swrstuden 	cmd->param.opcode = TWA_OP_GET_PARAM;
2348a4dd1e26Swrstuden 	cmd->param.sgl_offset = 2;
2349a4dd1e26Swrstuden 	cmd->param.size = 2;
2350a4dd1e26Swrstuden 	cmd->param.request_id = tr->tr_request_id;
2351a4dd1e26Swrstuden 	cmd->param.unit = 0;
2352a4dd1e26Swrstuden 	cmd->param.param_count = 1;
2353a4dd1e26Swrstuden 
2354a4dd1e26Swrstuden 	/* Specify which parameter we need. */
2355a4dd1e26Swrstuden 	(*param)->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR;
2356a4dd1e26Swrstuden 	(*param)->parameter_id = param_id;
2357a4dd1e26Swrstuden 	(*param)->parameter_size_bytes = param_size;
2358a4dd1e26Swrstuden 
2359a4dd1e26Swrstuden 	/* Submit the command. */
2360a4dd1e26Swrstuden 	if (callback == NULL) {
2361a4dd1e26Swrstuden 		/* There's no call back; wait till the command completes. */
2362a4dd1e26Swrstuden 		rv = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD);
2363a4dd1e26Swrstuden 
2364a4dd1e26Swrstuden 		if (rv != 0)
2365a4dd1e26Swrstuden 			goto out;
2366a4dd1e26Swrstuden 
2367a4dd1e26Swrstuden 		if ((rv = cmd->param.status) != 0) {
2368a4dd1e26Swrstuden 		     /* twa_drain_complete_queue will have done the unmapping */
2369a4dd1e26Swrstuden 		     goto out;
2370a4dd1e26Swrstuden 		}
2371a4dd1e26Swrstuden 		twa_release_request(tr);
2372a4dd1e26Swrstuden 		return (rv);
2373a4dd1e26Swrstuden 	} else {
2374a4dd1e26Swrstuden 		/* There's a call back.  Simply submit the command. */
2375a4dd1e26Swrstuden 		tr->tr_callback = callback;
2376a4dd1e26Swrstuden 		rv = twa_map_request(tr);
2377a4dd1e26Swrstuden 		return (rv);
2378a4dd1e26Swrstuden 	}
2379a4dd1e26Swrstuden out:
2380a4dd1e26Swrstuden 	if (tr)
2381a4dd1e26Swrstuden 		twa_release_request(tr);
2382a4dd1e26Swrstuden 	return(rv);
2383a4dd1e26Swrstuden }
2384a4dd1e26Swrstuden 
2385a4dd1e26Swrstuden /*
2386a4dd1e26Swrstuden  * Function name:	twa_set_param
2387a4dd1e26Swrstuden  * Description:		Set a firmware parameter.
2388a4dd1e26Swrstuden  *
2389a4dd1e26Swrstuden  * Input:		sc		-- ptr to per ctlr structure
2390a4dd1e26Swrstuden  *			table_id	-- parameter table #
2391a4dd1e26Swrstuden  *			param_id	-- index of the parameter in the table
2392a4dd1e26Swrstuden  *			param_size	-- size of the parameter in bytes
2393a4dd1e26Swrstuden  *			callback	-- ptr to function, if any, to be called
2394a4dd1e26Swrstuden  *					back on completion; NULL if no callback.
2395a4dd1e26Swrstuden  * Output:		None
2396a4dd1e26Swrstuden  * Return value:	0	-- success
2397a4dd1e26Swrstuden  *			non-zero-- failure
2398a4dd1e26Swrstuden  */
2399a4dd1e26Swrstuden static int
twa_set_param(struct twa_softc * sc,int table_id,int param_id,int param_size,void * data,void (* callback)(struct twa_request * tr))2400f0b22f96Ssimonb twa_set_param(struct twa_softc *sc, int table_id, int param_id, int param_size,
2401f0b22f96Ssimonb     void *data, void (* callback)(struct twa_request *tr))
2402a4dd1e26Swrstuden {
2403a4dd1e26Swrstuden 	struct twa_request	*tr;
2404a4dd1e26Swrstuden 	union twa_command_7k	*cmd;
2405a4dd1e26Swrstuden 	struct twa_param_9k	*param = NULL;
2406a4dd1e26Swrstuden 	int			error = ENOMEM;
2407a4dd1e26Swrstuden 
2408a4dd1e26Swrstuden 	tr = twa_get_request(sc, 0);
2409a4dd1e26Swrstuden 	if (tr == NULL)
2410a4dd1e26Swrstuden 		return (EAGAIN);
2411a4dd1e26Swrstuden 
2412a4dd1e26Swrstuden 	tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL;
2413a4dd1e26Swrstuden 
2414a4dd1e26Swrstuden 	/* Allocate memory to send data using. */
2415a4dd1e26Swrstuden 	if ((param = (struct twa_param_9k *)
2416a4dd1e26Swrstuden 			malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL)
2417a4dd1e26Swrstuden 		goto out;
2418a4dd1e26Swrstuden 	memset(param, 0, sizeof(struct twa_param_9k) - 1 + param_size);
2419a4dd1e26Swrstuden 	tr->tr_data = param;
2420a4dd1e26Swrstuden 	tr->tr_length = TWA_SECTOR_SIZE;
2421a4dd1e26Swrstuden 	tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT;
2422a4dd1e26Swrstuden 
2423a4dd1e26Swrstuden 	/* Build the cmd pkt. */
2424a4dd1e26Swrstuden 	cmd = &(tr->tr_command->command.cmd_pkt_7k);
2425a4dd1e26Swrstuden 
2426a4dd1e26Swrstuden 	tr->tr_command->cmd_hdr.header_desc.size_header = 128;
2427a4dd1e26Swrstuden 
2428a4dd1e26Swrstuden 	cmd->param.opcode = TWA_OP_SET_PARAM;
2429a4dd1e26Swrstuden 	cmd->param.sgl_offset = 2;
2430a4dd1e26Swrstuden 	cmd->param.size = 2;
2431a4dd1e26Swrstuden 	cmd->param.request_id = tr->tr_request_id;
2432a4dd1e26Swrstuden 	cmd->param.unit = 0;
2433a4dd1e26Swrstuden 	cmd->param.param_count = 1;
2434a4dd1e26Swrstuden 
2435a4dd1e26Swrstuden 	/* Specify which parameter we want to set. */
2436a4dd1e26Swrstuden 	param->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR;
2437a4dd1e26Swrstuden 	param->parameter_id = param_id;
2438a4dd1e26Swrstuden 	param->parameter_size_bytes = param_size;
2439a4dd1e26Swrstuden 	memcpy(param->data, data, param_size);
2440a4dd1e26Swrstuden 
2441a4dd1e26Swrstuden 	/* Submit the command. */
2442a4dd1e26Swrstuden 	if (callback == NULL) {
2443a4dd1e26Swrstuden 		/* There's no call back;  wait till the command completes. */
2444a4dd1e26Swrstuden 		error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD);
2445a4dd1e26Swrstuden 		if (error == ETIMEDOUT)
2446f0b22f96Ssimonb 			/* clean-up done by twa_immediate_request */
2447f0b22f96Ssimonb 			return(error);
2448a4dd1e26Swrstuden 		if (error)
2449a4dd1e26Swrstuden 			goto out;
2450a4dd1e26Swrstuden 		if ((error = cmd->param.status)) {
2451f0b22f96Ssimonb 			/*
2452f0b22f96Ssimonb 			 * twa_drain_complete_queue will have done the
2453f0b22f96Ssimonb 			 * unmapping.
2454f0b22f96Ssimonb 			 */
2455f0b22f96Ssimonb 			goto out;
2456a4dd1e26Swrstuden 		}
2457a4dd1e26Swrstuden 		free(param, M_DEVBUF);
2458a4dd1e26Swrstuden 		twa_release_request(tr);
2459a4dd1e26Swrstuden 		return(error);
2460a4dd1e26Swrstuden 	} else {
2461a4dd1e26Swrstuden 		/* There's a call back.  Simply submit the command. */
2462a4dd1e26Swrstuden 		tr->tr_callback = callback;
2463a4dd1e26Swrstuden 		if ((error = twa_map_request(tr)))
2464a4dd1e26Swrstuden 			goto out;
2465a4dd1e26Swrstuden 
2466a4dd1e26Swrstuden 		return (0);
2467a4dd1e26Swrstuden 	}
2468a4dd1e26Swrstuden out:
2469a4dd1e26Swrstuden 	if (param)
2470a4dd1e26Swrstuden 		free(param, M_DEVBUF);
2471a4dd1e26Swrstuden 	if (tr)
2472a4dd1e26Swrstuden 		twa_release_request(tr);
2473a4dd1e26Swrstuden 	return(error);
2474a4dd1e26Swrstuden }
2475a4dd1e26Swrstuden 
2476a4dd1e26Swrstuden /*
2477a4dd1e26Swrstuden  * Function name:	twa_init_connection
2478a4dd1e26Swrstuden  * Description:		Send init_connection cmd to firmware
2479a4dd1e26Swrstuden  *
2480a4dd1e26Swrstuden  * Input:		sc		-- ptr to per ctlr structure
2481a4dd1e26Swrstuden  *			message_credits	-- max # of requests that we might send
2482a4dd1e26Swrstuden  *					 down simultaneously.  This will be
2483a4dd1e26Swrstuden  *					 typically set to 256 at init-time or
2484a4dd1e26Swrstuden  *					after a reset, and to 1 at shutdown-time
2485a4dd1e26Swrstuden  *			set_features	-- indicates if we intend to use 64-bit
2486a4dd1e26Swrstuden  *					sg, also indicates if we want to do a
2487a4dd1e26Swrstuden  *					basic or an extended init_connection;
2488a4dd1e26Swrstuden  *
2489a4dd1e26Swrstuden  * Note: The following input/output parameters are valid, only in case of an
2490a4dd1e26Swrstuden  *		extended init_connection:
2491a4dd1e26Swrstuden  *
2492a4dd1e26Swrstuden  *			current_fw_srl		-- srl of fw we are bundled
2493a4dd1e26Swrstuden  *						with, if any; 0 otherwise
2494a4dd1e26Swrstuden  *			current_fw_arch_id	-- arch_id of fw we are bundled
2495a4dd1e26Swrstuden  *						with, if any; 0 otherwise
2496a4dd1e26Swrstuden  *			current_fw_branch	-- branch # of fw we are bundled
2497a4dd1e26Swrstuden  *						with, if any; 0 otherwise
2498a4dd1e26Swrstuden  *			current_fw_build	-- build # of fw we are bundled
2499a4dd1e26Swrstuden  *						with, if any; 0 otherwise
2500a4dd1e26Swrstuden  * Output:		fw_on_ctlr_srl		-- srl of fw on ctlr
2501a4dd1e26Swrstuden  *			fw_on_ctlr_arch_id	-- arch_id of fw on ctlr
2502a4dd1e26Swrstuden  *			fw_on_ctlr_branch	-- branch # of fw on ctlr
2503a4dd1e26Swrstuden  *			fw_on_ctlr_build	-- build # of fw on ctlr
2504a4dd1e26Swrstuden  *			init_connect_result	-- result bitmap of fw response
2505a4dd1e26Swrstuden  * Return value:	0	-- success
2506a4dd1e26Swrstuden  *			non-zero-- failure
2507a4dd1e26Swrstuden  */
2508a4dd1e26Swrstuden static int
twa_init_connection(struct twa_softc * sc,uint16_t message_credits,uint32_t set_features,uint16_t current_fw_srl,uint16_t current_fw_arch_id,uint16_t current_fw_branch,uint16_t current_fw_build,uint16_t * fw_on_ctlr_srl,uint16_t * fw_on_ctlr_arch_id,uint16_t * fw_on_ctlr_branch,uint16_t * fw_on_ctlr_build,uint32_t * init_connect_result)25098c670781Ssimonb twa_init_connection(struct twa_softc *sc, uint16_t message_credits,
25108c670781Ssimonb     uint32_t set_features, uint16_t current_fw_srl,
25118c670781Ssimonb     uint16_t current_fw_arch_id, uint16_t current_fw_branch,
2512168cd830Schristos     uint16_t current_fw_build, uint16_t *fw_on_ctlr_srl,
25138c670781Ssimonb     uint16_t *fw_on_ctlr_arch_id, uint16_t *fw_on_ctlr_branch,
25148c670781Ssimonb     uint16_t *fw_on_ctlr_build, uint32_t *init_connect_result)
2515a4dd1e26Swrstuden {
2516a4dd1e26Swrstuden 	struct twa_request		*tr;
2517a4dd1e26Swrstuden 	struct twa_command_init_connect	*init_connect;
2518a4dd1e26Swrstuden 	int				error = 1;
2519a4dd1e26Swrstuden 
2520a4dd1e26Swrstuden 	/* Get a request packet. */
2521a4dd1e26Swrstuden 	if ((tr = twa_get_request(sc, 0)) == NULL)
2522a4dd1e26Swrstuden 		goto out;
2523a4dd1e26Swrstuden 	tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL;
2524a4dd1e26Swrstuden 	/* Build the cmd pkt. */
2525a4dd1e26Swrstuden 	init_connect = &(tr->tr_command->command.cmd_pkt_7k.init_connect);
2526a4dd1e26Swrstuden 
2527a4dd1e26Swrstuden 	tr->tr_command->cmd_hdr.header_desc.size_header = 128;
2528a4dd1e26Swrstuden 
2529a4dd1e26Swrstuden 	init_connect->opcode = TWA_OP_INIT_CONNECTION;
2530a4dd1e26Swrstuden    	init_connect->request_id = tr->tr_request_id;
2531a4dd1e26Swrstuden 	init_connect->message_credits = message_credits;
2532a4dd1e26Swrstuden 	init_connect->features = set_features;
2533d2768df2Sjoerg 	if (TWA_64BIT_ADDRESSES)
2534a4dd1e26Swrstuden 		init_connect->features |= TWA_64BIT_SG_ADDRESSES;
2535a4dd1e26Swrstuden 	if (set_features & TWA_EXTENDED_INIT_CONNECT) {
2536a4dd1e26Swrstuden 		/*
2537a4dd1e26Swrstuden 		 * Fill in the extra fields needed for
2538a4dd1e26Swrstuden 		 * an extended init_connect.
2539a4dd1e26Swrstuden 		 */
2540a4dd1e26Swrstuden 		init_connect->size = 6;
2541a4dd1e26Swrstuden 		init_connect->fw_srl = current_fw_srl;
2542a4dd1e26Swrstuden 		init_connect->fw_arch_id = current_fw_arch_id;
2543a4dd1e26Swrstuden 		init_connect->fw_branch = current_fw_branch;
2544a4dd1e26Swrstuden 	} else
2545a4dd1e26Swrstuden 		init_connect->size = 3;
2546a4dd1e26Swrstuden 
2547a4dd1e26Swrstuden 	/* Submit the command, and wait for it to complete. */
2548a4dd1e26Swrstuden 	error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD);
2549a4dd1e26Swrstuden 	if (error == ETIMEDOUT)
2550a4dd1e26Swrstuden 		return(error); /* clean-up done by twa_immediate_request */
2551a4dd1e26Swrstuden 	if (error)
2552a4dd1e26Swrstuden 		goto out;
2553a4dd1e26Swrstuden 	if ((error = init_connect->status)) {
2554f0b22f96Ssimonb 		/* twa_drain_complete_queue will have done the unmapping */
2555f0b22f96Ssimonb 		goto out;
2556a4dd1e26Swrstuden 	}
2557a4dd1e26Swrstuden 	if (set_features & TWA_EXTENDED_INIT_CONNECT) {
2558a4dd1e26Swrstuden 		*fw_on_ctlr_srl = init_connect->fw_srl;
2559a4dd1e26Swrstuden 		*fw_on_ctlr_arch_id = init_connect->fw_arch_id;
2560a4dd1e26Swrstuden 		*fw_on_ctlr_branch = init_connect->fw_branch;
2561a4dd1e26Swrstuden 		*fw_on_ctlr_build = init_connect->fw_build;
2562a4dd1e26Swrstuden 		*init_connect_result = init_connect->result;
2563a4dd1e26Swrstuden 	}
2564a4dd1e26Swrstuden 	twa_release_request(tr);
2565a4dd1e26Swrstuden 	return(error);
2566a4dd1e26Swrstuden 
2567a4dd1e26Swrstuden out:
2568a4dd1e26Swrstuden 	if (tr)
2569a4dd1e26Swrstuden 		twa_release_request(tr);
2570a4dd1e26Swrstuden 	return(error);
2571a4dd1e26Swrstuden }
2572a4dd1e26Swrstuden 
2573a4dd1e26Swrstuden static int
twa_reset(struct twa_softc * sc)2574a4dd1e26Swrstuden twa_reset(struct twa_softc *sc)
2575a4dd1e26Swrstuden {
2576a4dd1e26Swrstuden 	int	s;
2577a4dd1e26Swrstuden 	int	error = 0;
2578a4dd1e26Swrstuden 
2579d72a9bc7Sjoerg 	/* Set the 'in reset' flag. */
2580d72a9bc7Sjoerg 	sc->twa_sc_flags |= TWA_STATE_IN_RESET;
2581d72a9bc7Sjoerg 
2582a4dd1e26Swrstuden 	/*
2583a4dd1e26Swrstuden 	 * Disable interrupts from the controller, and mask any
2584a4dd1e26Swrstuden 	 * accidental entry into our interrupt handler.
2585a4dd1e26Swrstuden 	 */
2586a4dd1e26Swrstuden 	twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
2587a4dd1e26Swrstuden 		TWA_CONTROL_DISABLE_INTERRUPTS);
2588a4dd1e26Swrstuden 
2589a4dd1e26Swrstuden 	s = splbio();
2590a4dd1e26Swrstuden 
2591a4dd1e26Swrstuden 	/* Soft reset the controller. */
2592a4dd1e26Swrstuden 	if ((error = twa_soft_reset(sc)))
2593a4dd1e26Swrstuden 		goto out;
2594a4dd1e26Swrstuden 
2595a4dd1e26Swrstuden 	/* Re-establish logical connection with the controller. */
2596a4dd1e26Swrstuden 	if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS,
2597a4dd1e26Swrstuden 					0, 0, 0, 0, 0,
2598a4dd1e26Swrstuden 					NULL, NULL, NULL, NULL, NULL))) {
2599a4dd1e26Swrstuden 		goto out;
2600a4dd1e26Swrstuden 	}
2601a4dd1e26Swrstuden 	/*
2602a4dd1e26Swrstuden 	 * Complete all requests in the complete queue; error back all requests
2603a4dd1e26Swrstuden 	 * in the busy queue.  Any internal requests will be simply freed.
2604a4dd1e26Swrstuden 	 * Re-submit any requests in the pending queue.
2605a4dd1e26Swrstuden 	 */
2606a4dd1e26Swrstuden 	twa_drain_busy_queue(sc);
2607a4dd1e26Swrstuden 
2608a4dd1e26Swrstuden out:
2609a4dd1e26Swrstuden 	splx(s);
2610a4dd1e26Swrstuden 	/*
2611a4dd1e26Swrstuden 	 * Enable interrupts, and also clear attention and response interrupts.
2612a4dd1e26Swrstuden 	 */
2613a4dd1e26Swrstuden 	twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
2614a4dd1e26Swrstuden 		TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT |
2615a4dd1e26Swrstuden 		TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT |
2616a4dd1e26Swrstuden 		TWA_CONTROL_ENABLE_INTERRUPTS);
2617d72a9bc7Sjoerg 
2618d72a9bc7Sjoerg 	/* Clear the 'in reset' flag. */
2619d72a9bc7Sjoerg 	sc->twa_sc_flags &= ~TWA_STATE_IN_RESET;
2620d72a9bc7Sjoerg 
2621a4dd1e26Swrstuden 	return(error);
2622a4dd1e26Swrstuden }
2623a4dd1e26Swrstuden 
2624a4dd1e26Swrstuden static int
twa_soft_reset(struct twa_softc * sc)2625a4dd1e26Swrstuden twa_soft_reset(struct twa_softc *sc)
2626a4dd1e26Swrstuden {
26278c670781Ssimonb 	uint32_t	status_reg;
2628a4dd1e26Swrstuden 
2629a4dd1e26Swrstuden 	twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
2630a4dd1e26Swrstuden 			TWA_CONTROL_ISSUE_SOFT_RESET |
2631a4dd1e26Swrstuden 			TWA_CONTROL_CLEAR_HOST_INTERRUPT |
2632a4dd1e26Swrstuden 			TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT |
2633a4dd1e26Swrstuden 			TWA_CONTROL_MASK_COMMAND_INTERRUPT |
2634a4dd1e26Swrstuden 			TWA_CONTROL_MASK_RESPONSE_INTERRUPT |
2635a4dd1e26Swrstuden 			TWA_CONTROL_DISABLE_INTERRUPTS);
2636a4dd1e26Swrstuden 
2637d72a9bc7Sjoerg 	if (twa_drain_response_queue_large(sc, 30) != 0) {
2638d1934bddSjakllsch 		aprint_error_dev(sc->twa_dv,
2639d72a9bc7Sjoerg 		    "response queue not empty after reset.\n");
2640d72a9bc7Sjoerg 		return(1);
2641d72a9bc7Sjoerg 	}
2642a4dd1e26Swrstuden 	if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY |
2643a4dd1e26Swrstuden 				TWA_STATUS_ATTENTION_INTERRUPT, 30)) {
26448bc54e5bSmsaitoh 		aprint_error_dev(sc->twa_dv,
26458bc54e5bSmsaitoh 		    "no attention interrupt after reset.\n");
2646a4dd1e26Swrstuden 		return(1);
2647a4dd1e26Swrstuden 	}
2648a4dd1e26Swrstuden 	twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
2649a4dd1e26Swrstuden 		TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT);
2650a4dd1e26Swrstuden 
2651a4dd1e26Swrstuden 	if (twa_drain_response_queue(sc)) {
2652d1934bddSjakllsch 		aprint_error_dev(sc->twa_dv, "cannot drain response queue.\n");
2653a4dd1e26Swrstuden 		return(1);
2654a4dd1e26Swrstuden 	}
2655a4dd1e26Swrstuden 	if (twa_drain_aen_queue(sc)) {
2656d1934bddSjakllsch 		aprint_error_dev(sc->twa_dv, "cannot drain AEN queue.\n");
2657a4dd1e26Swrstuden 		return(1);
2658a4dd1e26Swrstuden 	}
2659a4dd1e26Swrstuden 	if (twa_find_aen(sc, TWA_AEN_SOFT_RESET)) {
26608bc54e5bSmsaitoh 		aprint_error_dev(sc->twa_dv,
26618bc54e5bSmsaitoh 		    "reset not reported by controller.\n");
2662a4dd1e26Swrstuden 		return(1);
2663a4dd1e26Swrstuden 	}
2664a4dd1e26Swrstuden 	status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
2665a4dd1e26Swrstuden 	if (TWA_STATUS_ERRORS(status_reg) ||
2666a4dd1e26Swrstuden 	    twa_check_ctlr_state(sc, status_reg)) {
2667d1934bddSjakllsch 		aprint_error_dev(sc->twa_dv, "controller errors detected.\n");
2668a4dd1e26Swrstuden 		return(1);
2669a4dd1e26Swrstuden 	}
2670a4dd1e26Swrstuden 	return(0);
2671a4dd1e26Swrstuden }
2672a4dd1e26Swrstuden 
2673a4dd1e26Swrstuden static int
twa_wait_status(struct twa_softc * sc,uint32_t status,uint32_t timeout)26748c670781Ssimonb twa_wait_status(struct twa_softc *sc, uint32_t status, uint32_t timeout)
2675a4dd1e26Swrstuden {
2676a4dd1e26Swrstuden 	struct timeval		t1;
2677a4dd1e26Swrstuden 	time_t		end_time;
26788c670781Ssimonb 	uint32_t	status_reg;
2679a4dd1e26Swrstuden 
2680a4dd1e26Swrstuden 	timeout = (timeout * 1000 * 100);
2681a4dd1e26Swrstuden 
2682a4dd1e26Swrstuden 	microtime(&t1);
2683a4dd1e26Swrstuden 
2684a4dd1e26Swrstuden 	end_time = t1.tv_usec + timeout;
2685a4dd1e26Swrstuden 
2686a4dd1e26Swrstuden 	do {
2687a4dd1e26Swrstuden 		status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
2688f0b22f96Ssimonb 		/* got the required bit(s)? */
2689f0b22f96Ssimonb 		if ((status_reg & status) == status)
2690a4dd1e26Swrstuden 			return(0);
2691a4dd1e26Swrstuden 		DELAY(100000);
2692a4dd1e26Swrstuden 		microtime(&t1);
2693a4dd1e26Swrstuden 	} while (t1.tv_usec <= end_time);
2694a4dd1e26Swrstuden 
2695a4dd1e26Swrstuden 	return(1);
2696a4dd1e26Swrstuden }
2697a4dd1e26Swrstuden 
2698a4dd1e26Swrstuden static int
twa_fetch_aen(struct twa_softc * sc)2699a4dd1e26Swrstuden twa_fetch_aen(struct twa_softc *sc)
2700a4dd1e26Swrstuden {
2701a4dd1e26Swrstuden 	struct twa_request	*tr;
2702a4dd1e26Swrstuden 	int			s, error = 0;
2703a4dd1e26Swrstuden 
2704a4dd1e26Swrstuden 	s = splbio();
2705a4dd1e26Swrstuden 
27067cfa6f22Swrstuden 	if ((tr = twa_get_request(sc, TWA_CMD_AEN)) == NULL) {
27077cfa6f22Swrstuden 		splx(s);
2708a4dd1e26Swrstuden 		return(EIO);
27097cfa6f22Swrstuden 	}
2710a4dd1e26Swrstuden 	tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL;
2711a4dd1e26Swrstuden 	tr->tr_callback = twa_aen_callback;
2712a4dd1e26Swrstuden 	tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT);
2713a4dd1e26Swrstuden 	if (twa_request_sense(tr, 0) != 0) {
2714a4dd1e26Swrstuden 		if (tr->tr_data)
2715a4dd1e26Swrstuden 			free(tr->tr_data, M_DEVBUF);
2716a4dd1e26Swrstuden 		twa_release_request(tr);
2717a4dd1e26Swrstuden 		error = 1;
2718a4dd1e26Swrstuden 	}
2719a4dd1e26Swrstuden 	splx(s);
2720a4dd1e26Swrstuden 
2721a4dd1e26Swrstuden 	return(error);
2722a4dd1e26Swrstuden }
2723a4dd1e26Swrstuden 
2724a4dd1e26Swrstuden /*
2725a4dd1e26Swrstuden  * Function name:	twa_aen_callback
2726a4dd1e26Swrstuden  * Description:		Callback for requests to fetch AEN's.
2727a4dd1e26Swrstuden  *
2728a4dd1e26Swrstuden  * Input:		tr	-- ptr to completed request pkt
2729a4dd1e26Swrstuden  * Output:		None
2730a4dd1e26Swrstuden  * Return value:	None
2731a4dd1e26Swrstuden  */
2732a4dd1e26Swrstuden static void
twa_aen_callback(struct twa_request * tr)2733a4dd1e26Swrstuden twa_aen_callback(struct twa_request *tr)
2734a4dd1e26Swrstuden {
2735a4dd1e26Swrstuden 	int i;
2736a4dd1e26Swrstuden 	int fetch_more_aens = 0;
2737a4dd1e26Swrstuden 	struct twa_softc		*sc = tr->tr_sc;
2738a4dd1e26Swrstuden 	struct twa_command_header	*cmd_hdr =
2739a4dd1e26Swrstuden 		(struct twa_command_header *)(tr->tr_data);
2740a4dd1e26Swrstuden 	struct twa_command_9k		*cmd =
2741a4dd1e26Swrstuden 		&(tr->tr_command->command.cmd_pkt_9k);
2742a4dd1e26Swrstuden 
2743a4dd1e26Swrstuden 	if (! cmd->status) {
2744a4dd1e26Swrstuden 		if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) &&
2745a4dd1e26Swrstuden 			(cmd->cdb[0] == 0x3 /* REQUEST_SENSE */))
2746a4dd1e26Swrstuden 			if (twa_enqueue_aen(sc, cmd_hdr)
2747a4dd1e26Swrstuden 				!= TWA_AEN_QUEUE_EMPTY)
2748a4dd1e26Swrstuden 				fetch_more_aens = 1;
2749a4dd1e26Swrstuden 	} else {
2750a4dd1e26Swrstuden 		cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0';
2751a4dd1e26Swrstuden 		for (i = 0; i < 18; i++)
2752a4dd1e26Swrstuden 			printf("%x\t", tr->tr_command->cmd_hdr.sense_data[i]);
2753916bdfa5Spgoyette 		printf("\n"); /* print new line */
2754a4dd1e26Swrstuden 
2755a4dd1e26Swrstuden 		for (i = 0; i < 128; i++)
2756a4dd1e26Swrstuden 			printf("%x\t", ((int8_t *)(tr->tr_data))[i]);
2757916bdfa5Spgoyette 		printf("\n"); /* print new line */
2758a4dd1e26Swrstuden 	}
2759a4dd1e26Swrstuden 	if (tr->tr_data)
2760a4dd1e26Swrstuden 		free(tr->tr_data, M_DEVBUF);
2761a4dd1e26Swrstuden 	twa_release_request(tr);
2762a4dd1e26Swrstuden 
2763a4dd1e26Swrstuden 	if (fetch_more_aens)
2764a4dd1e26Swrstuden 		twa_fetch_aen(sc);
2765a4dd1e26Swrstuden }
2766a4dd1e26Swrstuden 
2767a4dd1e26Swrstuden /*
2768a4dd1e26Swrstuden  * Function name:	twa_enqueue_aen
2769a4dd1e26Swrstuden  * Description:		Queues AEN's to be supplied to user-space tools on request.
2770a4dd1e26Swrstuden  *
2771a4dd1e26Swrstuden  * Input:		sc	-- ptr to per ctlr structure
2772a4dd1e26Swrstuden  *			cmd_hdr	-- ptr to hdr of fw cmd pkt, from where the AEN
2773a4dd1e26Swrstuden  *				   details can be retrieved.
2774a4dd1e26Swrstuden  * Output:		None
2775a4dd1e26Swrstuden  * Return value:	None
2776a4dd1e26Swrstuden  */
2777a4dd1e26Swrstuden static uint16_t
twa_enqueue_aen(struct twa_softc * sc,struct twa_command_header * cmd_hdr)2778a4dd1e26Swrstuden twa_enqueue_aen(struct twa_softc *sc, struct twa_command_header *cmd_hdr)
2779a4dd1e26Swrstuden {
2780073156cfShannken 	int			rv __diagused, s;
2781a4dd1e26Swrstuden 	struct tw_cl_event_packet *event;
2782a4dd1e26Swrstuden 	uint16_t		aen_code;
2783a4dd1e26Swrstuden 	unsigned long		sync_time;
2784a4dd1e26Swrstuden 
2785a4dd1e26Swrstuden 	s = splbio();
2786a4dd1e26Swrstuden 	aen_code = cmd_hdr->status_block.error;
2787a4dd1e26Swrstuden 
2788a4dd1e26Swrstuden 	switch (aen_code) {
2789a4dd1e26Swrstuden 	case TWA_AEN_SYNC_TIME_WITH_HOST:
2790a4dd1e26Swrstuden 
279152b60673Ssimonb 		sync_time = (time_second - (3 * 86400)) % 604800;
2792a4dd1e26Swrstuden 		rv = twa_set_param(sc, TWA_PARAM_TIME_TABLE,
2793a4dd1e26Swrstuden 				TWA_PARAM_TIME_SchedulerTime, 4,
2794a4dd1e26Swrstuden 				&sync_time, twa_aen_callback);
2795a4dd1e26Swrstuden #ifdef DIAGNOSTIC
2796a4dd1e26Swrstuden 		if (rv != 0)
27978bc54e5bSmsaitoh 			aprint_error_dev(sc->twa_dv,
27988bc54e5bSmsaitoh 			    "unable to sync time with ctlr\n");
2799a4dd1e26Swrstuden #endif
2800a4dd1e26Swrstuden 		break;
2801a4dd1e26Swrstuden 
2802a4dd1e26Swrstuden 	case TWA_AEN_QUEUE_EMPTY:
2803a4dd1e26Swrstuden 		break;
2804a4dd1e26Swrstuden 
2805a4dd1e26Swrstuden 	default:
2806a4dd1e26Swrstuden 		/* Queue the event. */
2807a4dd1e26Swrstuden 		event = sc->twa_aen_queue[sc->twa_aen_head];
2808a4dd1e26Swrstuden 		if (event->retrieved == TWA_AEN_NOT_RETRIEVED)
2809a4dd1e26Swrstuden 			sc->twa_aen_queue_overflow = TRUE;
2810a4dd1e26Swrstuden 		event->severity =
2811a4dd1e26Swrstuden 			cmd_hdr->status_block.substatus_block.severity;
281252b60673Ssimonb 		event->time_stamp_sec = time_second;
2813a4dd1e26Swrstuden 		event->aen_code = aen_code;
2814a4dd1e26Swrstuden 		event->retrieved = TWA_AEN_NOT_RETRIEVED;
2815a4dd1e26Swrstuden 		event->sequence_id = ++(sc->twa_current_sequence_id);
2816a4dd1e26Swrstuden 		cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0';
2817a4dd1e26Swrstuden 		event->parameter_len = strlen(cmd_hdr->err_specific_desc);
2818a4dd1e26Swrstuden 		memcpy(event->parameter_data, cmd_hdr->err_specific_desc,
2819a4dd1e26Swrstuden 			event->parameter_len);
2820a4dd1e26Swrstuden 
2821a4dd1e26Swrstuden 		if (event->severity < TWA_AEN_SEVERITY_DEBUG) {
2822a4dd1e26Swrstuden 			printf("%s: AEN 0x%04X: %s: %s: %s\n",
2823d1934bddSjakllsch 				device_xname(sc->twa_dv),
2824a4dd1e26Swrstuden 				aen_code,
2825a4dd1e26Swrstuden 				twa_aen_severity_table[event->severity],
2826a4dd1e26Swrstuden 				twa_find_msg_string(twa_aen_table, aen_code),
2827a4dd1e26Swrstuden 				event->parameter_data);
2828a4dd1e26Swrstuden 		}
2829a4dd1e26Swrstuden 
2830a4dd1e26Swrstuden 		if ((sc->twa_aen_head + 1) == TWA_Q_LENGTH)
2831a4dd1e26Swrstuden 			sc->twa_aen_queue_wrapped = TRUE;
2832a4dd1e26Swrstuden 		sc->twa_aen_head = (sc->twa_aen_head + 1) % TWA_Q_LENGTH;
2833a4dd1e26Swrstuden 		break;
2834a4dd1e26Swrstuden 	} /* switch */
2835a4dd1e26Swrstuden 	splx(s);
2836a4dd1e26Swrstuden 
2837a4dd1e26Swrstuden 	return (aen_code);
2838a4dd1e26Swrstuden }
2839a4dd1e26Swrstuden 
2840a4dd1e26Swrstuden /*
2841a4dd1e26Swrstuden  * Function name:	twa_find_aen
2842a4dd1e26Swrstuden  * Description:		Reports whether a given AEN ever occurred.
2843a4dd1e26Swrstuden  *
2844a4dd1e26Swrstuden  * Input:		sc	-- ptr to per ctlr structure
2845a4dd1e26Swrstuden  *			aen_code-- AEN to look for
2846a4dd1e26Swrstuden  * Output:		None
2847a4dd1e26Swrstuden  * Return value:	0	-- success
2848a4dd1e26Swrstuden  *			non-zero-- failure
2849a4dd1e26Swrstuden  */
2850a4dd1e26Swrstuden static int
twa_find_aen(struct twa_softc * sc,uint16_t aen_code)28518c670781Ssimonb twa_find_aen(struct twa_softc *sc, uint16_t aen_code)
2852a4dd1e26Swrstuden {
28538c670781Ssimonb 	uint32_t	last_index;
2854a4dd1e26Swrstuden 	int		s;
2855a4dd1e26Swrstuden 	int		i;
2856a4dd1e26Swrstuden 
2857a4dd1e26Swrstuden 	s = splbio();
2858a4dd1e26Swrstuden 
2859a4dd1e26Swrstuden 	if (sc->twa_aen_queue_wrapped)
2860a4dd1e26Swrstuden 		last_index = sc->twa_aen_head;
2861a4dd1e26Swrstuden 	else
2862a4dd1e26Swrstuden 		last_index = 0;
2863a4dd1e26Swrstuden 
2864a4dd1e26Swrstuden 	i = sc->twa_aen_head;
2865a4dd1e26Swrstuden 	do {
2866a4dd1e26Swrstuden 		i = (i + TWA_Q_LENGTH - 1) % TWA_Q_LENGTH;
2867a4dd1e26Swrstuden 		if ((sc->twa_aen_queue[i])->aen_code == aen_code) {
2868a4dd1e26Swrstuden 			splx(s);
2869a4dd1e26Swrstuden 			return(0);
2870a4dd1e26Swrstuden 		}
2871a4dd1e26Swrstuden 	} while (i != last_index);
2872a4dd1e26Swrstuden 
2873a4dd1e26Swrstuden 	splx(s);
2874a4dd1e26Swrstuden 	return(1);
2875a4dd1e26Swrstuden }
2876a4dd1e26Swrstuden 
2877bbf2deb3Schristos static inline void
twa_request_init(struct twa_request * tr,int flags)2878a4dd1e26Swrstuden twa_request_init(struct twa_request *tr, int flags)
2879a4dd1e26Swrstuden {
2880a4dd1e26Swrstuden 	tr->tr_data = NULL;
2881a4dd1e26Swrstuden 	tr->tr_real_data = NULL;
2882a4dd1e26Swrstuden 	tr->tr_length = 0;
2883a4dd1e26Swrstuden 	tr->tr_real_length = 0;
2884a4dd1e26Swrstuden 	tr->tr_status = TWA_CMD_SETUP;/* command is in setup phase */
2885a4dd1e26Swrstuden 	tr->tr_flags = flags;
2886a4dd1e26Swrstuden 	tr->tr_error = 0;
2887a4dd1e26Swrstuden 	tr->tr_callback = NULL;
2888a4dd1e26Swrstuden 	tr->tr_cmd_pkt_type = 0;
28897cfa6f22Swrstuden 	tr->bp = 0;
2890a4dd1e26Swrstuden 
2891a4dd1e26Swrstuden 	/*
2892a4dd1e26Swrstuden 	 * Look at the status field in the command packet to see how
2893a4dd1e26Swrstuden 	 * it completed the last time it was used, and zero out only
2894a4dd1e26Swrstuden 	 * the portions that might have changed.  Note that we don't
2895a4dd1e26Swrstuden 	 * care to zero out the sglist.
2896a4dd1e26Swrstuden 	 */
2897a4dd1e26Swrstuden 	if (tr->tr_command->command.cmd_pkt_9k.status)
2898a4dd1e26Swrstuden 		memset(tr->tr_command, 0,
2899a4dd1e26Swrstuden 			sizeof(struct twa_command_header) + 28);
2900a4dd1e26Swrstuden 	else
2901a4dd1e26Swrstuden 		memset(&(tr->tr_command->command), 0, 28);
2902a4dd1e26Swrstuden }
2903a4dd1e26Swrstuden 
2904a4dd1e26Swrstuden struct twa_request *
twa_get_request_wait(struct twa_softc * sc,int flags)2905a4dd1e26Swrstuden twa_get_request_wait(struct twa_softc *sc, int flags)
2906a4dd1e26Swrstuden {
2907a4dd1e26Swrstuden 	struct twa_request *tr;
2908a4dd1e26Swrstuden 	int s;
2909a4dd1e26Swrstuden 
2910a4dd1e26Swrstuden 	KASSERT((flags & TWA_CMD_AEN) == 0);
2911a4dd1e26Swrstuden 
2912a4dd1e26Swrstuden 	s = splbio();
2913a4dd1e26Swrstuden 	while ((tr = TAILQ_FIRST(&sc->twa_free)) == NULL) {
2914a4dd1e26Swrstuden 		sc->twa_sc_flags |= TWA_STATE_REQUEST_WAIT;
2915a4dd1e26Swrstuden 		(void) tsleep(&sc->twa_free, PRIBIO, "twaccb", hz);
2916a4dd1e26Swrstuden 	}
2917a4dd1e26Swrstuden 	TAILQ_REMOVE(&sc->twa_free, tr, tr_link);
2918a4dd1e26Swrstuden 
2919a4dd1e26Swrstuden 	splx(s);
2920a4dd1e26Swrstuden 
2921a4dd1e26Swrstuden 	twa_request_init(tr, flags);
2922a4dd1e26Swrstuden 
2923a4dd1e26Swrstuden 	return(tr);
2924a4dd1e26Swrstuden }
2925a4dd1e26Swrstuden 
2926a4dd1e26Swrstuden struct twa_request *
twa_get_request(struct twa_softc * sc,int flags)2927a4dd1e26Swrstuden twa_get_request(struct twa_softc *sc, int flags)
2928a4dd1e26Swrstuden {
2929a4dd1e26Swrstuden 	int s;
2930a4dd1e26Swrstuden 	struct twa_request *tr;
2931a4dd1e26Swrstuden 
2932a4dd1e26Swrstuden 	/* Get a free request packet. */
2933a4dd1e26Swrstuden 	s = splbio();
2934a4dd1e26Swrstuden 	if (__predict_false((flags & TWA_CMD_AEN) != 0)) {
2935a4dd1e26Swrstuden 
2936a4dd1e26Swrstuden 		if ((sc->sc_twa_request->tr_flags & TWA_CMD_AEN_BUSY) == 0) {
2937a4dd1e26Swrstuden 			tr = sc->sc_twa_request;
2938a4dd1e26Swrstuden 			flags |= TWA_CMD_AEN_BUSY;
2939a4dd1e26Swrstuden 		} else {
2940a4dd1e26Swrstuden 			splx(s);
2941a4dd1e26Swrstuden 			return (NULL);
2942a4dd1e26Swrstuden 		}
2943a4dd1e26Swrstuden 	} else {
2944a4dd1e26Swrstuden 		if (__predict_false((tr =
2945a4dd1e26Swrstuden 				TAILQ_FIRST(&sc->twa_free)) == NULL)) {
2946a4dd1e26Swrstuden 			splx(s);
2947a4dd1e26Swrstuden 			return (NULL);
2948a4dd1e26Swrstuden 		}
2949a4dd1e26Swrstuden 		TAILQ_REMOVE(&sc->twa_free, tr, tr_link);
2950a4dd1e26Swrstuden 	}
2951a4dd1e26Swrstuden 	splx(s);
2952a4dd1e26Swrstuden 
2953a4dd1e26Swrstuden 	twa_request_init(tr, flags);
2954a4dd1e26Swrstuden 
2955a4dd1e26Swrstuden 	return(tr);
2956a4dd1e26Swrstuden }
2957a4dd1e26Swrstuden 
2958a4dd1e26Swrstuden /*
2959a4dd1e26Swrstuden  * Print some information about the controller
2960a4dd1e26Swrstuden  */
2961a4dd1e26Swrstuden static void
twa_describe_controller(struct twa_softc * sc)2962a4dd1e26Swrstuden twa_describe_controller(struct twa_softc *sc)
2963a4dd1e26Swrstuden {
2964a4dd1e26Swrstuden 	struct twa_param_9k	*p[10];
2965a4dd1e26Swrstuden 	int			i, rv = 0;
2966a4dd1e26Swrstuden 	uint32_t		dsize;
2967a4dd1e26Swrstuden 	uint8_t			ports;
2968a4dd1e26Swrstuden 
296931dfc4c2Schristos 	memset(p, 0, sizeof(p));
2970a4dd1e26Swrstuden 
2971a4dd1e26Swrstuden 	/* Get the port count. */
2972a4dd1e26Swrstuden 	rv |= twa_get_param(sc, TWA_PARAM_CONTROLLER,
2973a4dd1e26Swrstuden 		TWA_PARAM_CONTROLLER_PortCount, 1, NULL, &p[0]);
2974a4dd1e26Swrstuden 
2975a4dd1e26Swrstuden 	/* get version strings */
2976a4dd1e26Swrstuden 	rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_FW,
2977a4dd1e26Swrstuden 		16, NULL, &p[1]);
2978a4dd1e26Swrstuden 	rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_BIOS,
2979a4dd1e26Swrstuden 		16, NULL, &p[2]);
2980a4dd1e26Swrstuden 	rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_Mon,
2981a4dd1e26Swrstuden 		16, NULL, &p[3]);
2982a4dd1e26Swrstuden 	rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCBA,
2983a4dd1e26Swrstuden 		8, NULL, &p[4]);
2984a4dd1e26Swrstuden 	rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_ATA,
2985a4dd1e26Swrstuden 		8, NULL, &p[5]);
2986a4dd1e26Swrstuden 	rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCI,
2987a4dd1e26Swrstuden 		8, NULL, &p[6]);
2988a4dd1e26Swrstuden 	rv |= twa_get_param(sc, TWA_PARAM_DRIVESUMMARY, TWA_PARAM_DRIVESTATUS,
2989a4dd1e26Swrstuden 		16, NULL, &p[7]);
2990a4dd1e26Swrstuden 
2991a4dd1e26Swrstuden 	if (rv) {
2992a4dd1e26Swrstuden 		/* some error occurred */
29938bc54e5bSmsaitoh 		aprint_error_dev(sc->twa_dv,
29948bc54e5bSmsaitoh 		    "failed to fetch version information\n");
2995a4dd1e26Swrstuden 		goto bail;
2996a4dd1e26Swrstuden 	}
2997a4dd1e26Swrstuden 
29988c670781Ssimonb 	ports = *(uint8_t *)(p[0]->data);
2999a4dd1e26Swrstuden 
3000d1934bddSjakllsch 	aprint_normal_dev(sc->twa_dv, "%d ports, Firmware %.16s, BIOS %.16s\n",
30019d57c800Scegger 		ports, p[1]->data, p[2]->data);
3002a4dd1e26Swrstuden 
30038bc54e5bSmsaitoh 	aprint_verbose_dev(sc->twa_dv,
30048bc54e5bSmsaitoh 	    "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n",
3005a4dd1e26Swrstuden 		p[3]->data, p[4]->data,
3006a4dd1e26Swrstuden 		p[5]->data, p[6]->data);
3007a4dd1e26Swrstuden 
3008a4dd1e26Swrstuden 	for (i = 0; i < ports; i++) {
3009a4dd1e26Swrstuden 
3010a4dd1e26Swrstuden 		if ((*((char *)(p[7]->data + i)) & TWA_DRIVE_DETECTED) == 0)
3011a4dd1e26Swrstuden 			continue;
3012a4dd1e26Swrstuden 
3013dace2785Schristos 		rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i,
3014a4dd1e26Swrstuden 			TWA_PARAM_DRIVEMODELINDEX,
3015a4dd1e26Swrstuden 			TWA_PARAM_DRIVEMODEL_LENGTH, NULL, &p[8]);
3016a4dd1e26Swrstuden 
3017a4dd1e26Swrstuden 		if (rv != 0) {
30188bc54e5bSmsaitoh 			aprint_error_dev(sc->twa_dv,
30198bc54e5bSmsaitoh 			    "unable to get drive model for port %d\n", i);
3020a4dd1e26Swrstuden 			continue;
3021a4dd1e26Swrstuden 		}
3022a4dd1e26Swrstuden 
3023dace2785Schristos 		rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i,
3024a4dd1e26Swrstuden 			TWA_PARAM_DRIVESIZEINDEX,
3025a4dd1e26Swrstuden 			TWA_PARAM_DRIVESIZE_LENGTH, NULL, &p[9]);
3026a4dd1e26Swrstuden 
3027a4dd1e26Swrstuden 		if (rv != 0) {
3028d1934bddSjakllsch 			aprint_error_dev(sc->twa_dv, "unable to get drive size"
30299d57c800Scegger 			    " for port %d\n", i);
3030a4dd1e26Swrstuden 			free(p[8], M_DEVBUF);
3031a4dd1e26Swrstuden 			continue;
3032a4dd1e26Swrstuden 		}
3033a4dd1e26Swrstuden 
3034a4dd1e26Swrstuden 		dsize = *(uint32_t *)(p[9]->data);
3035a4dd1e26Swrstuden 
3036d1934bddSjakllsch 		aprint_verbose_dev(sc->twa_dv, "port %d: %.40s %d MB\n",
30379d57c800Scegger 		    i, p[8]->data, dsize / 2048);
3038a4dd1e26Swrstuden 
3039a4dd1e26Swrstuden 		if (p[8])
3040a4dd1e26Swrstuden 			free(p[8], M_DEVBUF);
3041a4dd1e26Swrstuden 		if (p[9])
3042a4dd1e26Swrstuden 			free(p[9], M_DEVBUF);
3043a4dd1e26Swrstuden 	}
3044a4dd1e26Swrstuden bail:
3045a4dd1e26Swrstuden 	if (p[0])
3046a4dd1e26Swrstuden 		free(p[0], M_DEVBUF);
3047a4dd1e26Swrstuden 	if (p[1])
3048a4dd1e26Swrstuden 		free(p[1], M_DEVBUF);
3049a4dd1e26Swrstuden 	if (p[2])
3050a4dd1e26Swrstuden 		free(p[2], M_DEVBUF);
3051a4dd1e26Swrstuden 	if (p[3])
3052a4dd1e26Swrstuden 		free(p[3], M_DEVBUF);
3053a4dd1e26Swrstuden 	if (p[4])
3054a4dd1e26Swrstuden 		free(p[4], M_DEVBUF);
3055a4dd1e26Swrstuden 	if (p[5])
3056a4dd1e26Swrstuden 		free(p[5], M_DEVBUF);
3057a4dd1e26Swrstuden 	if (p[6])
3058a4dd1e26Swrstuden 		free(p[6], M_DEVBUF);
3059a4dd1e26Swrstuden }
3060a4dd1e26Swrstuden 
3061a4dd1e26Swrstuden /*
3062a4dd1e26Swrstuden  * Function name:	twa_check_ctlr_state
3063a4dd1e26Swrstuden  * Description:		Makes sure that the fw status register reports a
3064a4dd1e26Swrstuden  *			proper status.
3065a4dd1e26Swrstuden  *
3066a4dd1e26Swrstuden  * Input:		sc		-- ptr to per ctlr structure
3067a4dd1e26Swrstuden  *			status_reg	-- value in the status register
3068a4dd1e26Swrstuden  * Output:		None
3069a4dd1e26Swrstuden  * Return value:	0	-- no errors
3070a4dd1e26Swrstuden  *			non-zero-- errors
3071a4dd1e26Swrstuden  */
3072a4dd1e26Swrstuden static int
twa_check_ctlr_state(struct twa_softc * sc,uint32_t status_reg)30738c670781Ssimonb twa_check_ctlr_state(struct twa_softc *sc, uint32_t status_reg)
3074a4dd1e26Swrstuden {
3075a4dd1e26Swrstuden 	int		result = 0;
3076a4dd1e26Swrstuden 	struct timeval	t1;
3077a4dd1e26Swrstuden 	static time_t	last_warning[2] = {0, 0};
3078a4dd1e26Swrstuden 
3079a4dd1e26Swrstuden 	/* Check if the 'micro-controller ready' bit is not set. */
3080a4dd1e26Swrstuden 	if ((status_reg & TWA_STATUS_EXPECTED_BITS) !=
3081a4dd1e26Swrstuden 				TWA_STATUS_EXPECTED_BITS) {
3082a4dd1e26Swrstuden 
3083a4dd1e26Swrstuden 		microtime(&t1);
3084a4dd1e26Swrstuden 
3085a4dd1e26Swrstuden 		last_warning[0] += (5 * 1000 * 100);
3086a4dd1e26Swrstuden 
3087a4dd1e26Swrstuden 		if (t1.tv_usec > last_warning[0]) {
3088a4dd1e26Swrstuden 			microtime(&t1);
3089a4dd1e26Swrstuden 			last_warning[0] = t1.tv_usec;
3090a4dd1e26Swrstuden 		}
3091a4dd1e26Swrstuden 		result = 1;
3092a4dd1e26Swrstuden 	}
3093a4dd1e26Swrstuden 
3094a4dd1e26Swrstuden 	/* Check if any error bits are set. */
3095a4dd1e26Swrstuden 	if ((status_reg & TWA_STATUS_UNEXPECTED_BITS) != 0) {
3096a4dd1e26Swrstuden 
3097a4dd1e26Swrstuden 		microtime(&t1);
3098a4dd1e26Swrstuden 		last_warning[1] += (5 * 1000 * 100);
3099a4dd1e26Swrstuden 		if (t1.tv_usec > last_warning[1]) {
3100a4dd1e26Swrstuden 		     	microtime(&t1);
3101a4dd1e26Swrstuden 			last_warning[1] = t1.tv_usec;
3102a4dd1e26Swrstuden 		}
3103a4dd1e26Swrstuden 		if (status_reg & TWA_STATUS_PCI_PARITY_ERROR_INTERRUPT) {
31048bc54e5bSmsaitoh 			aprint_error_dev(sc->twa_dv, "clearing PCI parity "
31058bc54e5bSmsaitoh 			    "error re-seat/move/replace card.\n");
3106a4dd1e26Swrstuden 			twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
3107a4dd1e26Swrstuden 				TWA_CONTROL_CLEAR_PARITY_ERROR);
3108a4dd1e26Swrstuden 			pci_conf_write(sc->pc, sc->tag,
3109a4dd1e26Swrstuden 				PCI_COMMAND_STATUS_REG,
3110a4dd1e26Swrstuden 				TWA_PCI_CONFIG_CLEAR_PARITY_ERROR);
3111a4dd1e26Swrstuden 		}
3112a4dd1e26Swrstuden 		if (status_reg & TWA_STATUS_PCI_ABORT_INTERRUPT) {
3113d1934bddSjakllsch 			aprint_error_dev(sc->twa_dv, "clearing PCI abort\n");
3114a4dd1e26Swrstuden 			twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
3115a4dd1e26Swrstuden 				TWA_CONTROL_CLEAR_PCI_ABORT);
3116a4dd1e26Swrstuden 			pci_conf_write(sc->pc, sc->tag,
3117a4dd1e26Swrstuden 				PCI_COMMAND_STATUS_REG,
3118a4dd1e26Swrstuden 				TWA_PCI_CONFIG_CLEAR_PCI_ABORT);
3119a4dd1e26Swrstuden 		}
3120a4dd1e26Swrstuden 		if (status_reg & TWA_STATUS_QUEUE_ERROR_INTERRUPT) {
31211fe12cbbSjoerg  			/*
31221fe12cbbSjoerg 			 * As documented by 3ware, the 9650 erroneously
31231fe12cbbSjoerg 			 * flags queue errors during resets.
31241fe12cbbSjoerg 			 * Just ignore them during the reset instead of
31251fe12cbbSjoerg 			 * bothering the console.
31261fe12cbbSjoerg  			 */
31271fe12cbbSjoerg  			if ((sc->sc_product_id != PCI_PRODUCT_3WARE_9650) ||
31281fe12cbbSjoerg  			    ((sc->twa_sc_flags & TWA_STATE_IN_RESET) == 0)) {
3129d1934bddSjakllsch  				aprint_error_dev(sc->twa_dv,
31301fe12cbbSjoerg  				    "clearing controller queue error\n");
31311fe12cbbSjoerg  			}
31321fe12cbbSjoerg 
3133a4dd1e26Swrstuden   			twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
31341fe12cbbSjoerg  				TWA_CONTROL_CLEAR_QUEUE_ERROR);
3135a4dd1e26Swrstuden 		}
3136a4dd1e26Swrstuden 		if (status_reg & TWA_STATUS_MICROCONTROLLER_ERROR) {
31378bc54e5bSmsaitoh 			aprint_error_dev(sc->twa_dv,
31388bc54e5bSmsaitoh 			    "micro-controller error\n");
3139a4dd1e26Swrstuden 			result = 1;
3140a4dd1e26Swrstuden 		}
3141a4dd1e26Swrstuden 	}
3142a4dd1e26Swrstuden 	return(result);
3143a4dd1e26Swrstuden }
3144916bdfa5Spgoyette 
3145916bdfa5Spgoyette MODULE(MODULE_CLASS_DRIVER, twa, "pci");
3146916bdfa5Spgoyette 
3147916bdfa5Spgoyette #ifdef _MODULE
3148916bdfa5Spgoyette #include "ioconf.c"
3149916bdfa5Spgoyette #endif
3150916bdfa5Spgoyette 
3151916bdfa5Spgoyette static int
twa_modcmd(modcmd_t cmd,void * opaque)3152916bdfa5Spgoyette twa_modcmd(modcmd_t cmd, void *opaque)
3153916bdfa5Spgoyette {
3154916bdfa5Spgoyette 	int error = 0;
3155916bdfa5Spgoyette 
3156916bdfa5Spgoyette #ifdef _MODULE
3157916bdfa5Spgoyette 	switch (cmd) {
3158916bdfa5Spgoyette 	case MODULE_CMD_INIT:
3159916bdfa5Spgoyette 		error = config_init_component(cfdriver_ioconf_twa,
3160916bdfa5Spgoyette 		    cfattach_ioconf_twa, cfdata_ioconf_twa);
3161916bdfa5Spgoyette 		break;
3162916bdfa5Spgoyette 	case MODULE_CMD_FINI:
3163916bdfa5Spgoyette 		error = config_fini_component(cfdriver_ioconf_twa,
3164916bdfa5Spgoyette 		    cfattach_ioconf_twa, cfdata_ioconf_twa);
3165916bdfa5Spgoyette 		break;
3166916bdfa5Spgoyette 	default:
3167916bdfa5Spgoyette 		error = ENOTTY;
3168916bdfa5Spgoyette 		break;
3169916bdfa5Spgoyette 	}
3170916bdfa5Spgoyette #endif
3171916bdfa5Spgoyette 
3172916bdfa5Spgoyette 	return error;
3173916bdfa5Spgoyette }
3174