xref: /netbsd-src/sys/dev/pci/slide.c (revision 8ac07aec990b9d2e483062509d0a9fa5b4f57cf2)
1 /*	$NetBSD: slide.c,v 1.19 2008/03/18 20:46:37 cube Exp $	*/
2 
3 /*-
4  * Copyright (c) 2002 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by the NetBSD
21  *	Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #include <sys/cdefs.h>
40 __KERNEL_RCSID(0, "$NetBSD: slide.c,v 1.19 2008/03/18 20:46:37 cube Exp $");
41 
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 
45 #include <dev/pci/pcivar.h>
46 #include <dev/pci/pcidevs.h>
47 #include <dev/pci/pciidereg.h>
48 #include <dev/pci/pciidevar.h>
49 #include <dev/pci/pciide_sl82c105_reg.h>
50 
51 static void sl82c105_chip_map(struct pciide_softc*, struct pci_attach_args*);
52 static void sl82c105_setup_channel(struct ata_channel*);
53 
54 static int  slide_match(device_t, cfdata_t, void *);
55 static void slide_attach(device_t, device_t, void *);
56 
57 CFATTACH_DECL_NEW(slide, sizeof(struct pciide_softc),
58     slide_match, slide_attach, NULL, NULL);
59 
60 static const struct pciide_product_desc pciide_symphony_products[] = {
61 	{ PCI_PRODUCT_SYMPHONY_82C105,
62 	  0,
63 	  "Symphony Labs 82C105 IDE controller",
64 	  sl82c105_chip_map,
65 	},
66 	{ 0,
67 	  0,
68 	  NULL,
69 	  NULL,
70 	}
71 };
72 
73 static const struct pciide_product_desc pciide_winbond_products[] =  {
74 	{ PCI_PRODUCT_WINBOND_W83C553F_1,
75 	  0,
76 	  "Winbond W83C553F IDE controller",
77 	  sl82c105_chip_map,
78 	},
79 	{ 0,
80 	  0,
81 	  NULL,
82 	  NULL,
83 	}
84 };
85 
86 static int
87 slide_match(device_t parent, cfdata_t match, void *aux)
88 {
89 	struct pci_attach_args *pa = aux;
90 
91 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SYMPHONY) {
92 		if (pciide_lookup_product(pa->pa_id, pciide_symphony_products))
93 			return (2);
94 	}
95 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_WINBOND) {
96 		if (pciide_lookup_product(pa->pa_id, pciide_winbond_products))
97 			return (2);
98 	}
99 	return (0);
100 }
101 
102 static void
103 slide_attach(device_t parent, device_t self, void *aux)
104 {
105 	struct pci_attach_args *pa = aux;
106 	struct pciide_softc *sc = device_private(self);
107 	const struct pciide_product_desc *pp = NULL;
108 
109 	sc->sc_wdcdev.sc_atac.atac_dev = self;
110 
111 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SYMPHONY)
112 		pp = pciide_lookup_product(pa->pa_id, pciide_symphony_products);
113 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_WINBOND)
114 		pp = pciide_lookup_product(pa->pa_id, pciide_winbond_products);
115 	if (pp == NULL)
116 		panic("slide_attach");
117 	pciide_common_attach(sc, pa, pp);
118 }
119 
120 static int
121 sl82c105_bugchk(struct pci_attach_args *pa)
122 {
123 
124 	if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_WINBOND ||
125 	    PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_WINBOND_W83C553F_0)
126 		return (0);
127 
128 	if (PCI_REVISION(pa->pa_class) <= 0x05)
129 		return (1);
130 
131 	return (0);
132 }
133 
134 static void
135 sl82c105_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
136 {
137 	struct pciide_channel *cp;
138 	bus_size_t cmdsize, ctlsize;
139 	pcireg_t interface, idecr;
140 	int channel;
141 
142 	if (pciide_chipen(sc, pa) == 0)
143 		return;
144 
145 	aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev,
146 	    "bus-master DMA support present");
147 
148 	/*
149 	 * Check to see if we're part of the Winbond 83c553 Southbridge.
150 	 * If so, we need to disable DMA on rev. <= 5 of that chip.
151 	 */
152 	if (pci_find_device(pa, sl82c105_bugchk)) {
153 		aprint_verbose(" but disabled due to 83c553 rev. <= 0x05");
154 		sc->sc_dma_ok = 0;
155 	} else
156 		pciide_mapreg_dma(sc, pa);
157 	aprint_verbose("\n");
158 
159 	sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA32 | ATAC_CAP_DATA16;
160 	sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
161 	if (sc->sc_dma_ok) {
162 		sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA;
163 		sc->sc_wdcdev.irqack = pciide_irqack;
164 		sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
165 	}
166 	sc->sc_wdcdev.sc_atac.atac_set_modes = sl82c105_setup_channel;
167 
168 	sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
169 	sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS;
170 
171 	idecr = pci_conf_read(sc->sc_pc, sc->sc_tag, SYMPH_IDECSR);
172 
173 	interface = PCI_INTERFACE(pa->pa_class);
174 
175 	wdc_allocate_regs(&sc->sc_wdcdev);
176 
177 	for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels;
178 	     channel++) {
179 		cp = &sc->pciide_channels[channel];
180 		if (pciide_chansetup(sc, channel, interface) == 0)
181 			continue;
182 		if ((channel == 0 && (idecr & IDECR_P0EN) == 0) ||
183 		    (channel == 1 && (idecr & IDECR_P1EN) == 0)) {
184 			aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev,
185 			    "%s channel ignored (disabled)\n", cp->name);
186 			cp->ata_channel.ch_flags |= ATACH_DISABLED;
187 			continue;
188 		}
189 		pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize,
190 		    pciide_pci_intr);
191 	}
192 }
193 
194 static void
195 sl82c105_setup_channel(struct ata_channel *chp)
196 {
197 	struct ata_drive_datas *drvp;
198 	struct pciide_channel *cp = CHAN_TO_PCHAN(chp);
199 	struct pciide_softc *sc = CHAN_TO_PCIIDE(chp);
200 	int pxdx_reg, drive, s;
201 	pcireg_t pxdx;
202 
203 	/* Set up DMA if needed. */
204 	pciide_channel_dma_setup(cp);
205 
206 	for (drive = 0; drive < 2; drive++) {
207 		pxdx_reg = ((chp->ch_channel == 0) ? SYMPH_P0D0CR
208 						   : SYMPH_P1D0CR) +
209 			    (drive * 4);
210 
211 		pxdx = pci_conf_read(sc->sc_pc, sc->sc_tag, pxdx_reg);
212 
213 		pxdx &= ~(PxDx_CMD_ON_MASK|PxDx_CMD_OFF_MASK);
214 		pxdx &= ~(PxDx_PWEN|PxDx_RDYEN|PxDx_RAEN);
215 
216 		drvp = &chp->ch_drive[drive];
217 		/* If no drive, skip. */
218 		if ((drvp->drive_flags & DRIVE) == 0) {
219 			pci_conf_write(sc->sc_pc, sc->sc_tag, pxdx_reg, pxdx);
220 			continue;
221 		}
222 
223 		if (drvp->drive_flags & DRIVE_DMA) {
224 			/*
225 			 * Timings will be used for both PIO and DMA,
226 			 * so adjust DMA mode if needed.
227 			 */
228 			if (drvp->PIO_mode >= 3) {
229 				if ((drvp->DMA_mode + 2) > drvp->PIO_mode)
230 					drvp->DMA_mode = drvp->PIO_mode - 2;
231 				if (drvp->DMA_mode < 1) {
232 					/*
233 					 * Can't mix both PIO and DMA.
234 					 * Disable DMA.
235 					 */
236 					s = splbio();
237 					drvp->drive_flags &= ~DRIVE_DMA;
238 					splx(s);
239 				}
240 			} else {
241 				/*
242 				 * Can't mix both PIO and DMA.  Disable
243 				 * DMA.
244 				 */
245 				s = splbio();
246 				drvp->drive_flags &= ~DRIVE_DMA;
247 				splx(s);
248 			}
249 		}
250 
251 		if (drvp->drive_flags & DRIVE_DMA) {
252 			/* Use multi-word DMA. */
253 			pxdx |= symph_mw_dma_times[drvp->DMA_mode].cmd_on <<
254 			    PxDx_CMD_ON_SHIFT;
255 			pxdx |= symph_mw_dma_times[drvp->DMA_mode].cmd_off;
256 		} else {
257 			pxdx |= symph_pio_times[drvp->PIO_mode].cmd_on <<
258 			    PxDx_CMD_ON_SHIFT;
259 			pxdx |= symph_pio_times[drvp->PIO_mode].cmd_off;
260 		}
261 
262 		/* XXX PxDx_PWEN? PxDx_RDYEN? PxDx_RAEN? */
263 
264 		/* ...and set the mode for this drive. */
265 		pci_conf_write(sc->sc_pc, sc->sc_tag, pxdx_reg, pxdx);
266 	}
267 }
268