1 /* $NetBSD: siisata_pci.c,v 1.16 2017/06/21 22:48:05 jdolecek Exp $ */ 2 3 /* 4 * Copyright (c) 2006 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 */ 27 28 /* 29 * Copyright (c) 2007, 2008, 2009 Jonathan A. Kollasch. 30 * All rights reserved. 31 * 32 * Redistribution and use in source and binary forms, with or without 33 * modification, are permitted provided that the following conditions 34 * are met: 35 * 1. Redistributions of source code must retain the above copyright 36 * notice, this list of conditions and the following disclaimer. 37 * 2. Redistributions in binary form must reproduce the above copyright 38 * notice, this list of conditions and the following disclaimer in the 39 * documentation and/or other materials provided with the distribution. 40 * 41 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 42 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 43 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 44 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 45 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 46 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 47 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 48 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 49 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 50 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 51 */ 52 53 #include <sys/cdefs.h> 54 __KERNEL_RCSID(0, "$NetBSD: siisata_pci.c,v 1.16 2017/06/21 22:48:05 jdolecek Exp $"); 55 56 #include <sys/types.h> 57 #include <sys/malloc.h> 58 #include <sys/param.h> 59 #include <sys/kernel.h> 60 #include <sys/systm.h> 61 62 #include <dev/pci/pcivar.h> 63 #include <dev/pci/pcidevs.h> 64 #include <dev/ic/siisatavar.h> 65 66 struct siisata_pci_softc { 67 struct siisata_softc si_sc; 68 pci_chipset_tag_t sc_pc; 69 pcitag_t sc_pcitag; 70 void * sc_ih; 71 }; 72 73 static int siisata_pci_match(device_t, cfdata_t, void *); 74 static void siisata_pci_attach(device_t, device_t, void *); 75 static int siisata_pci_detach(device_t, int); 76 static bool siisata_pci_resume(device_t, const pmf_qual_t *); 77 78 struct siisata_pci_board { 79 pci_vendor_id_t spb_vend; 80 pci_product_id_t spb_prod; 81 uint16_t spb_port; 82 uint16_t spb_chip; 83 }; 84 85 static const struct siisata_pci_board siisata_pci_boards[] = { 86 { 87 .spb_vend = PCI_VENDOR_CMDTECH, 88 .spb_prod = PCI_PRODUCT_CMDTECH_3124, 89 .spb_port = 4, 90 .spb_chip = 3124, 91 }, 92 { 93 .spb_vend = PCI_VENDOR_CMDTECH, 94 .spb_prod = PCI_PRODUCT_CMDTECH_3132, 95 .spb_port = 2, 96 .spb_chip = 3132, 97 }, 98 { 99 .spb_vend = PCI_VENDOR_CMDTECH, 100 .spb_prod = PCI_PRODUCT_CMDTECH_AAR_1220SA, 101 .spb_port = 2, 102 .spb_chip = 3132, 103 }, 104 { 105 .spb_vend = PCI_VENDOR_CMDTECH, 106 .spb_prod = PCI_PRODUCT_CMDTECH_3531, 107 .spb_port = 1, 108 .spb_chip = 3531, 109 }, 110 }; 111 112 CFATTACH_DECL_NEW(siisata_pci, sizeof(struct siisata_pci_softc), 113 siisata_pci_match, siisata_pci_attach, siisata_pci_detach, NULL); 114 115 static const struct siisata_pci_board * 116 siisata_pci_lookup(const struct pci_attach_args * pa) 117 { 118 int i; 119 120 for (i = 0; i < __arraycount(siisata_pci_boards); i++) { 121 if (siisata_pci_boards[i].spb_vend != PCI_VENDOR(pa->pa_id)) 122 continue; 123 if (siisata_pci_boards[i].spb_prod == PCI_PRODUCT(pa->pa_id)) 124 return &siisata_pci_boards[i]; 125 } 126 127 return NULL; 128 } 129 130 static int 131 siisata_pci_match(device_t parent, cfdata_t match, void *aux) 132 { 133 struct pci_attach_args *pa = aux; 134 135 if (siisata_pci_lookup(pa) != NULL) 136 return 3; 137 138 return 0; 139 } 140 141 static void 142 siisata_pci_attach(device_t parent, device_t self, void *aux) 143 { 144 struct pci_attach_args *pa = aux; 145 struct siisata_pci_softc *psc = device_private(self); 146 struct siisata_softc *sc = &psc->si_sc; 147 const char *intrstr; 148 pcireg_t csr, memtype; 149 const struct siisata_pci_board *spbp; 150 pci_intr_handle_t intrhandle; 151 bus_space_tag_t memt; 152 bus_space_handle_t memh; 153 uint32_t gcreg; 154 int memh_valid; 155 bus_size_t grsize, prsize; 156 char intrbuf[PCI_INTRSTR_LEN]; 157 158 sc->sc_atac.atac_dev = self; 159 160 psc->sc_pc = pa->pa_pc; 161 psc->sc_pcitag = pa->pa_tag; 162 163 pci_aprint_devinfo(pa, "SATA-II HBA"); 164 165 /* map BAR 0, global registers */ 166 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, SIISATA_PCI_BAR0); 167 switch (memtype) { 168 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT: 169 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT: 170 memh_valid = (pci_mapreg_map(pa, SIISATA_PCI_BAR0, 171 memtype, 0, &memt, &memh, NULL, &grsize) == 0); 172 break; 173 default: 174 memh_valid = 0; 175 } 176 if (memh_valid) { 177 sc->sc_grt = memt; 178 sc->sc_grh = memh; 179 sc->sc_grs = grsize; 180 } else { 181 aprint_error_dev(self, "couldn't map global registers\n"); 182 return; 183 } 184 185 /* map BAR 1, port registers */ 186 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, SIISATA_PCI_BAR1); 187 switch (memtype) { 188 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT: 189 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT: 190 memh_valid = (pci_mapreg_map(pa, SIISATA_PCI_BAR1, 191 memtype, 0, &memt, &memh, NULL, &prsize) == 0); 192 break; 193 default: 194 memh_valid = 0; 195 } 196 if (memh_valid) { 197 sc->sc_prt = memt; 198 sc->sc_prh = memh; 199 sc->sc_prs = prsize; 200 } else { 201 bus_space_unmap(sc->sc_grt, sc->sc_grh, grsize); 202 aprint_error_dev(self, "couldn't map port registers\n"); 203 return; 204 } 205 206 if (pci_dma64_available(pa)) 207 sc->sc_dmat = pa->pa_dmat64; 208 else 209 sc->sc_dmat = pa->pa_dmat; 210 211 /* map interrupt */ 212 if (pci_intr_map(pa, &intrhandle) != 0) { 213 bus_space_unmap(sc->sc_grt, sc->sc_grh, grsize); 214 bus_space_unmap(sc->sc_prt, sc->sc_prh, prsize); 215 aprint_error_dev(self, "couldn't map interrupt\n"); 216 return; 217 } 218 intrstr = pci_intr_string(pa->pa_pc, intrhandle, intrbuf, 219 sizeof(intrbuf)); 220 psc->sc_ih = pci_intr_establish_xname(pa->pa_pc, intrhandle, 221 IPL_BIO, siisata_intr, sc, device_xname(self)); 222 if (psc->sc_ih == NULL) { 223 bus_space_unmap(sc->sc_grt, sc->sc_grh, grsize); 224 bus_space_unmap(sc->sc_prt, sc->sc_prh, prsize); 225 aprint_error_dev(self, "couldn't establish interrupt at %s\n", 226 intrstr); 227 return; 228 } 229 aprint_normal_dev(self, "interrupting at %s\n", 230 intrstr ? intrstr : "unknown interrupt"); 231 232 /* fill in number of ports on this device */ 233 spbp = siisata_pci_lookup(pa); 234 KASSERT(spbp != NULL); 235 sc->sc_atac.atac_nchannels = spbp->spb_port; 236 237 /* set the necessary bits in case the firmware didn't */ 238 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 239 csr |= PCI_COMMAND_MASTER_ENABLE; 240 csr |= PCI_COMMAND_MEM_ENABLE; 241 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr); 242 243 gcreg = GRREAD(sc, GR_GC); 244 245 aprint_verbose_dev(self, "SiI%d, %sGb/s\n", 246 spbp->spb_chip, (gcreg & GR_GC_3GBPS) ? "3.0" : "1.5" ); 247 if (spbp->spb_chip == 3124) { 248 short width; 249 short speed; 250 char pcix = 1; 251 252 width = (gcreg & GR_GC_REQ64) ? 64 : 32; 253 254 switch (gcreg & (GR_GC_DEVSEL | GR_GC_STOP | GR_GC_TRDY)) { 255 case 0: 256 speed = (gcreg & GR_GC_M66EN) ? 66 : 33; 257 pcix = 0; 258 break; 259 case GR_GC_TRDY: 260 speed = 66; 261 break; 262 case GR_GC_STOP: 263 speed = 100; 264 break; 265 case GR_GC_STOP | GR_GC_TRDY: 266 speed = 133; 267 break; 268 default: 269 speed = -1; 270 break; 271 } 272 aprint_verbose_dev(self, "%hd-bit %hdMHz PCI%s\n", 273 width, speed, pcix ? "-X" : ""); 274 } 275 276 siisata_attach(sc); 277 278 if (!pmf_device_register(self, NULL, siisata_pci_resume)) 279 aprint_error_dev(self, "couldn't establish power handler\n"); 280 } 281 282 static int 283 siisata_pci_detach(device_t dv, int flags) 284 { 285 struct siisata_pci_softc *psc = device_private(dv); 286 struct siisata_softc *sc = &psc->si_sc; 287 int rv; 288 289 rv = siisata_detach(sc, flags); 290 if (rv) 291 return rv; 292 293 if (psc->sc_ih != NULL) { 294 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 295 } 296 297 bus_space_unmap(sc->sc_prt, sc->sc_prh, sc->sc_prs); 298 bus_space_unmap(sc->sc_grt, sc->sc_grh, sc->sc_grs); 299 300 return 0; 301 } 302 303 static bool 304 siisata_pci_resume(device_t dv, const pmf_qual_t *qual) 305 { 306 struct siisata_pci_softc *psc = device_private(dv); 307 struct siisata_softc *sc = &psc->si_sc; 308 int s; 309 310 s = splbio(); 311 siisata_resume(sc); 312 splx(s); 313 314 return true; 315 } 316