xref: /netbsd-src/sys/dev/pci/ppb.c (revision 8b0f9554ff8762542c4defc4f70e1eb76fb508fa)
1 /*	$NetBSD: ppb.c,v 1.36 2007/12/09 20:28:13 jmcneill Exp $	*/
2 
3 /*
4  * Copyright (c) 1996, 1998 Christopher G. Demetriou.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *      This product includes software developed by Christopher G. Demetriou
17  *	for the NetBSD Project.
18  * 4. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: ppb.c,v 1.36 2007/12/09 20:28:13 jmcneill Exp $");
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/kernel.h>
39 #include <sys/device.h>
40 
41 #include <dev/pci/pcireg.h>
42 #include <dev/pci/pcivar.h>
43 #include <dev/pci/ppbreg.h>
44 #include <dev/pci/pcidevs.h>
45 
46 struct ppb_softc {
47 	struct device sc_dev;		/* generic device glue */
48 	pci_chipset_tag_t sc_pc;	/* our PCI chipset... */
49 	pcitag_t sc_tag;		/* ...and tag. */
50 
51 	pcireg_t sc_pciconfext[48];
52 };
53 
54 static bool		ppb_resume(device_t);
55 static bool		ppb_suspend(device_t);
56 
57 static int
58 ppbmatch(struct device *parent, struct cfdata *match,
59     void *aux)
60 {
61 	struct pci_attach_args *pa = aux;
62 
63 	/*
64 	 * Check the ID register to see that it's a PCI bridge.
65 	 * If it is, we assume that we can deal with it; it _should_
66 	 * work in a standardized way...
67 	 */
68 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
69 	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_PCI)
70 		return (1);
71 
72 	return (0);
73 }
74 
75 static void
76 ppb_fix_pcix(device_t self)
77 {
78 	struct ppb_softc *sc = device_private(self);
79 	pcireg_t reg;
80 	int off;
81 
82 	if (!pci_get_capability(sc->sc_pc, sc->sc_tag, PCI_CAP_PCIEXPRESS,
83 				&off, &reg))
84 		return; /* Not a PCIe device */
85 
86 	if ((reg & 0x000f0000) != 0x00010000) {
87 		aprint_normal_dev(self, "unuspported PCI Express version\n");
88 		return;
89 	}
90 	reg = pci_conf_read(sc->sc_pc, sc->sc_tag, off + 0x18);
91 	if (reg & 0x003f) {
92 		aprint_normal_dev(self, "disabling notification events\n");
93 		reg &= ~0x003f;
94 		pci_conf_write(sc->sc_pc, sc->sc_tag, off + 0x18, reg);
95 	}
96 }
97 
98 static void
99 ppbattach(struct device *parent, struct device *self, void *aux)
100 {
101 	struct ppb_softc *sc = (void *) self;
102 	struct pci_attach_args *pa = aux;
103 	pci_chipset_tag_t pc = pa->pa_pc;
104 	struct pcibus_attach_args pba;
105 	pcireg_t busdata;
106 	char devinfo[256];
107 
108 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
109 	aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
110 	    PCI_REVISION(pa->pa_class));
111 	aprint_naive("\n");
112 
113 	sc->sc_pc = pc;
114 	sc->sc_tag = pa->pa_tag;
115 
116 	busdata = pci_conf_read(pc, pa->pa_tag, PPB_REG_BUSINFO);
117 
118 	if (PPB_BUSINFO_SECONDARY(busdata) == 0) {
119 		aprint_normal("%s: not configured by system firmware\n",
120 		    self->dv_xname);
121 		return;
122 	}
123 
124 	ppb_fix_pcix(self);
125 
126 #if 0
127 	/*
128 	 * XXX can't do this, because we're not given our bus number
129 	 * (we shouldn't need it), and because we've no way to
130 	 * decompose our tag.
131 	 */
132 	/* sanity check. */
133 	if (pa->pa_bus != PPB_BUSINFO_PRIMARY(busdata))
134 		panic("ppbattach: bus in tag (%d) != bus in reg (%d)",
135 		    pa->pa_bus, PPB_BUSINFO_PRIMARY(busdata));
136 #endif
137 
138 	if (!pmf_device_register(self, ppb_suspend, ppb_resume))
139 		aprint_error_dev(self, "couldn't establish power handler\n");
140 
141 	/*
142 	 * Attach the PCI bus than hangs off of it.
143 	 *
144 	 * XXX Don't pass-through Memory Read Multiple.  Should we?
145 	 * XXX Consult the spec...
146 	 */
147 	pba.pba_iot = pa->pa_iot;
148 	pba.pba_memt = pa->pa_memt;
149 	pba.pba_dmat = pa->pa_dmat;
150 	pba.pba_dmat64 = pa->pa_dmat64;
151 	pba.pba_pc = pc;
152 	pba.pba_flags = pa->pa_flags & ~PCI_FLAGS_MRM_OKAY;
153 	pba.pba_bus = PPB_BUSINFO_SECONDARY(busdata);
154 	pba.pba_bridgetag = &sc->sc_tag;
155 	pba.pba_intrswiz = pa->pa_intrswiz;
156 	pba.pba_intrtag = pa->pa_intrtag;
157 
158 	config_found_ia(self, "pcibus", &pba, pcibusprint);
159 }
160 
161 static bool
162 ppb_resume(device_t dv)
163 {
164 	struct ppb_softc *sc = device_private(dv);
165 	int off;
166 	pcireg_t val;
167 
168         for (off = 0x40; off <= 0xff; off += 4) {
169 		val = pci_conf_read(sc->sc_pc, sc->sc_tag, off);
170 		if (val != sc->sc_pciconfext[(off - 0x40) / 4])
171 			pci_conf_write(sc->sc_pc, sc->sc_tag, off,
172 			    sc->sc_pciconfext[(off - 0x40)/4]);
173 	}
174 
175 	ppb_fix_pcix(dv);
176 
177 	return true;
178 }
179 
180 static bool
181 ppb_suspend(device_t dv)
182 {
183 	struct ppb_softc *sc = device_private(dv);
184 	int off;
185 
186 	for (off = 0x40; off <= 0xff; off += 4)
187 		sc->sc_pciconfext[(off - 0x40) / 4] =
188 		    pci_conf_read(sc->sc_pc, sc->sc_tag, off);
189 
190 	return true;
191 }
192 
193 CFATTACH_DECL(ppb, sizeof(struct ppb_softc),
194     ppbmatch, ppbattach, NULL, NULL);
195