1 /* $NetBSD: pm3fb.c,v 1.8 2021/08/25 21:50:29 andvar Exp $ */ 2 3 /* 4 * Copyright (c) 2015 Naruaki Etomi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * A console driver for Permedia 3 graphics controllers 30 * most of the following was adapted from the xf86-video-glint driver's 31 * pm3_accel.c, pm3_dac.c and pm2fb framebuffer console driver 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: pm3fb.c,v 1.8 2021/08/25 21:50:29 andvar Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/device.h> 41 #include <sys/malloc.h> 42 #include <sys/lwp.h> 43 #include <sys/kauth.h> 44 #include <sys/atomic.h> 45 46 #include <dev/videomode/videomode.h> 47 48 #include <dev/pci/pcivar.h> 49 #include <dev/pci/pcireg.h> 50 #include <dev/pci/pcidevs.h> 51 #include <dev/pci/pciio.h> 52 #include <dev/pci/pm3reg.h> 53 54 #include <dev/wscons/wsdisplayvar.h> 55 #include <dev/wscons/wsconsio.h> 56 #include <dev/wsfont/wsfont.h> 57 #include <dev/rasops/rasops.h> 58 #include <dev/wscons/wsdisplay_vconsvar.h> 59 #include <dev/pci/wsdisplay_pci.h> 60 61 #include <dev/i2c/i2cvar.h> 62 #include <dev/i2c/i2c_bitbang.h> 63 #include <dev/i2c/ddcvar.h> 64 #include <dev/videomode/videomode.h> 65 #include <dev/videomode/edidvar.h> 66 #include <dev/videomode/edidreg.h> 67 68 struct pm3fb_softc { 69 device_t sc_dev; 70 71 pci_chipset_tag_t sc_pc; 72 pcitag_t sc_pcitag; 73 74 bus_space_tag_t sc_memt; 75 bus_space_tag_t sc_iot; 76 77 bus_space_handle_t sc_regh; 78 bus_addr_t sc_fb, sc_reg; 79 bus_size_t sc_fbsize, sc_regsize; 80 81 int sc_width, sc_height, sc_depth, sc_stride; 82 int sc_locked; 83 struct vcons_screen sc_console_screen; 84 struct wsscreen_descr sc_defaultscreen_descr; 85 const struct wsscreen_descr *sc_screens[1]; 86 struct wsscreen_list sc_screenlist; 87 struct vcons_data vd; 88 int sc_mode; 89 u_char sc_cmap_red[256]; 90 u_char sc_cmap_green[256]; 91 u_char sc_cmap_blue[256]; 92 /* i2c stuff */ 93 struct i2c_controller sc_i2c; 94 uint8_t sc_edid_data[128]; 95 struct edid_info sc_ei; 96 const struct videomode *sc_videomode; 97 }; 98 99 static int pm3fb_match(device_t, cfdata_t, void *); 100 static void pm3fb_attach(device_t, device_t, void *); 101 102 CFATTACH_DECL_NEW(pm3fb, sizeof(struct pm3fb_softc), 103 pm3fb_match, pm3fb_attach, NULL, NULL); 104 105 extern const u_char rasops_cmap[768]; 106 107 static int pm3fb_ioctl(void *, void *, u_long, void *, int, struct lwp *); 108 static paddr_t pm3fb_mmap(void *, void *, off_t, int); 109 static void pm3fb_init_screen(void *, struct vcons_screen *, int, long *); 110 111 static int pm3fb_putcmap(struct pm3fb_softc *, struct wsdisplay_cmap *); 112 static int pm3fb_getcmap(struct pm3fb_softc *, struct wsdisplay_cmap *); 113 static void pm3fb_init_palette(struct pm3fb_softc *); 114 static int pm3fb_putpalreg(struct pm3fb_softc *, uint8_t, uint8_t, uint8_t, uint8_t); 115 116 static void pm3fb_init(struct pm3fb_softc *); 117 static inline void pm3fb_wait(struct pm3fb_softc *, int); 118 static void pm3fb_flush_engine(struct pm3fb_softc *); 119 static void pm3fb_rectfill(struct pm3fb_softc *, int, int, int, int, uint32_t); 120 static void pm3fb_bitblt(void *, int, int, int, int, int, int, int); 121 122 static void pm3fb_cursor(void *, int, int, int); 123 static void pm3fb_putchar(void *, int, int, u_int, long); 124 static void pm3fb_copycols(void *, int, int, int, int); 125 static void pm3fb_erasecols(void *, int, int, int, long); 126 static void pm3fb_copyrows(void *, int, int, int); 127 static void pm3fb_eraserows(void *, int, int, long); 128 129 struct wsdisplay_accessops pm3fb_accessops = { 130 pm3fb_ioctl, 131 pm3fb_mmap, 132 NULL, /* alloc_screen */ 133 NULL, /* free_screen */ 134 NULL, /* show_screen */ 135 NULL, /* load_font */ 136 NULL, /* pollc */ 137 NULL /* scroll */ 138 }; 139 140 /* I2C glue */ 141 static int pm3fb_i2c_send_start(void *, int); 142 static int pm3fb_i2c_send_stop(void *, int); 143 static int pm3fb_i2c_initiate_xfer(void *, i2c_addr_t, int); 144 static int pm3fb_i2c_read_byte(void *, uint8_t *, int); 145 static int pm3fb_i2c_write_byte(void *, uint8_t, int); 146 147 /* I2C bitbang glue */ 148 static void pm3fb_i2cbb_set_bits(void *, uint32_t); 149 static void pm3fb_i2cbb_set_dir(void *, uint32_t); 150 static uint32_t pm3fb_i2cbb_read(void *); 151 152 static void pm3_setup_i2c(struct pm3fb_softc *); 153 154 static const struct i2c_bitbang_ops pm3fb_i2cbb_ops = { 155 pm3fb_i2cbb_set_bits, 156 pm3fb_i2cbb_set_dir, 157 pm3fb_i2cbb_read, 158 { 159 PM3_DD_SDA_IN, 160 PM3_DD_SCL_IN, 161 0, 162 0 163 } 164 }; 165 166 /* mode setting stuff */ 167 static int pm3fb_set_pll(struct pm3fb_softc *, int); 168 static void pm3fb_write_dac(struct pm3fb_softc *, int, uint8_t); 169 static void pm3fb_set_mode(struct pm3fb_softc *, const struct videomode *); 170 171 static inline void 172 pm3fb_wait(struct pm3fb_softc *sc, int slots) 173 { 174 uint32_t reg; 175 176 do { 177 reg = bus_space_read_4(sc->sc_memt, sc->sc_regh, 178 PM3_INPUT_FIFO_SPACE); 179 } while (reg <= slots); 180 } 181 182 static void 183 pm3fb_flush_engine(struct pm3fb_softc *sc) 184 { 185 186 pm3fb_wait(sc, 2); 187 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FILTER_MODE, PM3_FM_PASS_SYNC); 188 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SYNC, 0); 189 190 do { 191 while (bus_space_read_4(sc->sc_memt, sc->sc_regh, PM3_OUTPUT_FIFO_WORDS) == 0); 192 } while (bus_space_read_4(sc->sc_memt, sc->sc_regh, PM3_OUTPUT_FIFO) != 193 PM3_SYNC_TAG); 194 } 195 196 static int 197 pm3fb_match(device_t parent, cfdata_t match, void *aux) 198 { 199 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 200 201 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY) 202 return 0; 203 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_3DLABS) 204 return 0; 205 206 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3DLABS_PERMEDIA3) 207 return 100; 208 return (0); 209 } 210 211 static void 212 pm3fb_attach(device_t parent, device_t self, void *aux) 213 { 214 struct pm3fb_softc *sc = device_private(self); 215 struct pci_attach_args *pa = aux; 216 struct rasops_info *ri; 217 struct wsemuldisplaydev_attach_args aa; 218 prop_dictionary_t dict; 219 unsigned long defattr; 220 bool is_console; 221 uint32_t flags; 222 223 sc->sc_pc = pa->pa_pc; 224 sc->sc_pcitag = pa->pa_tag; 225 sc->sc_memt = pa->pa_memt; 226 sc->sc_iot = pa->pa_iot; 227 sc->sc_dev = self; 228 229 pci_aprint_devinfo(pa, NULL); 230 231 /* 232 * fill in parameters from properties 233 * if we can't get a usable mode via DDC2 we'll use this to pick one, 234 * which is why we fill them in with some conservative values that 235 * hopefully work as a last resort 236 */ 237 dict = device_properties(self); 238 if (!prop_dictionary_get_uint32(dict, "width", &sc->sc_width)) { 239 aprint_error("%s: no width property\n", device_xname(self)); 240 sc->sc_width = 1280; 241 } 242 if (!prop_dictionary_get_uint32(dict, "height", &sc->sc_height)) { 243 aprint_error("%s: no height property\n", device_xname(self)); 244 sc->sc_height = 1024; 245 } 246 if (!prop_dictionary_get_uint32(dict, "depth", &sc->sc_depth)) { 247 aprint_error("%s: no depth property\n", device_xname(self)); 248 sc->sc_depth = 8; 249 } 250 251 sc->sc_stride = sc->sc_width * (sc->sc_depth >> 3); 252 253 prop_dictionary_get_bool(dict, "is_console", &is_console); 254 255 pci_mapreg_info(pa->pa_pc, pa->pa_tag, 0x14, PCI_MAPREG_TYPE_MEM, 256 &sc->sc_fb, &sc->sc_fbsize, &flags); 257 258 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_MEM, 0, 259 &sc->sc_memt, &sc->sc_regh, &sc->sc_reg, &sc->sc_regsize)) { 260 aprint_error("%s: failed to map registers.\n", 261 device_xname(sc->sc_dev)); 262 } 263 264 /* 265 * Permedia 3 always return 64MB fbsize 266 * 16 MB should be enough -- more just wastes map entries 267 */ 268 if (sc->sc_fbsize != 0) 269 sc->sc_fbsize = (16 << 20); 270 271 /* 272 * Some Power Mac G4 model could not initialize these registers, 273 * Power Mac G4 (Mirrored Drive Doors), for example 274 */ 275 #if defined(__powerpc__) 276 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LOCALMEMCAPS, 0x02e311B8); 277 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LOCALMEMTIMINGS, 0x07424905); 278 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LOCALMEMCONTROL, 0x0c000003); 279 #endif 280 281 aprint_normal("%s: %d MB aperture at 0x%08x\n", device_xname(self), 282 (int)(sc->sc_fbsize >> 20), (uint32_t)sc->sc_fb); 283 284 sc->sc_defaultscreen_descr = (struct wsscreen_descr){ 285 "default", 286 0, 0, 287 NULL, 288 8, 16, 289 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 290 NULL 291 }; 292 293 sc->sc_screens[0] = &sc->sc_defaultscreen_descr; 294 sc->sc_screenlist = (struct wsscreen_list){1, sc->sc_screens}; 295 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 296 sc->sc_locked = 0; 297 298 pm3_setup_i2c(sc); 299 300 vcons_init(&sc->vd, sc, &sc->sc_defaultscreen_descr, 301 &pm3fb_accessops); 302 303 sc->vd.init_screen = pm3fb_init_screen; 304 305 /* init engine here */ 306 pm3fb_init(sc); 307 308 ri = &sc->sc_console_screen.scr_ri; 309 310 if (is_console) { 311 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 312 &defattr); 313 sc->sc_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 314 315 pm3fb_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, 316 ri->ri_devcmap[(defattr >> 16) & 0xff]); 317 sc->sc_defaultscreen_descr.textops = &ri->ri_ops; 318 sc->sc_defaultscreen_descr.capabilities = ri->ri_caps; 319 sc->sc_defaultscreen_descr.nrows = ri->ri_rows; 320 sc->sc_defaultscreen_descr.ncols = ri->ri_cols; 321 322 wsdisplay_cnattach(&sc->sc_defaultscreen_descr, ri, 0, 0, 323 defattr); 324 vcons_replay_msgbuf(&sc->sc_console_screen); 325 } else { 326 if (sc->sc_console_screen.scr_ri.ri_rows == 0) { 327 /* do some minimal setup to avoid weirdnesses later */ 328 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 329 &defattr); 330 } 331 } 332 333 pm3fb_init_palette(sc); 334 335 aa.console = is_console; 336 aa.scrdata = &sc->sc_screenlist; 337 aa.accessops = &pm3fb_accessops; 338 aa.accesscookie = &sc->vd; 339 340 config_found(sc->sc_dev, &aa, wsemuldisplaydevprint, CFARGS_NONE); 341 } 342 343 static int 344 pm3fb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, 345 struct lwp *l) 346 { 347 struct vcons_data *vd = v; 348 struct pm3fb_softc *sc = vd->cookie; 349 struct wsdisplay_fbinfo *wdf; 350 struct vcons_screen *ms = vd->active; 351 352 switch (cmd) { 353 case WSDISPLAYIO_GTYPE: 354 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 355 return 0; 356 357 /* PCI config read/write passthrough. */ 358 case PCI_IOC_CFGREAD: 359 case PCI_IOC_CFGWRITE: 360 return pci_devioctl(sc->sc_pc, sc->sc_pcitag, 361 cmd, data, flag, l); 362 363 case WSDISPLAYIO_GET_BUSID: 364 return wsdisplayio_busid_pci(sc->sc_dev, sc->sc_pc, 365 sc->sc_pcitag, data); 366 367 case WSDISPLAYIO_GINFO: 368 if (ms == NULL) 369 return ENODEV; 370 wdf = (void *)data; 371 wdf->height = ms->scr_ri.ri_height; 372 wdf->width = ms->scr_ri.ri_width; 373 wdf->depth = ms->scr_ri.ri_depth; 374 wdf->cmsize = 256; 375 return 0; 376 377 case WSDISPLAYIO_GETCMAP: 378 return pm3fb_getcmap(sc, 379 (struct wsdisplay_cmap *)data); 380 381 case WSDISPLAYIO_PUTCMAP: 382 return pm3fb_putcmap(sc, 383 (struct wsdisplay_cmap *)data); 384 385 case WSDISPLAYIO_LINEBYTES: 386 *(u_int *)data = sc->sc_stride; 387 return 0; 388 389 case WSDISPLAYIO_SMODE: { 390 int new_mode = *(int*)data; 391 if (new_mode != sc->sc_mode) { 392 sc->sc_mode = new_mode; 393 if(new_mode == WSDISPLAYIO_MODE_EMUL) { 394 /* first set the video mode */ 395 if (sc->sc_videomode != NULL) { 396 pm3fb_set_mode(sc, sc->sc_videomode); 397 } 398 /* then initialize the drawing engine */ 399 pm3fb_init(sc); 400 pm3fb_init_palette(sc); 401 vcons_redraw_screen(ms); 402 } else 403 pm3fb_flush_engine(sc); 404 } 405 } 406 return 0; 407 case WSDISPLAYIO_GET_EDID: { 408 struct wsdisplayio_edid_info *d = data; 409 d->data_size = 128; 410 if (d->buffer_size < 128) 411 return EAGAIN; 412 return copyout(sc->sc_edid_data, d->edid_data, 128); 413 } 414 415 case WSDISPLAYIO_GET_FBINFO: { 416 struct wsdisplayio_fbinfo *fbi = data; 417 return wsdisplayio_get_fbinfo(&ms->scr_ri, fbi); 418 } 419 } 420 return EPASSTHROUGH; 421 } 422 423 static paddr_t 424 pm3fb_mmap(void *v, void *vs, off_t offset, int prot) 425 { 426 struct vcons_data *vd = v; 427 struct pm3fb_softc *sc = vd->cookie; 428 paddr_t pa; 429 430 /* 'regular' framebuffer mmap()ing */ 431 if (offset < sc->sc_fbsize) { 432 pa = bus_space_mmap(sc->sc_memt, sc->sc_fb + offset, 0, prot, 433 BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE); 434 return pa; 435 } 436 437 /* 438 * restrict all other mappings to processes with superuser privileges 439 * or the kernel itself 440 */ 441 if (kauth_authorize_machdep(kauth_cred_get(), 442 KAUTH_MACHDEP_UNMANAGEDMEM, 443 NULL, NULL, NULL, NULL) != 0) { 444 aprint_normal("%s: mmap() rejected.\n", 445 device_xname(sc->sc_dev)); 446 return -1; 447 } 448 449 if ((offset >= sc->sc_fb) && (offset < (sc->sc_fb + sc->sc_fbsize))) { 450 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 451 BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE); 452 return pa; 453 } 454 455 if ((offset >= sc->sc_reg) && 456 (offset < (sc->sc_reg + sc->sc_regsize))) { 457 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 458 BUS_SPACE_MAP_LINEAR); 459 return pa; 460 } 461 462 #ifdef PCI_MAGIC_IO_RANGE 463 /* allow mapping of IO space */ 464 if ((offset >= PCI_MAGIC_IO_RANGE) && 465 (offset < PCI_MAGIC_IO_RANGE + 0x10000)) { 466 pa = bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE, 467 0, prot, BUS_SPACE_MAP_LINEAR); 468 return pa; 469 } 470 #endif 471 return -1; 472 } 473 474 static void 475 pm3fb_init_screen(void *cookie, struct vcons_screen *scr, 476 int existing, long *defattr) 477 { 478 struct pm3fb_softc *sc = cookie; 479 struct rasops_info *ri = &scr->scr_ri; 480 481 ri->ri_depth = sc->sc_depth; 482 ri->ri_width = sc->sc_width; 483 ri->ri_height = sc->sc_height; 484 ri->ri_stride = sc->sc_stride; 485 ri->ri_flg = RI_CENTER; 486 if (sc->sc_depth == 8) 487 ri->ri_flg |= RI_8BIT_IS_RGB; 488 489 rasops_init(ri, 0, 0); 490 ri->ri_caps = WSSCREEN_WSCOLORS | WSSCREEN_UNDERLINE; 491 492 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 493 sc->sc_width / ri->ri_font->fontwidth); 494 495 ri->ri_hw = scr; 496 ri->ri_ops.copyrows = pm3fb_copyrows; 497 ri->ri_ops.copycols = pm3fb_copycols; 498 ri->ri_ops.cursor = pm3fb_cursor; 499 ri->ri_ops.eraserows = pm3fb_eraserows; 500 ri->ri_ops.erasecols = pm3fb_erasecols; 501 ri->ri_ops.putchar = pm3fb_putchar; 502 } 503 504 static int 505 pm3fb_putcmap(struct pm3fb_softc *sc, struct wsdisplay_cmap *cm) 506 { 507 u_char *r, *g, *b; 508 u_int index = cm->index; 509 u_int count = cm->count; 510 int i, error; 511 u_char rbuf[256], gbuf[256], bbuf[256]; 512 513 if (cm->index >= 256 || cm->count > 256 || 514 (cm->index + cm->count) > 256) 515 return EINVAL; 516 error = copyin(cm->red, &rbuf[index], count); 517 if (error) 518 return error; 519 error = copyin(cm->green, &gbuf[index], count); 520 if (error) 521 return error; 522 error = copyin(cm->blue, &bbuf[index], count); 523 if (error) 524 return error; 525 526 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 527 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 528 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 529 530 r = &sc->sc_cmap_red[index]; 531 g = &sc->sc_cmap_green[index]; 532 b = &sc->sc_cmap_blue[index]; 533 534 for (i = 0; i < count; i++) { 535 pm3fb_putpalreg(sc, index, *r, *g, *b); 536 index++; 537 r++, g++, b++; 538 } 539 return 0; 540 } 541 542 static int 543 pm3fb_getcmap(struct pm3fb_softc *sc, struct wsdisplay_cmap *cm) 544 { 545 u_int index = cm->index; 546 u_int count = cm->count; 547 int error; 548 549 if (index >= 255 || count > 256 || index + count > 256) 550 return EINVAL; 551 552 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 553 if (error) 554 return error; 555 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 556 if (error) 557 return error; 558 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 559 if (error) 560 return error; 561 562 return 0; 563 } 564 565 static void 566 pm3fb_init_palette(struct pm3fb_softc *sc) 567 { 568 struct rasops_info *ri = &sc->sc_console_screen.scr_ri; 569 int i, j = 0; 570 uint8_t cmap[768]; 571 572 rasops_get_cmap(ri, cmap, sizeof(cmap)); 573 574 for (i = 0; i < 256; i++) { 575 sc->sc_cmap_red[i] = cmap[j]; 576 sc->sc_cmap_green[i] = cmap[j + 1]; 577 sc->sc_cmap_blue[i] = cmap[j + 2]; 578 pm3fb_putpalreg(sc, i, cmap[j], cmap[j + 1], cmap[j + 2]); 579 j += 3; 580 } 581 } 582 583 static int 584 pm3fb_putpalreg(struct pm3fb_softc *sc, uint8_t idx, uint8_t r, uint8_t g, uint8_t b) 585 { 586 587 pm3fb_wait(sc, 4); 588 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_PAL_WRITE_IDX, idx); 589 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_PAL_DATA, r); 590 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_PAL_DATA, g); 591 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_PAL_DATA, b); 592 return 0; 593 } 594 595 static void 596 pm3fb_write_dac(struct pm3fb_softc *sc, int reg, uint8_t data) 597 { 598 599 pm3fb_wait(sc, 3); 600 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_INDEX_LOW, reg & 0xff); 601 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_INDEX_HIGH, (reg >> 8) & 0xff); 602 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_INDEX_DATA, data); 603 } 604 605 static void 606 pm3fb_init(struct pm3fb_softc *sc) 607 { 608 609 pm3fb_wait(sc, 16); 610 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LB_DESTREAD_MODE, 0); 611 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LB_DESTREAD_ENABLES, 0); 612 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LB_SOURCEREAD_MODE, 0); 613 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LB_WRITE_MODE, 0); 614 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FILTER_MODE, PM3_FM_PASS_SYNC); 615 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_STATISTIC_MODE, 0); 616 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DELTA_MODE, 0); 617 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RASTERIZER_MODE, 0); 618 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SCISSOR_MODE, 0); 619 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LINESTIPPLE_MODE, 0); 620 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_AREASTIPPLE_MODE, 0); 621 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_GID_MODE, 0); 622 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DEPTH_MODE, 0); 623 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_STENCIL_MODE, 0); 624 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_STENCIL_DATA, 0); 625 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_COLORDDA_MODE, 0); 626 627 pm3fb_wait(sc, 16); 628 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTUREADDRESS_MODE, 0); 629 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTUREINDEX_MODE0, 0); 630 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTUREINDEX_MODE1, 0); 631 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTUREREAD_MODE, 0); 632 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXELLUT_MODE, 0); 633 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTUREFILTER_MODE, 0); 634 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTURECOMPOSITE_MODE, 0); 635 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTURECOLOR_MODE, 0); 636 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTURECOMPOSITECOLOR_MODE1, 0); 637 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTURECOMPOSITEALPHA_MODE1, 0); 638 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTURECOMPOSITECOLOR_MODE0, 0); 639 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTURECOMPOSITEALPHA_MODE0, 0); 640 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FOG_MODE, 0); 641 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CHROMATEST_MODE, 0); 642 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_ALPHATEST_MODE, 0); 643 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_ANTIALIAS_MODE, 0); 644 645 pm3fb_wait(sc, 16); 646 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_YUV_MODE, 0); 647 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_ALPHABLENDCOLOR_MODE, 0); 648 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_ALPHABLENDALPHA_MODE, 0); 649 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DITHER_MODE, 0); 650 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LOGICALOP_MODE, 0); 651 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_ROUTER_MODE, 0); 652 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_WINDOW, 0); 653 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CONFIG2D, 0); 654 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SPANCOLORMASK, 0xffffffff); 655 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_XBIAS, 0); 656 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_YBIAS, 0); 657 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DELTACONTROL, 0); 658 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_BITMASKPATTERN, 0xffffffff); 659 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBDESTREAD_ENABLE, 660 PM3_FBDESTREAD_SET(0xff, 0xff, 0xff)); 661 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBDESTREAD_BUFFERADDRESS0, 0); 662 663 pm3fb_wait(sc, 16); 664 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBDESTREAD_BUFFEROFFSET0, 0); 665 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBDESTREAD_BUFFERWIDTH0, 666 PM3_FBDESTREAD_BUFFERWIDTH_WIDTH(sc->sc_stride)); 667 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FB_DESTREAD_MODE, 668 PM3_FBDRM_ENABLE | PM3_FBDRM_ENABLE0); 669 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBSOURCEREAD_BUFFERADDRESS, 0); 670 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBSOURCEREAD_BUFFEROFFSET, 0); 671 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBSOURCEREAD_BUFFERWIDTH, 672 PM3_FBSOURCEREAD_BUFFERWIDTH_WIDTH(sc->sc_stride)); 673 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBSOURCEREAD_MODE, 674 PM3_FBSOURCEREAD_MODE_BLOCKING | PM3_FBSOURCEREAD_MODE_ENABLE); 675 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_PIXEL_SIZE, PM3_PS_8BIT); 676 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBSOFTWAREWRITEMASK, 0xffffffff); 677 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBHARDWAREWRITEMASK, 0xffffffff); 678 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBWRITE_MODE, 679 PM3_FBWRITEMODE_WRITEENABLE | PM3_FBWRITEMODE_OPAQUESPAN | PM3_FBWRITEMODE_ENABLE0); 680 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBWRITEBUFFERADDRESS0, 0); 681 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBWRITEBUFFEROFFSET0, 0); 682 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBWRITEBUFFERWIDTH0, 683 PM3_FBWRITEBUFFERWIDTH_WIDTH(sc->sc_stride)); 684 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SIZEOF_FRAMEBUFFER, 4095); 685 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DITHER_MODE, PM3_CF_TO_DIM_CF(4)); 686 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DXDOM, 0); 687 688 pm3fb_wait(sc, 6); 689 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DXSUB, 0); 690 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DY, 1 << 16); 691 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_STARTXDOM, 0); 692 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_STARTXSUB, 0); 693 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_STARTY, 0); 694 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_COUNT, 0); 695 } 696 697 static void 698 pm3fb_rectfill(struct pm3fb_softc *sc, int x, int y, int wi, int he, 699 uint32_t colour) 700 { 701 pm3fb_wait(sc, 4); 702 703 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CONFIG2D, 704 PM3_CONFIG2D_USECONSTANTSOURCE | PM3_CONFIG2D_FOREGROUNDROP_ENABLE | 705 (PM3_CONFIG2D_FOREGROUNDROP(0x3)) | PM3_CONFIG2D_FBWRITE_ENABLE); 706 707 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FOREGROUNDCOLOR, colour); 708 709 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RECTANGLEPOSITION, 710 (((y) & 0xffff) << 16) | ((x) & 0xffff) ); 711 712 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RENDER2D, 713 PM3_RENDER2D_XPOSITIVE | PM3_RENDER2D_YPOSITIVE | 714 PM3_RENDER2D_OPERATION_NORMAL | PM3_RENDER2D_SPANOPERATION | 715 (((he) & 0x0fff) << 16) | ((wi) & 0x0fff)); 716 717 #ifdef PM3FB_DEBUG 718 pm3fb_flush_engine(sc); 719 #endif 720 } 721 722 static void 723 pm3fb_bitblt(void *cookie, int srcx, int srcy, int dstx, int dsty, 724 int width, int height, int rop) 725 { 726 struct pm3fb_softc *sc = cookie; 727 int x_align, offset_x, offset_y; 728 uint32_t dir = 0; 729 730 offset_x = srcx - dstx; 731 offset_y = srcy - dsty; 732 733 if (dsty <= srcy) { 734 dir |= PM3_RENDER2D_YPOSITIVE; 735 } 736 737 if (dstx <= srcx) { 738 dir |= PM3_RENDER2D_XPOSITIVE; 739 } 740 741 x_align = (srcx & 0x1f); 742 743 pm3fb_wait(sc, 6); 744 745 if (rop == 3){ 746 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CONFIG2D, 747 PM3_CONFIG2D_USERSCISSOR_ENABLE | PM3_CONFIG2D_FOREGROUNDROP_ENABLE | PM3_CONFIG2D_BLOCKING | 748 PM3_CONFIG2D_FOREGROUNDROP(rop) | PM3_CONFIG2D_FBWRITE_ENABLE); 749 } else { 750 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CONFIG2D, 751 PM3_CONFIG2D_USERSCISSOR_ENABLE | PM3_CONFIG2D_FOREGROUNDROP_ENABLE | PM3_CONFIG2D_BLOCKING | 752 PM3_CONFIG2D_FOREGROUNDROP(rop) | PM3_CONFIG2D_FBWRITE_ENABLE | PM3_CONFIG2D_FBDESTREAD_ENABLE); 753 } 754 755 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SCISSORMINXY, 756 ((dsty & 0x0fff) << 16) | (dstx & 0x0fff)); 757 758 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SCISSORMAXXY, 759 (((dsty + height) & 0x0fff) << 16) | ((dstx + width) & 0x0fff)); 760 761 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBSOURCEREAD_BUFFEROFFSET, 762 (((offset_y) & 0xffff) << 16) | ((offset_x) & 0xffff)); 763 764 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RECTANGLEPOSITION, 765 (((dsty) & 0xffff) << 16) | ((dstx - x_align) & 0xffff)); 766 767 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RENDER2D, 768 dir | 769 PM3_RENDER2D_OPERATION_NORMAL | PM3_RENDER2D_SPANOPERATION | PM3_RENDER2D_FBSOURCEREADENABLE | 770 (((height) & 0x0fff) << 16) | ((width + x_align) & 0x0fff)); 771 772 #ifdef PM3FB_DEBUG 773 pm3fb_flush_engine(sc); 774 #endif 775 } 776 777 static void 778 pm3fb_cursor(void *cookie, int on, int row, int col) 779 { 780 struct rasops_info *ri = cookie; 781 struct vcons_screen *scr = ri->ri_hw; 782 struct pm3fb_softc *sc = scr->scr_cookie; 783 int x, y, wi, he; 784 785 wi = ri->ri_font->fontwidth; 786 he = ri->ri_font->fontheight; 787 788 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 789 x = ri->ri_ccol * wi + ri->ri_xorigin; 790 y = ri->ri_crow * he + ri->ri_yorigin; 791 if (ri->ri_flg & RI_CURSOR) { 792 pm3fb_bitblt(sc, x, y, x, y, wi, he, 12); 793 ri->ri_flg &= ~RI_CURSOR; 794 } 795 ri->ri_crow = row; 796 ri->ri_ccol = col; 797 if (on) { 798 x = ri->ri_ccol * wi + ri->ri_xorigin; 799 y = ri->ri_crow * he + ri->ri_yorigin; 800 pm3fb_bitblt(sc, x, y, x, y, wi, he, 12); 801 ri->ri_flg |= RI_CURSOR; 802 } 803 } else { 804 scr->scr_ri.ri_crow = row; 805 scr->scr_ri.ri_ccol = col; 806 scr->scr_ri.ri_flg &= ~RI_CURSOR; 807 } 808 } 809 810 static void 811 pm3fb_putchar(void *cookie, int row, int col, u_int c, long attr) 812 { 813 struct rasops_info *ri = cookie; 814 struct wsdisplay_font *font = PICK_FONT(ri, c); 815 struct vcons_screen *scr = ri->ri_hw; 816 struct pm3fb_softc *sc = scr->scr_cookie; 817 uint32_t mode; 818 819 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 820 void *data; 821 uint32_t fg, bg; 822 int uc, i; 823 int x, y, wi, he; 824 825 wi = font->fontwidth; 826 he = font->fontheight; 827 828 if (!CHAR_IN_FONT(c, font)) 829 return; 830 831 bg = ri->ri_devcmap[(attr >> 16) & 0xf]; 832 fg = ri->ri_devcmap[(attr >> 24) & 0xf]; 833 x = ri->ri_xorigin + col * wi; 834 y = ri->ri_yorigin + row * he; 835 if (c == 0x20) { 836 pm3fb_rectfill(sc, x, y, wi, he, bg); 837 } else { 838 uc = c - font->firstchar; 839 data = (uint8_t *)font->data + uc * ri->ri_fontscale; 840 mode = PM3_RM_MASK_MIRROR; 841 842 #if BYTE_ORDER == LITTLE_ENDIAN 843 switch (ri->ri_font->stride) { 844 case 1: 845 mode |= 4 << 7; 846 break; 847 case 2: 848 mode |= 3 << 7; 849 break; 850 } 851 #else 852 switch (ri->ri_font->stride) { 853 case 1: 854 mode |= 3 << 7; 855 break; 856 case 2: 857 mode |= 2 << 7; 858 break; 859 } 860 #endif 861 pm3fb_wait(sc, 8); 862 bus_space_write_4(sc->sc_memt, sc->sc_regh, 863 PM3_FOREGROUNDCOLOR, fg); 864 bus_space_write_4(sc->sc_memt, sc->sc_regh, 865 PM3_BACKGROUNDCOLOR, bg); 866 867 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RASTERIZER_MODE, mode); 868 869 bus_space_write_4(sc->sc_memt, sc->sc_regh, 870 PM3_CONFIG2D, 871 PM3_CONFIG2D_USERSCISSOR_ENABLE | 872 PM3_CONFIG2D_USECONSTANTSOURCE | 873 PM3_CONFIG2D_FOREGROUNDROP_ENABLE | 874 PM3_CONFIG2D_FOREGROUNDROP(0x03) | 875 PM3_CONFIG2D_OPAQUESPAN | 876 PM3_CONFIG2D_FBWRITE_ENABLE); 877 878 bus_space_write_4(sc->sc_memt, sc->sc_regh, 879 PM3_SCISSORMINXY, ((y & 0x0fff) << 16) | (x & 0x0fff)); 880 881 bus_space_write_4(sc->sc_memt, sc->sc_regh, 882 PM3_SCISSORMAXXY, (((y + he) & 0x0fff) << 16) | ((x + wi) & 0x0fff)); 883 884 bus_space_write_4(sc->sc_memt, sc->sc_regh, 885 PM3_RECTANGLEPOSITION, (((y) & 0xffff)<<16) | ((x) & 0xffff)); 886 887 bus_space_write_4(sc->sc_memt, sc->sc_regh, 888 PM3_RENDER2D, 889 PM3_RENDER2D_XPOSITIVE | 890 PM3_RENDER2D_YPOSITIVE | 891 PM3_RENDER2D_OPERATION_SYNCONBITMASK | 892 PM3_RENDER2D_SPANOPERATION | 893 ((wi) & 0x0fff) | (((he) & 0x0fff) << 16)); 894 895 pm3fb_wait(sc, he); 896 897 switch (ri->ri_font->stride) { 898 case 1: { 899 uint8_t *data8 = data; 900 uint32_t reg; 901 for (i = 0; i < he; i++) { 902 reg = *data8; 903 bus_space_write_4(sc->sc_memt, 904 sc->sc_regh, 905 PM3_BITMASKPATTERN, reg); 906 data8++; 907 } 908 break; 909 } 910 case 2: { 911 uint16_t *data16 = data; 912 uint32_t reg; 913 for (i = 0; i < he; i++) { 914 reg = *data16; 915 bus_space_write_4(sc->sc_memt, 916 sc->sc_regh, 917 PM3_BITMASKPATTERN, reg); 918 data16++; 919 } 920 break; 921 } 922 } 923 } 924 } 925 } 926 927 static void 928 pm3fb_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 929 { 930 struct rasops_info *ri = cookie; 931 struct vcons_screen *scr = ri->ri_hw; 932 struct pm3fb_softc *sc = scr->scr_cookie; 933 int32_t xs, xd, y, width, height; 934 935 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 936 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 937 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 938 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 939 width = ri->ri_font->fontwidth * ncols; 940 height = ri->ri_font->fontheight; 941 pm3fb_bitblt(sc, xs, y, xd, y, width, height, 3); 942 } 943 } 944 945 static void 946 pm3fb_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 947 { 948 struct rasops_info *ri = cookie; 949 struct vcons_screen *scr = ri->ri_hw; 950 struct pm3fb_softc *sc = scr->scr_cookie; 951 int32_t x, y, width, height, fg, bg, ul; 952 953 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 954 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 955 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 956 width = ri->ri_font->fontwidth * ncols; 957 height = ri->ri_font->fontheight; 958 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 959 960 pm3fb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 961 } 962 } 963 964 static void 965 pm3fb_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 966 { 967 struct rasops_info *ri = cookie; 968 struct vcons_screen *scr = ri->ri_hw; 969 struct pm3fb_softc *sc = scr->scr_cookie; 970 int32_t x, ys, yd, width, height; 971 972 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 973 x = ri->ri_xorigin; 974 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 975 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 976 width = ri->ri_emuwidth; 977 height = ri->ri_font->fontheight*nrows; 978 pm3fb_bitblt(sc, x, ys, x, yd, width, height, 3); 979 } 980 } 981 982 static void 983 pm3fb_eraserows(void *cookie, int row, int nrows, long fillattr) 984 { 985 struct rasops_info *ri = cookie; 986 struct vcons_screen *scr = ri->ri_hw; 987 struct pm3fb_softc *sc = scr->scr_cookie; 988 int32_t x, y, width, height, fg, bg, ul; 989 990 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 991 x = ri->ri_xorigin; 992 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 993 width = ri->ri_emuwidth; 994 height = ri->ri_font->fontheight * nrows; 995 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 996 997 pm3fb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 998 } 999 } 1000 1001 /* should be enough */ 1002 #define MODE_IS_VALID(m) (((m)->hdisplay < 2048)) 1003 1004 static void 1005 pm3_setup_i2c(struct pm3fb_softc *sc) 1006 { 1007 int i; 1008 1009 /* Fill in the i2c tag */ 1010 iic_tag_init(&sc->sc_i2c); 1011 sc->sc_i2c.ic_cookie = sc; 1012 sc->sc_i2c.ic_send_start = pm3fb_i2c_send_start; 1013 sc->sc_i2c.ic_send_stop = pm3fb_i2c_send_stop; 1014 sc->sc_i2c.ic_initiate_xfer = pm3fb_i2c_initiate_xfer; 1015 sc->sc_i2c.ic_read_byte = pm3fb_i2c_read_byte; 1016 sc->sc_i2c.ic_write_byte = pm3fb_i2c_write_byte; 1017 sc->sc_i2c.ic_exec = NULL; 1018 1019 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DISPLAY_DATA, 0); 1020 1021 /* zero out the EDID buffer */ 1022 memset(sc->sc_edid_data, 0, 128); 1023 1024 /* Some monitors don't respond first time */ 1025 i = 0; 1026 while (sc->sc_edid_data[1] == 0 && i < 10) { 1027 ddc_read_edid(&sc->sc_i2c, sc->sc_edid_data, 128); 1028 i++; 1029 } 1030 1031 if (edid_parse(&sc->sc_edid_data[0], &sc->sc_ei) != -1) { 1032 /* 1033 * Now pick a mode. 1034 */ 1035 if ((sc->sc_ei.edid_preferred_mode != NULL)) { 1036 struct videomode *m = sc->sc_ei.edid_preferred_mode; 1037 if (MODE_IS_VALID(m)) { 1038 sc->sc_videomode = m; 1039 } else { 1040 aprint_error_dev(sc->sc_dev, 1041 "unable to use preferred mode\n"); 1042 } 1043 } 1044 /* 1045 * if we can't use the preferred mode go look for the 1046 * best one we can support 1047 */ 1048 if (sc->sc_videomode == NULL) { 1049 struct videomode *m = sc->sc_ei.edid_modes; 1050 1051 sort_modes(sc->sc_ei.edid_modes, 1052 &sc->sc_ei.edid_preferred_mode, 1053 sc->sc_ei.edid_nmodes); 1054 if (sc->sc_videomode == NULL) 1055 for (int n = 0; n < sc->sc_ei.edid_nmodes; n++) 1056 if (MODE_IS_VALID(&m[n])) { 1057 sc->sc_videomode = &m[n]; 1058 break; 1059 } 1060 } 1061 } 1062 if (sc->sc_videomode == NULL) { 1063 /* no EDID data? */ 1064 sc->sc_videomode = pick_mode_by_ref(sc->sc_width, 1065 sc->sc_height, 60); 1066 } 1067 if (sc->sc_videomode != NULL) { 1068 pm3fb_set_mode(sc, sc->sc_videomode); 1069 } 1070 } 1071 1072 /* I2C bitbanging */ 1073 static void pm3fb_i2cbb_set_bits(void *cookie, uint32_t bits) 1074 { 1075 struct pm3fb_softc *sc = cookie; 1076 uint32_t out; 1077 1078 out = bits << 2; /* bitmasks match the IN bits */ 1079 1080 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DISPLAY_DATA, out); 1081 delay(100); 1082 } 1083 1084 static void pm3fb_i2cbb_set_dir(void *cookie, uint32_t dir) 1085 { 1086 /* Nothing to do */ 1087 } 1088 1089 static uint32_t pm3fb_i2cbb_read(void *cookie) 1090 { 1091 struct pm3fb_softc *sc = cookie; 1092 uint32_t bits; 1093 1094 bits = bus_space_read_4(sc->sc_memt, sc->sc_regh, PM3_DISPLAY_DATA); 1095 return bits; 1096 } 1097 1098 /* higher level I2C stuff */ 1099 static int 1100 pm3fb_i2c_send_start(void *cookie, int flags) 1101 { 1102 1103 return (i2c_bitbang_send_start(cookie, flags, &pm3fb_i2cbb_ops)); 1104 } 1105 1106 static int 1107 pm3fb_i2c_send_stop(void *cookie, int flags) 1108 { 1109 1110 return (i2c_bitbang_send_stop(cookie, flags, &pm3fb_i2cbb_ops)); 1111 } 1112 1113 static int 1114 pm3fb_i2c_initiate_xfer(void *cookie, i2c_addr_t addr, int flags) 1115 { 1116 1117 return (i2c_bitbang_initiate_xfer(cookie, addr, flags, 1118 &pm3fb_i2cbb_ops)); 1119 } 1120 1121 static int 1122 pm3fb_i2c_read_byte(void *cookie, uint8_t *valp, int flags) 1123 { 1124 1125 return (i2c_bitbang_read_byte(cookie, valp, flags, &pm3fb_i2cbb_ops)); 1126 } 1127 1128 static int 1129 pm3fb_i2c_write_byte(void *cookie, uint8_t val, int flags) 1130 { 1131 return (i2c_bitbang_write_byte(cookie, val, flags, &pm3fb_i2cbb_ops)); 1132 } 1133 1134 static int 1135 pm3fb_set_pll(struct pm3fb_softc *sc, int freq) 1136 { 1137 uint8_t bf = 0, bpre = 0, bpost = 0; 1138 int count; 1139 unsigned long feedback, prescale, postscale, IntRef, VCO, out_freq, diff, VCOlow, VCOhigh, bdiff = 1000000; 1140 1141 freq *= 10; /* convert into 100Hz units */ 1142 1143 for (postscale = 0; postscale <= 5; postscale++) { 1144 /* 1145 * It is pointless going through the main loop if all values of 1146 * prescale produce an VCO outside the acceptable range 1147 */ 1148 prescale = 1; 1149 feedback = (prescale * (1UL << postscale) * freq) / (2 * PM3_EXT_CLOCK_FREQ); 1150 VCOlow = (2 * PM3_EXT_CLOCK_FREQ * feedback) / prescale; 1151 if (VCOlow > PM3_VCO_FREQ_MAX) 1152 continue; 1153 1154 prescale = 255; 1155 feedback = (prescale * (1UL << postscale) * freq) / (2 * PM3_EXT_CLOCK_FREQ); 1156 VCOhigh = (2 * PM3_EXT_CLOCK_FREQ * feedback) / prescale; 1157 if (VCOhigh < PM3_VCO_FREQ_MIN) 1158 continue; 1159 1160 for (prescale = 1; prescale <= 255; prescale++) { 1161 IntRef = PM3_EXT_CLOCK_FREQ / prescale; 1162 if (IntRef < PM3_INTREF_MIN || IntRef > PM3_INTREF_MAX) { 1163 if (IntRef > PM3_INTREF_MAX) { 1164 /* 1165 * Hopefully we will get into range as the prescale 1166 * value increases 1167 */ 1168 continue; 1169 } else { 1170 /* 1171 * already below minimum and it will only get worse 1172 * move to the next postscale value 1173 */ 1174 break; 1175 } 1176 } 1177 1178 feedback = (prescale * (1UL << postscale) * freq) / (2 * PM3_EXT_CLOCK_FREQ); 1179 1180 if (feedback > 255) { 1181 /* 1182 * prescale, feedbackscale & postscale registers 1183 * are only 8 bits wide 1184 */ 1185 break; 1186 } else if (feedback == 255) { 1187 count = 1; 1188 } else { 1189 count = 2; 1190 } 1191 1192 do { 1193 VCO = (2 * PM3_EXT_CLOCK_FREQ * feedback) / prescale; 1194 if (VCO >= PM3_VCO_FREQ_MIN && VCO <= PM3_VCO_FREQ_MAX) { 1195 out_freq = VCO / (1UL << postscale); 1196 diff = abs(out_freq - freq); 1197 if (diff < bdiff) { 1198 bdiff = diff; 1199 bf = feedback; 1200 bpre = prescale; 1201 bpost = postscale; 1202 if (diff == 0) 1203 goto out; 1204 } 1205 } 1206 feedback++; 1207 } while (--count >= 0); 1208 } 1209 } 1210 out: 1211 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_CLOCK0_PRE_SCALE, bpre); 1212 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_CLOCK0_FEEDBACK_SCALE, bf); 1213 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_CLOCK0_POST_SCALE, bpost); 1214 return 0; 1215 } 1216 1217 static void 1218 pm3fb_set_mode(struct pm3fb_softc *sc, const struct videomode *mode) 1219 { 1220 int t1, t2, t3, t4, stride; 1221 uint32_t vclk, tmp1; 1222 uint8_t sync = 0; 1223 1224 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_BYPASS_MASK, 0xffffffff); 1225 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_APERTURE1_CONTROL, 0x00000000); 1226 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_APERTURE2_CONTROL, 0x00000000); 1227 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FIFODISCONNECT, 0x00000007); 1228 1229 t1 = mode->hsync_start - mode->hdisplay; 1230 t2 = mode->vsync_start - mode->vdisplay; 1231 t3 = mode->hsync_end - mode->hsync_start; 1232 t4 = mode->vsync_end - mode->vsync_start; 1233 stride = (mode->hdisplay + 31) & ~31; 1234 1235 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_HORIZ_TOTAL, 1236 ((mode->htotal - 1) >> 4)); 1237 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_HORIZ_SYNC_END, 1238 (t1 + t3) >> 4); 1239 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_HORIZ_SYNC_START, 1240 (t1 >> 4)); 1241 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_HORIZ_BLANK_END, 1242 (mode->htotal - mode->hdisplay) >> 4); 1243 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_HORIZ_GATE_END, 1244 (mode->htotal - mode->hdisplay) >> 4); 1245 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SCREEN_STRIDE, 1246 (stride >> 4)); 1247 1248 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1249 PM3_VERT_TOTAL, mode->vtotal - 1); 1250 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1251 PM3_VERT_SYNC_END, t2 + t4 - 1); 1252 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1253 PM3_VERT_SYNC_START, t2 - 1); 1254 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1255 PM3_VERT_BLANK_END, mode->vtotal - mode->vdisplay); 1256 1257 /*8bpp*/ 1258 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1259 PM3_BYAPERTURE1MODE, PM3_BYAPERTUREMODE_PIXELSIZE_8BIT); 1260 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1261 PM3_BYAPERTURE2MODE, PM3_BYAPERTUREMODE_PIXELSIZE_8BIT); 1262 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_VIDEO_CONTROL, 1263 (PM3_VC_ENABLE | PM3_VC_HSC_ACTIVE_HIGH | PM3_VC_VSC_ACTIVE_HIGH | PM3_VC_PIXELSIZE_8BIT)); 1264 1265 vclk = bus_space_read_4(sc->sc_memt, sc->sc_regh, PM3_V_CLOCK_CTL); 1266 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_V_CLOCK_CTL, (vclk & 0xFFFFFFFC)); 1267 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SCREEN_BASE, 0x0); 1268 1269 tmp1 = bus_space_read_4(sc->sc_memt, sc->sc_regh, PM3_CHIP_CONFIG); 1270 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CHIP_CONFIG, tmp1 & 0xFFFFFFFD); 1271 1272 pm3fb_set_pll(sc, mode->dot_clock); 1273 1274 if (mode->flags & VID_PHSYNC) 1275 sync |= PM3_SC_HSYNC_ACTIVE_HIGH; 1276 if (mode->flags & VID_PVSYNC) 1277 sync |= PM3_SC_VSYNC_ACTIVE_HIGH; 1278 1279 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1280 PM3_RD_PM3_INDEX_CONTROL, PM3_INCREMENT_DISABLE); 1281 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_SYNC_CONTROL, sync); 1282 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_DAC_CONTROL, 0x00); 1283 1284 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_PIXEL_SIZE, PM3_DACPS_8BIT); 1285 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_COLOR_FORMAT, 1286 (PM3_CF_ORDER_BGR | PM3_CF_VISUAL_256_COLOR)); 1287 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_MISC_CONTROL, PM3_MC_DAC_SIZE_8BIT); 1288 1289 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FIFOCONTROL, 0x00000905); 1290 1291 sc->sc_width = mode->hdisplay; 1292 sc->sc_height = mode->vdisplay; 1293 sc->sc_depth = 8; 1294 sc->sc_stride = stride; 1295 aprint_normal_dev(sc->sc_dev, "pm3 using %d x %d in 8 bit, stride %d\n", 1296 sc->sc_width, sc->sc_height, stride); 1297 } 1298