1 /* $NetBSD: pciidevar.h,v 1.10 2003/03/20 04:22:50 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Christopher G. Demetriou. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Christopher G. Demetriou 17 * for the NetBSD Project. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * PCI IDE driver exported software structures. 35 * 36 * Author: Christopher G. Demetriou, March 2, 1998. 37 */ 38 39 #include <dev/ata/atavar.h> 40 #include <dev/ic/wdcreg.h> 41 #include <dev/ic/wdcvar.h> 42 43 struct device; 44 45 struct pciide_softc { 46 struct wdc_softc sc_wdcdev; /* common wdc definitions */ 47 pci_chipset_tag_t sc_pc; /* PCI registers info */ 48 pcitag_t sc_tag; 49 void *sc_pci_ih; /* PCI interrupt handle */ 50 int sc_dma_ok; /* bus-master DMA info */ 51 bus_space_tag_t sc_dma_iot; 52 bus_space_handle_t sc_dma_ioh; 53 bus_dma_tag_t sc_dmat; 54 55 /* 56 * Some controllers might have DMA restrictions other than 57 * the norm. 58 */ 59 bus_size_t sc_dma_maxsegsz; 60 bus_size_t sc_dma_boundary; 61 62 /* For AMD/nVidia */ 63 bus_addr_t sc_amd_regbase; 64 65 /* For Cypress */ 66 const struct cy82c693_handle *sc_cy_handle; 67 int sc_cy_compatchan; 68 69 /* for SiS */ 70 u_int8_t sis_type; 71 72 /* Vendor info (for interpreting Chip description) */ 73 uint32_t sc_pci_vendor; 74 /* Chip description */ 75 const struct pciide_product_desc *sc_pp; 76 /* common definitions */ 77 struct channel_softc *wdc_chanarray[PCIIDE_NUM_CHANNELS]; 78 /* internal bookkeeping */ 79 struct pciide_channel { /* per-channel data */ 80 struct channel_softc wdc_channel; /* generic part */ 81 char *name; 82 int hw_ok; /* hardware mapped & OK? */ 83 int compat; /* is it compat? */ 84 void *ih; /* compat or pci handle */ 85 bus_space_handle_t ctl_baseioh; /* ctrl regs blk, native mode */ 86 /* DMA tables and DMA map for xfer, for each drive */ 87 struct pciide_dma_maps { 88 bus_dmamap_t dmamap_table; 89 struct idedma_table *dma_table; 90 bus_dmamap_t dmamap_xfer; 91 int dma_flags; 92 } dma_maps[2]; 93 } pciide_channels[PCIIDE_NUM_CHANNELS]; 94 }; 95 96 /* 97 * Functions defined by machine-dependent code. 98 */ 99 100 /* Attach compat interrupt handler, returning handle or NULL if failed. */ 101 #ifdef __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH 102 void *pciide_machdep_compat_intr_establish __P((struct device *, 103 struct pci_attach_args *, int, int (*)(void *), void *)); 104 #endif 105