1 /* $NetBSD: pciide_ixp_reg.h,v 1.4 2007/09/10 10:35:54 cube Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of The NetBSD Foundation nor the names of its 16 * contributors may be used to endorse or promote products derived 17 * from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* All values gathered from the linux driver. */ 33 34 #define IXP_PIO_TIMING 0x40 35 #define IXP_MDMA_TIMING 0x44 36 #define IXP_PIO_CTL 0x48 37 #define IXP_PIO_MODE 0x4a 38 #define IXP_UDMA_CTL 0x54 39 #define IXP_UDMA_MODE 0x56 40 41 /* First 4 bits of UDMA_CTL enable or disable UDMA for the drive */ 42 #define IXP_UDMA_ENABLE(u, c, d) do { \ 43 (u) |= (1 << (2 * (c) + (d))); \ 44 } while (0) 45 #define IXP_UDMA_DISABLE(u, c, d) do { \ 46 (u) &= ~(1 << (2 * (c) + (d))); \ 47 } while (0) 48 49 /* 50 * UDMA_MODE has 4 bits per drive, though only 3 are actually used 51 * Note that in this macro u is the whole 52 * UDMA_CTL+UDMA_MODE register (32bits). 53 * PIO_MODE works just the same. 54 */ 55 #define IXP_SET_MODE(u, c, d, m) do { \ 56 int __ixpshift = 16 + 8*(c) + 4*(d); \ 57 (u) &= ~(0x7 << __ixpshift); \ 58 (u) |= (((m) & 0x7) << __ixpshift); \ 59 } while (0) 60 61 /* 62 * MDMA_TIMING has one byte per drive. 63 * PIO_TIMING works just the same. 64 */ 65 #define IXP_SET_TIMING(m, c, d, t) do { \ 66 int __ixpshift = 16*(c) + 8*(d); \ 67 (m) &= ~(0xff << __ixpshift); \ 68 (m) |= ((t) & 0xff) << __ixpshift; \ 69 } while (0) 70